vmwgfx_execbuf.c 80 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #include "vmwgfx_drv.h"
  28. #include "vmwgfx_reg.h"
  29. #include <drm/ttm/ttm_bo_api.h>
  30. #include <drm/ttm/ttm_placement.h>
  31. #define VMW_RES_HT_ORDER 12
  32. /**
  33. * struct vmw_resource_relocation - Relocation info for resources
  34. *
  35. * @head: List head for the software context's relocation list.
  36. * @res: Non-ref-counted pointer to the resource.
  37. * @offset: Offset of 4 byte entries into the command buffer where the
  38. * id that needs fixup is located.
  39. */
  40. struct vmw_resource_relocation {
  41. struct list_head head;
  42. const struct vmw_resource *res;
  43. unsigned long offset;
  44. };
  45. /**
  46. * struct vmw_resource_val_node - Validation info for resources
  47. *
  48. * @head: List head for the software context's resource list.
  49. * @hash: Hash entry for quick resouce to val_node lookup.
  50. * @res: Ref-counted pointer to the resource.
  51. * @switch_backup: Boolean whether to switch backup buffer on unreserve.
  52. * @new_backup: Refcounted pointer to the new backup buffer.
  53. * @staged_bindings: If @res is a context, tracks bindings set up during
  54. * the command batch. Otherwise NULL.
  55. * @new_backup_offset: New backup buffer offset if @new_backup is non-NUll.
  56. * @first_usage: Set to true the first time the resource is referenced in
  57. * the command stream.
  58. * @no_buffer_needed: Resources do not need to allocate buffer backup on
  59. * reservation. The command stream will provide one.
  60. */
  61. struct vmw_resource_val_node {
  62. struct list_head head;
  63. struct drm_hash_item hash;
  64. struct vmw_resource *res;
  65. struct vmw_dma_buffer *new_backup;
  66. struct vmw_ctx_binding_state *staged_bindings;
  67. unsigned long new_backup_offset;
  68. bool first_usage;
  69. bool no_buffer_needed;
  70. };
  71. /**
  72. * struct vmw_cmd_entry - Describe a command for the verifier
  73. *
  74. * @user_allow: Whether allowed from the execbuf ioctl.
  75. * @gb_disable: Whether disabled if guest-backed objects are available.
  76. * @gb_enable: Whether enabled iff guest-backed objects are available.
  77. */
  78. struct vmw_cmd_entry {
  79. int (*func) (struct vmw_private *, struct vmw_sw_context *,
  80. SVGA3dCmdHeader *);
  81. bool user_allow;
  82. bool gb_disable;
  83. bool gb_enable;
  84. };
  85. #define VMW_CMD_DEF(_cmd, _func, _user_allow, _gb_disable, _gb_enable) \
  86. [(_cmd) - SVGA_3D_CMD_BASE] = {(_func), (_user_allow),\
  87. (_gb_disable), (_gb_enable)}
  88. /**
  89. * vmw_resource_unreserve - unreserve resources previously reserved for
  90. * command submission.
  91. *
  92. * @list_head: list of resources to unreserve.
  93. * @backoff: Whether command submission failed.
  94. */
  95. static void vmw_resource_list_unreserve(struct list_head *list,
  96. bool backoff)
  97. {
  98. struct vmw_resource_val_node *val;
  99. list_for_each_entry(val, list, head) {
  100. struct vmw_resource *res = val->res;
  101. struct vmw_dma_buffer *new_backup =
  102. backoff ? NULL : val->new_backup;
  103. /*
  104. * Transfer staged context bindings to the
  105. * persistent context binding tracker.
  106. */
  107. if (unlikely(val->staged_bindings)) {
  108. if (!backoff) {
  109. vmw_context_binding_state_transfer
  110. (val->res, val->staged_bindings);
  111. }
  112. kfree(val->staged_bindings);
  113. val->staged_bindings = NULL;
  114. }
  115. vmw_resource_unreserve(res, new_backup,
  116. val->new_backup_offset);
  117. vmw_dmabuf_unreference(&val->new_backup);
  118. }
  119. }
  120. /**
  121. * vmw_resource_val_add - Add a resource to the software context's
  122. * resource list if it's not already on it.
  123. *
  124. * @sw_context: Pointer to the software context.
  125. * @res: Pointer to the resource.
  126. * @p_node On successful return points to a valid pointer to a
  127. * struct vmw_resource_val_node, if non-NULL on entry.
  128. */
  129. static int vmw_resource_val_add(struct vmw_sw_context *sw_context,
  130. struct vmw_resource *res,
  131. struct vmw_resource_val_node **p_node)
  132. {
  133. struct vmw_resource_val_node *node;
  134. struct drm_hash_item *hash;
  135. int ret;
  136. if (likely(drm_ht_find_item(&sw_context->res_ht, (unsigned long) res,
  137. &hash) == 0)) {
  138. node = container_of(hash, struct vmw_resource_val_node, hash);
  139. node->first_usage = false;
  140. if (unlikely(p_node != NULL))
  141. *p_node = node;
  142. return 0;
  143. }
  144. node = kzalloc(sizeof(*node), GFP_KERNEL);
  145. if (unlikely(node == NULL)) {
  146. DRM_ERROR("Failed to allocate a resource validation "
  147. "entry.\n");
  148. return -ENOMEM;
  149. }
  150. node->hash.key = (unsigned long) res;
  151. ret = drm_ht_insert_item(&sw_context->res_ht, &node->hash);
  152. if (unlikely(ret != 0)) {
  153. DRM_ERROR("Failed to initialize a resource validation "
  154. "entry.\n");
  155. kfree(node);
  156. return ret;
  157. }
  158. list_add_tail(&node->head, &sw_context->resource_list);
  159. node->res = vmw_resource_reference(res);
  160. node->first_usage = true;
  161. if (unlikely(p_node != NULL))
  162. *p_node = node;
  163. return 0;
  164. }
  165. /**
  166. * vmw_resource_context_res_add - Put resources previously bound to a context on
  167. * the validation list
  168. *
  169. * @dev_priv: Pointer to a device private structure
  170. * @sw_context: Pointer to a software context used for this command submission
  171. * @ctx: Pointer to the context resource
  172. *
  173. * This function puts all resources that were previously bound to @ctx on
  174. * the resource validation list. This is part of the context state reemission
  175. */
  176. static int vmw_resource_context_res_add(struct vmw_private *dev_priv,
  177. struct vmw_sw_context *sw_context,
  178. struct vmw_resource *ctx)
  179. {
  180. struct list_head *binding_list;
  181. struct vmw_ctx_binding *entry;
  182. int ret = 0;
  183. struct vmw_resource *res;
  184. mutex_lock(&dev_priv->binding_mutex);
  185. binding_list = vmw_context_binding_list(ctx);
  186. list_for_each_entry(entry, binding_list, ctx_list) {
  187. res = vmw_resource_reference_unless_doomed(entry->bi.res);
  188. if (unlikely(res == NULL))
  189. continue;
  190. ret = vmw_resource_val_add(sw_context, entry->bi.res, NULL);
  191. vmw_resource_unreference(&res);
  192. if (unlikely(ret != 0))
  193. break;
  194. }
  195. mutex_unlock(&dev_priv->binding_mutex);
  196. return ret;
  197. }
  198. /**
  199. * vmw_resource_relocation_add - Add a relocation to the relocation list
  200. *
  201. * @list: Pointer to head of relocation list.
  202. * @res: The resource.
  203. * @offset: Offset into the command buffer currently being parsed where the
  204. * id that needs fixup is located. Granularity is 4 bytes.
  205. */
  206. static int vmw_resource_relocation_add(struct list_head *list,
  207. const struct vmw_resource *res,
  208. unsigned long offset)
  209. {
  210. struct vmw_resource_relocation *rel;
  211. rel = kmalloc(sizeof(*rel), GFP_KERNEL);
  212. if (unlikely(rel == NULL)) {
  213. DRM_ERROR("Failed to allocate a resource relocation.\n");
  214. return -ENOMEM;
  215. }
  216. rel->res = res;
  217. rel->offset = offset;
  218. list_add_tail(&rel->head, list);
  219. return 0;
  220. }
  221. /**
  222. * vmw_resource_relocations_free - Free all relocations on a list
  223. *
  224. * @list: Pointer to the head of the relocation list.
  225. */
  226. static void vmw_resource_relocations_free(struct list_head *list)
  227. {
  228. struct vmw_resource_relocation *rel, *n;
  229. list_for_each_entry_safe(rel, n, list, head) {
  230. list_del(&rel->head);
  231. kfree(rel);
  232. }
  233. }
  234. /**
  235. * vmw_resource_relocations_apply - Apply all relocations on a list
  236. *
  237. * @cb: Pointer to the start of the command buffer bein patch. This need
  238. * not be the same buffer as the one being parsed when the relocation
  239. * list was built, but the contents must be the same modulo the
  240. * resource ids.
  241. * @list: Pointer to the head of the relocation list.
  242. */
  243. static void vmw_resource_relocations_apply(uint32_t *cb,
  244. struct list_head *list)
  245. {
  246. struct vmw_resource_relocation *rel;
  247. list_for_each_entry(rel, list, head) {
  248. if (likely(rel->res != NULL))
  249. cb[rel->offset] = rel->res->id;
  250. else
  251. cb[rel->offset] = SVGA_3D_CMD_NOP;
  252. }
  253. }
  254. static int vmw_cmd_invalid(struct vmw_private *dev_priv,
  255. struct vmw_sw_context *sw_context,
  256. SVGA3dCmdHeader *header)
  257. {
  258. return capable(CAP_SYS_ADMIN) ? : -EINVAL;
  259. }
  260. static int vmw_cmd_ok(struct vmw_private *dev_priv,
  261. struct vmw_sw_context *sw_context,
  262. SVGA3dCmdHeader *header)
  263. {
  264. return 0;
  265. }
  266. /**
  267. * vmw_bo_to_validate_list - add a bo to a validate list
  268. *
  269. * @sw_context: The software context used for this command submission batch.
  270. * @bo: The buffer object to add.
  271. * @validate_as_mob: Validate this buffer as a MOB.
  272. * @p_val_node: If non-NULL Will be updated with the validate node number
  273. * on return.
  274. *
  275. * Returns -EINVAL if the limit of number of buffer objects per command
  276. * submission is reached.
  277. */
  278. static int vmw_bo_to_validate_list(struct vmw_sw_context *sw_context,
  279. struct ttm_buffer_object *bo,
  280. bool validate_as_mob,
  281. uint32_t *p_val_node)
  282. {
  283. uint32_t val_node;
  284. struct vmw_validate_buffer *vval_buf;
  285. struct ttm_validate_buffer *val_buf;
  286. struct drm_hash_item *hash;
  287. int ret;
  288. if (likely(drm_ht_find_item(&sw_context->res_ht, (unsigned long) bo,
  289. &hash) == 0)) {
  290. vval_buf = container_of(hash, struct vmw_validate_buffer,
  291. hash);
  292. if (unlikely(vval_buf->validate_as_mob != validate_as_mob)) {
  293. DRM_ERROR("Inconsistent buffer usage.\n");
  294. return -EINVAL;
  295. }
  296. val_buf = &vval_buf->base;
  297. val_node = vval_buf - sw_context->val_bufs;
  298. } else {
  299. val_node = sw_context->cur_val_buf;
  300. if (unlikely(val_node >= VMWGFX_MAX_VALIDATIONS)) {
  301. DRM_ERROR("Max number of DMA buffers per submission "
  302. "exceeded.\n");
  303. return -EINVAL;
  304. }
  305. vval_buf = &sw_context->val_bufs[val_node];
  306. vval_buf->hash.key = (unsigned long) bo;
  307. ret = drm_ht_insert_item(&sw_context->res_ht, &vval_buf->hash);
  308. if (unlikely(ret != 0)) {
  309. DRM_ERROR("Failed to initialize a buffer validation "
  310. "entry.\n");
  311. return ret;
  312. }
  313. ++sw_context->cur_val_buf;
  314. val_buf = &vval_buf->base;
  315. val_buf->bo = ttm_bo_reference(bo);
  316. val_buf->reserved = false;
  317. list_add_tail(&val_buf->head, &sw_context->validate_nodes);
  318. vval_buf->validate_as_mob = validate_as_mob;
  319. }
  320. sw_context->fence_flags |= DRM_VMW_FENCE_FLAG_EXEC;
  321. if (p_val_node)
  322. *p_val_node = val_node;
  323. return 0;
  324. }
  325. /**
  326. * vmw_resources_reserve - Reserve all resources on the sw_context's
  327. * resource list.
  328. *
  329. * @sw_context: Pointer to the software context.
  330. *
  331. * Note that since vmware's command submission currently is protected by
  332. * the cmdbuf mutex, no fancy deadlock avoidance is required for resources,
  333. * since only a single thread at once will attempt this.
  334. */
  335. static int vmw_resources_reserve(struct vmw_sw_context *sw_context)
  336. {
  337. struct vmw_resource_val_node *val;
  338. int ret;
  339. list_for_each_entry(val, &sw_context->resource_list, head) {
  340. struct vmw_resource *res = val->res;
  341. ret = vmw_resource_reserve(res, val->no_buffer_needed);
  342. if (unlikely(ret != 0))
  343. return ret;
  344. if (res->backup) {
  345. struct ttm_buffer_object *bo = &res->backup->base;
  346. ret = vmw_bo_to_validate_list
  347. (sw_context, bo,
  348. vmw_resource_needs_backup(res), NULL);
  349. if (unlikely(ret != 0))
  350. return ret;
  351. }
  352. }
  353. return 0;
  354. }
  355. /**
  356. * vmw_resources_validate - Validate all resources on the sw_context's
  357. * resource list.
  358. *
  359. * @sw_context: Pointer to the software context.
  360. *
  361. * Before this function is called, all resource backup buffers must have
  362. * been validated.
  363. */
  364. static int vmw_resources_validate(struct vmw_sw_context *sw_context)
  365. {
  366. struct vmw_resource_val_node *val;
  367. int ret;
  368. list_for_each_entry(val, &sw_context->resource_list, head) {
  369. struct vmw_resource *res = val->res;
  370. ret = vmw_resource_validate(res);
  371. if (unlikely(ret != 0)) {
  372. if (ret != -ERESTARTSYS)
  373. DRM_ERROR("Failed to validate resource.\n");
  374. return ret;
  375. }
  376. }
  377. return 0;
  378. }
  379. /**
  380. * vmw_cmd_res_reloc_add - Add a resource to a software context's
  381. * relocation- and validation lists.
  382. *
  383. * @dev_priv: Pointer to a struct vmw_private identifying the device.
  384. * @sw_context: Pointer to the software context.
  385. * @res_type: Resource type.
  386. * @id_loc: Pointer to where the id that needs translation is located.
  387. * @res: Valid pointer to a struct vmw_resource.
  388. * @p_val: If non null, a pointer to the struct vmw_resource_validate_node
  389. * used for this resource is returned here.
  390. */
  391. static int vmw_cmd_res_reloc_add(struct vmw_private *dev_priv,
  392. struct vmw_sw_context *sw_context,
  393. enum vmw_res_type res_type,
  394. uint32_t *id_loc,
  395. struct vmw_resource *res,
  396. struct vmw_resource_val_node **p_val)
  397. {
  398. int ret;
  399. struct vmw_resource_val_node *node;
  400. *p_val = NULL;
  401. ret = vmw_resource_relocation_add(&sw_context->res_relocations,
  402. res,
  403. id_loc - sw_context->buf_start);
  404. if (unlikely(ret != 0))
  405. return ret;
  406. ret = vmw_resource_val_add(sw_context, res, &node);
  407. if (unlikely(ret != 0))
  408. return ret;
  409. if (res_type == vmw_res_context && dev_priv->has_mob &&
  410. node->first_usage) {
  411. /*
  412. * Put contexts first on the list to be able to exit
  413. * list traversal for contexts early.
  414. */
  415. list_del(&node->head);
  416. list_add(&node->head, &sw_context->resource_list);
  417. ret = vmw_resource_context_res_add(dev_priv, sw_context, res);
  418. if (unlikely(ret != 0))
  419. return ret;
  420. node->staged_bindings =
  421. kzalloc(sizeof(*node->staged_bindings), GFP_KERNEL);
  422. if (node->staged_bindings == NULL) {
  423. DRM_ERROR("Failed to allocate context binding "
  424. "information.\n");
  425. return -ENOMEM;
  426. }
  427. INIT_LIST_HEAD(&node->staged_bindings->list);
  428. }
  429. if (p_val)
  430. *p_val = node;
  431. return 0;
  432. }
  433. /**
  434. * vmw_cmd_res_check - Check that a resource is present and if so, put it
  435. * on the resource validate list unless it's already there.
  436. *
  437. * @dev_priv: Pointer to a device private structure.
  438. * @sw_context: Pointer to the software context.
  439. * @res_type: Resource type.
  440. * @converter: User-space visisble type specific information.
  441. * @id_loc: Pointer to the location in the command buffer currently being
  442. * parsed from where the user-space resource id handle is located.
  443. * @p_val: Pointer to pointer to resource validalidation node. Populated
  444. * on exit.
  445. */
  446. static int
  447. vmw_cmd_res_check(struct vmw_private *dev_priv,
  448. struct vmw_sw_context *sw_context,
  449. enum vmw_res_type res_type,
  450. const struct vmw_user_resource_conv *converter,
  451. uint32_t *id_loc,
  452. struct vmw_resource_val_node **p_val)
  453. {
  454. struct vmw_res_cache_entry *rcache =
  455. &sw_context->res_cache[res_type];
  456. struct vmw_resource *res;
  457. struct vmw_resource_val_node *node;
  458. int ret;
  459. if (*id_loc == SVGA3D_INVALID_ID) {
  460. if (p_val)
  461. *p_val = NULL;
  462. if (res_type == vmw_res_context) {
  463. DRM_ERROR("Illegal context invalid id.\n");
  464. return -EINVAL;
  465. }
  466. return 0;
  467. }
  468. /*
  469. * Fastpath in case of repeated commands referencing the same
  470. * resource
  471. */
  472. if (likely(rcache->valid && *id_loc == rcache->handle)) {
  473. const struct vmw_resource *res = rcache->res;
  474. rcache->node->first_usage = false;
  475. if (p_val)
  476. *p_val = rcache->node;
  477. return vmw_resource_relocation_add
  478. (&sw_context->res_relocations, res,
  479. id_loc - sw_context->buf_start);
  480. }
  481. ret = vmw_user_resource_lookup_handle(dev_priv,
  482. sw_context->fp->tfile,
  483. *id_loc,
  484. converter,
  485. &res);
  486. if (unlikely(ret != 0)) {
  487. DRM_ERROR("Could not find or use resource 0x%08x.\n",
  488. (unsigned) *id_loc);
  489. dump_stack();
  490. return ret;
  491. }
  492. rcache->valid = true;
  493. rcache->res = res;
  494. rcache->handle = *id_loc;
  495. ret = vmw_cmd_res_reloc_add(dev_priv, sw_context, res_type, id_loc,
  496. res, &node);
  497. if (unlikely(ret != 0))
  498. goto out_no_reloc;
  499. rcache->node = node;
  500. if (p_val)
  501. *p_val = node;
  502. vmw_resource_unreference(&res);
  503. return 0;
  504. out_no_reloc:
  505. BUG_ON(sw_context->error_resource != NULL);
  506. sw_context->error_resource = res;
  507. return ret;
  508. }
  509. /**
  510. * vmw_rebind_contexts - Rebind all resources previously bound to
  511. * referenced contexts.
  512. *
  513. * @sw_context: Pointer to the software context.
  514. *
  515. * Rebind context binding points that have been scrubbed because of eviction.
  516. */
  517. static int vmw_rebind_contexts(struct vmw_sw_context *sw_context)
  518. {
  519. struct vmw_resource_val_node *val;
  520. int ret;
  521. list_for_each_entry(val, &sw_context->resource_list, head) {
  522. if (unlikely(!val->staged_bindings))
  523. break;
  524. ret = vmw_context_rebind_all(val->res);
  525. if (unlikely(ret != 0)) {
  526. if (ret != -ERESTARTSYS)
  527. DRM_ERROR("Failed to rebind context.\n");
  528. return ret;
  529. }
  530. }
  531. return 0;
  532. }
  533. /**
  534. * vmw_cmd_cid_check - Check a command header for valid context information.
  535. *
  536. * @dev_priv: Pointer to a device private structure.
  537. * @sw_context: Pointer to the software context.
  538. * @header: A command header with an embedded user-space context handle.
  539. *
  540. * Convenience function: Call vmw_cmd_res_check with the user-space context
  541. * handle embedded in @header.
  542. */
  543. static int vmw_cmd_cid_check(struct vmw_private *dev_priv,
  544. struct vmw_sw_context *sw_context,
  545. SVGA3dCmdHeader *header)
  546. {
  547. struct vmw_cid_cmd {
  548. SVGA3dCmdHeader header;
  549. uint32_t cid;
  550. } *cmd;
  551. cmd = container_of(header, struct vmw_cid_cmd, header);
  552. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  553. user_context_converter, &cmd->cid, NULL);
  554. }
  555. static int vmw_cmd_set_render_target_check(struct vmw_private *dev_priv,
  556. struct vmw_sw_context *sw_context,
  557. SVGA3dCmdHeader *header)
  558. {
  559. struct vmw_sid_cmd {
  560. SVGA3dCmdHeader header;
  561. SVGA3dCmdSetRenderTarget body;
  562. } *cmd;
  563. struct vmw_resource_val_node *ctx_node;
  564. struct vmw_resource_val_node *res_node;
  565. int ret;
  566. cmd = container_of(header, struct vmw_sid_cmd, header);
  567. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  568. user_context_converter, &cmd->body.cid,
  569. &ctx_node);
  570. if (unlikely(ret != 0))
  571. return ret;
  572. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  573. user_surface_converter,
  574. &cmd->body.target.sid, &res_node);
  575. if (unlikely(ret != 0))
  576. return ret;
  577. if (dev_priv->has_mob) {
  578. struct vmw_ctx_bindinfo bi;
  579. bi.ctx = ctx_node->res;
  580. bi.res = res_node ? res_node->res : NULL;
  581. bi.bt = vmw_ctx_binding_rt;
  582. bi.i1.rt_type = cmd->body.type;
  583. return vmw_context_binding_add(ctx_node->staged_bindings, &bi);
  584. }
  585. return 0;
  586. }
  587. static int vmw_cmd_surface_copy_check(struct vmw_private *dev_priv,
  588. struct vmw_sw_context *sw_context,
  589. SVGA3dCmdHeader *header)
  590. {
  591. struct vmw_sid_cmd {
  592. SVGA3dCmdHeader header;
  593. SVGA3dCmdSurfaceCopy body;
  594. } *cmd;
  595. int ret;
  596. cmd = container_of(header, struct vmw_sid_cmd, header);
  597. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  598. user_surface_converter,
  599. &cmd->body.src.sid, NULL);
  600. if (unlikely(ret != 0))
  601. return ret;
  602. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  603. user_surface_converter,
  604. &cmd->body.dest.sid, NULL);
  605. }
  606. static int vmw_cmd_stretch_blt_check(struct vmw_private *dev_priv,
  607. struct vmw_sw_context *sw_context,
  608. SVGA3dCmdHeader *header)
  609. {
  610. struct vmw_sid_cmd {
  611. SVGA3dCmdHeader header;
  612. SVGA3dCmdSurfaceStretchBlt body;
  613. } *cmd;
  614. int ret;
  615. cmd = container_of(header, struct vmw_sid_cmd, header);
  616. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  617. user_surface_converter,
  618. &cmd->body.src.sid, NULL);
  619. if (unlikely(ret != 0))
  620. return ret;
  621. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  622. user_surface_converter,
  623. &cmd->body.dest.sid, NULL);
  624. }
  625. static int vmw_cmd_blt_surf_screen_check(struct vmw_private *dev_priv,
  626. struct vmw_sw_context *sw_context,
  627. SVGA3dCmdHeader *header)
  628. {
  629. struct vmw_sid_cmd {
  630. SVGA3dCmdHeader header;
  631. SVGA3dCmdBlitSurfaceToScreen body;
  632. } *cmd;
  633. cmd = container_of(header, struct vmw_sid_cmd, header);
  634. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  635. user_surface_converter,
  636. &cmd->body.srcImage.sid, NULL);
  637. }
  638. static int vmw_cmd_present_check(struct vmw_private *dev_priv,
  639. struct vmw_sw_context *sw_context,
  640. SVGA3dCmdHeader *header)
  641. {
  642. struct vmw_sid_cmd {
  643. SVGA3dCmdHeader header;
  644. SVGA3dCmdPresent body;
  645. } *cmd;
  646. cmd = container_of(header, struct vmw_sid_cmd, header);
  647. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  648. user_surface_converter, &cmd->body.sid,
  649. NULL);
  650. }
  651. /**
  652. * vmw_query_bo_switch_prepare - Prepare to switch pinned buffer for queries.
  653. *
  654. * @dev_priv: The device private structure.
  655. * @new_query_bo: The new buffer holding query results.
  656. * @sw_context: The software context used for this command submission.
  657. *
  658. * This function checks whether @new_query_bo is suitable for holding
  659. * query results, and if another buffer currently is pinned for query
  660. * results. If so, the function prepares the state of @sw_context for
  661. * switching pinned buffers after successful submission of the current
  662. * command batch.
  663. */
  664. static int vmw_query_bo_switch_prepare(struct vmw_private *dev_priv,
  665. struct ttm_buffer_object *new_query_bo,
  666. struct vmw_sw_context *sw_context)
  667. {
  668. struct vmw_res_cache_entry *ctx_entry =
  669. &sw_context->res_cache[vmw_res_context];
  670. int ret;
  671. BUG_ON(!ctx_entry->valid);
  672. sw_context->last_query_ctx = ctx_entry->res;
  673. if (unlikely(new_query_bo != sw_context->cur_query_bo)) {
  674. if (unlikely(new_query_bo->num_pages > 4)) {
  675. DRM_ERROR("Query buffer too large.\n");
  676. return -EINVAL;
  677. }
  678. if (unlikely(sw_context->cur_query_bo != NULL)) {
  679. sw_context->needs_post_query_barrier = true;
  680. ret = vmw_bo_to_validate_list(sw_context,
  681. sw_context->cur_query_bo,
  682. dev_priv->has_mob, NULL);
  683. if (unlikely(ret != 0))
  684. return ret;
  685. }
  686. sw_context->cur_query_bo = new_query_bo;
  687. ret = vmw_bo_to_validate_list(sw_context,
  688. dev_priv->dummy_query_bo,
  689. dev_priv->has_mob, NULL);
  690. if (unlikely(ret != 0))
  691. return ret;
  692. }
  693. return 0;
  694. }
  695. /**
  696. * vmw_query_bo_switch_commit - Finalize switching pinned query buffer
  697. *
  698. * @dev_priv: The device private structure.
  699. * @sw_context: The software context used for this command submission batch.
  700. *
  701. * This function will check if we're switching query buffers, and will then,
  702. * issue a dummy occlusion query wait used as a query barrier. When the fence
  703. * object following that query wait has signaled, we are sure that all
  704. * preceding queries have finished, and the old query buffer can be unpinned.
  705. * However, since both the new query buffer and the old one are fenced with
  706. * that fence, we can do an asynchronus unpin now, and be sure that the
  707. * old query buffer won't be moved until the fence has signaled.
  708. *
  709. * As mentioned above, both the new - and old query buffers need to be fenced
  710. * using a sequence emitted *after* calling this function.
  711. */
  712. static void vmw_query_bo_switch_commit(struct vmw_private *dev_priv,
  713. struct vmw_sw_context *sw_context)
  714. {
  715. /*
  716. * The validate list should still hold references to all
  717. * contexts here.
  718. */
  719. if (sw_context->needs_post_query_barrier) {
  720. struct vmw_res_cache_entry *ctx_entry =
  721. &sw_context->res_cache[vmw_res_context];
  722. struct vmw_resource *ctx;
  723. int ret;
  724. BUG_ON(!ctx_entry->valid);
  725. ctx = ctx_entry->res;
  726. ret = vmw_fifo_emit_dummy_query(dev_priv, ctx->id);
  727. if (unlikely(ret != 0))
  728. DRM_ERROR("Out of fifo space for dummy query.\n");
  729. }
  730. if (dev_priv->pinned_bo != sw_context->cur_query_bo) {
  731. if (dev_priv->pinned_bo) {
  732. vmw_bo_pin(dev_priv->pinned_bo, false);
  733. ttm_bo_unref(&dev_priv->pinned_bo);
  734. }
  735. if (!sw_context->needs_post_query_barrier) {
  736. vmw_bo_pin(sw_context->cur_query_bo, true);
  737. /*
  738. * We pin also the dummy_query_bo buffer so that we
  739. * don't need to validate it when emitting
  740. * dummy queries in context destroy paths.
  741. */
  742. vmw_bo_pin(dev_priv->dummy_query_bo, true);
  743. dev_priv->dummy_query_bo_pinned = true;
  744. BUG_ON(sw_context->last_query_ctx == NULL);
  745. dev_priv->query_cid = sw_context->last_query_ctx->id;
  746. dev_priv->query_cid_valid = true;
  747. dev_priv->pinned_bo =
  748. ttm_bo_reference(sw_context->cur_query_bo);
  749. }
  750. }
  751. }
  752. /**
  753. * vmw_translate_mob_pointer - Prepare to translate a user-space buffer
  754. * handle to a MOB id.
  755. *
  756. * @dev_priv: Pointer to a device private structure.
  757. * @sw_context: The software context used for this command batch validation.
  758. * @id: Pointer to the user-space handle to be translated.
  759. * @vmw_bo_p: Points to a location that, on successful return will carry
  760. * a reference-counted pointer to the DMA buffer identified by the
  761. * user-space handle in @id.
  762. *
  763. * This function saves information needed to translate a user-space buffer
  764. * handle to a MOB id. The translation does not take place immediately, but
  765. * during a call to vmw_apply_relocations(). This function builds a relocation
  766. * list and a list of buffers to validate. The former needs to be freed using
  767. * either vmw_apply_relocations() or vmw_free_relocations(). The latter
  768. * needs to be freed using vmw_clear_validations.
  769. */
  770. static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
  771. struct vmw_sw_context *sw_context,
  772. SVGAMobId *id,
  773. struct vmw_dma_buffer **vmw_bo_p)
  774. {
  775. struct vmw_dma_buffer *vmw_bo = NULL;
  776. struct ttm_buffer_object *bo;
  777. uint32_t handle = *id;
  778. struct vmw_relocation *reloc;
  779. int ret;
  780. ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo);
  781. if (unlikely(ret != 0)) {
  782. DRM_ERROR("Could not find or use MOB buffer.\n");
  783. return -EINVAL;
  784. }
  785. bo = &vmw_bo->base;
  786. if (unlikely(sw_context->cur_reloc >= VMWGFX_MAX_RELOCATIONS)) {
  787. DRM_ERROR("Max number relocations per submission"
  788. " exceeded\n");
  789. ret = -EINVAL;
  790. goto out_no_reloc;
  791. }
  792. reloc = &sw_context->relocs[sw_context->cur_reloc++];
  793. reloc->mob_loc = id;
  794. reloc->location = NULL;
  795. ret = vmw_bo_to_validate_list(sw_context, bo, true, &reloc->index);
  796. if (unlikely(ret != 0))
  797. goto out_no_reloc;
  798. *vmw_bo_p = vmw_bo;
  799. return 0;
  800. out_no_reloc:
  801. vmw_dmabuf_unreference(&vmw_bo);
  802. vmw_bo_p = NULL;
  803. return ret;
  804. }
  805. /**
  806. * vmw_translate_guest_pointer - Prepare to translate a user-space buffer
  807. * handle to a valid SVGAGuestPtr
  808. *
  809. * @dev_priv: Pointer to a device private structure.
  810. * @sw_context: The software context used for this command batch validation.
  811. * @ptr: Pointer to the user-space handle to be translated.
  812. * @vmw_bo_p: Points to a location that, on successful return will carry
  813. * a reference-counted pointer to the DMA buffer identified by the
  814. * user-space handle in @id.
  815. *
  816. * This function saves information needed to translate a user-space buffer
  817. * handle to a valid SVGAGuestPtr. The translation does not take place
  818. * immediately, but during a call to vmw_apply_relocations().
  819. * This function builds a relocation list and a list of buffers to validate.
  820. * The former needs to be freed using either vmw_apply_relocations() or
  821. * vmw_free_relocations(). The latter needs to be freed using
  822. * vmw_clear_validations.
  823. */
  824. static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
  825. struct vmw_sw_context *sw_context,
  826. SVGAGuestPtr *ptr,
  827. struct vmw_dma_buffer **vmw_bo_p)
  828. {
  829. struct vmw_dma_buffer *vmw_bo = NULL;
  830. struct ttm_buffer_object *bo;
  831. uint32_t handle = ptr->gmrId;
  832. struct vmw_relocation *reloc;
  833. int ret;
  834. ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo);
  835. if (unlikely(ret != 0)) {
  836. DRM_ERROR("Could not find or use GMR region.\n");
  837. return -EINVAL;
  838. }
  839. bo = &vmw_bo->base;
  840. if (unlikely(sw_context->cur_reloc >= VMWGFX_MAX_RELOCATIONS)) {
  841. DRM_ERROR("Max number relocations per submission"
  842. " exceeded\n");
  843. ret = -EINVAL;
  844. goto out_no_reloc;
  845. }
  846. reloc = &sw_context->relocs[sw_context->cur_reloc++];
  847. reloc->location = ptr;
  848. ret = vmw_bo_to_validate_list(sw_context, bo, false, &reloc->index);
  849. if (unlikely(ret != 0))
  850. goto out_no_reloc;
  851. *vmw_bo_p = vmw_bo;
  852. return 0;
  853. out_no_reloc:
  854. vmw_dmabuf_unreference(&vmw_bo);
  855. vmw_bo_p = NULL;
  856. return ret;
  857. }
  858. /**
  859. * vmw_cmd_begin_gb_query - validate a SVGA_3D_CMD_BEGIN_GB_QUERY command.
  860. *
  861. * @dev_priv: Pointer to a device private struct.
  862. * @sw_context: The software context used for this command submission.
  863. * @header: Pointer to the command header in the command stream.
  864. */
  865. static int vmw_cmd_begin_gb_query(struct vmw_private *dev_priv,
  866. struct vmw_sw_context *sw_context,
  867. SVGA3dCmdHeader *header)
  868. {
  869. struct vmw_begin_gb_query_cmd {
  870. SVGA3dCmdHeader header;
  871. SVGA3dCmdBeginGBQuery q;
  872. } *cmd;
  873. cmd = container_of(header, struct vmw_begin_gb_query_cmd,
  874. header);
  875. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  876. user_context_converter, &cmd->q.cid,
  877. NULL);
  878. }
  879. /**
  880. * vmw_cmd_begin_query - validate a SVGA_3D_CMD_BEGIN_QUERY command.
  881. *
  882. * @dev_priv: Pointer to a device private struct.
  883. * @sw_context: The software context used for this command submission.
  884. * @header: Pointer to the command header in the command stream.
  885. */
  886. static int vmw_cmd_begin_query(struct vmw_private *dev_priv,
  887. struct vmw_sw_context *sw_context,
  888. SVGA3dCmdHeader *header)
  889. {
  890. struct vmw_begin_query_cmd {
  891. SVGA3dCmdHeader header;
  892. SVGA3dCmdBeginQuery q;
  893. } *cmd;
  894. cmd = container_of(header, struct vmw_begin_query_cmd,
  895. header);
  896. if (unlikely(dev_priv->has_mob)) {
  897. struct {
  898. SVGA3dCmdHeader header;
  899. SVGA3dCmdBeginGBQuery q;
  900. } gb_cmd;
  901. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  902. gb_cmd.header.id = SVGA_3D_CMD_BEGIN_GB_QUERY;
  903. gb_cmd.header.size = cmd->header.size;
  904. gb_cmd.q.cid = cmd->q.cid;
  905. gb_cmd.q.type = cmd->q.type;
  906. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  907. return vmw_cmd_begin_gb_query(dev_priv, sw_context, header);
  908. }
  909. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  910. user_context_converter, &cmd->q.cid,
  911. NULL);
  912. }
  913. /**
  914. * vmw_cmd_end_gb_query - validate a SVGA_3D_CMD_END_GB_QUERY command.
  915. *
  916. * @dev_priv: Pointer to a device private struct.
  917. * @sw_context: The software context used for this command submission.
  918. * @header: Pointer to the command header in the command stream.
  919. */
  920. static int vmw_cmd_end_gb_query(struct vmw_private *dev_priv,
  921. struct vmw_sw_context *sw_context,
  922. SVGA3dCmdHeader *header)
  923. {
  924. struct vmw_dma_buffer *vmw_bo;
  925. struct vmw_query_cmd {
  926. SVGA3dCmdHeader header;
  927. SVGA3dCmdEndGBQuery q;
  928. } *cmd;
  929. int ret;
  930. cmd = container_of(header, struct vmw_query_cmd, header);
  931. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  932. if (unlikely(ret != 0))
  933. return ret;
  934. ret = vmw_translate_mob_ptr(dev_priv, sw_context,
  935. &cmd->q.mobid,
  936. &vmw_bo);
  937. if (unlikely(ret != 0))
  938. return ret;
  939. ret = vmw_query_bo_switch_prepare(dev_priv, &vmw_bo->base, sw_context);
  940. vmw_dmabuf_unreference(&vmw_bo);
  941. return ret;
  942. }
  943. /**
  944. * vmw_cmd_end_query - validate a SVGA_3D_CMD_END_QUERY command.
  945. *
  946. * @dev_priv: Pointer to a device private struct.
  947. * @sw_context: The software context used for this command submission.
  948. * @header: Pointer to the command header in the command stream.
  949. */
  950. static int vmw_cmd_end_query(struct vmw_private *dev_priv,
  951. struct vmw_sw_context *sw_context,
  952. SVGA3dCmdHeader *header)
  953. {
  954. struct vmw_dma_buffer *vmw_bo;
  955. struct vmw_query_cmd {
  956. SVGA3dCmdHeader header;
  957. SVGA3dCmdEndQuery q;
  958. } *cmd;
  959. int ret;
  960. cmd = container_of(header, struct vmw_query_cmd, header);
  961. if (dev_priv->has_mob) {
  962. struct {
  963. SVGA3dCmdHeader header;
  964. SVGA3dCmdEndGBQuery q;
  965. } gb_cmd;
  966. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  967. gb_cmd.header.id = SVGA_3D_CMD_END_GB_QUERY;
  968. gb_cmd.header.size = cmd->header.size;
  969. gb_cmd.q.cid = cmd->q.cid;
  970. gb_cmd.q.type = cmd->q.type;
  971. gb_cmd.q.mobid = cmd->q.guestResult.gmrId;
  972. gb_cmd.q.offset = cmd->q.guestResult.offset;
  973. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  974. return vmw_cmd_end_gb_query(dev_priv, sw_context, header);
  975. }
  976. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  977. if (unlikely(ret != 0))
  978. return ret;
  979. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  980. &cmd->q.guestResult,
  981. &vmw_bo);
  982. if (unlikely(ret != 0))
  983. return ret;
  984. ret = vmw_query_bo_switch_prepare(dev_priv, &vmw_bo->base, sw_context);
  985. vmw_dmabuf_unreference(&vmw_bo);
  986. return ret;
  987. }
  988. /**
  989. * vmw_cmd_wait_gb_query - validate a SVGA_3D_CMD_WAIT_GB_QUERY command.
  990. *
  991. * @dev_priv: Pointer to a device private struct.
  992. * @sw_context: The software context used for this command submission.
  993. * @header: Pointer to the command header in the command stream.
  994. */
  995. static int vmw_cmd_wait_gb_query(struct vmw_private *dev_priv,
  996. struct vmw_sw_context *sw_context,
  997. SVGA3dCmdHeader *header)
  998. {
  999. struct vmw_dma_buffer *vmw_bo;
  1000. struct vmw_query_cmd {
  1001. SVGA3dCmdHeader header;
  1002. SVGA3dCmdWaitForGBQuery q;
  1003. } *cmd;
  1004. int ret;
  1005. cmd = container_of(header, struct vmw_query_cmd, header);
  1006. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1007. if (unlikely(ret != 0))
  1008. return ret;
  1009. ret = vmw_translate_mob_ptr(dev_priv, sw_context,
  1010. &cmd->q.mobid,
  1011. &vmw_bo);
  1012. if (unlikely(ret != 0))
  1013. return ret;
  1014. vmw_dmabuf_unreference(&vmw_bo);
  1015. return 0;
  1016. }
  1017. /**
  1018. * vmw_cmd_wait_query - validate a SVGA_3D_CMD_WAIT_QUERY command.
  1019. *
  1020. * @dev_priv: Pointer to a device private struct.
  1021. * @sw_context: The software context used for this command submission.
  1022. * @header: Pointer to the command header in the command stream.
  1023. */
  1024. static int vmw_cmd_wait_query(struct vmw_private *dev_priv,
  1025. struct vmw_sw_context *sw_context,
  1026. SVGA3dCmdHeader *header)
  1027. {
  1028. struct vmw_dma_buffer *vmw_bo;
  1029. struct vmw_query_cmd {
  1030. SVGA3dCmdHeader header;
  1031. SVGA3dCmdWaitForQuery q;
  1032. } *cmd;
  1033. int ret;
  1034. cmd = container_of(header, struct vmw_query_cmd, header);
  1035. if (dev_priv->has_mob) {
  1036. struct {
  1037. SVGA3dCmdHeader header;
  1038. SVGA3dCmdWaitForGBQuery q;
  1039. } gb_cmd;
  1040. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  1041. gb_cmd.header.id = SVGA_3D_CMD_WAIT_FOR_GB_QUERY;
  1042. gb_cmd.header.size = cmd->header.size;
  1043. gb_cmd.q.cid = cmd->q.cid;
  1044. gb_cmd.q.type = cmd->q.type;
  1045. gb_cmd.q.mobid = cmd->q.guestResult.gmrId;
  1046. gb_cmd.q.offset = cmd->q.guestResult.offset;
  1047. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  1048. return vmw_cmd_wait_gb_query(dev_priv, sw_context, header);
  1049. }
  1050. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1051. if (unlikely(ret != 0))
  1052. return ret;
  1053. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  1054. &cmd->q.guestResult,
  1055. &vmw_bo);
  1056. if (unlikely(ret != 0))
  1057. return ret;
  1058. vmw_dmabuf_unreference(&vmw_bo);
  1059. return 0;
  1060. }
  1061. static int vmw_cmd_dma(struct vmw_private *dev_priv,
  1062. struct vmw_sw_context *sw_context,
  1063. SVGA3dCmdHeader *header)
  1064. {
  1065. struct vmw_dma_buffer *vmw_bo = NULL;
  1066. struct vmw_surface *srf = NULL;
  1067. struct vmw_dma_cmd {
  1068. SVGA3dCmdHeader header;
  1069. SVGA3dCmdSurfaceDMA dma;
  1070. } *cmd;
  1071. int ret;
  1072. SVGA3dCmdSurfaceDMASuffix *suffix;
  1073. uint32_t bo_size;
  1074. cmd = container_of(header, struct vmw_dma_cmd, header);
  1075. suffix = (SVGA3dCmdSurfaceDMASuffix *)((unsigned long) &cmd->dma +
  1076. header->size - sizeof(*suffix));
  1077. /* Make sure device and verifier stays in sync. */
  1078. if (unlikely(suffix->suffixSize != sizeof(*suffix))) {
  1079. DRM_ERROR("Invalid DMA suffix size.\n");
  1080. return -EINVAL;
  1081. }
  1082. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  1083. &cmd->dma.guest.ptr,
  1084. &vmw_bo);
  1085. if (unlikely(ret != 0))
  1086. return ret;
  1087. /* Make sure DMA doesn't cross BO boundaries. */
  1088. bo_size = vmw_bo->base.num_pages * PAGE_SIZE;
  1089. if (unlikely(cmd->dma.guest.ptr.offset > bo_size)) {
  1090. DRM_ERROR("Invalid DMA offset.\n");
  1091. return -EINVAL;
  1092. }
  1093. bo_size -= cmd->dma.guest.ptr.offset;
  1094. if (unlikely(suffix->maximumOffset > bo_size))
  1095. suffix->maximumOffset = bo_size;
  1096. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1097. user_surface_converter, &cmd->dma.host.sid,
  1098. NULL);
  1099. if (unlikely(ret != 0)) {
  1100. if (unlikely(ret != -ERESTARTSYS))
  1101. DRM_ERROR("could not find surface for DMA.\n");
  1102. goto out_no_surface;
  1103. }
  1104. srf = vmw_res_to_srf(sw_context->res_cache[vmw_res_surface].res);
  1105. vmw_kms_cursor_snoop(srf, sw_context->fp->tfile, &vmw_bo->base,
  1106. header);
  1107. out_no_surface:
  1108. vmw_dmabuf_unreference(&vmw_bo);
  1109. return ret;
  1110. }
  1111. static int vmw_cmd_draw(struct vmw_private *dev_priv,
  1112. struct vmw_sw_context *sw_context,
  1113. SVGA3dCmdHeader *header)
  1114. {
  1115. struct vmw_draw_cmd {
  1116. SVGA3dCmdHeader header;
  1117. SVGA3dCmdDrawPrimitives body;
  1118. } *cmd;
  1119. SVGA3dVertexDecl *decl = (SVGA3dVertexDecl *)(
  1120. (unsigned long)header + sizeof(*cmd));
  1121. SVGA3dPrimitiveRange *range;
  1122. uint32_t i;
  1123. uint32_t maxnum;
  1124. int ret;
  1125. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1126. if (unlikely(ret != 0))
  1127. return ret;
  1128. cmd = container_of(header, struct vmw_draw_cmd, header);
  1129. maxnum = (header->size - sizeof(cmd->body)) / sizeof(*decl);
  1130. if (unlikely(cmd->body.numVertexDecls > maxnum)) {
  1131. DRM_ERROR("Illegal number of vertex declarations.\n");
  1132. return -EINVAL;
  1133. }
  1134. for (i = 0; i < cmd->body.numVertexDecls; ++i, ++decl) {
  1135. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1136. user_surface_converter,
  1137. &decl->array.surfaceId, NULL);
  1138. if (unlikely(ret != 0))
  1139. return ret;
  1140. }
  1141. maxnum = (header->size - sizeof(cmd->body) -
  1142. cmd->body.numVertexDecls * sizeof(*decl)) / sizeof(*range);
  1143. if (unlikely(cmd->body.numRanges > maxnum)) {
  1144. DRM_ERROR("Illegal number of index ranges.\n");
  1145. return -EINVAL;
  1146. }
  1147. range = (SVGA3dPrimitiveRange *) decl;
  1148. for (i = 0; i < cmd->body.numRanges; ++i, ++range) {
  1149. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1150. user_surface_converter,
  1151. &range->indexArray.surfaceId, NULL);
  1152. if (unlikely(ret != 0))
  1153. return ret;
  1154. }
  1155. return 0;
  1156. }
  1157. static int vmw_cmd_tex_state(struct vmw_private *dev_priv,
  1158. struct vmw_sw_context *sw_context,
  1159. SVGA3dCmdHeader *header)
  1160. {
  1161. struct vmw_tex_state_cmd {
  1162. SVGA3dCmdHeader header;
  1163. SVGA3dCmdSetTextureState state;
  1164. } *cmd;
  1165. SVGA3dTextureState *last_state = (SVGA3dTextureState *)
  1166. ((unsigned long) header + header->size + sizeof(header));
  1167. SVGA3dTextureState *cur_state = (SVGA3dTextureState *)
  1168. ((unsigned long) header + sizeof(struct vmw_tex_state_cmd));
  1169. struct vmw_resource_val_node *ctx_node;
  1170. struct vmw_resource_val_node *res_node;
  1171. int ret;
  1172. cmd = container_of(header, struct vmw_tex_state_cmd,
  1173. header);
  1174. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1175. user_context_converter, &cmd->state.cid,
  1176. &ctx_node);
  1177. if (unlikely(ret != 0))
  1178. return ret;
  1179. for (; cur_state < last_state; ++cur_state) {
  1180. if (likely(cur_state->name != SVGA3D_TS_BIND_TEXTURE))
  1181. continue;
  1182. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1183. user_surface_converter,
  1184. &cur_state->value, &res_node);
  1185. if (unlikely(ret != 0))
  1186. return ret;
  1187. if (dev_priv->has_mob) {
  1188. struct vmw_ctx_bindinfo bi;
  1189. bi.ctx = ctx_node->res;
  1190. bi.res = res_node ? res_node->res : NULL;
  1191. bi.bt = vmw_ctx_binding_tex;
  1192. bi.i1.texture_stage = cur_state->stage;
  1193. vmw_context_binding_add(ctx_node->staged_bindings,
  1194. &bi);
  1195. }
  1196. }
  1197. return 0;
  1198. }
  1199. static int vmw_cmd_check_define_gmrfb(struct vmw_private *dev_priv,
  1200. struct vmw_sw_context *sw_context,
  1201. void *buf)
  1202. {
  1203. struct vmw_dma_buffer *vmw_bo;
  1204. int ret;
  1205. struct {
  1206. uint32_t header;
  1207. SVGAFifoCmdDefineGMRFB body;
  1208. } *cmd = buf;
  1209. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  1210. &cmd->body.ptr,
  1211. &vmw_bo);
  1212. if (unlikely(ret != 0))
  1213. return ret;
  1214. vmw_dmabuf_unreference(&vmw_bo);
  1215. return ret;
  1216. }
  1217. /**
  1218. * vmw_cmd_switch_backup - Utility function to handle backup buffer switching
  1219. *
  1220. * @dev_priv: Pointer to a device private struct.
  1221. * @sw_context: The software context being used for this batch.
  1222. * @res_type: The resource type.
  1223. * @converter: Information about user-space binding for this resource type.
  1224. * @res_id: Pointer to the user-space resource handle in the command stream.
  1225. * @buf_id: Pointer to the user-space backup buffer handle in the command
  1226. * stream.
  1227. * @backup_offset: Offset of backup into MOB.
  1228. *
  1229. * This function prepares for registering a switch of backup buffers
  1230. * in the resource metadata just prior to unreserving.
  1231. */
  1232. static int vmw_cmd_switch_backup(struct vmw_private *dev_priv,
  1233. struct vmw_sw_context *sw_context,
  1234. enum vmw_res_type res_type,
  1235. const struct vmw_user_resource_conv
  1236. *converter,
  1237. uint32_t *res_id,
  1238. uint32_t *buf_id,
  1239. unsigned long backup_offset)
  1240. {
  1241. int ret;
  1242. struct vmw_dma_buffer *dma_buf;
  1243. struct vmw_resource_val_node *val_node;
  1244. ret = vmw_cmd_res_check(dev_priv, sw_context, res_type,
  1245. converter, res_id, &val_node);
  1246. if (unlikely(ret != 0))
  1247. return ret;
  1248. ret = vmw_translate_mob_ptr(dev_priv, sw_context, buf_id, &dma_buf);
  1249. if (unlikely(ret != 0))
  1250. return ret;
  1251. if (val_node->first_usage)
  1252. val_node->no_buffer_needed = true;
  1253. vmw_dmabuf_unreference(&val_node->new_backup);
  1254. val_node->new_backup = dma_buf;
  1255. val_node->new_backup_offset = backup_offset;
  1256. return 0;
  1257. }
  1258. /**
  1259. * vmw_cmd_bind_gb_surface - Validate an SVGA_3D_CMD_BIND_GB_SURFACE
  1260. * command
  1261. *
  1262. * @dev_priv: Pointer to a device private struct.
  1263. * @sw_context: The software context being used for this batch.
  1264. * @header: Pointer to the command header in the command stream.
  1265. */
  1266. static int vmw_cmd_bind_gb_surface(struct vmw_private *dev_priv,
  1267. struct vmw_sw_context *sw_context,
  1268. SVGA3dCmdHeader *header)
  1269. {
  1270. struct vmw_bind_gb_surface_cmd {
  1271. SVGA3dCmdHeader header;
  1272. SVGA3dCmdBindGBSurface body;
  1273. } *cmd;
  1274. cmd = container_of(header, struct vmw_bind_gb_surface_cmd, header);
  1275. return vmw_cmd_switch_backup(dev_priv, sw_context, vmw_res_surface,
  1276. user_surface_converter,
  1277. &cmd->body.sid, &cmd->body.mobid,
  1278. 0);
  1279. }
  1280. /**
  1281. * vmw_cmd_update_gb_image - Validate an SVGA_3D_CMD_UPDATE_GB_IMAGE
  1282. * command
  1283. *
  1284. * @dev_priv: Pointer to a device private struct.
  1285. * @sw_context: The software context being used for this batch.
  1286. * @header: Pointer to the command header in the command stream.
  1287. */
  1288. static int vmw_cmd_update_gb_image(struct vmw_private *dev_priv,
  1289. struct vmw_sw_context *sw_context,
  1290. SVGA3dCmdHeader *header)
  1291. {
  1292. struct vmw_gb_surface_cmd {
  1293. SVGA3dCmdHeader header;
  1294. SVGA3dCmdUpdateGBImage body;
  1295. } *cmd;
  1296. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1297. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1298. user_surface_converter,
  1299. &cmd->body.image.sid, NULL);
  1300. }
  1301. /**
  1302. * vmw_cmd_update_gb_surface - Validate an SVGA_3D_CMD_UPDATE_GB_SURFACE
  1303. * command
  1304. *
  1305. * @dev_priv: Pointer to a device private struct.
  1306. * @sw_context: The software context being used for this batch.
  1307. * @header: Pointer to the command header in the command stream.
  1308. */
  1309. static int vmw_cmd_update_gb_surface(struct vmw_private *dev_priv,
  1310. struct vmw_sw_context *sw_context,
  1311. SVGA3dCmdHeader *header)
  1312. {
  1313. struct vmw_gb_surface_cmd {
  1314. SVGA3dCmdHeader header;
  1315. SVGA3dCmdUpdateGBSurface body;
  1316. } *cmd;
  1317. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1318. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1319. user_surface_converter,
  1320. &cmd->body.sid, NULL);
  1321. }
  1322. /**
  1323. * vmw_cmd_readback_gb_image - Validate an SVGA_3D_CMD_READBACK_GB_IMAGE
  1324. * command
  1325. *
  1326. * @dev_priv: Pointer to a device private struct.
  1327. * @sw_context: The software context being used for this batch.
  1328. * @header: Pointer to the command header in the command stream.
  1329. */
  1330. static int vmw_cmd_readback_gb_image(struct vmw_private *dev_priv,
  1331. struct vmw_sw_context *sw_context,
  1332. SVGA3dCmdHeader *header)
  1333. {
  1334. struct vmw_gb_surface_cmd {
  1335. SVGA3dCmdHeader header;
  1336. SVGA3dCmdReadbackGBImage body;
  1337. } *cmd;
  1338. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1339. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1340. user_surface_converter,
  1341. &cmd->body.image.sid, NULL);
  1342. }
  1343. /**
  1344. * vmw_cmd_readback_gb_surface - Validate an SVGA_3D_CMD_READBACK_GB_SURFACE
  1345. * command
  1346. *
  1347. * @dev_priv: Pointer to a device private struct.
  1348. * @sw_context: The software context being used for this batch.
  1349. * @header: Pointer to the command header in the command stream.
  1350. */
  1351. static int vmw_cmd_readback_gb_surface(struct vmw_private *dev_priv,
  1352. struct vmw_sw_context *sw_context,
  1353. SVGA3dCmdHeader *header)
  1354. {
  1355. struct vmw_gb_surface_cmd {
  1356. SVGA3dCmdHeader header;
  1357. SVGA3dCmdReadbackGBSurface body;
  1358. } *cmd;
  1359. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1360. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1361. user_surface_converter,
  1362. &cmd->body.sid, NULL);
  1363. }
  1364. /**
  1365. * vmw_cmd_invalidate_gb_image - Validate an SVGA_3D_CMD_INVALIDATE_GB_IMAGE
  1366. * command
  1367. *
  1368. * @dev_priv: Pointer to a device private struct.
  1369. * @sw_context: The software context being used for this batch.
  1370. * @header: Pointer to the command header in the command stream.
  1371. */
  1372. static int vmw_cmd_invalidate_gb_image(struct vmw_private *dev_priv,
  1373. struct vmw_sw_context *sw_context,
  1374. SVGA3dCmdHeader *header)
  1375. {
  1376. struct vmw_gb_surface_cmd {
  1377. SVGA3dCmdHeader header;
  1378. SVGA3dCmdInvalidateGBImage body;
  1379. } *cmd;
  1380. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1381. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1382. user_surface_converter,
  1383. &cmd->body.image.sid, NULL);
  1384. }
  1385. /**
  1386. * vmw_cmd_invalidate_gb_surface - Validate an
  1387. * SVGA_3D_CMD_INVALIDATE_GB_SURFACE command
  1388. *
  1389. * @dev_priv: Pointer to a device private struct.
  1390. * @sw_context: The software context being used for this batch.
  1391. * @header: Pointer to the command header in the command stream.
  1392. */
  1393. static int vmw_cmd_invalidate_gb_surface(struct vmw_private *dev_priv,
  1394. struct vmw_sw_context *sw_context,
  1395. SVGA3dCmdHeader *header)
  1396. {
  1397. struct vmw_gb_surface_cmd {
  1398. SVGA3dCmdHeader header;
  1399. SVGA3dCmdInvalidateGBSurface body;
  1400. } *cmd;
  1401. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1402. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1403. user_surface_converter,
  1404. &cmd->body.sid, NULL);
  1405. }
  1406. /**
  1407. * vmw_cmd_shader_define - Validate an SVGA_3D_CMD_SHADER_DEFINE
  1408. * command
  1409. *
  1410. * @dev_priv: Pointer to a device private struct.
  1411. * @sw_context: The software context being used for this batch.
  1412. * @header: Pointer to the command header in the command stream.
  1413. */
  1414. static int vmw_cmd_shader_define(struct vmw_private *dev_priv,
  1415. struct vmw_sw_context *sw_context,
  1416. SVGA3dCmdHeader *header)
  1417. {
  1418. struct vmw_shader_define_cmd {
  1419. SVGA3dCmdHeader header;
  1420. SVGA3dCmdDefineShader body;
  1421. } *cmd;
  1422. int ret;
  1423. size_t size;
  1424. struct vmw_resource_val_node *val;
  1425. cmd = container_of(header, struct vmw_shader_define_cmd,
  1426. header);
  1427. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1428. user_context_converter, &cmd->body.cid,
  1429. &val);
  1430. if (unlikely(ret != 0))
  1431. return ret;
  1432. if (unlikely(!dev_priv->has_mob))
  1433. return 0;
  1434. size = cmd->header.size - sizeof(cmd->body);
  1435. ret = vmw_compat_shader_add(dev_priv,
  1436. vmw_context_res_man(val->res),
  1437. cmd->body.shid, cmd + 1,
  1438. cmd->body.type, size,
  1439. &sw_context->staged_cmd_res);
  1440. if (unlikely(ret != 0))
  1441. return ret;
  1442. return vmw_resource_relocation_add(&sw_context->res_relocations,
  1443. NULL, &cmd->header.id -
  1444. sw_context->buf_start);
  1445. return 0;
  1446. }
  1447. /**
  1448. * vmw_cmd_shader_destroy - Validate an SVGA_3D_CMD_SHADER_DESTROY
  1449. * command
  1450. *
  1451. * @dev_priv: Pointer to a device private struct.
  1452. * @sw_context: The software context being used for this batch.
  1453. * @header: Pointer to the command header in the command stream.
  1454. */
  1455. static int vmw_cmd_shader_destroy(struct vmw_private *dev_priv,
  1456. struct vmw_sw_context *sw_context,
  1457. SVGA3dCmdHeader *header)
  1458. {
  1459. struct vmw_shader_destroy_cmd {
  1460. SVGA3dCmdHeader header;
  1461. SVGA3dCmdDestroyShader body;
  1462. } *cmd;
  1463. int ret;
  1464. struct vmw_resource_val_node *val;
  1465. cmd = container_of(header, struct vmw_shader_destroy_cmd,
  1466. header);
  1467. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1468. user_context_converter, &cmd->body.cid,
  1469. &val);
  1470. if (unlikely(ret != 0))
  1471. return ret;
  1472. if (unlikely(!dev_priv->has_mob))
  1473. return 0;
  1474. ret = vmw_compat_shader_remove(vmw_context_res_man(val->res),
  1475. cmd->body.shid,
  1476. cmd->body.type,
  1477. &sw_context->staged_cmd_res);
  1478. if (unlikely(ret != 0))
  1479. return ret;
  1480. return vmw_resource_relocation_add(&sw_context->res_relocations,
  1481. NULL, &cmd->header.id -
  1482. sw_context->buf_start);
  1483. return 0;
  1484. }
  1485. /**
  1486. * vmw_cmd_set_shader - Validate an SVGA_3D_CMD_SET_SHADER
  1487. * command
  1488. *
  1489. * @dev_priv: Pointer to a device private struct.
  1490. * @sw_context: The software context being used for this batch.
  1491. * @header: Pointer to the command header in the command stream.
  1492. */
  1493. static int vmw_cmd_set_shader(struct vmw_private *dev_priv,
  1494. struct vmw_sw_context *sw_context,
  1495. SVGA3dCmdHeader *header)
  1496. {
  1497. struct vmw_set_shader_cmd {
  1498. SVGA3dCmdHeader header;
  1499. SVGA3dCmdSetShader body;
  1500. } *cmd;
  1501. struct vmw_resource_val_node *ctx_node, *res_node = NULL;
  1502. struct vmw_ctx_bindinfo bi;
  1503. struct vmw_resource *res = NULL;
  1504. int ret;
  1505. cmd = container_of(header, struct vmw_set_shader_cmd,
  1506. header);
  1507. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1508. user_context_converter, &cmd->body.cid,
  1509. &ctx_node);
  1510. if (unlikely(ret != 0))
  1511. return ret;
  1512. if (!dev_priv->has_mob)
  1513. return 0;
  1514. if (cmd->body.shid != SVGA3D_INVALID_ID) {
  1515. res = vmw_compat_shader_lookup
  1516. (vmw_context_res_man(ctx_node->res),
  1517. cmd->body.shid,
  1518. cmd->body.type);
  1519. if (!IS_ERR(res)) {
  1520. ret = vmw_cmd_res_reloc_add(dev_priv, sw_context,
  1521. vmw_res_shader,
  1522. &cmd->body.shid, res,
  1523. &res_node);
  1524. vmw_resource_unreference(&res);
  1525. if (unlikely(ret != 0))
  1526. return ret;
  1527. }
  1528. }
  1529. if (!res_node) {
  1530. ret = vmw_cmd_res_check(dev_priv, sw_context,
  1531. vmw_res_shader,
  1532. user_shader_converter,
  1533. &cmd->body.shid, &res_node);
  1534. if (unlikely(ret != 0))
  1535. return ret;
  1536. }
  1537. bi.ctx = ctx_node->res;
  1538. bi.res = res_node ? res_node->res : NULL;
  1539. bi.bt = vmw_ctx_binding_shader;
  1540. bi.i1.shader_type = cmd->body.type;
  1541. return vmw_context_binding_add(ctx_node->staged_bindings, &bi);
  1542. }
  1543. /**
  1544. * vmw_cmd_set_shader_const - Validate an SVGA_3D_CMD_SET_SHADER_CONST
  1545. * command
  1546. *
  1547. * @dev_priv: Pointer to a device private struct.
  1548. * @sw_context: The software context being used for this batch.
  1549. * @header: Pointer to the command header in the command stream.
  1550. */
  1551. static int vmw_cmd_set_shader_const(struct vmw_private *dev_priv,
  1552. struct vmw_sw_context *sw_context,
  1553. SVGA3dCmdHeader *header)
  1554. {
  1555. struct vmw_set_shader_const_cmd {
  1556. SVGA3dCmdHeader header;
  1557. SVGA3dCmdSetShaderConst body;
  1558. } *cmd;
  1559. int ret;
  1560. cmd = container_of(header, struct vmw_set_shader_const_cmd,
  1561. header);
  1562. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1563. user_context_converter, &cmd->body.cid,
  1564. NULL);
  1565. if (unlikely(ret != 0))
  1566. return ret;
  1567. if (dev_priv->has_mob)
  1568. header->id = SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE;
  1569. return 0;
  1570. }
  1571. /**
  1572. * vmw_cmd_bind_gb_shader - Validate an SVGA_3D_CMD_BIND_GB_SHADER
  1573. * command
  1574. *
  1575. * @dev_priv: Pointer to a device private struct.
  1576. * @sw_context: The software context being used for this batch.
  1577. * @header: Pointer to the command header in the command stream.
  1578. */
  1579. static int vmw_cmd_bind_gb_shader(struct vmw_private *dev_priv,
  1580. struct vmw_sw_context *sw_context,
  1581. SVGA3dCmdHeader *header)
  1582. {
  1583. struct vmw_bind_gb_shader_cmd {
  1584. SVGA3dCmdHeader header;
  1585. SVGA3dCmdBindGBShader body;
  1586. } *cmd;
  1587. cmd = container_of(header, struct vmw_bind_gb_shader_cmd,
  1588. header);
  1589. return vmw_cmd_switch_backup(dev_priv, sw_context, vmw_res_shader,
  1590. user_shader_converter,
  1591. &cmd->body.shid, &cmd->body.mobid,
  1592. cmd->body.offsetInBytes);
  1593. }
  1594. static int vmw_cmd_check_not_3d(struct vmw_private *dev_priv,
  1595. struct vmw_sw_context *sw_context,
  1596. void *buf, uint32_t *size)
  1597. {
  1598. uint32_t size_remaining = *size;
  1599. uint32_t cmd_id;
  1600. cmd_id = le32_to_cpu(((uint32_t *)buf)[0]);
  1601. switch (cmd_id) {
  1602. case SVGA_CMD_UPDATE:
  1603. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdUpdate);
  1604. break;
  1605. case SVGA_CMD_DEFINE_GMRFB:
  1606. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdDefineGMRFB);
  1607. break;
  1608. case SVGA_CMD_BLIT_GMRFB_TO_SCREEN:
  1609. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  1610. break;
  1611. case SVGA_CMD_BLIT_SCREEN_TO_GMRFB:
  1612. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  1613. break;
  1614. default:
  1615. DRM_ERROR("Unsupported SVGA command: %u.\n", cmd_id);
  1616. return -EINVAL;
  1617. }
  1618. if (*size > size_remaining) {
  1619. DRM_ERROR("Invalid SVGA command (size mismatch):"
  1620. " %u.\n", cmd_id);
  1621. return -EINVAL;
  1622. }
  1623. if (unlikely(!sw_context->kernel)) {
  1624. DRM_ERROR("Kernel only SVGA command: %u.\n", cmd_id);
  1625. return -EPERM;
  1626. }
  1627. if (cmd_id == SVGA_CMD_DEFINE_GMRFB)
  1628. return vmw_cmd_check_define_gmrfb(dev_priv, sw_context, buf);
  1629. return 0;
  1630. }
  1631. static const struct vmw_cmd_entry vmw_cmd_entries[SVGA_3D_CMD_MAX] = {
  1632. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE, &vmw_cmd_invalid,
  1633. false, false, false),
  1634. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DESTROY, &vmw_cmd_invalid,
  1635. false, false, false),
  1636. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_COPY, &vmw_cmd_surface_copy_check,
  1637. true, false, false),
  1638. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_STRETCHBLT, &vmw_cmd_stretch_blt_check,
  1639. true, false, false),
  1640. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DMA, &vmw_cmd_dma,
  1641. true, false, false),
  1642. VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DEFINE, &vmw_cmd_invalid,
  1643. false, false, false),
  1644. VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DESTROY, &vmw_cmd_invalid,
  1645. false, false, false),
  1646. VMW_CMD_DEF(SVGA_3D_CMD_SETTRANSFORM, &vmw_cmd_cid_check,
  1647. true, false, false),
  1648. VMW_CMD_DEF(SVGA_3D_CMD_SETZRANGE, &vmw_cmd_cid_check,
  1649. true, false, false),
  1650. VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERSTATE, &vmw_cmd_cid_check,
  1651. true, false, false),
  1652. VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERTARGET,
  1653. &vmw_cmd_set_render_target_check, true, false, false),
  1654. VMW_CMD_DEF(SVGA_3D_CMD_SETTEXTURESTATE, &vmw_cmd_tex_state,
  1655. true, false, false),
  1656. VMW_CMD_DEF(SVGA_3D_CMD_SETMATERIAL, &vmw_cmd_cid_check,
  1657. true, false, false),
  1658. VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTDATA, &vmw_cmd_cid_check,
  1659. true, false, false),
  1660. VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTENABLED, &vmw_cmd_cid_check,
  1661. true, false, false),
  1662. VMW_CMD_DEF(SVGA_3D_CMD_SETVIEWPORT, &vmw_cmd_cid_check,
  1663. true, false, false),
  1664. VMW_CMD_DEF(SVGA_3D_CMD_SETCLIPPLANE, &vmw_cmd_cid_check,
  1665. true, false, false),
  1666. VMW_CMD_DEF(SVGA_3D_CMD_CLEAR, &vmw_cmd_cid_check,
  1667. true, false, false),
  1668. VMW_CMD_DEF(SVGA_3D_CMD_PRESENT, &vmw_cmd_present_check,
  1669. false, false, false),
  1670. VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DEFINE, &vmw_cmd_shader_define,
  1671. true, false, false),
  1672. VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DESTROY, &vmw_cmd_shader_destroy,
  1673. true, false, false),
  1674. VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER, &vmw_cmd_set_shader,
  1675. true, false, false),
  1676. VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER_CONST, &vmw_cmd_set_shader_const,
  1677. true, false, false),
  1678. VMW_CMD_DEF(SVGA_3D_CMD_DRAW_PRIMITIVES, &vmw_cmd_draw,
  1679. true, false, false),
  1680. VMW_CMD_DEF(SVGA_3D_CMD_SETSCISSORRECT, &vmw_cmd_cid_check,
  1681. true, false, false),
  1682. VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_QUERY, &vmw_cmd_begin_query,
  1683. true, false, false),
  1684. VMW_CMD_DEF(SVGA_3D_CMD_END_QUERY, &vmw_cmd_end_query,
  1685. true, false, false),
  1686. VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_QUERY, &vmw_cmd_wait_query,
  1687. true, false, false),
  1688. VMW_CMD_DEF(SVGA_3D_CMD_PRESENT_READBACK, &vmw_cmd_ok,
  1689. true, false, false),
  1690. VMW_CMD_DEF(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN,
  1691. &vmw_cmd_blt_surf_screen_check, false, false, false),
  1692. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE_V2, &vmw_cmd_invalid,
  1693. false, false, false),
  1694. VMW_CMD_DEF(SVGA_3D_CMD_GENERATE_MIPMAPS, &vmw_cmd_invalid,
  1695. false, false, false),
  1696. VMW_CMD_DEF(SVGA_3D_CMD_ACTIVATE_SURFACE, &vmw_cmd_invalid,
  1697. false, false, false),
  1698. VMW_CMD_DEF(SVGA_3D_CMD_DEACTIVATE_SURFACE, &vmw_cmd_invalid,
  1699. false, false, false),
  1700. VMW_CMD_DEF(SVGA_3D_CMD_SCREEN_DMA, &vmw_cmd_invalid,
  1701. false, false, false),
  1702. VMW_CMD_DEF(SVGA_3D_CMD_SET_UNITY_SURFACE_COOKIE, &vmw_cmd_invalid,
  1703. false, false, false),
  1704. VMW_CMD_DEF(SVGA_3D_CMD_OPEN_CONTEXT_SURFACE, &vmw_cmd_invalid,
  1705. false, false, false),
  1706. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_BITBLT, &vmw_cmd_invalid,
  1707. false, false, false),
  1708. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_TRANSBLT, &vmw_cmd_invalid,
  1709. false, false, false),
  1710. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_STRETCHBLT, &vmw_cmd_invalid,
  1711. false, false, false),
  1712. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_COLORFILL, &vmw_cmd_invalid,
  1713. false, false, false),
  1714. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_ALPHABLEND, &vmw_cmd_invalid,
  1715. false, false, false),
  1716. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND, &vmw_cmd_invalid,
  1717. false, false, false),
  1718. VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE, &vmw_cmd_invalid,
  1719. false, false, true),
  1720. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_OTABLE, &vmw_cmd_invalid,
  1721. false, false, true),
  1722. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_MOB, &vmw_cmd_invalid,
  1723. false, false, true),
  1724. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_MOB, &vmw_cmd_invalid,
  1725. false, false, true),
  1726. VMW_CMD_DEF(SVGA_3D_CMD_REDEFINE_GB_MOB, &vmw_cmd_invalid,
  1727. false, false, true),
  1728. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING, &vmw_cmd_invalid,
  1729. false, false, true),
  1730. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SURFACE, &vmw_cmd_invalid,
  1731. false, false, true),
  1732. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SURFACE, &vmw_cmd_invalid,
  1733. false, false, true),
  1734. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SURFACE, &vmw_cmd_bind_gb_surface,
  1735. true, false, true),
  1736. VMW_CMD_DEF(SVGA_3D_CMD_COND_BIND_GB_SURFACE, &vmw_cmd_invalid,
  1737. false, false, true),
  1738. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_IMAGE, &vmw_cmd_update_gb_image,
  1739. true, false, true),
  1740. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SURFACE,
  1741. &vmw_cmd_update_gb_surface, true, false, true),
  1742. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE,
  1743. &vmw_cmd_readback_gb_image, true, false, true),
  1744. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_SURFACE,
  1745. &vmw_cmd_readback_gb_surface, true, false, true),
  1746. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE,
  1747. &vmw_cmd_invalidate_gb_image, true, false, true),
  1748. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_SURFACE,
  1749. &vmw_cmd_invalidate_gb_surface, true, false, true),
  1750. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_CONTEXT, &vmw_cmd_invalid,
  1751. false, false, true),
  1752. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_CONTEXT, &vmw_cmd_invalid,
  1753. false, false, true),
  1754. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_CONTEXT, &vmw_cmd_invalid,
  1755. false, false, true),
  1756. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_CONTEXT, &vmw_cmd_invalid,
  1757. false, false, true),
  1758. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_CONTEXT, &vmw_cmd_invalid,
  1759. false, false, true),
  1760. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SHADER, &vmw_cmd_invalid,
  1761. false, false, true),
  1762. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SHADER, &vmw_cmd_bind_gb_shader,
  1763. true, false, true),
  1764. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SHADER, &vmw_cmd_invalid,
  1765. false, false, true),
  1766. VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE64, &vmw_cmd_invalid,
  1767. false, false, false),
  1768. VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_GB_QUERY, &vmw_cmd_begin_gb_query,
  1769. true, false, true),
  1770. VMW_CMD_DEF(SVGA_3D_CMD_END_GB_QUERY, &vmw_cmd_end_gb_query,
  1771. true, false, true),
  1772. VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_GB_QUERY, &vmw_cmd_wait_gb_query,
  1773. true, false, true),
  1774. VMW_CMD_DEF(SVGA_3D_CMD_NOP, &vmw_cmd_ok,
  1775. true, false, true),
  1776. VMW_CMD_DEF(SVGA_3D_CMD_ENABLE_GART, &vmw_cmd_invalid,
  1777. false, false, true),
  1778. VMW_CMD_DEF(SVGA_3D_CMD_DISABLE_GART, &vmw_cmd_invalid,
  1779. false, false, true),
  1780. VMW_CMD_DEF(SVGA_3D_CMD_MAP_MOB_INTO_GART, &vmw_cmd_invalid,
  1781. false, false, true),
  1782. VMW_CMD_DEF(SVGA_3D_CMD_UNMAP_GART_RANGE, &vmw_cmd_invalid,
  1783. false, false, true),
  1784. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SCREENTARGET, &vmw_cmd_invalid,
  1785. false, false, true),
  1786. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SCREENTARGET, &vmw_cmd_invalid,
  1787. false, false, true),
  1788. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SCREENTARGET, &vmw_cmd_invalid,
  1789. false, false, true),
  1790. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SCREENTARGET, &vmw_cmd_invalid,
  1791. false, false, true),
  1792. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL, &vmw_cmd_invalid,
  1793. false, false, true),
  1794. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL, &vmw_cmd_invalid,
  1795. false, false, true),
  1796. VMW_CMD_DEF(SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE, &vmw_cmd_cid_check,
  1797. true, false, true)
  1798. };
  1799. static int vmw_cmd_check(struct vmw_private *dev_priv,
  1800. struct vmw_sw_context *sw_context,
  1801. void *buf, uint32_t *size)
  1802. {
  1803. uint32_t cmd_id;
  1804. uint32_t size_remaining = *size;
  1805. SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf;
  1806. int ret;
  1807. const struct vmw_cmd_entry *entry;
  1808. bool gb = dev_priv->capabilities & SVGA_CAP_GBOBJECTS;
  1809. cmd_id = le32_to_cpu(((uint32_t *)buf)[0]);
  1810. /* Handle any none 3D commands */
  1811. if (unlikely(cmd_id < SVGA_CMD_MAX))
  1812. return vmw_cmd_check_not_3d(dev_priv, sw_context, buf, size);
  1813. cmd_id = le32_to_cpu(header->id);
  1814. *size = le32_to_cpu(header->size) + sizeof(SVGA3dCmdHeader);
  1815. cmd_id -= SVGA_3D_CMD_BASE;
  1816. if (unlikely(*size > size_remaining))
  1817. goto out_invalid;
  1818. if (unlikely(cmd_id >= SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE))
  1819. goto out_invalid;
  1820. entry = &vmw_cmd_entries[cmd_id];
  1821. if (unlikely(!entry->func))
  1822. goto out_invalid;
  1823. if (unlikely(!entry->user_allow && !sw_context->kernel))
  1824. goto out_privileged;
  1825. if (unlikely(entry->gb_disable && gb))
  1826. goto out_old;
  1827. if (unlikely(entry->gb_enable && !gb))
  1828. goto out_new;
  1829. ret = entry->func(dev_priv, sw_context, header);
  1830. if (unlikely(ret != 0))
  1831. goto out_invalid;
  1832. return 0;
  1833. out_invalid:
  1834. DRM_ERROR("Invalid SVGA3D command: %d\n",
  1835. cmd_id + SVGA_3D_CMD_BASE);
  1836. return -EINVAL;
  1837. out_privileged:
  1838. DRM_ERROR("Privileged SVGA3D command: %d\n",
  1839. cmd_id + SVGA_3D_CMD_BASE);
  1840. return -EPERM;
  1841. out_old:
  1842. DRM_ERROR("Deprecated (disallowed) SVGA3D command: %d\n",
  1843. cmd_id + SVGA_3D_CMD_BASE);
  1844. return -EINVAL;
  1845. out_new:
  1846. DRM_ERROR("SVGA3D command: %d not supported by virtual hardware.\n",
  1847. cmd_id + SVGA_3D_CMD_BASE);
  1848. return -EINVAL;
  1849. }
  1850. static int vmw_cmd_check_all(struct vmw_private *dev_priv,
  1851. struct vmw_sw_context *sw_context,
  1852. void *buf,
  1853. uint32_t size)
  1854. {
  1855. int32_t cur_size = size;
  1856. int ret;
  1857. sw_context->buf_start = buf;
  1858. while (cur_size > 0) {
  1859. size = cur_size;
  1860. ret = vmw_cmd_check(dev_priv, sw_context, buf, &size);
  1861. if (unlikely(ret != 0))
  1862. return ret;
  1863. buf = (void *)((unsigned long) buf + size);
  1864. cur_size -= size;
  1865. }
  1866. if (unlikely(cur_size != 0)) {
  1867. DRM_ERROR("Command verifier out of sync.\n");
  1868. return -EINVAL;
  1869. }
  1870. return 0;
  1871. }
  1872. static void vmw_free_relocations(struct vmw_sw_context *sw_context)
  1873. {
  1874. sw_context->cur_reloc = 0;
  1875. }
  1876. static void vmw_apply_relocations(struct vmw_sw_context *sw_context)
  1877. {
  1878. uint32_t i;
  1879. struct vmw_relocation *reloc;
  1880. struct ttm_validate_buffer *validate;
  1881. struct ttm_buffer_object *bo;
  1882. for (i = 0; i < sw_context->cur_reloc; ++i) {
  1883. reloc = &sw_context->relocs[i];
  1884. validate = &sw_context->val_bufs[reloc->index].base;
  1885. bo = validate->bo;
  1886. switch (bo->mem.mem_type) {
  1887. case TTM_PL_VRAM:
  1888. reloc->location->offset += bo->offset;
  1889. reloc->location->gmrId = SVGA_GMR_FRAMEBUFFER;
  1890. break;
  1891. case VMW_PL_GMR:
  1892. reloc->location->gmrId = bo->mem.start;
  1893. break;
  1894. case VMW_PL_MOB:
  1895. *reloc->mob_loc = bo->mem.start;
  1896. break;
  1897. default:
  1898. BUG();
  1899. }
  1900. }
  1901. vmw_free_relocations(sw_context);
  1902. }
  1903. /**
  1904. * vmw_resource_list_unrefererence - Free up a resource list and unreference
  1905. * all resources referenced by it.
  1906. *
  1907. * @list: The resource list.
  1908. */
  1909. static void vmw_resource_list_unreference(struct list_head *list)
  1910. {
  1911. struct vmw_resource_val_node *val, *val_next;
  1912. /*
  1913. * Drop references to resources held during command submission.
  1914. */
  1915. list_for_each_entry_safe(val, val_next, list, head) {
  1916. list_del_init(&val->head);
  1917. vmw_resource_unreference(&val->res);
  1918. if (unlikely(val->staged_bindings))
  1919. kfree(val->staged_bindings);
  1920. kfree(val);
  1921. }
  1922. }
  1923. static void vmw_clear_validations(struct vmw_sw_context *sw_context)
  1924. {
  1925. struct vmw_validate_buffer *entry, *next;
  1926. struct vmw_resource_val_node *val;
  1927. /*
  1928. * Drop references to DMA buffers held during command submission.
  1929. */
  1930. list_for_each_entry_safe(entry, next, &sw_context->validate_nodes,
  1931. base.head) {
  1932. list_del(&entry->base.head);
  1933. ttm_bo_unref(&entry->base.bo);
  1934. (void) drm_ht_remove_item(&sw_context->res_ht, &entry->hash);
  1935. sw_context->cur_val_buf--;
  1936. }
  1937. BUG_ON(sw_context->cur_val_buf != 0);
  1938. list_for_each_entry(val, &sw_context->resource_list, head)
  1939. (void) drm_ht_remove_item(&sw_context->res_ht, &val->hash);
  1940. }
  1941. static int vmw_validate_single_buffer(struct vmw_private *dev_priv,
  1942. struct ttm_buffer_object *bo,
  1943. bool validate_as_mob)
  1944. {
  1945. int ret;
  1946. /*
  1947. * Don't validate pinned buffers.
  1948. */
  1949. if (bo == dev_priv->pinned_bo ||
  1950. (bo == dev_priv->dummy_query_bo &&
  1951. dev_priv->dummy_query_bo_pinned))
  1952. return 0;
  1953. if (validate_as_mob)
  1954. return ttm_bo_validate(bo, &vmw_mob_placement, true, false);
  1955. /**
  1956. * Put BO in VRAM if there is space, otherwise as a GMR.
  1957. * If there is no space in VRAM and GMR ids are all used up,
  1958. * start evicting GMRs to make room. If the DMA buffer can't be
  1959. * used as a GMR, this will return -ENOMEM.
  1960. */
  1961. ret = ttm_bo_validate(bo, &vmw_vram_gmr_placement, true, false);
  1962. if (likely(ret == 0 || ret == -ERESTARTSYS))
  1963. return ret;
  1964. /**
  1965. * If that failed, try VRAM again, this time evicting
  1966. * previous contents.
  1967. */
  1968. DRM_INFO("Falling through to VRAM.\n");
  1969. ret = ttm_bo_validate(bo, &vmw_vram_placement, true, false);
  1970. return ret;
  1971. }
  1972. static int vmw_validate_buffers(struct vmw_private *dev_priv,
  1973. struct vmw_sw_context *sw_context)
  1974. {
  1975. struct vmw_validate_buffer *entry;
  1976. int ret;
  1977. list_for_each_entry(entry, &sw_context->validate_nodes, base.head) {
  1978. ret = vmw_validate_single_buffer(dev_priv, entry->base.bo,
  1979. entry->validate_as_mob);
  1980. if (unlikely(ret != 0))
  1981. return ret;
  1982. }
  1983. return 0;
  1984. }
  1985. static int vmw_resize_cmd_bounce(struct vmw_sw_context *sw_context,
  1986. uint32_t size)
  1987. {
  1988. if (likely(sw_context->cmd_bounce_size >= size))
  1989. return 0;
  1990. if (sw_context->cmd_bounce_size == 0)
  1991. sw_context->cmd_bounce_size = VMWGFX_CMD_BOUNCE_INIT_SIZE;
  1992. while (sw_context->cmd_bounce_size < size) {
  1993. sw_context->cmd_bounce_size =
  1994. PAGE_ALIGN(sw_context->cmd_bounce_size +
  1995. (sw_context->cmd_bounce_size >> 1));
  1996. }
  1997. if (sw_context->cmd_bounce != NULL)
  1998. vfree(sw_context->cmd_bounce);
  1999. sw_context->cmd_bounce = vmalloc(sw_context->cmd_bounce_size);
  2000. if (sw_context->cmd_bounce == NULL) {
  2001. DRM_ERROR("Failed to allocate command bounce buffer.\n");
  2002. sw_context->cmd_bounce_size = 0;
  2003. return -ENOMEM;
  2004. }
  2005. return 0;
  2006. }
  2007. /**
  2008. * vmw_execbuf_fence_commands - create and submit a command stream fence
  2009. *
  2010. * Creates a fence object and submits a command stream marker.
  2011. * If this fails for some reason, We sync the fifo and return NULL.
  2012. * It is then safe to fence buffers with a NULL pointer.
  2013. *
  2014. * If @p_handle is not NULL @file_priv must also not be NULL. Creates
  2015. * a userspace handle if @p_handle is not NULL, otherwise not.
  2016. */
  2017. int vmw_execbuf_fence_commands(struct drm_file *file_priv,
  2018. struct vmw_private *dev_priv,
  2019. struct vmw_fence_obj **p_fence,
  2020. uint32_t *p_handle)
  2021. {
  2022. uint32_t sequence;
  2023. int ret;
  2024. bool synced = false;
  2025. /* p_handle implies file_priv. */
  2026. BUG_ON(p_handle != NULL && file_priv == NULL);
  2027. ret = vmw_fifo_send_fence(dev_priv, &sequence);
  2028. if (unlikely(ret != 0)) {
  2029. DRM_ERROR("Fence submission error. Syncing.\n");
  2030. synced = true;
  2031. }
  2032. if (p_handle != NULL)
  2033. ret = vmw_user_fence_create(file_priv, dev_priv->fman,
  2034. sequence,
  2035. DRM_VMW_FENCE_FLAG_EXEC,
  2036. p_fence, p_handle);
  2037. else
  2038. ret = vmw_fence_create(dev_priv->fman, sequence,
  2039. DRM_VMW_FENCE_FLAG_EXEC,
  2040. p_fence);
  2041. if (unlikely(ret != 0 && !synced)) {
  2042. (void) vmw_fallback_wait(dev_priv, false, false,
  2043. sequence, false,
  2044. VMW_FENCE_WAIT_TIMEOUT);
  2045. *p_fence = NULL;
  2046. }
  2047. return 0;
  2048. }
  2049. /**
  2050. * vmw_execbuf_copy_fence_user - copy fence object information to
  2051. * user-space.
  2052. *
  2053. * @dev_priv: Pointer to a vmw_private struct.
  2054. * @vmw_fp: Pointer to the struct vmw_fpriv representing the calling file.
  2055. * @ret: Return value from fence object creation.
  2056. * @user_fence_rep: User space address of a struct drm_vmw_fence_rep to
  2057. * which the information should be copied.
  2058. * @fence: Pointer to the fenc object.
  2059. * @fence_handle: User-space fence handle.
  2060. *
  2061. * This function copies fence information to user-space. If copying fails,
  2062. * The user-space struct drm_vmw_fence_rep::error member is hopefully
  2063. * left untouched, and if it's preloaded with an -EFAULT by user-space,
  2064. * the error will hopefully be detected.
  2065. * Also if copying fails, user-space will be unable to signal the fence
  2066. * object so we wait for it immediately, and then unreference the
  2067. * user-space reference.
  2068. */
  2069. void
  2070. vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
  2071. struct vmw_fpriv *vmw_fp,
  2072. int ret,
  2073. struct drm_vmw_fence_rep __user *user_fence_rep,
  2074. struct vmw_fence_obj *fence,
  2075. uint32_t fence_handle)
  2076. {
  2077. struct drm_vmw_fence_rep fence_rep;
  2078. if (user_fence_rep == NULL)
  2079. return;
  2080. memset(&fence_rep, 0, sizeof(fence_rep));
  2081. fence_rep.error = ret;
  2082. if (ret == 0) {
  2083. BUG_ON(fence == NULL);
  2084. fence_rep.handle = fence_handle;
  2085. fence_rep.seqno = fence->seqno;
  2086. vmw_update_seqno(dev_priv, &dev_priv->fifo);
  2087. fence_rep.passed_seqno = dev_priv->last_read_seqno;
  2088. }
  2089. /*
  2090. * copy_to_user errors will be detected by user space not
  2091. * seeing fence_rep::error filled in. Typically
  2092. * user-space would have pre-set that member to -EFAULT.
  2093. */
  2094. ret = copy_to_user(user_fence_rep, &fence_rep,
  2095. sizeof(fence_rep));
  2096. /*
  2097. * User-space lost the fence object. We need to sync
  2098. * and unreference the handle.
  2099. */
  2100. if (unlikely(ret != 0) && (fence_rep.error == 0)) {
  2101. ttm_ref_object_base_unref(vmw_fp->tfile,
  2102. fence_handle, TTM_REF_USAGE);
  2103. DRM_ERROR("Fence copy error. Syncing.\n");
  2104. (void) vmw_fence_obj_wait(fence, fence->signal_mask,
  2105. false, false,
  2106. VMW_FENCE_WAIT_TIMEOUT);
  2107. }
  2108. }
  2109. int vmw_execbuf_process(struct drm_file *file_priv,
  2110. struct vmw_private *dev_priv,
  2111. void __user *user_commands,
  2112. void *kernel_commands,
  2113. uint32_t command_size,
  2114. uint64_t throttle_us,
  2115. struct drm_vmw_fence_rep __user *user_fence_rep,
  2116. struct vmw_fence_obj **out_fence)
  2117. {
  2118. struct vmw_sw_context *sw_context = &dev_priv->ctx;
  2119. struct vmw_fence_obj *fence = NULL;
  2120. struct vmw_resource *error_resource;
  2121. struct list_head resource_list;
  2122. struct ww_acquire_ctx ticket;
  2123. uint32_t handle;
  2124. void *cmd;
  2125. int ret;
  2126. ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex);
  2127. if (unlikely(ret != 0))
  2128. return -ERESTARTSYS;
  2129. if (kernel_commands == NULL) {
  2130. sw_context->kernel = false;
  2131. ret = vmw_resize_cmd_bounce(sw_context, command_size);
  2132. if (unlikely(ret != 0))
  2133. goto out_unlock;
  2134. ret = copy_from_user(sw_context->cmd_bounce,
  2135. user_commands, command_size);
  2136. if (unlikely(ret != 0)) {
  2137. ret = -EFAULT;
  2138. DRM_ERROR("Failed copying commands.\n");
  2139. goto out_unlock;
  2140. }
  2141. kernel_commands = sw_context->cmd_bounce;
  2142. } else
  2143. sw_context->kernel = true;
  2144. sw_context->fp = vmw_fpriv(file_priv);
  2145. sw_context->cur_reloc = 0;
  2146. sw_context->cur_val_buf = 0;
  2147. sw_context->fence_flags = 0;
  2148. INIT_LIST_HEAD(&sw_context->resource_list);
  2149. sw_context->cur_query_bo = dev_priv->pinned_bo;
  2150. sw_context->last_query_ctx = NULL;
  2151. sw_context->needs_post_query_barrier = false;
  2152. memset(sw_context->res_cache, 0, sizeof(sw_context->res_cache));
  2153. INIT_LIST_HEAD(&sw_context->validate_nodes);
  2154. INIT_LIST_HEAD(&sw_context->res_relocations);
  2155. if (!sw_context->res_ht_initialized) {
  2156. ret = drm_ht_create(&sw_context->res_ht, VMW_RES_HT_ORDER);
  2157. if (unlikely(ret != 0))
  2158. goto out_unlock;
  2159. sw_context->res_ht_initialized = true;
  2160. }
  2161. INIT_LIST_HEAD(&sw_context->staged_cmd_res);
  2162. INIT_LIST_HEAD(&resource_list);
  2163. ret = vmw_cmd_check_all(dev_priv, sw_context, kernel_commands,
  2164. command_size);
  2165. if (unlikely(ret != 0))
  2166. goto out_err_nores;
  2167. ret = vmw_resources_reserve(sw_context);
  2168. if (unlikely(ret != 0))
  2169. goto out_err_nores;
  2170. ret = ttm_eu_reserve_buffers(&ticket, &sw_context->validate_nodes);
  2171. if (unlikely(ret != 0))
  2172. goto out_err;
  2173. ret = vmw_validate_buffers(dev_priv, sw_context);
  2174. if (unlikely(ret != 0))
  2175. goto out_err;
  2176. ret = vmw_resources_validate(sw_context);
  2177. if (unlikely(ret != 0))
  2178. goto out_err;
  2179. if (throttle_us) {
  2180. ret = vmw_wait_lag(dev_priv, &dev_priv->fifo.marker_queue,
  2181. throttle_us);
  2182. if (unlikely(ret != 0))
  2183. goto out_err;
  2184. }
  2185. ret = mutex_lock_interruptible(&dev_priv->binding_mutex);
  2186. if (unlikely(ret != 0)) {
  2187. ret = -ERESTARTSYS;
  2188. goto out_err;
  2189. }
  2190. if (dev_priv->has_mob) {
  2191. ret = vmw_rebind_contexts(sw_context);
  2192. if (unlikely(ret != 0))
  2193. goto out_unlock_binding;
  2194. }
  2195. cmd = vmw_fifo_reserve(dev_priv, command_size);
  2196. if (unlikely(cmd == NULL)) {
  2197. DRM_ERROR("Failed reserving fifo space for commands.\n");
  2198. ret = -ENOMEM;
  2199. goto out_unlock_binding;
  2200. }
  2201. vmw_apply_relocations(sw_context);
  2202. memcpy(cmd, kernel_commands, command_size);
  2203. vmw_resource_relocations_apply(cmd, &sw_context->res_relocations);
  2204. vmw_resource_relocations_free(&sw_context->res_relocations);
  2205. vmw_fifo_commit(dev_priv, command_size);
  2206. vmw_query_bo_switch_commit(dev_priv, sw_context);
  2207. ret = vmw_execbuf_fence_commands(file_priv, dev_priv,
  2208. &fence,
  2209. (user_fence_rep) ? &handle : NULL);
  2210. /*
  2211. * This error is harmless, because if fence submission fails,
  2212. * vmw_fifo_send_fence will sync. The error will be propagated to
  2213. * user-space in @fence_rep
  2214. */
  2215. if (ret != 0)
  2216. DRM_ERROR("Fence submission error. Syncing.\n");
  2217. vmw_resource_list_unreserve(&sw_context->resource_list, false);
  2218. mutex_unlock(&dev_priv->binding_mutex);
  2219. ttm_eu_fence_buffer_objects(&ticket, &sw_context->validate_nodes,
  2220. (void *) fence);
  2221. if (unlikely(dev_priv->pinned_bo != NULL &&
  2222. !dev_priv->query_cid_valid))
  2223. __vmw_execbuf_release_pinned_bo(dev_priv, fence);
  2224. vmw_clear_validations(sw_context);
  2225. vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv), ret,
  2226. user_fence_rep, fence, handle);
  2227. /* Don't unreference when handing fence out */
  2228. if (unlikely(out_fence != NULL)) {
  2229. *out_fence = fence;
  2230. fence = NULL;
  2231. } else if (likely(fence != NULL)) {
  2232. vmw_fence_obj_unreference(&fence);
  2233. }
  2234. list_splice_init(&sw_context->resource_list, &resource_list);
  2235. vmw_cmdbuf_res_commit(&sw_context->staged_cmd_res);
  2236. mutex_unlock(&dev_priv->cmdbuf_mutex);
  2237. /*
  2238. * Unreference resources outside of the cmdbuf_mutex to
  2239. * avoid deadlocks in resource destruction paths.
  2240. */
  2241. vmw_resource_list_unreference(&resource_list);
  2242. return 0;
  2243. out_unlock_binding:
  2244. mutex_unlock(&dev_priv->binding_mutex);
  2245. out_err:
  2246. ttm_eu_backoff_reservation(&ticket, &sw_context->validate_nodes);
  2247. out_err_nores:
  2248. vmw_resource_list_unreserve(&sw_context->resource_list, true);
  2249. vmw_resource_relocations_free(&sw_context->res_relocations);
  2250. vmw_free_relocations(sw_context);
  2251. vmw_clear_validations(sw_context);
  2252. if (unlikely(dev_priv->pinned_bo != NULL &&
  2253. !dev_priv->query_cid_valid))
  2254. __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
  2255. out_unlock:
  2256. list_splice_init(&sw_context->resource_list, &resource_list);
  2257. error_resource = sw_context->error_resource;
  2258. sw_context->error_resource = NULL;
  2259. vmw_cmdbuf_res_revert(&sw_context->staged_cmd_res);
  2260. mutex_unlock(&dev_priv->cmdbuf_mutex);
  2261. /*
  2262. * Unreference resources outside of the cmdbuf_mutex to
  2263. * avoid deadlocks in resource destruction paths.
  2264. */
  2265. vmw_resource_list_unreference(&resource_list);
  2266. if (unlikely(error_resource != NULL))
  2267. vmw_resource_unreference(&error_resource);
  2268. return ret;
  2269. }
  2270. /**
  2271. * vmw_execbuf_unpin_panic - Idle the fifo and unpin the query buffer.
  2272. *
  2273. * @dev_priv: The device private structure.
  2274. *
  2275. * This function is called to idle the fifo and unpin the query buffer
  2276. * if the normal way to do this hits an error, which should typically be
  2277. * extremely rare.
  2278. */
  2279. static void vmw_execbuf_unpin_panic(struct vmw_private *dev_priv)
  2280. {
  2281. DRM_ERROR("Can't unpin query buffer. Trying to recover.\n");
  2282. (void) vmw_fallback_wait(dev_priv, false, true, 0, false, 10*HZ);
  2283. vmw_bo_pin(dev_priv->pinned_bo, false);
  2284. vmw_bo_pin(dev_priv->dummy_query_bo, false);
  2285. dev_priv->dummy_query_bo_pinned = false;
  2286. }
  2287. /**
  2288. * __vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned
  2289. * query bo.
  2290. *
  2291. * @dev_priv: The device private structure.
  2292. * @fence: If non-NULL should point to a struct vmw_fence_obj issued
  2293. * _after_ a query barrier that flushes all queries touching the current
  2294. * buffer pointed to by @dev_priv->pinned_bo
  2295. *
  2296. * This function should be used to unpin the pinned query bo, or
  2297. * as a query barrier when we need to make sure that all queries have
  2298. * finished before the next fifo command. (For example on hardware
  2299. * context destructions where the hardware may otherwise leak unfinished
  2300. * queries).
  2301. *
  2302. * This function does not return any failure codes, but make attempts
  2303. * to do safe unpinning in case of errors.
  2304. *
  2305. * The function will synchronize on the previous query barrier, and will
  2306. * thus not finish until that barrier has executed.
  2307. *
  2308. * the @dev_priv->cmdbuf_mutex needs to be held by the current thread
  2309. * before calling this function.
  2310. */
  2311. void __vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv,
  2312. struct vmw_fence_obj *fence)
  2313. {
  2314. int ret = 0;
  2315. struct list_head validate_list;
  2316. struct ttm_validate_buffer pinned_val, query_val;
  2317. struct vmw_fence_obj *lfence = NULL;
  2318. struct ww_acquire_ctx ticket;
  2319. if (dev_priv->pinned_bo == NULL)
  2320. goto out_unlock;
  2321. INIT_LIST_HEAD(&validate_list);
  2322. pinned_val.bo = ttm_bo_reference(dev_priv->pinned_bo);
  2323. list_add_tail(&pinned_val.head, &validate_list);
  2324. query_val.bo = ttm_bo_reference(dev_priv->dummy_query_bo);
  2325. list_add_tail(&query_val.head, &validate_list);
  2326. do {
  2327. ret = ttm_eu_reserve_buffers(&ticket, &validate_list);
  2328. } while (ret == -ERESTARTSYS);
  2329. if (unlikely(ret != 0)) {
  2330. vmw_execbuf_unpin_panic(dev_priv);
  2331. goto out_no_reserve;
  2332. }
  2333. if (dev_priv->query_cid_valid) {
  2334. BUG_ON(fence != NULL);
  2335. ret = vmw_fifo_emit_dummy_query(dev_priv, dev_priv->query_cid);
  2336. if (unlikely(ret != 0)) {
  2337. vmw_execbuf_unpin_panic(dev_priv);
  2338. goto out_no_emit;
  2339. }
  2340. dev_priv->query_cid_valid = false;
  2341. }
  2342. vmw_bo_pin(dev_priv->pinned_bo, false);
  2343. vmw_bo_pin(dev_priv->dummy_query_bo, false);
  2344. dev_priv->dummy_query_bo_pinned = false;
  2345. if (fence == NULL) {
  2346. (void) vmw_execbuf_fence_commands(NULL, dev_priv, &lfence,
  2347. NULL);
  2348. fence = lfence;
  2349. }
  2350. ttm_eu_fence_buffer_objects(&ticket, &validate_list, (void *) fence);
  2351. if (lfence != NULL)
  2352. vmw_fence_obj_unreference(&lfence);
  2353. ttm_bo_unref(&query_val.bo);
  2354. ttm_bo_unref(&pinned_val.bo);
  2355. ttm_bo_unref(&dev_priv->pinned_bo);
  2356. out_unlock:
  2357. return;
  2358. out_no_emit:
  2359. ttm_eu_backoff_reservation(&ticket, &validate_list);
  2360. out_no_reserve:
  2361. ttm_bo_unref(&query_val.bo);
  2362. ttm_bo_unref(&pinned_val.bo);
  2363. ttm_bo_unref(&dev_priv->pinned_bo);
  2364. }
  2365. /**
  2366. * vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned
  2367. * query bo.
  2368. *
  2369. * @dev_priv: The device private structure.
  2370. *
  2371. * This function should be used to unpin the pinned query bo, or
  2372. * as a query barrier when we need to make sure that all queries have
  2373. * finished before the next fifo command. (For example on hardware
  2374. * context destructions where the hardware may otherwise leak unfinished
  2375. * queries).
  2376. *
  2377. * This function does not return any failure codes, but make attempts
  2378. * to do safe unpinning in case of errors.
  2379. *
  2380. * The function will synchronize on the previous query barrier, and will
  2381. * thus not finish until that barrier has executed.
  2382. */
  2383. void vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv)
  2384. {
  2385. mutex_lock(&dev_priv->cmdbuf_mutex);
  2386. if (dev_priv->query_cid_valid)
  2387. __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
  2388. mutex_unlock(&dev_priv->cmdbuf_mutex);
  2389. }
  2390. int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
  2391. struct drm_file *file_priv)
  2392. {
  2393. struct vmw_private *dev_priv = vmw_priv(dev);
  2394. struct drm_vmw_execbuf_arg *arg = (struct drm_vmw_execbuf_arg *)data;
  2395. int ret;
  2396. /*
  2397. * This will allow us to extend the ioctl argument while
  2398. * maintaining backwards compatibility:
  2399. * We take different code paths depending on the value of
  2400. * arg->version.
  2401. */
  2402. if (unlikely(arg->version != DRM_VMW_EXECBUF_VERSION)) {
  2403. DRM_ERROR("Incorrect execbuf version.\n");
  2404. DRM_ERROR("You're running outdated experimental "
  2405. "vmwgfx user-space drivers.");
  2406. return -EINVAL;
  2407. }
  2408. ret = ttm_read_lock(&dev_priv->reservation_sem, true);
  2409. if (unlikely(ret != 0))
  2410. return ret;
  2411. ret = vmw_execbuf_process(file_priv, dev_priv,
  2412. (void __user *)(unsigned long)arg->commands,
  2413. NULL, arg->command_size, arg->throttle_us,
  2414. (void __user *)(unsigned long)arg->fence_rep,
  2415. NULL);
  2416. if (unlikely(ret != 0))
  2417. goto out_unlock;
  2418. vmw_kms_cursor_post_execbuf(dev_priv);
  2419. out_unlock:
  2420. ttm_read_unlock(&dev_priv->reservation_sem);
  2421. return ret;
  2422. }