nouveau_drm.c 28 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/console.h>
  25. #include <linux/module.h>
  26. #include <linux/pci.h>
  27. #include <linux/pm_runtime.h>
  28. #include <linux/vga_switcheroo.h>
  29. #include "drmP.h"
  30. #include "drm_crtc_helper.h"
  31. #include <core/device.h>
  32. #include <core/gpuobj.h>
  33. #include <core/option.h>
  34. #include "nouveau_drm.h"
  35. #include "nouveau_dma.h"
  36. #include "nouveau_ttm.h"
  37. #include "nouveau_gem.h"
  38. #include "nouveau_agp.h"
  39. #include "nouveau_vga.h"
  40. #include "nouveau_sysfs.h"
  41. #include "nouveau_hwmon.h"
  42. #include "nouveau_acpi.h"
  43. #include "nouveau_bios.h"
  44. #include "nouveau_ioctl.h"
  45. #include "nouveau_abi16.h"
  46. #include "nouveau_fbcon.h"
  47. #include "nouveau_fence.h"
  48. #include "nouveau_debugfs.h"
  49. #include "nouveau_usif.h"
  50. MODULE_PARM_DESC(config, "option string to pass to driver core");
  51. static char *nouveau_config;
  52. module_param_named(config, nouveau_config, charp, 0400);
  53. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  54. static char *nouveau_debug;
  55. module_param_named(debug, nouveau_debug, charp, 0400);
  56. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  57. static int nouveau_noaccel = 0;
  58. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  59. MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
  60. "0 = disabled, 1 = enabled, 2 = headless)");
  61. int nouveau_modeset = -1;
  62. module_param_named(modeset, nouveau_modeset, int, 0400);
  63. MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
  64. int nouveau_runtime_pm = -1;
  65. module_param_named(runpm, nouveau_runtime_pm, int, 0400);
  66. static struct drm_driver driver;
  67. static u64
  68. nouveau_pci_name(struct pci_dev *pdev)
  69. {
  70. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  71. name |= pdev->bus->number << 16;
  72. name |= PCI_SLOT(pdev->devfn) << 8;
  73. return name | PCI_FUNC(pdev->devfn);
  74. }
  75. static u64
  76. nouveau_platform_name(struct platform_device *platformdev)
  77. {
  78. return platformdev->id;
  79. }
  80. static u64
  81. nouveau_name(struct drm_device *dev)
  82. {
  83. if (dev->pdev)
  84. return nouveau_pci_name(dev->pdev);
  85. else
  86. return nouveau_platform_name(dev->platformdev);
  87. }
  88. static int
  89. nouveau_cli_create(u64 name, const char *sname,
  90. int size, void **pcli)
  91. {
  92. struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL);
  93. if (cli) {
  94. int ret = nvif_client_init(NULL, NULL, sname, name,
  95. nouveau_config, nouveau_debug,
  96. &cli->base);
  97. if (ret == 0) {
  98. mutex_init(&cli->mutex);
  99. usif_client_init(cli);
  100. }
  101. return ret;
  102. }
  103. return -ENOMEM;
  104. }
  105. static void
  106. nouveau_cli_destroy(struct nouveau_cli *cli)
  107. {
  108. nouveau_vm_ref(NULL, &nvkm_client(&cli->base)->vm, NULL);
  109. nvif_client_fini(&cli->base);
  110. usif_client_fini(cli);
  111. }
  112. static void
  113. nouveau_accel_fini(struct nouveau_drm *drm)
  114. {
  115. nouveau_channel_del(&drm->channel);
  116. nvif_object_fini(&drm->ntfy);
  117. nouveau_gpuobj_ref(NULL, &drm->notify);
  118. nvif_object_fini(&drm->nvsw);
  119. nouveau_channel_del(&drm->cechan);
  120. nvif_object_fini(&drm->ttm.copy);
  121. if (drm->fence)
  122. nouveau_fence(drm)->dtor(drm);
  123. }
  124. static void
  125. nouveau_accel_init(struct nouveau_drm *drm)
  126. {
  127. struct nvif_device *device = &drm->device;
  128. u32 arg0, arg1;
  129. u32 sclass[16];
  130. int ret, i;
  131. if (nouveau_noaccel)
  132. return;
  133. /* initialise synchronisation routines */
  134. /*XXX: this is crap, but the fence/channel stuff is a little
  135. * backwards in some places. this will be fixed.
  136. */
  137. ret = nvif_object_sclass(&device->base, sclass, ARRAY_SIZE(sclass));
  138. if (ret < 0)
  139. return;
  140. for (ret = -ENOSYS, i = 0; ret && i < ARRAY_SIZE(sclass); i++) {
  141. switch (sclass[i]) {
  142. case NV03_CHANNEL_DMA:
  143. ret = nv04_fence_create(drm);
  144. break;
  145. case NV10_CHANNEL_DMA:
  146. ret = nv10_fence_create(drm);
  147. break;
  148. case NV17_CHANNEL_DMA:
  149. case NV40_CHANNEL_DMA:
  150. ret = nv17_fence_create(drm);
  151. break;
  152. case NV50_CHANNEL_GPFIFO:
  153. ret = nv50_fence_create(drm);
  154. break;
  155. case G82_CHANNEL_GPFIFO:
  156. ret = nv84_fence_create(drm);
  157. break;
  158. case FERMI_CHANNEL_GPFIFO:
  159. case KEPLER_CHANNEL_GPFIFO_A:
  160. ret = nvc0_fence_create(drm);
  161. break;
  162. default:
  163. break;
  164. }
  165. }
  166. if (ret) {
  167. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  168. nouveau_accel_fini(drm);
  169. return;
  170. }
  171. if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
  172. ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1,
  173. KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE0|
  174. KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE1,
  175. 0, &drm->cechan);
  176. if (ret)
  177. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  178. arg0 = KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_GR;
  179. arg1 = 1;
  180. } else
  181. if (device->info.chipset >= 0xa3 &&
  182. device->info.chipset != 0xaa &&
  183. device->info.chipset != 0xac) {
  184. ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1,
  185. NvDmaFB, NvDmaTT, &drm->cechan);
  186. if (ret)
  187. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  188. arg0 = NvDmaFB;
  189. arg1 = NvDmaTT;
  190. } else {
  191. arg0 = NvDmaFB;
  192. arg1 = NvDmaTT;
  193. }
  194. ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN, arg0, arg1,
  195. &drm->channel);
  196. if (ret) {
  197. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  198. nouveau_accel_fini(drm);
  199. return;
  200. }
  201. ret = nvif_object_init(drm->channel->object, NULL, NVDRM_NVSW,
  202. nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
  203. if (ret == 0) {
  204. struct nouveau_software_chan *swch;
  205. ret = RING_SPACE(drm->channel, 2);
  206. if (ret == 0) {
  207. if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
  208. BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
  209. OUT_RING (drm->channel, NVDRM_NVSW);
  210. } else
  211. if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) {
  212. BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
  213. OUT_RING (drm->channel, 0x001f0000);
  214. }
  215. }
  216. swch = (void *)nvkm_object(&drm->nvsw)->parent;
  217. swch->flip = nouveau_flip_complete;
  218. swch->flip_data = drm->channel;
  219. }
  220. if (ret) {
  221. NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
  222. nouveau_accel_fini(drm);
  223. return;
  224. }
  225. if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
  226. ret = nouveau_gpuobj_new(nvkm_object(&drm->device), NULL, 32,
  227. 0, 0, &drm->notify);
  228. if (ret) {
  229. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  230. nouveau_accel_fini(drm);
  231. return;
  232. }
  233. ret = nvif_object_init(drm->channel->object, NULL, NvNotify0,
  234. NV_DMA_IN_MEMORY,
  235. &(struct nv_dma_v0) {
  236. .target = NV_DMA_V0_TARGET_VRAM,
  237. .access = NV_DMA_V0_ACCESS_RDWR,
  238. .start = drm->notify->addr,
  239. .limit = drm->notify->addr + 31
  240. }, sizeof(struct nv_dma_v0),
  241. &drm->ntfy);
  242. if (ret) {
  243. nouveau_accel_fini(drm);
  244. return;
  245. }
  246. }
  247. nouveau_bo_move_init(drm);
  248. }
  249. static int nouveau_drm_probe(struct pci_dev *pdev,
  250. const struct pci_device_id *pent)
  251. {
  252. struct nouveau_device *device;
  253. struct apertures_struct *aper;
  254. bool boot = false;
  255. int ret;
  256. /* remove conflicting drivers (vesafb, efifb etc) */
  257. aper = alloc_apertures(3);
  258. if (!aper)
  259. return -ENOMEM;
  260. aper->ranges[0].base = pci_resource_start(pdev, 1);
  261. aper->ranges[0].size = pci_resource_len(pdev, 1);
  262. aper->count = 1;
  263. if (pci_resource_len(pdev, 2)) {
  264. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  265. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  266. aper->count++;
  267. }
  268. if (pci_resource_len(pdev, 3)) {
  269. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  270. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  271. aper->count++;
  272. }
  273. #ifdef CONFIG_X86
  274. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  275. #endif
  276. if (nouveau_modeset != 2)
  277. remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  278. kfree(aper);
  279. ret = nouveau_device_create(pdev, NOUVEAU_BUS_PCI,
  280. nouveau_pci_name(pdev), pci_name(pdev),
  281. nouveau_config, nouveau_debug, &device);
  282. if (ret)
  283. return ret;
  284. pci_set_master(pdev);
  285. ret = drm_get_pci_dev(pdev, pent, &driver);
  286. if (ret) {
  287. nouveau_object_ref(NULL, (struct nouveau_object **)&device);
  288. return ret;
  289. }
  290. return 0;
  291. }
  292. #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
  293. static void
  294. nouveau_get_hdmi_dev(struct nouveau_drm *drm)
  295. {
  296. struct pci_dev *pdev = drm->dev->pdev;
  297. if (!pdev) {
  298. DRM_INFO("not a PCI device; no HDMI\n");
  299. drm->hdmi_device = NULL;
  300. return;
  301. }
  302. /* subfunction one is a hdmi audio device? */
  303. drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
  304. PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
  305. if (!drm->hdmi_device) {
  306. NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
  307. return;
  308. }
  309. if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
  310. NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
  311. pci_dev_put(drm->hdmi_device);
  312. drm->hdmi_device = NULL;
  313. return;
  314. }
  315. }
  316. static int
  317. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  318. {
  319. struct pci_dev *pdev = dev->pdev;
  320. struct nouveau_drm *drm;
  321. int ret;
  322. ret = nouveau_cli_create(nouveau_name(dev), "DRM", sizeof(*drm),
  323. (void **)&drm);
  324. if (ret)
  325. return ret;
  326. dev->dev_private = drm;
  327. drm->dev = dev;
  328. nvkm_client(&drm->client.base)->debug =
  329. nouveau_dbgopt(nouveau_debug, "DRM");
  330. INIT_LIST_HEAD(&drm->clients);
  331. spin_lock_init(&drm->tile.lock);
  332. nouveau_get_hdmi_dev(drm);
  333. /* make sure AGP controller is in a consistent state before we
  334. * (possibly) execute vbios init tables (see nouveau_agp.h)
  335. */
  336. if (pdev && drm_pci_device_is_agp(dev) && dev->agp) {
  337. const u64 enables = NV_DEVICE_V0_DISABLE_IDENTIFY |
  338. NV_DEVICE_V0_DISABLE_MMIO;
  339. /* dummy device object, doesn't init anything, but allows
  340. * agp code access to registers
  341. */
  342. ret = nvif_device_init(&drm->client.base.base, NULL,
  343. NVDRM_DEVICE, NV_DEVICE,
  344. &(struct nv_device_v0) {
  345. .device = ~0,
  346. .disable = ~enables,
  347. .debug0 = ~0,
  348. }, sizeof(struct nv_device_v0),
  349. &drm->device);
  350. if (ret)
  351. goto fail_device;
  352. nouveau_agp_reset(drm);
  353. nvif_device_fini(&drm->device);
  354. }
  355. ret = nvif_device_init(&drm->client.base.base, NULL, NVDRM_DEVICE,
  356. NV_DEVICE,
  357. &(struct nv_device_v0) {
  358. .device = ~0,
  359. .disable = 0,
  360. .debug0 = 0,
  361. }, sizeof(struct nv_device_v0),
  362. &drm->device);
  363. if (ret)
  364. goto fail_device;
  365. dev->irq_enabled = true;
  366. /* workaround an odd issue on nvc1 by disabling the device's
  367. * nosnoop capability. hopefully won't cause issues until a
  368. * better fix is found - assuming there is one...
  369. */
  370. if (drm->device.info.chipset == 0xc1)
  371. nvif_mask(&drm->device, 0x00088080, 0x00000800, 0x00000000);
  372. nouveau_vga_init(drm);
  373. nouveau_agp_init(drm);
  374. if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
  375. ret = nouveau_vm_new(nvkm_device(&drm->device), 0, (1ULL << 40),
  376. 0x1000, &drm->client.vm);
  377. if (ret)
  378. goto fail_device;
  379. nvkm_client(&drm->client.base)->vm = drm->client.vm;
  380. }
  381. ret = nouveau_ttm_init(drm);
  382. if (ret)
  383. goto fail_ttm;
  384. ret = nouveau_bios_init(dev);
  385. if (ret)
  386. goto fail_bios;
  387. ret = nouveau_display_create(dev);
  388. if (ret)
  389. goto fail_dispctor;
  390. if (dev->mode_config.num_crtc) {
  391. ret = nouveau_display_init(dev);
  392. if (ret)
  393. goto fail_dispinit;
  394. }
  395. nouveau_sysfs_init(dev);
  396. nouveau_hwmon_init(dev);
  397. nouveau_accel_init(drm);
  398. nouveau_fbcon_init(dev);
  399. if (nouveau_runtime_pm != 0) {
  400. pm_runtime_use_autosuspend(dev->dev);
  401. pm_runtime_set_autosuspend_delay(dev->dev, 5000);
  402. pm_runtime_set_active(dev->dev);
  403. pm_runtime_allow(dev->dev);
  404. pm_runtime_mark_last_busy(dev->dev);
  405. pm_runtime_put(dev->dev);
  406. }
  407. return 0;
  408. fail_dispinit:
  409. nouveau_display_destroy(dev);
  410. fail_dispctor:
  411. nouveau_bios_takedown(dev);
  412. fail_bios:
  413. nouveau_ttm_fini(drm);
  414. fail_ttm:
  415. nouveau_agp_fini(drm);
  416. nouveau_vga_fini(drm);
  417. fail_device:
  418. nvif_device_fini(&drm->device);
  419. nouveau_cli_destroy(&drm->client);
  420. return ret;
  421. }
  422. static int
  423. nouveau_drm_unload(struct drm_device *dev)
  424. {
  425. struct nouveau_drm *drm = nouveau_drm(dev);
  426. pm_runtime_get_sync(dev->dev);
  427. nouveau_fbcon_fini(dev);
  428. nouveau_accel_fini(drm);
  429. nouveau_hwmon_fini(dev);
  430. nouveau_sysfs_fini(dev);
  431. if (dev->mode_config.num_crtc)
  432. nouveau_display_fini(dev);
  433. nouveau_display_destroy(dev);
  434. nouveau_bios_takedown(dev);
  435. nouveau_ttm_fini(drm);
  436. nouveau_agp_fini(drm);
  437. nouveau_vga_fini(drm);
  438. nvif_device_fini(&drm->device);
  439. if (drm->hdmi_device)
  440. pci_dev_put(drm->hdmi_device);
  441. nouveau_cli_destroy(&drm->client);
  442. return 0;
  443. }
  444. void
  445. nouveau_drm_device_remove(struct drm_device *dev)
  446. {
  447. struct nouveau_drm *drm = nouveau_drm(dev);
  448. struct nouveau_client *client;
  449. struct nouveau_object *device;
  450. dev->irq_enabled = false;
  451. client = nvkm_client(&drm->client.base);
  452. device = client->device;
  453. drm_put_dev(dev);
  454. nouveau_object_ref(NULL, &device);
  455. nouveau_object_debug();
  456. }
  457. EXPORT_SYMBOL(nouveau_drm_device_remove);
  458. static void
  459. nouveau_drm_remove(struct pci_dev *pdev)
  460. {
  461. struct drm_device *dev = pci_get_drvdata(pdev);
  462. nouveau_drm_device_remove(dev);
  463. }
  464. static int
  465. nouveau_do_suspend(struct drm_device *dev, bool runtime)
  466. {
  467. struct nouveau_drm *drm = nouveau_drm(dev);
  468. struct nouveau_cli *cli;
  469. int ret;
  470. if (dev->mode_config.num_crtc && !runtime) {
  471. NV_INFO(drm, "suspending display...\n");
  472. ret = nouveau_display_suspend(dev);
  473. if (ret)
  474. return ret;
  475. }
  476. NV_INFO(drm, "evicting buffers...\n");
  477. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  478. NV_INFO(drm, "waiting for kernel channels to go idle...\n");
  479. if (drm->cechan) {
  480. ret = nouveau_channel_idle(drm->cechan);
  481. if (ret)
  482. goto fail_display;
  483. }
  484. if (drm->channel) {
  485. ret = nouveau_channel_idle(drm->channel);
  486. if (ret)
  487. goto fail_display;
  488. }
  489. NV_INFO(drm, "suspending client object trees...\n");
  490. if (drm->fence && nouveau_fence(drm)->suspend) {
  491. if (!nouveau_fence(drm)->suspend(drm)) {
  492. ret = -ENOMEM;
  493. goto fail_display;
  494. }
  495. }
  496. list_for_each_entry(cli, &drm->clients, head) {
  497. ret = nvif_client_suspend(&cli->base);
  498. if (ret)
  499. goto fail_client;
  500. }
  501. NV_INFO(drm, "suspending kernel object tree...\n");
  502. ret = nvif_client_suspend(&drm->client.base);
  503. if (ret)
  504. goto fail_client;
  505. nouveau_agp_fini(drm);
  506. return 0;
  507. fail_client:
  508. list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
  509. nvif_client_resume(&cli->base);
  510. }
  511. if (drm->fence && nouveau_fence(drm)->resume)
  512. nouveau_fence(drm)->resume(drm);
  513. fail_display:
  514. if (dev->mode_config.num_crtc) {
  515. NV_INFO(drm, "resuming display...\n");
  516. nouveau_display_resume(dev);
  517. }
  518. return ret;
  519. }
  520. int nouveau_pmops_suspend(struct device *dev)
  521. {
  522. struct pci_dev *pdev = to_pci_dev(dev);
  523. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  524. int ret;
  525. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  526. drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
  527. return 0;
  528. if (drm_dev->mode_config.num_crtc)
  529. nouveau_fbcon_set_suspend(drm_dev, 1);
  530. ret = nouveau_do_suspend(drm_dev, false);
  531. if (ret)
  532. return ret;
  533. pci_save_state(pdev);
  534. pci_disable_device(pdev);
  535. pci_set_power_state(pdev, PCI_D3hot);
  536. return 0;
  537. }
  538. static int
  539. nouveau_do_resume(struct drm_device *dev)
  540. {
  541. struct nouveau_drm *drm = nouveau_drm(dev);
  542. struct nouveau_cli *cli;
  543. NV_INFO(drm, "re-enabling device...\n");
  544. nouveau_agp_reset(drm);
  545. NV_INFO(drm, "resuming kernel object tree...\n");
  546. nvif_client_resume(&drm->client.base);
  547. nouveau_agp_init(drm);
  548. NV_INFO(drm, "resuming client object trees...\n");
  549. if (drm->fence && nouveau_fence(drm)->resume)
  550. nouveau_fence(drm)->resume(drm);
  551. list_for_each_entry(cli, &drm->clients, head) {
  552. nvif_client_resume(&cli->base);
  553. }
  554. nouveau_run_vbios_init(dev);
  555. if (dev->mode_config.num_crtc) {
  556. NV_INFO(drm, "resuming display...\n");
  557. nouveau_display_repin(dev);
  558. }
  559. return 0;
  560. }
  561. int nouveau_pmops_resume(struct device *dev)
  562. {
  563. struct pci_dev *pdev = to_pci_dev(dev);
  564. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  565. int ret;
  566. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  567. drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
  568. return 0;
  569. pci_set_power_state(pdev, PCI_D0);
  570. pci_restore_state(pdev);
  571. ret = pci_enable_device(pdev);
  572. if (ret)
  573. return ret;
  574. pci_set_master(pdev);
  575. ret = nouveau_do_resume(drm_dev);
  576. if (ret)
  577. return ret;
  578. if (drm_dev->mode_config.num_crtc) {
  579. nouveau_display_resume(drm_dev);
  580. nouveau_fbcon_set_suspend(drm_dev, 0);
  581. }
  582. return 0;
  583. }
  584. static int nouveau_pmops_freeze(struct device *dev)
  585. {
  586. struct pci_dev *pdev = to_pci_dev(dev);
  587. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  588. int ret;
  589. if (drm_dev->mode_config.num_crtc)
  590. nouveau_fbcon_set_suspend(drm_dev, 1);
  591. ret = nouveau_do_suspend(drm_dev, false);
  592. return ret;
  593. }
  594. static int nouveau_pmops_thaw(struct device *dev)
  595. {
  596. struct pci_dev *pdev = to_pci_dev(dev);
  597. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  598. int ret;
  599. ret = nouveau_do_resume(drm_dev);
  600. if (ret)
  601. return ret;
  602. if (drm_dev->mode_config.num_crtc) {
  603. nouveau_display_resume(drm_dev);
  604. nouveau_fbcon_set_suspend(drm_dev, 0);
  605. }
  606. return 0;
  607. }
  608. static int
  609. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  610. {
  611. struct nouveau_drm *drm = nouveau_drm(dev);
  612. struct nouveau_cli *cli;
  613. char name[32], tmpname[TASK_COMM_LEN];
  614. int ret;
  615. /* need to bring up power immediately if opening device */
  616. ret = pm_runtime_get_sync(dev->dev);
  617. if (ret < 0 && ret != -EACCES)
  618. return ret;
  619. get_task_comm(tmpname, current);
  620. snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
  621. ret = nouveau_cli_create(nouveau_name(dev), name, sizeof(*cli),
  622. (void **)&cli);
  623. if (ret)
  624. goto out_suspend;
  625. cli->base.super = false;
  626. if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
  627. ret = nouveau_vm_new(nvkm_device(&drm->device), 0, (1ULL << 40),
  628. 0x1000, &cli->vm);
  629. if (ret) {
  630. nouveau_cli_destroy(cli);
  631. goto out_suspend;
  632. }
  633. nvkm_client(&cli->base)->vm = cli->vm;
  634. }
  635. fpriv->driver_priv = cli;
  636. mutex_lock(&drm->client.mutex);
  637. list_add(&cli->head, &drm->clients);
  638. mutex_unlock(&drm->client.mutex);
  639. out_suspend:
  640. pm_runtime_mark_last_busy(dev->dev);
  641. pm_runtime_put_autosuspend(dev->dev);
  642. return ret;
  643. }
  644. static void
  645. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  646. {
  647. struct nouveau_cli *cli = nouveau_cli(fpriv);
  648. struct nouveau_drm *drm = nouveau_drm(dev);
  649. pm_runtime_get_sync(dev->dev);
  650. if (cli->abi16)
  651. nouveau_abi16_fini(cli->abi16);
  652. mutex_lock(&drm->client.mutex);
  653. list_del(&cli->head);
  654. mutex_unlock(&drm->client.mutex);
  655. }
  656. static void
  657. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  658. {
  659. struct nouveau_cli *cli = nouveau_cli(fpriv);
  660. nouveau_cli_destroy(cli);
  661. pm_runtime_mark_last_busy(dev->dev);
  662. pm_runtime_put_autosuspend(dev->dev);
  663. }
  664. static const struct drm_ioctl_desc
  665. nouveau_ioctls[] = {
  666. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  667. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  668. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  669. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  670. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  671. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  672. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  673. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  674. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  675. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  676. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  677. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  678. };
  679. long
  680. nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  681. {
  682. struct drm_file *filp = file->private_data;
  683. struct drm_device *dev = filp->minor->dev;
  684. long ret;
  685. ret = pm_runtime_get_sync(dev->dev);
  686. if (ret < 0 && ret != -EACCES)
  687. return ret;
  688. switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
  689. case DRM_NOUVEAU_NVIF:
  690. ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
  691. break;
  692. default:
  693. ret = drm_ioctl(file, cmd, arg);
  694. break;
  695. }
  696. pm_runtime_mark_last_busy(dev->dev);
  697. pm_runtime_put_autosuspend(dev->dev);
  698. return ret;
  699. }
  700. static const struct file_operations
  701. nouveau_driver_fops = {
  702. .owner = THIS_MODULE,
  703. .open = drm_open,
  704. .release = drm_release,
  705. .unlocked_ioctl = nouveau_drm_ioctl,
  706. .mmap = nouveau_ttm_mmap,
  707. .poll = drm_poll,
  708. .read = drm_read,
  709. #if defined(CONFIG_COMPAT)
  710. .compat_ioctl = nouveau_compat_ioctl,
  711. #endif
  712. .llseek = noop_llseek,
  713. };
  714. static struct drm_driver
  715. driver = {
  716. .driver_features =
  717. DRIVER_USE_AGP |
  718. DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER,
  719. .load = nouveau_drm_load,
  720. .unload = nouveau_drm_unload,
  721. .open = nouveau_drm_open,
  722. .preclose = nouveau_drm_preclose,
  723. .postclose = nouveau_drm_postclose,
  724. .lastclose = nouveau_vga_lastclose,
  725. #if defined(CONFIG_DEBUG_FS)
  726. .debugfs_init = nouveau_debugfs_init,
  727. .debugfs_cleanup = nouveau_debugfs_takedown,
  728. #endif
  729. .get_vblank_counter = drm_vblank_count,
  730. .enable_vblank = nouveau_display_vblank_enable,
  731. .disable_vblank = nouveau_display_vblank_disable,
  732. .get_scanout_position = nouveau_display_scanoutpos,
  733. .get_vblank_timestamp = nouveau_display_vblstamp,
  734. .ioctls = nouveau_ioctls,
  735. .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
  736. .fops = &nouveau_driver_fops,
  737. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  738. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  739. .gem_prime_export = drm_gem_prime_export,
  740. .gem_prime_import = drm_gem_prime_import,
  741. .gem_prime_pin = nouveau_gem_prime_pin,
  742. .gem_prime_res_obj = nouveau_gem_prime_res_obj,
  743. .gem_prime_unpin = nouveau_gem_prime_unpin,
  744. .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
  745. .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
  746. .gem_prime_vmap = nouveau_gem_prime_vmap,
  747. .gem_prime_vunmap = nouveau_gem_prime_vunmap,
  748. .gem_free_object = nouveau_gem_object_del,
  749. .gem_open_object = nouveau_gem_object_open,
  750. .gem_close_object = nouveau_gem_object_close,
  751. .dumb_create = nouveau_display_dumb_create,
  752. .dumb_map_offset = nouveau_display_dumb_map_offset,
  753. .dumb_destroy = drm_gem_dumb_destroy,
  754. .name = DRIVER_NAME,
  755. .desc = DRIVER_DESC,
  756. #ifdef GIT_REVISION
  757. .date = GIT_REVISION,
  758. #else
  759. .date = DRIVER_DATE,
  760. #endif
  761. .major = DRIVER_MAJOR,
  762. .minor = DRIVER_MINOR,
  763. .patchlevel = DRIVER_PATCHLEVEL,
  764. };
  765. static struct pci_device_id
  766. nouveau_drm_pci_table[] = {
  767. {
  768. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  769. .class = PCI_BASE_CLASS_DISPLAY << 16,
  770. .class_mask = 0xff << 16,
  771. },
  772. {
  773. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  774. .class = PCI_BASE_CLASS_DISPLAY << 16,
  775. .class_mask = 0xff << 16,
  776. },
  777. {}
  778. };
  779. static int nouveau_pmops_runtime_suspend(struct device *dev)
  780. {
  781. struct pci_dev *pdev = to_pci_dev(dev);
  782. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  783. int ret;
  784. if (nouveau_runtime_pm == 0) {
  785. pm_runtime_forbid(dev);
  786. return -EBUSY;
  787. }
  788. /* are we optimus enabled? */
  789. if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
  790. DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
  791. pm_runtime_forbid(dev);
  792. return -EBUSY;
  793. }
  794. nv_debug_level(SILENT);
  795. drm_kms_helper_poll_disable(drm_dev);
  796. vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
  797. nouveau_switcheroo_optimus_dsm();
  798. ret = nouveau_do_suspend(drm_dev, true);
  799. pci_save_state(pdev);
  800. pci_disable_device(pdev);
  801. pci_set_power_state(pdev, PCI_D3cold);
  802. drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
  803. return ret;
  804. }
  805. static int nouveau_pmops_runtime_resume(struct device *dev)
  806. {
  807. struct pci_dev *pdev = to_pci_dev(dev);
  808. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  809. struct nvif_device *device = &nouveau_drm(drm_dev)->device;
  810. int ret;
  811. if (nouveau_runtime_pm == 0)
  812. return -EINVAL;
  813. pci_set_power_state(pdev, PCI_D0);
  814. pci_restore_state(pdev);
  815. ret = pci_enable_device(pdev);
  816. if (ret)
  817. return ret;
  818. pci_set_master(pdev);
  819. ret = nouveau_do_resume(drm_dev);
  820. drm_kms_helper_poll_enable(drm_dev);
  821. /* do magic */
  822. nvif_mask(device, 0x88488, (1 << 25), (1 << 25));
  823. vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
  824. drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
  825. nv_debug_level(NORMAL);
  826. return ret;
  827. }
  828. static int nouveau_pmops_runtime_idle(struct device *dev)
  829. {
  830. struct pci_dev *pdev = to_pci_dev(dev);
  831. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  832. struct nouveau_drm *drm = nouveau_drm(drm_dev);
  833. struct drm_crtc *crtc;
  834. if (nouveau_runtime_pm == 0) {
  835. pm_runtime_forbid(dev);
  836. return -EBUSY;
  837. }
  838. /* are we optimus enabled? */
  839. if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
  840. DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
  841. pm_runtime_forbid(dev);
  842. return -EBUSY;
  843. }
  844. /* if we have a hdmi audio device - make sure it has a driver loaded */
  845. if (drm->hdmi_device) {
  846. if (!drm->hdmi_device->driver) {
  847. DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
  848. pm_runtime_mark_last_busy(dev);
  849. return -EBUSY;
  850. }
  851. }
  852. list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
  853. if (crtc->enabled) {
  854. DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
  855. return -EBUSY;
  856. }
  857. }
  858. pm_runtime_mark_last_busy(dev);
  859. pm_runtime_autosuspend(dev);
  860. /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
  861. return 1;
  862. }
  863. static const struct dev_pm_ops nouveau_pm_ops = {
  864. .suspend = nouveau_pmops_suspend,
  865. .resume = nouveau_pmops_resume,
  866. .freeze = nouveau_pmops_freeze,
  867. .thaw = nouveau_pmops_thaw,
  868. .poweroff = nouveau_pmops_freeze,
  869. .restore = nouveau_pmops_resume,
  870. .runtime_suspend = nouveau_pmops_runtime_suspend,
  871. .runtime_resume = nouveau_pmops_runtime_resume,
  872. .runtime_idle = nouveau_pmops_runtime_idle,
  873. };
  874. static struct pci_driver
  875. nouveau_drm_pci_driver = {
  876. .name = "nouveau",
  877. .id_table = nouveau_drm_pci_table,
  878. .probe = nouveau_drm_probe,
  879. .remove = nouveau_drm_remove,
  880. .driver.pm = &nouveau_pm_ops,
  881. };
  882. struct drm_device *
  883. nouveau_platform_device_create_(struct platform_device *pdev, int size,
  884. void **pobject)
  885. {
  886. struct drm_device *drm;
  887. int err;
  888. err = nouveau_device_create_(pdev, NOUVEAU_BUS_PLATFORM,
  889. nouveau_platform_name(pdev),
  890. dev_name(&pdev->dev), nouveau_config,
  891. nouveau_debug, size, pobject);
  892. if (err)
  893. return ERR_PTR(err);
  894. drm = drm_dev_alloc(&driver, &pdev->dev);
  895. if (!drm) {
  896. err = -ENOMEM;
  897. goto err_free;
  898. }
  899. err = drm_dev_set_unique(drm, "%s", dev_name(&pdev->dev));
  900. if (err < 0)
  901. goto err_free;
  902. drm->platformdev = pdev;
  903. platform_set_drvdata(pdev, drm);
  904. return drm;
  905. err_free:
  906. nouveau_object_ref(NULL, (struct nouveau_object **)pobject);
  907. return ERR_PTR(err);
  908. }
  909. EXPORT_SYMBOL(nouveau_platform_device_create_);
  910. static int __init
  911. nouveau_drm_init(void)
  912. {
  913. if (nouveau_modeset == -1) {
  914. #ifdef CONFIG_VGA_CONSOLE
  915. if (vgacon_text_force())
  916. nouveau_modeset = 0;
  917. #endif
  918. }
  919. if (!nouveau_modeset)
  920. return 0;
  921. nouveau_register_dsm_handler();
  922. return drm_pci_init(&driver, &nouveau_drm_pci_driver);
  923. }
  924. static void __exit
  925. nouveau_drm_exit(void)
  926. {
  927. if (!nouveau_modeset)
  928. return;
  929. drm_pci_exit(&driver, &nouveau_drm_pci_driver);
  930. nouveau_unregister_dsm_handler();
  931. }
  932. module_init(nouveau_drm_init);
  933. module_exit(nouveau_drm_exit);
  934. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  935. MODULE_AUTHOR(DRIVER_AUTHOR);
  936. MODULE_DESCRIPTION(DRIVER_DESC);
  937. MODULE_LICENSE("GPL and additional rights");