intel_panel.c 40 KB

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  1. /*
  2. * Copyright © 2006-2010 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. * Chris Wilson <chris@chris-wilson.co.uk>
  29. */
  30. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31. #include <linux/moduleparam.h>
  32. #include "intel_drv.h"
  33. void
  34. intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
  35. struct drm_display_mode *adjusted_mode)
  36. {
  37. drm_mode_copy(adjusted_mode, fixed_mode);
  38. drm_mode_set_crtcinfo(adjusted_mode, 0);
  39. }
  40. /**
  41. * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
  42. * @dev: drm device
  43. * @fixed_mode : panel native mode
  44. * @connector: LVDS/eDP connector
  45. *
  46. * Return downclock_avail
  47. * Find the reduced downclock for LVDS/eDP in EDID.
  48. */
  49. struct drm_display_mode *
  50. intel_find_panel_downclock(struct drm_device *dev,
  51. struct drm_display_mode *fixed_mode,
  52. struct drm_connector *connector)
  53. {
  54. struct drm_display_mode *scan, *tmp_mode;
  55. int temp_downclock;
  56. temp_downclock = fixed_mode->clock;
  57. tmp_mode = NULL;
  58. list_for_each_entry(scan, &connector->probed_modes, head) {
  59. /*
  60. * If one mode has the same resolution with the fixed_panel
  61. * mode while they have the different refresh rate, it means
  62. * that the reduced downclock is found. In such
  63. * case we can set the different FPx0/1 to dynamically select
  64. * between low and high frequency.
  65. */
  66. if (scan->hdisplay == fixed_mode->hdisplay &&
  67. scan->hsync_start == fixed_mode->hsync_start &&
  68. scan->hsync_end == fixed_mode->hsync_end &&
  69. scan->htotal == fixed_mode->htotal &&
  70. scan->vdisplay == fixed_mode->vdisplay &&
  71. scan->vsync_start == fixed_mode->vsync_start &&
  72. scan->vsync_end == fixed_mode->vsync_end &&
  73. scan->vtotal == fixed_mode->vtotal) {
  74. if (scan->clock < temp_downclock) {
  75. /*
  76. * The downclock is already found. But we
  77. * expect to find the lower downclock.
  78. */
  79. temp_downclock = scan->clock;
  80. tmp_mode = scan;
  81. }
  82. }
  83. }
  84. if (temp_downclock < fixed_mode->clock)
  85. return drm_mode_duplicate(dev, tmp_mode);
  86. else
  87. return NULL;
  88. }
  89. /* adjusted_mode has been preset to be the panel's fixed mode */
  90. void
  91. intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
  92. struct intel_crtc_config *pipe_config,
  93. int fitting_mode)
  94. {
  95. struct drm_display_mode *adjusted_mode;
  96. int x, y, width, height;
  97. adjusted_mode = &pipe_config->adjusted_mode;
  98. x = y = width = height = 0;
  99. /* Native modes don't need fitting */
  100. if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
  101. adjusted_mode->vdisplay == pipe_config->pipe_src_h)
  102. goto done;
  103. switch (fitting_mode) {
  104. case DRM_MODE_SCALE_CENTER:
  105. width = pipe_config->pipe_src_w;
  106. height = pipe_config->pipe_src_h;
  107. x = (adjusted_mode->hdisplay - width + 1)/2;
  108. y = (adjusted_mode->vdisplay - height + 1)/2;
  109. break;
  110. case DRM_MODE_SCALE_ASPECT:
  111. /* Scale but preserve the aspect ratio */
  112. {
  113. u32 scaled_width = adjusted_mode->hdisplay
  114. * pipe_config->pipe_src_h;
  115. u32 scaled_height = pipe_config->pipe_src_w
  116. * adjusted_mode->vdisplay;
  117. if (scaled_width > scaled_height) { /* pillar */
  118. width = scaled_height / pipe_config->pipe_src_h;
  119. if (width & 1)
  120. width++;
  121. x = (adjusted_mode->hdisplay - width + 1) / 2;
  122. y = 0;
  123. height = adjusted_mode->vdisplay;
  124. } else if (scaled_width < scaled_height) { /* letter */
  125. height = scaled_width / pipe_config->pipe_src_w;
  126. if (height & 1)
  127. height++;
  128. y = (adjusted_mode->vdisplay - height + 1) / 2;
  129. x = 0;
  130. width = adjusted_mode->hdisplay;
  131. } else {
  132. x = y = 0;
  133. width = adjusted_mode->hdisplay;
  134. height = adjusted_mode->vdisplay;
  135. }
  136. }
  137. break;
  138. case DRM_MODE_SCALE_FULLSCREEN:
  139. x = y = 0;
  140. width = adjusted_mode->hdisplay;
  141. height = adjusted_mode->vdisplay;
  142. break;
  143. default:
  144. WARN(1, "bad panel fit mode: %d\n", fitting_mode);
  145. return;
  146. }
  147. done:
  148. pipe_config->pch_pfit.pos = (x << 16) | y;
  149. pipe_config->pch_pfit.size = (width << 16) | height;
  150. pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
  151. }
  152. static void
  153. centre_horizontally(struct drm_display_mode *mode,
  154. int width)
  155. {
  156. u32 border, sync_pos, blank_width, sync_width;
  157. /* keep the hsync and hblank widths constant */
  158. sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
  159. blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
  160. sync_pos = (blank_width - sync_width + 1) / 2;
  161. border = (mode->hdisplay - width + 1) / 2;
  162. border += border & 1; /* make the border even */
  163. mode->crtc_hdisplay = width;
  164. mode->crtc_hblank_start = width + border;
  165. mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
  166. mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
  167. mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
  168. }
  169. static void
  170. centre_vertically(struct drm_display_mode *mode,
  171. int height)
  172. {
  173. u32 border, sync_pos, blank_width, sync_width;
  174. /* keep the vsync and vblank widths constant */
  175. sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
  176. blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
  177. sync_pos = (blank_width - sync_width + 1) / 2;
  178. border = (mode->vdisplay - height + 1) / 2;
  179. mode->crtc_vdisplay = height;
  180. mode->crtc_vblank_start = height + border;
  181. mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
  182. mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
  183. mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
  184. }
  185. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  186. {
  187. /*
  188. * Floating point operation is not supported. So the FACTOR
  189. * is defined, which can avoid the floating point computation
  190. * when calculating the panel ratio.
  191. */
  192. #define ACCURACY 12
  193. #define FACTOR (1 << ACCURACY)
  194. u32 ratio = source * FACTOR / target;
  195. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  196. }
  197. static void i965_scale_aspect(struct intel_crtc_config *pipe_config,
  198. u32 *pfit_control)
  199. {
  200. struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  201. u32 scaled_width = adjusted_mode->hdisplay *
  202. pipe_config->pipe_src_h;
  203. u32 scaled_height = pipe_config->pipe_src_w *
  204. adjusted_mode->vdisplay;
  205. /* 965+ is easy, it does everything in hw */
  206. if (scaled_width > scaled_height)
  207. *pfit_control |= PFIT_ENABLE |
  208. PFIT_SCALING_PILLAR;
  209. else if (scaled_width < scaled_height)
  210. *pfit_control |= PFIT_ENABLE |
  211. PFIT_SCALING_LETTER;
  212. else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w)
  213. *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  214. }
  215. static void i9xx_scale_aspect(struct intel_crtc_config *pipe_config,
  216. u32 *pfit_control, u32 *pfit_pgm_ratios,
  217. u32 *border)
  218. {
  219. struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  220. u32 scaled_width = adjusted_mode->hdisplay *
  221. pipe_config->pipe_src_h;
  222. u32 scaled_height = pipe_config->pipe_src_w *
  223. adjusted_mode->vdisplay;
  224. u32 bits;
  225. /*
  226. * For earlier chips we have to calculate the scaling
  227. * ratio by hand and program it into the
  228. * PFIT_PGM_RATIO register
  229. */
  230. if (scaled_width > scaled_height) { /* pillar */
  231. centre_horizontally(adjusted_mode,
  232. scaled_height /
  233. pipe_config->pipe_src_h);
  234. *border = LVDS_BORDER_ENABLE;
  235. if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) {
  236. bits = panel_fitter_scaling(pipe_config->pipe_src_h,
  237. adjusted_mode->vdisplay);
  238. *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  239. bits << PFIT_VERT_SCALE_SHIFT);
  240. *pfit_control |= (PFIT_ENABLE |
  241. VERT_INTERP_BILINEAR |
  242. HORIZ_INTERP_BILINEAR);
  243. }
  244. } else if (scaled_width < scaled_height) { /* letter */
  245. centre_vertically(adjusted_mode,
  246. scaled_width /
  247. pipe_config->pipe_src_w);
  248. *border = LVDS_BORDER_ENABLE;
  249. if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
  250. bits = panel_fitter_scaling(pipe_config->pipe_src_w,
  251. adjusted_mode->hdisplay);
  252. *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  253. bits << PFIT_VERT_SCALE_SHIFT);
  254. *pfit_control |= (PFIT_ENABLE |
  255. VERT_INTERP_BILINEAR |
  256. HORIZ_INTERP_BILINEAR);
  257. }
  258. } else {
  259. /* Aspects match, Let hw scale both directions */
  260. *pfit_control |= (PFIT_ENABLE |
  261. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  262. VERT_INTERP_BILINEAR |
  263. HORIZ_INTERP_BILINEAR);
  264. }
  265. }
  266. void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
  267. struct intel_crtc_config *pipe_config,
  268. int fitting_mode)
  269. {
  270. struct drm_device *dev = intel_crtc->base.dev;
  271. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  272. struct drm_display_mode *adjusted_mode;
  273. adjusted_mode = &pipe_config->adjusted_mode;
  274. /* Native modes don't need fitting */
  275. if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
  276. adjusted_mode->vdisplay == pipe_config->pipe_src_h)
  277. goto out;
  278. switch (fitting_mode) {
  279. case DRM_MODE_SCALE_CENTER:
  280. /*
  281. * For centered modes, we have to calculate border widths &
  282. * heights and modify the values programmed into the CRTC.
  283. */
  284. centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
  285. centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
  286. border = LVDS_BORDER_ENABLE;
  287. break;
  288. case DRM_MODE_SCALE_ASPECT:
  289. /* Scale but preserve the aspect ratio */
  290. if (INTEL_INFO(dev)->gen >= 4)
  291. i965_scale_aspect(pipe_config, &pfit_control);
  292. else
  293. i9xx_scale_aspect(pipe_config, &pfit_control,
  294. &pfit_pgm_ratios, &border);
  295. break;
  296. case DRM_MODE_SCALE_FULLSCREEN:
  297. /*
  298. * Full scaling, even if it changes the aspect ratio.
  299. * Fortunately this is all done for us in hw.
  300. */
  301. if (pipe_config->pipe_src_h != adjusted_mode->vdisplay ||
  302. pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
  303. pfit_control |= PFIT_ENABLE;
  304. if (INTEL_INFO(dev)->gen >= 4)
  305. pfit_control |= PFIT_SCALING_AUTO;
  306. else
  307. pfit_control |= (VERT_AUTO_SCALE |
  308. VERT_INTERP_BILINEAR |
  309. HORIZ_AUTO_SCALE |
  310. HORIZ_INTERP_BILINEAR);
  311. }
  312. break;
  313. default:
  314. WARN(1, "bad panel fit mode: %d\n", fitting_mode);
  315. return;
  316. }
  317. /* 965+ wants fuzzy fitting */
  318. /* FIXME: handle multiple panels by failing gracefully */
  319. if (INTEL_INFO(dev)->gen >= 4)
  320. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  321. PFIT_FILTER_FUZZY);
  322. out:
  323. if ((pfit_control & PFIT_ENABLE) == 0) {
  324. pfit_control = 0;
  325. pfit_pgm_ratios = 0;
  326. }
  327. /* Make sure pre-965 set dither correctly for 18bpp panels. */
  328. if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
  329. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  330. pipe_config->gmch_pfit.control = pfit_control;
  331. pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
  332. pipe_config->gmch_pfit.lvds_border_bits = border;
  333. }
  334. enum drm_connector_status
  335. intel_panel_detect(struct drm_device *dev)
  336. {
  337. struct drm_i915_private *dev_priv = dev->dev_private;
  338. /* Assume that the BIOS does not lie through the OpRegion... */
  339. if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
  340. return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
  341. connector_status_connected :
  342. connector_status_disconnected;
  343. }
  344. switch (i915.panel_ignore_lid) {
  345. case -2:
  346. return connector_status_connected;
  347. case -1:
  348. return connector_status_disconnected;
  349. default:
  350. return connector_status_unknown;
  351. }
  352. }
  353. /**
  354. * scale - scale values from one range to another
  355. *
  356. * @source_val: value in range [@source_min..@source_max]
  357. *
  358. * Return @source_val in range [@source_min..@source_max] scaled to range
  359. * [@target_min..@target_max].
  360. */
  361. static uint32_t scale(uint32_t source_val,
  362. uint32_t source_min, uint32_t source_max,
  363. uint32_t target_min, uint32_t target_max)
  364. {
  365. uint64_t target_val;
  366. WARN_ON(source_min > source_max);
  367. WARN_ON(target_min > target_max);
  368. /* defensive */
  369. source_val = clamp(source_val, source_min, source_max);
  370. /* avoid overflows */
  371. target_val = (uint64_t)(source_val - source_min) *
  372. (target_max - target_min);
  373. do_div(target_val, source_max - source_min);
  374. target_val += target_min;
  375. return target_val;
  376. }
  377. /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
  378. static inline u32 scale_user_to_hw(struct intel_connector *connector,
  379. u32 user_level, u32 user_max)
  380. {
  381. struct intel_panel *panel = &connector->panel;
  382. return scale(user_level, 0, user_max,
  383. panel->backlight.min, panel->backlight.max);
  384. }
  385. /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
  386. * to [hw_min..hw_max]. */
  387. static inline u32 clamp_user_to_hw(struct intel_connector *connector,
  388. u32 user_level, u32 user_max)
  389. {
  390. struct intel_panel *panel = &connector->panel;
  391. u32 hw_level;
  392. hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
  393. hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
  394. return hw_level;
  395. }
  396. /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
  397. static inline u32 scale_hw_to_user(struct intel_connector *connector,
  398. u32 hw_level, u32 user_max)
  399. {
  400. struct intel_panel *panel = &connector->panel;
  401. return scale(hw_level, panel->backlight.min, panel->backlight.max,
  402. 0, user_max);
  403. }
  404. static u32 intel_panel_compute_brightness(struct intel_connector *connector,
  405. u32 val)
  406. {
  407. struct drm_device *dev = connector->base.dev;
  408. struct drm_i915_private *dev_priv = dev->dev_private;
  409. struct intel_panel *panel = &connector->panel;
  410. WARN_ON(panel->backlight.max == 0);
  411. if (i915.invert_brightness < 0)
  412. return val;
  413. if (i915.invert_brightness > 0 ||
  414. dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
  415. return panel->backlight.max - val;
  416. }
  417. return val;
  418. }
  419. static u32 bdw_get_backlight(struct intel_connector *connector)
  420. {
  421. struct drm_device *dev = connector->base.dev;
  422. struct drm_i915_private *dev_priv = dev->dev_private;
  423. return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
  424. }
  425. static u32 pch_get_backlight(struct intel_connector *connector)
  426. {
  427. struct drm_device *dev = connector->base.dev;
  428. struct drm_i915_private *dev_priv = dev->dev_private;
  429. return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
  430. }
  431. static u32 i9xx_get_backlight(struct intel_connector *connector)
  432. {
  433. struct drm_device *dev = connector->base.dev;
  434. struct drm_i915_private *dev_priv = dev->dev_private;
  435. struct intel_panel *panel = &connector->panel;
  436. u32 val;
  437. val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
  438. if (INTEL_INFO(dev)->gen < 4)
  439. val >>= 1;
  440. if (panel->backlight.combination_mode) {
  441. u8 lbpc;
  442. pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
  443. val *= lbpc;
  444. }
  445. return val;
  446. }
  447. static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe)
  448. {
  449. struct drm_i915_private *dev_priv = dev->dev_private;
  450. return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
  451. }
  452. static u32 vlv_get_backlight(struct intel_connector *connector)
  453. {
  454. struct drm_device *dev = connector->base.dev;
  455. enum pipe pipe = intel_get_pipe_from_connector(connector);
  456. return _vlv_get_backlight(dev, pipe);
  457. }
  458. static u32 intel_panel_get_backlight(struct intel_connector *connector)
  459. {
  460. struct drm_device *dev = connector->base.dev;
  461. struct drm_i915_private *dev_priv = dev->dev_private;
  462. u32 val;
  463. unsigned long flags;
  464. spin_lock_irqsave(&dev_priv->backlight_lock, flags);
  465. val = dev_priv->display.get_backlight(connector);
  466. val = intel_panel_compute_brightness(connector, val);
  467. spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
  468. DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
  469. return val;
  470. }
  471. static void bdw_set_backlight(struct intel_connector *connector, u32 level)
  472. {
  473. struct drm_device *dev = connector->base.dev;
  474. struct drm_i915_private *dev_priv = dev->dev_private;
  475. u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  476. I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
  477. }
  478. static void pch_set_backlight(struct intel_connector *connector, u32 level)
  479. {
  480. struct drm_device *dev = connector->base.dev;
  481. struct drm_i915_private *dev_priv = dev->dev_private;
  482. u32 tmp;
  483. tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  484. I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
  485. }
  486. static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
  487. {
  488. struct drm_device *dev = connector->base.dev;
  489. struct drm_i915_private *dev_priv = dev->dev_private;
  490. struct intel_panel *panel = &connector->panel;
  491. u32 tmp, mask;
  492. WARN_ON(panel->backlight.max == 0);
  493. if (panel->backlight.combination_mode) {
  494. u8 lbpc;
  495. lbpc = level * 0xfe / panel->backlight.max + 1;
  496. level /= lbpc;
  497. pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
  498. }
  499. if (IS_GEN4(dev)) {
  500. mask = BACKLIGHT_DUTY_CYCLE_MASK;
  501. } else {
  502. level <<= 1;
  503. mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
  504. }
  505. tmp = I915_READ(BLC_PWM_CTL) & ~mask;
  506. I915_WRITE(BLC_PWM_CTL, tmp | level);
  507. }
  508. static void vlv_set_backlight(struct intel_connector *connector, u32 level)
  509. {
  510. struct drm_device *dev = connector->base.dev;
  511. struct drm_i915_private *dev_priv = dev->dev_private;
  512. enum pipe pipe = intel_get_pipe_from_connector(connector);
  513. u32 tmp;
  514. tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  515. I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
  516. }
  517. static void
  518. intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
  519. {
  520. struct drm_device *dev = connector->base.dev;
  521. struct drm_i915_private *dev_priv = dev->dev_private;
  522. DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
  523. level = intel_panel_compute_brightness(connector, level);
  524. dev_priv->display.set_backlight(connector, level);
  525. }
  526. /* set backlight brightness to level in range [0..max], scaling wrt hw min */
  527. static void intel_panel_set_backlight(struct intel_connector *connector,
  528. u32 user_level, u32 user_max)
  529. {
  530. struct drm_device *dev = connector->base.dev;
  531. struct drm_i915_private *dev_priv = dev->dev_private;
  532. struct intel_panel *panel = &connector->panel;
  533. enum pipe pipe = intel_get_pipe_from_connector(connector);
  534. u32 hw_level;
  535. unsigned long flags;
  536. if (!panel->backlight.present || pipe == INVALID_PIPE)
  537. return;
  538. spin_lock_irqsave(&dev_priv->backlight_lock, flags);
  539. WARN_ON(panel->backlight.max == 0);
  540. hw_level = scale_user_to_hw(connector, user_level, user_max);
  541. panel->backlight.level = hw_level;
  542. if (panel->backlight.enabled)
  543. intel_panel_actually_set_backlight(connector, hw_level);
  544. spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
  545. }
  546. /* set backlight brightness to level in range [0..max], assuming hw min is
  547. * respected.
  548. */
  549. void intel_panel_set_backlight_acpi(struct intel_connector *connector,
  550. u32 user_level, u32 user_max)
  551. {
  552. struct drm_device *dev = connector->base.dev;
  553. struct drm_i915_private *dev_priv = dev->dev_private;
  554. struct intel_panel *panel = &connector->panel;
  555. enum pipe pipe = intel_get_pipe_from_connector(connector);
  556. u32 hw_level;
  557. unsigned long flags;
  558. if (!panel->backlight.present || pipe == INVALID_PIPE)
  559. return;
  560. spin_lock_irqsave(&dev_priv->backlight_lock, flags);
  561. WARN_ON(panel->backlight.max == 0);
  562. hw_level = clamp_user_to_hw(connector, user_level, user_max);
  563. panel->backlight.level = hw_level;
  564. if (panel->backlight.device)
  565. panel->backlight.device->props.brightness =
  566. scale_hw_to_user(connector,
  567. panel->backlight.level,
  568. panel->backlight.device->props.max_brightness);
  569. if (panel->backlight.enabled)
  570. intel_panel_actually_set_backlight(connector, hw_level);
  571. spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
  572. }
  573. static void pch_disable_backlight(struct intel_connector *connector)
  574. {
  575. struct drm_device *dev = connector->base.dev;
  576. struct drm_i915_private *dev_priv = dev->dev_private;
  577. u32 tmp;
  578. intel_panel_actually_set_backlight(connector, 0);
  579. tmp = I915_READ(BLC_PWM_CPU_CTL2);
  580. I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
  581. tmp = I915_READ(BLC_PWM_PCH_CTL1);
  582. I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
  583. }
  584. static void i9xx_disable_backlight(struct intel_connector *connector)
  585. {
  586. intel_panel_actually_set_backlight(connector, 0);
  587. }
  588. static void i965_disable_backlight(struct intel_connector *connector)
  589. {
  590. struct drm_device *dev = connector->base.dev;
  591. struct drm_i915_private *dev_priv = dev->dev_private;
  592. u32 tmp;
  593. intel_panel_actually_set_backlight(connector, 0);
  594. tmp = I915_READ(BLC_PWM_CTL2);
  595. I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
  596. }
  597. static void vlv_disable_backlight(struct intel_connector *connector)
  598. {
  599. struct drm_device *dev = connector->base.dev;
  600. struct drm_i915_private *dev_priv = dev->dev_private;
  601. enum pipe pipe = intel_get_pipe_from_connector(connector);
  602. u32 tmp;
  603. intel_panel_actually_set_backlight(connector, 0);
  604. tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
  605. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
  606. }
  607. void intel_panel_disable_backlight(struct intel_connector *connector)
  608. {
  609. struct drm_device *dev = connector->base.dev;
  610. struct drm_i915_private *dev_priv = dev->dev_private;
  611. struct intel_panel *panel = &connector->panel;
  612. enum pipe pipe = intel_get_pipe_from_connector(connector);
  613. unsigned long flags;
  614. if (!panel->backlight.present || pipe == INVALID_PIPE)
  615. return;
  616. /*
  617. * Do not disable backlight on the vgaswitcheroo path. When switching
  618. * away from i915, the other client may depend on i915 to handle the
  619. * backlight. This will leave the backlight on unnecessarily when
  620. * another client is not activated.
  621. */
  622. if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
  623. DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
  624. return;
  625. }
  626. spin_lock_irqsave(&dev_priv->backlight_lock, flags);
  627. panel->backlight.enabled = false;
  628. dev_priv->display.disable_backlight(connector);
  629. spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
  630. }
  631. static void bdw_enable_backlight(struct intel_connector *connector)
  632. {
  633. struct drm_device *dev = connector->base.dev;
  634. struct drm_i915_private *dev_priv = dev->dev_private;
  635. struct intel_panel *panel = &connector->panel;
  636. u32 pch_ctl1, pch_ctl2;
  637. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  638. if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
  639. DRM_DEBUG_KMS("pch backlight already enabled\n");
  640. pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
  641. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  642. }
  643. pch_ctl2 = panel->backlight.max << 16;
  644. I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
  645. pch_ctl1 = 0;
  646. if (panel->backlight.active_low_pwm)
  647. pch_ctl1 |= BLM_PCH_POLARITY;
  648. /* BDW always uses the pch pwm controls. */
  649. pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
  650. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  651. POSTING_READ(BLC_PWM_PCH_CTL1);
  652. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
  653. /* This won't stick until the above enable. */
  654. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  655. }
  656. static void pch_enable_backlight(struct intel_connector *connector)
  657. {
  658. struct drm_device *dev = connector->base.dev;
  659. struct drm_i915_private *dev_priv = dev->dev_private;
  660. struct intel_panel *panel = &connector->panel;
  661. enum pipe pipe = intel_get_pipe_from_connector(connector);
  662. enum transcoder cpu_transcoder =
  663. intel_pipe_to_cpu_transcoder(dev_priv, pipe);
  664. u32 cpu_ctl2, pch_ctl1, pch_ctl2;
  665. cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
  666. if (cpu_ctl2 & BLM_PWM_ENABLE) {
  667. DRM_DEBUG_KMS("cpu backlight already enabled\n");
  668. cpu_ctl2 &= ~BLM_PWM_ENABLE;
  669. I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
  670. }
  671. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  672. if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
  673. DRM_DEBUG_KMS("pch backlight already enabled\n");
  674. pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
  675. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  676. }
  677. if (cpu_transcoder == TRANSCODER_EDP)
  678. cpu_ctl2 = BLM_TRANSCODER_EDP;
  679. else
  680. cpu_ctl2 = BLM_PIPE(cpu_transcoder);
  681. I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
  682. POSTING_READ(BLC_PWM_CPU_CTL2);
  683. I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
  684. /* This won't stick until the above enable. */
  685. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  686. pch_ctl2 = panel->backlight.max << 16;
  687. I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
  688. pch_ctl1 = 0;
  689. if (panel->backlight.active_low_pwm)
  690. pch_ctl1 |= BLM_PCH_POLARITY;
  691. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  692. POSTING_READ(BLC_PWM_PCH_CTL1);
  693. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
  694. }
  695. static void i9xx_enable_backlight(struct intel_connector *connector)
  696. {
  697. struct drm_device *dev = connector->base.dev;
  698. struct drm_i915_private *dev_priv = dev->dev_private;
  699. struct intel_panel *panel = &connector->panel;
  700. u32 ctl, freq;
  701. ctl = I915_READ(BLC_PWM_CTL);
  702. if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
  703. DRM_DEBUG_KMS("backlight already enabled\n");
  704. I915_WRITE(BLC_PWM_CTL, 0);
  705. }
  706. freq = panel->backlight.max;
  707. if (panel->backlight.combination_mode)
  708. freq /= 0xff;
  709. ctl = freq << 17;
  710. if (panel->backlight.combination_mode)
  711. ctl |= BLM_LEGACY_MODE;
  712. if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm)
  713. ctl |= BLM_POLARITY_PNV;
  714. I915_WRITE(BLC_PWM_CTL, ctl);
  715. POSTING_READ(BLC_PWM_CTL);
  716. /* XXX: combine this into above write? */
  717. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  718. }
  719. static void i965_enable_backlight(struct intel_connector *connector)
  720. {
  721. struct drm_device *dev = connector->base.dev;
  722. struct drm_i915_private *dev_priv = dev->dev_private;
  723. struct intel_panel *panel = &connector->panel;
  724. enum pipe pipe = intel_get_pipe_from_connector(connector);
  725. u32 ctl, ctl2, freq;
  726. ctl2 = I915_READ(BLC_PWM_CTL2);
  727. if (ctl2 & BLM_PWM_ENABLE) {
  728. DRM_DEBUG_KMS("backlight already enabled\n");
  729. ctl2 &= ~BLM_PWM_ENABLE;
  730. I915_WRITE(BLC_PWM_CTL2, ctl2);
  731. }
  732. freq = panel->backlight.max;
  733. if (panel->backlight.combination_mode)
  734. freq /= 0xff;
  735. ctl = freq << 16;
  736. I915_WRITE(BLC_PWM_CTL, ctl);
  737. ctl2 = BLM_PIPE(pipe);
  738. if (panel->backlight.combination_mode)
  739. ctl2 |= BLM_COMBINATION_MODE;
  740. if (panel->backlight.active_low_pwm)
  741. ctl2 |= BLM_POLARITY_I965;
  742. I915_WRITE(BLC_PWM_CTL2, ctl2);
  743. POSTING_READ(BLC_PWM_CTL2);
  744. I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
  745. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  746. }
  747. static void vlv_enable_backlight(struct intel_connector *connector)
  748. {
  749. struct drm_device *dev = connector->base.dev;
  750. struct drm_i915_private *dev_priv = dev->dev_private;
  751. struct intel_panel *panel = &connector->panel;
  752. enum pipe pipe = intel_get_pipe_from_connector(connector);
  753. u32 ctl, ctl2;
  754. ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
  755. if (ctl2 & BLM_PWM_ENABLE) {
  756. DRM_DEBUG_KMS("backlight already enabled\n");
  757. ctl2 &= ~BLM_PWM_ENABLE;
  758. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
  759. }
  760. ctl = panel->backlight.max << 16;
  761. I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
  762. /* XXX: combine this into above write? */
  763. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  764. ctl2 = 0;
  765. if (panel->backlight.active_low_pwm)
  766. ctl2 |= BLM_POLARITY_I965;
  767. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
  768. POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
  769. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
  770. }
  771. void intel_panel_enable_backlight(struct intel_connector *connector)
  772. {
  773. struct drm_device *dev = connector->base.dev;
  774. struct drm_i915_private *dev_priv = dev->dev_private;
  775. struct intel_panel *panel = &connector->panel;
  776. enum pipe pipe = intel_get_pipe_from_connector(connector);
  777. unsigned long flags;
  778. if (!panel->backlight.present || pipe == INVALID_PIPE)
  779. return;
  780. DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
  781. spin_lock_irqsave(&dev_priv->backlight_lock, flags);
  782. WARN_ON(panel->backlight.max == 0);
  783. if (panel->backlight.level == 0) {
  784. panel->backlight.level = panel->backlight.max;
  785. if (panel->backlight.device)
  786. panel->backlight.device->props.brightness =
  787. scale_hw_to_user(connector,
  788. panel->backlight.level,
  789. panel->backlight.device->props.max_brightness);
  790. }
  791. dev_priv->display.enable_backlight(connector);
  792. panel->backlight.enabled = true;
  793. spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
  794. }
  795. #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
  796. static int intel_backlight_device_update_status(struct backlight_device *bd)
  797. {
  798. struct intel_connector *connector = bl_get_data(bd);
  799. struct drm_device *dev = connector->base.dev;
  800. drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
  801. DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
  802. bd->props.brightness, bd->props.max_brightness);
  803. intel_panel_set_backlight(connector, bd->props.brightness,
  804. bd->props.max_brightness);
  805. drm_modeset_unlock(&dev->mode_config.connection_mutex);
  806. return 0;
  807. }
  808. static int intel_backlight_device_get_brightness(struct backlight_device *bd)
  809. {
  810. struct intel_connector *connector = bl_get_data(bd);
  811. struct drm_device *dev = connector->base.dev;
  812. struct drm_i915_private *dev_priv = dev->dev_private;
  813. u32 hw_level;
  814. int ret;
  815. intel_runtime_pm_get(dev_priv);
  816. drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
  817. hw_level = intel_panel_get_backlight(connector);
  818. ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
  819. drm_modeset_unlock(&dev->mode_config.connection_mutex);
  820. intel_runtime_pm_put(dev_priv);
  821. return ret;
  822. }
  823. static const struct backlight_ops intel_backlight_device_ops = {
  824. .update_status = intel_backlight_device_update_status,
  825. .get_brightness = intel_backlight_device_get_brightness,
  826. };
  827. static int intel_backlight_device_register(struct intel_connector *connector)
  828. {
  829. struct intel_panel *panel = &connector->panel;
  830. struct backlight_properties props;
  831. if (WARN_ON(panel->backlight.device))
  832. return -ENODEV;
  833. WARN_ON(panel->backlight.max == 0);
  834. memset(&props, 0, sizeof(props));
  835. props.type = BACKLIGHT_RAW;
  836. /*
  837. * Note: Everything should work even if the backlight device max
  838. * presented to the userspace is arbitrarily chosen.
  839. */
  840. props.max_brightness = panel->backlight.max;
  841. props.brightness = scale_hw_to_user(connector,
  842. panel->backlight.level,
  843. props.max_brightness);
  844. /*
  845. * Note: using the same name independent of the connector prevents
  846. * registration of multiple backlight devices in the driver.
  847. */
  848. panel->backlight.device =
  849. backlight_device_register("intel_backlight",
  850. connector->base.kdev,
  851. connector,
  852. &intel_backlight_device_ops, &props);
  853. if (IS_ERR(panel->backlight.device)) {
  854. DRM_ERROR("Failed to register backlight: %ld\n",
  855. PTR_ERR(panel->backlight.device));
  856. panel->backlight.device = NULL;
  857. return -ENODEV;
  858. }
  859. return 0;
  860. }
  861. static void intel_backlight_device_unregister(struct intel_connector *connector)
  862. {
  863. struct intel_panel *panel = &connector->panel;
  864. if (panel->backlight.device) {
  865. backlight_device_unregister(panel->backlight.device);
  866. panel->backlight.device = NULL;
  867. }
  868. }
  869. #else /* CONFIG_BACKLIGHT_CLASS_DEVICE */
  870. static int intel_backlight_device_register(struct intel_connector *connector)
  871. {
  872. return 0;
  873. }
  874. static void intel_backlight_device_unregister(struct intel_connector *connector)
  875. {
  876. }
  877. #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
  878. /*
  879. * Note: The setup hooks can't assume pipe is set!
  880. *
  881. * XXX: Query mode clock or hardware clock and program PWM modulation frequency
  882. * appropriately when it's 0. Use VBT and/or sane defaults.
  883. */
  884. static u32 get_backlight_min_vbt(struct intel_connector *connector)
  885. {
  886. struct drm_device *dev = connector->base.dev;
  887. struct drm_i915_private *dev_priv = dev->dev_private;
  888. struct intel_panel *panel = &connector->panel;
  889. WARN_ON(panel->backlight.max == 0);
  890. /* vbt value is a coefficient in range [0..255] */
  891. return scale(dev_priv->vbt.backlight.min_brightness, 0, 255,
  892. 0, panel->backlight.max);
  893. }
  894. static int bdw_setup_backlight(struct intel_connector *connector)
  895. {
  896. struct drm_device *dev = connector->base.dev;
  897. struct drm_i915_private *dev_priv = dev->dev_private;
  898. struct intel_panel *panel = &connector->panel;
  899. u32 pch_ctl1, pch_ctl2, val;
  900. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  901. panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
  902. pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
  903. panel->backlight.max = pch_ctl2 >> 16;
  904. if (!panel->backlight.max)
  905. return -ENODEV;
  906. panel->backlight.min = get_backlight_min_vbt(connector);
  907. val = bdw_get_backlight(connector);
  908. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  909. panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) &&
  910. panel->backlight.level != 0;
  911. return 0;
  912. }
  913. static int pch_setup_backlight(struct intel_connector *connector)
  914. {
  915. struct drm_device *dev = connector->base.dev;
  916. struct drm_i915_private *dev_priv = dev->dev_private;
  917. struct intel_panel *panel = &connector->panel;
  918. u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
  919. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  920. panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
  921. pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
  922. panel->backlight.max = pch_ctl2 >> 16;
  923. if (!panel->backlight.max)
  924. return -ENODEV;
  925. panel->backlight.min = get_backlight_min_vbt(connector);
  926. val = pch_get_backlight(connector);
  927. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  928. cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
  929. panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
  930. (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0;
  931. return 0;
  932. }
  933. static int i9xx_setup_backlight(struct intel_connector *connector)
  934. {
  935. struct drm_device *dev = connector->base.dev;
  936. struct drm_i915_private *dev_priv = dev->dev_private;
  937. struct intel_panel *panel = &connector->panel;
  938. u32 ctl, val;
  939. ctl = I915_READ(BLC_PWM_CTL);
  940. if (IS_GEN2(dev) || IS_I915GM(dev) || IS_I945GM(dev))
  941. panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
  942. if (IS_PINEVIEW(dev))
  943. panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
  944. panel->backlight.max = ctl >> 17;
  945. if (panel->backlight.combination_mode)
  946. panel->backlight.max *= 0xff;
  947. if (!panel->backlight.max)
  948. return -ENODEV;
  949. panel->backlight.min = get_backlight_min_vbt(connector);
  950. val = i9xx_get_backlight(connector);
  951. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  952. panel->backlight.enabled = panel->backlight.level != 0;
  953. return 0;
  954. }
  955. static int i965_setup_backlight(struct intel_connector *connector)
  956. {
  957. struct drm_device *dev = connector->base.dev;
  958. struct drm_i915_private *dev_priv = dev->dev_private;
  959. struct intel_panel *panel = &connector->panel;
  960. u32 ctl, ctl2, val;
  961. ctl2 = I915_READ(BLC_PWM_CTL2);
  962. panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
  963. panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
  964. ctl = I915_READ(BLC_PWM_CTL);
  965. panel->backlight.max = ctl >> 16;
  966. if (panel->backlight.combination_mode)
  967. panel->backlight.max *= 0xff;
  968. if (!panel->backlight.max)
  969. return -ENODEV;
  970. panel->backlight.min = get_backlight_min_vbt(connector);
  971. val = i9xx_get_backlight(connector);
  972. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  973. panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
  974. panel->backlight.level != 0;
  975. return 0;
  976. }
  977. static int vlv_setup_backlight(struct intel_connector *connector)
  978. {
  979. struct drm_device *dev = connector->base.dev;
  980. struct drm_i915_private *dev_priv = dev->dev_private;
  981. struct intel_panel *panel = &connector->panel;
  982. enum pipe pipe;
  983. u32 ctl, ctl2, val;
  984. for_each_pipe(pipe) {
  985. u32 cur_val = I915_READ(VLV_BLC_PWM_CTL(pipe));
  986. /* Skip if the modulation freq is already set */
  987. if (cur_val & ~BACKLIGHT_DUTY_CYCLE_MASK)
  988. continue;
  989. cur_val &= BACKLIGHT_DUTY_CYCLE_MASK;
  990. I915_WRITE(VLV_BLC_PWM_CTL(pipe), (0xf42 << 16) |
  991. cur_val);
  992. }
  993. ctl2 = I915_READ(VLV_BLC_PWM_CTL2(PIPE_A));
  994. panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
  995. ctl = I915_READ(VLV_BLC_PWM_CTL(PIPE_A));
  996. panel->backlight.max = ctl >> 16;
  997. if (!panel->backlight.max)
  998. return -ENODEV;
  999. panel->backlight.min = get_backlight_min_vbt(connector);
  1000. val = _vlv_get_backlight(dev, PIPE_A);
  1001. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  1002. panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
  1003. panel->backlight.level != 0;
  1004. return 0;
  1005. }
  1006. int intel_panel_setup_backlight(struct drm_connector *connector)
  1007. {
  1008. struct drm_device *dev = connector->dev;
  1009. struct drm_i915_private *dev_priv = dev->dev_private;
  1010. struct intel_connector *intel_connector = to_intel_connector(connector);
  1011. struct intel_panel *panel = &intel_connector->panel;
  1012. unsigned long flags;
  1013. int ret;
  1014. if (!dev_priv->vbt.backlight.present) {
  1015. if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
  1016. DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
  1017. } else {
  1018. DRM_DEBUG_KMS("no backlight present per VBT\n");
  1019. return 0;
  1020. }
  1021. }
  1022. /* set level and max in panel struct */
  1023. spin_lock_irqsave(&dev_priv->backlight_lock, flags);
  1024. ret = dev_priv->display.setup_backlight(intel_connector);
  1025. spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
  1026. if (ret) {
  1027. DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
  1028. connector->name);
  1029. return ret;
  1030. }
  1031. intel_backlight_device_register(intel_connector);
  1032. panel->backlight.present = true;
  1033. DRM_DEBUG_KMS("backlight initialized, %s, brightness %u/%u, "
  1034. "sysfs interface %sregistered\n",
  1035. panel->backlight.enabled ? "enabled" : "disabled",
  1036. panel->backlight.level, panel->backlight.max,
  1037. panel->backlight.device ? "" : "not ");
  1038. return 0;
  1039. }
  1040. void intel_panel_destroy_backlight(struct drm_connector *connector)
  1041. {
  1042. struct intel_connector *intel_connector = to_intel_connector(connector);
  1043. struct intel_panel *panel = &intel_connector->panel;
  1044. panel->backlight.present = false;
  1045. intel_backlight_device_unregister(intel_connector);
  1046. }
  1047. /* Set up chip specific backlight functions */
  1048. void intel_panel_init_backlight_funcs(struct drm_device *dev)
  1049. {
  1050. struct drm_i915_private *dev_priv = dev->dev_private;
  1051. if (IS_BROADWELL(dev)) {
  1052. dev_priv->display.setup_backlight = bdw_setup_backlight;
  1053. dev_priv->display.enable_backlight = bdw_enable_backlight;
  1054. dev_priv->display.disable_backlight = pch_disable_backlight;
  1055. dev_priv->display.set_backlight = bdw_set_backlight;
  1056. dev_priv->display.get_backlight = bdw_get_backlight;
  1057. } else if (HAS_PCH_SPLIT(dev)) {
  1058. dev_priv->display.setup_backlight = pch_setup_backlight;
  1059. dev_priv->display.enable_backlight = pch_enable_backlight;
  1060. dev_priv->display.disable_backlight = pch_disable_backlight;
  1061. dev_priv->display.set_backlight = pch_set_backlight;
  1062. dev_priv->display.get_backlight = pch_get_backlight;
  1063. } else if (IS_VALLEYVIEW(dev)) {
  1064. dev_priv->display.setup_backlight = vlv_setup_backlight;
  1065. dev_priv->display.enable_backlight = vlv_enable_backlight;
  1066. dev_priv->display.disable_backlight = vlv_disable_backlight;
  1067. dev_priv->display.set_backlight = vlv_set_backlight;
  1068. dev_priv->display.get_backlight = vlv_get_backlight;
  1069. } else if (IS_GEN4(dev)) {
  1070. dev_priv->display.setup_backlight = i965_setup_backlight;
  1071. dev_priv->display.enable_backlight = i965_enable_backlight;
  1072. dev_priv->display.disable_backlight = i965_disable_backlight;
  1073. dev_priv->display.set_backlight = i9xx_set_backlight;
  1074. dev_priv->display.get_backlight = i9xx_get_backlight;
  1075. } else {
  1076. dev_priv->display.setup_backlight = i9xx_setup_backlight;
  1077. dev_priv->display.enable_backlight = i9xx_enable_backlight;
  1078. dev_priv->display.disable_backlight = i9xx_disable_backlight;
  1079. dev_priv->display.set_backlight = i9xx_set_backlight;
  1080. dev_priv->display.get_backlight = i9xx_get_backlight;
  1081. }
  1082. }
  1083. int intel_panel_init(struct intel_panel *panel,
  1084. struct drm_display_mode *fixed_mode,
  1085. struct drm_display_mode *downclock_mode)
  1086. {
  1087. panel->fixed_mode = fixed_mode;
  1088. panel->downclock_mode = downclock_mode;
  1089. return 0;
  1090. }
  1091. void intel_panel_fini(struct intel_panel *panel)
  1092. {
  1093. struct intel_connector *intel_connector =
  1094. container_of(panel, struct intel_connector, panel);
  1095. if (panel->fixed_mode)
  1096. drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
  1097. if (panel->downclock_mode)
  1098. drm_mode_destroy(intel_connector->base.dev,
  1099. panel->downclock_mode);
  1100. }