exynos_drm_crtc.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521
  1. /* exynos_drm_crtc.c
  2. *
  3. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4. * Authors:
  5. * Inki Dae <inki.dae@samsung.com>
  6. * Joonyoung Shim <jy0922.shim@samsung.com>
  7. * Seung-Woo Kim <sw0312.kim@samsung.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <drm/drmP.h>
  15. #include <drm/drm_crtc_helper.h>
  16. #include "exynos_drm_crtc.h"
  17. #include "exynos_drm_drv.h"
  18. #include "exynos_drm_encoder.h"
  19. #include "exynos_drm_plane.h"
  20. #define to_exynos_crtc(x) container_of(x, struct exynos_drm_crtc,\
  21. drm_crtc)
  22. enum exynos_crtc_mode {
  23. CRTC_MODE_NORMAL, /* normal mode */
  24. CRTC_MODE_BLANK, /* The private plane of crtc is blank */
  25. };
  26. /*
  27. * Exynos specific crtc structure.
  28. *
  29. * @drm_crtc: crtc object.
  30. * @drm_plane: pointer of private plane object for this crtc
  31. * @manager: the manager associated with this crtc
  32. * @pipe: a crtc index created at load() with a new crtc object creation
  33. * and the crtc object would be set to private->crtc array
  34. * to get a crtc object corresponding to this pipe from private->crtc
  35. * array when irq interrupt occurred. the reason of using this pipe is that
  36. * drm framework doesn't support multiple irq yet.
  37. * we can refer to the crtc to current hardware interrupt occurred through
  38. * this pipe value.
  39. * @dpms: store the crtc dpms value
  40. * @mode: store the crtc mode value
  41. */
  42. struct exynos_drm_crtc {
  43. struct drm_crtc drm_crtc;
  44. struct drm_plane *plane;
  45. struct exynos_drm_manager *manager;
  46. unsigned int pipe;
  47. unsigned int dpms;
  48. enum exynos_crtc_mode mode;
  49. wait_queue_head_t pending_flip_queue;
  50. atomic_t pending_flip;
  51. };
  52. static void exynos_drm_crtc_dpms(struct drm_crtc *crtc, int mode)
  53. {
  54. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  55. struct exynos_drm_manager *manager = exynos_crtc->manager;
  56. DRM_DEBUG_KMS("crtc[%d] mode[%d]\n", crtc->base.id, mode);
  57. if (exynos_crtc->dpms == mode) {
  58. DRM_DEBUG_KMS("desired dpms mode is same as previous one.\n");
  59. return;
  60. }
  61. if (mode > DRM_MODE_DPMS_ON) {
  62. /* wait for the completion of page flip. */
  63. if (!wait_event_timeout(exynos_crtc->pending_flip_queue,
  64. !atomic_read(&exynos_crtc->pending_flip),
  65. HZ/20))
  66. atomic_set(&exynos_crtc->pending_flip, 0);
  67. drm_vblank_off(crtc->dev, exynos_crtc->pipe);
  68. }
  69. if (manager->ops->dpms)
  70. manager->ops->dpms(manager, mode);
  71. exynos_crtc->dpms = mode;
  72. }
  73. static void exynos_drm_crtc_prepare(struct drm_crtc *crtc)
  74. {
  75. /* drm framework doesn't check NULL. */
  76. }
  77. static void exynos_drm_crtc_commit(struct drm_crtc *crtc)
  78. {
  79. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  80. struct exynos_drm_manager *manager = exynos_crtc->manager;
  81. exynos_drm_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
  82. exynos_plane_commit(exynos_crtc->plane);
  83. if (manager->ops->commit)
  84. manager->ops->commit(manager);
  85. exynos_plane_dpms(exynos_crtc->plane, DRM_MODE_DPMS_ON);
  86. }
  87. static bool
  88. exynos_drm_crtc_mode_fixup(struct drm_crtc *crtc,
  89. const struct drm_display_mode *mode,
  90. struct drm_display_mode *adjusted_mode)
  91. {
  92. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  93. struct exynos_drm_manager *manager = exynos_crtc->manager;
  94. if (manager->ops->mode_fixup)
  95. return manager->ops->mode_fixup(manager, mode, adjusted_mode);
  96. return true;
  97. }
  98. static int
  99. exynos_drm_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
  100. struct drm_display_mode *adjusted_mode, int x, int y,
  101. struct drm_framebuffer *old_fb)
  102. {
  103. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  104. struct exynos_drm_manager *manager = exynos_crtc->manager;
  105. struct drm_plane *plane = exynos_crtc->plane;
  106. unsigned int crtc_w;
  107. unsigned int crtc_h;
  108. int ret;
  109. /*
  110. * copy the mode data adjusted by mode_fixup() into crtc->mode
  111. * so that hardware can be seet to proper mode.
  112. */
  113. memcpy(&crtc->mode, adjusted_mode, sizeof(*adjusted_mode));
  114. crtc_w = crtc->primary->fb->width - x;
  115. crtc_h = crtc->primary->fb->height - y;
  116. if (manager->ops->mode_set)
  117. manager->ops->mode_set(manager, &crtc->mode);
  118. ret = exynos_plane_mode_set(plane, crtc, crtc->primary->fb, 0, 0, crtc_w, crtc_h,
  119. x, y, crtc_w, crtc_h);
  120. if (ret)
  121. return ret;
  122. plane->crtc = crtc;
  123. plane->fb = crtc->primary->fb;
  124. drm_framebuffer_reference(plane->fb);
  125. return 0;
  126. }
  127. static int exynos_drm_crtc_mode_set_commit(struct drm_crtc *crtc, int x, int y,
  128. struct drm_framebuffer *old_fb)
  129. {
  130. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  131. struct drm_plane *plane = exynos_crtc->plane;
  132. unsigned int crtc_w;
  133. unsigned int crtc_h;
  134. int ret;
  135. /* when framebuffer changing is requested, crtc's dpms should be on */
  136. if (exynos_crtc->dpms > DRM_MODE_DPMS_ON) {
  137. DRM_ERROR("failed framebuffer changing request.\n");
  138. return -EPERM;
  139. }
  140. crtc_w = crtc->primary->fb->width - x;
  141. crtc_h = crtc->primary->fb->height - y;
  142. ret = exynos_plane_mode_set(plane, crtc, crtc->primary->fb, 0, 0, crtc_w, crtc_h,
  143. x, y, crtc_w, crtc_h);
  144. if (ret)
  145. return ret;
  146. exynos_drm_crtc_commit(crtc);
  147. return 0;
  148. }
  149. static int exynos_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
  150. struct drm_framebuffer *old_fb)
  151. {
  152. return exynos_drm_crtc_mode_set_commit(crtc, x, y, old_fb);
  153. }
  154. static void exynos_drm_crtc_disable(struct drm_crtc *crtc)
  155. {
  156. struct drm_plane *plane;
  157. int ret;
  158. exynos_drm_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
  159. drm_for_each_legacy_plane(plane, &crtc->dev->mode_config.plane_list) {
  160. if (plane->crtc != crtc)
  161. continue;
  162. ret = plane->funcs->disable_plane(plane);
  163. if (ret)
  164. DRM_ERROR("Failed to disable plane %d\n", ret);
  165. }
  166. }
  167. static struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = {
  168. .dpms = exynos_drm_crtc_dpms,
  169. .prepare = exynos_drm_crtc_prepare,
  170. .commit = exynos_drm_crtc_commit,
  171. .mode_fixup = exynos_drm_crtc_mode_fixup,
  172. .mode_set = exynos_drm_crtc_mode_set,
  173. .mode_set_base = exynos_drm_crtc_mode_set_base,
  174. .disable = exynos_drm_crtc_disable,
  175. };
  176. static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
  177. struct drm_framebuffer *fb,
  178. struct drm_pending_vblank_event *event,
  179. uint32_t page_flip_flags)
  180. {
  181. struct drm_device *dev = crtc->dev;
  182. struct exynos_drm_private *dev_priv = dev->dev_private;
  183. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  184. struct drm_framebuffer *old_fb = crtc->primary->fb;
  185. int ret = -EINVAL;
  186. /* when the page flip is requested, crtc's dpms should be on */
  187. if (exynos_crtc->dpms > DRM_MODE_DPMS_ON) {
  188. DRM_ERROR("failed page flip request.\n");
  189. return -EINVAL;
  190. }
  191. mutex_lock(&dev->struct_mutex);
  192. if (event) {
  193. /*
  194. * the pipe from user always is 0 so we can set pipe number
  195. * of current owner to event.
  196. */
  197. event->pipe = exynos_crtc->pipe;
  198. ret = drm_vblank_get(dev, exynos_crtc->pipe);
  199. if (ret) {
  200. DRM_DEBUG("failed to acquire vblank counter\n");
  201. goto out;
  202. }
  203. spin_lock_irq(&dev->event_lock);
  204. list_add_tail(&event->base.link,
  205. &dev_priv->pageflip_event_list);
  206. atomic_set(&exynos_crtc->pending_flip, 1);
  207. spin_unlock_irq(&dev->event_lock);
  208. crtc->primary->fb = fb;
  209. ret = exynos_drm_crtc_mode_set_commit(crtc, crtc->x, crtc->y,
  210. NULL);
  211. if (ret) {
  212. crtc->primary->fb = old_fb;
  213. spin_lock_irq(&dev->event_lock);
  214. drm_vblank_put(dev, exynos_crtc->pipe);
  215. list_del(&event->base.link);
  216. atomic_set(&exynos_crtc->pending_flip, 0);
  217. spin_unlock_irq(&dev->event_lock);
  218. goto out;
  219. }
  220. }
  221. out:
  222. mutex_unlock(&dev->struct_mutex);
  223. return ret;
  224. }
  225. static void exynos_drm_crtc_destroy(struct drm_crtc *crtc)
  226. {
  227. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  228. struct exynos_drm_private *private = crtc->dev->dev_private;
  229. private->crtc[exynos_crtc->pipe] = NULL;
  230. drm_crtc_cleanup(crtc);
  231. kfree(exynos_crtc);
  232. }
  233. static int exynos_drm_crtc_set_property(struct drm_crtc *crtc,
  234. struct drm_property *property,
  235. uint64_t val)
  236. {
  237. struct drm_device *dev = crtc->dev;
  238. struct exynos_drm_private *dev_priv = dev->dev_private;
  239. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  240. if (property == dev_priv->crtc_mode_property) {
  241. enum exynos_crtc_mode mode = val;
  242. if (mode == exynos_crtc->mode)
  243. return 0;
  244. exynos_crtc->mode = mode;
  245. switch (mode) {
  246. case CRTC_MODE_NORMAL:
  247. exynos_drm_crtc_commit(crtc);
  248. break;
  249. case CRTC_MODE_BLANK:
  250. exynos_plane_dpms(exynos_crtc->plane,
  251. DRM_MODE_DPMS_OFF);
  252. break;
  253. default:
  254. break;
  255. }
  256. return 0;
  257. }
  258. return -EINVAL;
  259. }
  260. static struct drm_crtc_funcs exynos_crtc_funcs = {
  261. .set_config = drm_crtc_helper_set_config,
  262. .page_flip = exynos_drm_crtc_page_flip,
  263. .destroy = exynos_drm_crtc_destroy,
  264. .set_property = exynos_drm_crtc_set_property,
  265. };
  266. static const struct drm_prop_enum_list mode_names[] = {
  267. { CRTC_MODE_NORMAL, "normal" },
  268. { CRTC_MODE_BLANK, "blank" },
  269. };
  270. static void exynos_drm_crtc_attach_mode_property(struct drm_crtc *crtc)
  271. {
  272. struct drm_device *dev = crtc->dev;
  273. struct exynos_drm_private *dev_priv = dev->dev_private;
  274. struct drm_property *prop;
  275. prop = dev_priv->crtc_mode_property;
  276. if (!prop) {
  277. prop = drm_property_create_enum(dev, 0, "mode", mode_names,
  278. ARRAY_SIZE(mode_names));
  279. if (!prop)
  280. return;
  281. dev_priv->crtc_mode_property = prop;
  282. }
  283. drm_object_attach_property(&crtc->base, prop, 0);
  284. }
  285. int exynos_drm_crtc_create(struct exynos_drm_manager *manager)
  286. {
  287. struct exynos_drm_crtc *exynos_crtc;
  288. struct exynos_drm_private *private = manager->drm_dev->dev_private;
  289. struct drm_crtc *crtc;
  290. exynos_crtc = kzalloc(sizeof(*exynos_crtc), GFP_KERNEL);
  291. if (!exynos_crtc)
  292. return -ENOMEM;
  293. init_waitqueue_head(&exynos_crtc->pending_flip_queue);
  294. atomic_set(&exynos_crtc->pending_flip, 0);
  295. exynos_crtc->dpms = DRM_MODE_DPMS_OFF;
  296. exynos_crtc->manager = manager;
  297. exynos_crtc->pipe = manager->pipe;
  298. exynos_crtc->plane = exynos_plane_init(manager->drm_dev,
  299. 1 << manager->pipe, true);
  300. if (!exynos_crtc->plane) {
  301. kfree(exynos_crtc);
  302. return -ENOMEM;
  303. }
  304. manager->crtc = &exynos_crtc->drm_crtc;
  305. crtc = &exynos_crtc->drm_crtc;
  306. private->crtc[manager->pipe] = crtc;
  307. drm_crtc_init(manager->drm_dev, crtc, &exynos_crtc_funcs);
  308. drm_crtc_helper_add(crtc, &exynos_crtc_helper_funcs);
  309. exynos_drm_crtc_attach_mode_property(crtc);
  310. return 0;
  311. }
  312. int exynos_drm_crtc_enable_vblank(struct drm_device *dev, int pipe)
  313. {
  314. struct exynos_drm_private *private = dev->dev_private;
  315. struct exynos_drm_crtc *exynos_crtc =
  316. to_exynos_crtc(private->crtc[pipe]);
  317. struct exynos_drm_manager *manager = exynos_crtc->manager;
  318. if (exynos_crtc->dpms != DRM_MODE_DPMS_ON)
  319. return -EPERM;
  320. if (manager->ops->enable_vblank)
  321. manager->ops->enable_vblank(manager);
  322. return 0;
  323. }
  324. void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int pipe)
  325. {
  326. struct exynos_drm_private *private = dev->dev_private;
  327. struct exynos_drm_crtc *exynos_crtc =
  328. to_exynos_crtc(private->crtc[pipe]);
  329. struct exynos_drm_manager *manager = exynos_crtc->manager;
  330. if (exynos_crtc->dpms != DRM_MODE_DPMS_ON)
  331. return;
  332. if (manager->ops->disable_vblank)
  333. manager->ops->disable_vblank(manager);
  334. }
  335. void exynos_drm_crtc_finish_pageflip(struct drm_device *dev, int pipe)
  336. {
  337. struct exynos_drm_private *dev_priv = dev->dev_private;
  338. struct drm_pending_vblank_event *e, *t;
  339. struct drm_crtc *drm_crtc = dev_priv->crtc[pipe];
  340. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(drm_crtc);
  341. unsigned long flags;
  342. spin_lock_irqsave(&dev->event_lock, flags);
  343. list_for_each_entry_safe(e, t, &dev_priv->pageflip_event_list,
  344. base.link) {
  345. /* if event's pipe isn't same as crtc then ignore it. */
  346. if (pipe != e->pipe)
  347. continue;
  348. list_del(&e->base.link);
  349. drm_send_vblank_event(dev, -1, e);
  350. drm_vblank_put(dev, pipe);
  351. atomic_set(&exynos_crtc->pending_flip, 0);
  352. wake_up(&exynos_crtc->pending_flip_queue);
  353. }
  354. spin_unlock_irqrestore(&dev->event_lock, flags);
  355. }
  356. void exynos_drm_crtc_plane_mode_set(struct drm_crtc *crtc,
  357. struct exynos_drm_overlay *overlay)
  358. {
  359. struct exynos_drm_manager *manager = to_exynos_crtc(crtc)->manager;
  360. if (manager->ops->win_mode_set)
  361. manager->ops->win_mode_set(manager, overlay);
  362. }
  363. void exynos_drm_crtc_plane_commit(struct drm_crtc *crtc, int zpos)
  364. {
  365. struct exynos_drm_manager *manager = to_exynos_crtc(crtc)->manager;
  366. if (manager->ops->win_commit)
  367. manager->ops->win_commit(manager, zpos);
  368. }
  369. void exynos_drm_crtc_plane_enable(struct drm_crtc *crtc, int zpos)
  370. {
  371. struct exynos_drm_manager *manager = to_exynos_crtc(crtc)->manager;
  372. if (manager->ops->win_enable)
  373. manager->ops->win_enable(manager, zpos);
  374. }
  375. void exynos_drm_crtc_plane_disable(struct drm_crtc *crtc, int zpos)
  376. {
  377. struct exynos_drm_manager *manager = to_exynos_crtc(crtc)->manager;
  378. if (manager->ops->win_disable)
  379. manager->ops->win_disable(manager, zpos);
  380. }
  381. void exynos_drm_crtc_complete_scanout(struct drm_framebuffer *fb)
  382. {
  383. struct exynos_drm_manager *manager;
  384. struct drm_device *dev = fb->dev;
  385. struct drm_crtc *crtc;
  386. /*
  387. * make sure that overlay data are updated to real hardware
  388. * for all encoders.
  389. */
  390. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  391. manager = to_exynos_crtc(crtc)->manager;
  392. /*
  393. * wait for vblank interrupt
  394. * - this makes sure that overlay data are updated to
  395. * real hardware.
  396. */
  397. if (manager->ops->wait_for_vblank)
  398. manager->ops->wait_for_vblank(manager);
  399. }
  400. }
  401. int exynos_drm_crtc_get_pipe_from_type(struct drm_device *drm_dev,
  402. unsigned int out_type)
  403. {
  404. struct drm_crtc *crtc;
  405. list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
  406. struct exynos_drm_crtc *exynos_crtc;
  407. exynos_crtc = to_exynos_crtc(crtc);
  408. if (exynos_crtc->manager->type == out_type)
  409. return exynos_crtc->manager->pipe;
  410. }
  411. return -EPERM;
  412. }
  413. void exynos_drm_crtc_te_handler(struct drm_crtc *crtc)
  414. {
  415. struct exynos_drm_manager *manager = to_exynos_crtc(crtc)->manager;
  416. if (manager->ops->te_handler)
  417. manager->ops->te_handler(manager);
  418. }