clk-s2mps11.c 7.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312
  1. /*
  2. * clk-s2mps11.c - Clock driver for S2MPS11.
  3. *
  4. * Copyright (C) 2013,2014 Samsung Electornics
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. */
  17. #include <linux/module.h>
  18. #include <linux/err.h>
  19. #include <linux/of.h>
  20. #include <linux/clkdev.h>
  21. #include <linux/regmap.h>
  22. #include <linux/clk-provider.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/mfd/samsung/s2mps11.h>
  25. #include <linux/mfd/samsung/s2mps14.h>
  26. #include <linux/mfd/samsung/s5m8767.h>
  27. #include <linux/mfd/samsung/core.h>
  28. #define s2mps11_name(a) (a->hw.init->name)
  29. static struct clk **clk_table;
  30. static struct clk_onecell_data clk_data;
  31. enum {
  32. S2MPS11_CLK_AP = 0,
  33. S2MPS11_CLK_CP,
  34. S2MPS11_CLK_BT,
  35. S2MPS11_CLKS_NUM,
  36. };
  37. struct s2mps11_clk {
  38. struct sec_pmic_dev *iodev;
  39. struct device_node *clk_np;
  40. struct clk_hw hw;
  41. struct clk *clk;
  42. struct clk_lookup *lookup;
  43. u32 mask;
  44. unsigned int reg;
  45. };
  46. static struct s2mps11_clk *to_s2mps11_clk(struct clk_hw *hw)
  47. {
  48. return container_of(hw, struct s2mps11_clk, hw);
  49. }
  50. static int s2mps11_clk_prepare(struct clk_hw *hw)
  51. {
  52. struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
  53. int ret;
  54. ret = regmap_update_bits(s2mps11->iodev->regmap_pmic,
  55. s2mps11->reg,
  56. s2mps11->mask, s2mps11->mask);
  57. return ret;
  58. }
  59. static void s2mps11_clk_unprepare(struct clk_hw *hw)
  60. {
  61. struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
  62. int ret;
  63. ret = regmap_update_bits(s2mps11->iodev->regmap_pmic, s2mps11->reg,
  64. s2mps11->mask, ~s2mps11->mask);
  65. }
  66. static int s2mps11_clk_is_prepared(struct clk_hw *hw)
  67. {
  68. int ret;
  69. u32 val;
  70. struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
  71. ret = regmap_read(s2mps11->iodev->regmap_pmic,
  72. s2mps11->reg, &val);
  73. if (ret < 0)
  74. return -EINVAL;
  75. return val & s2mps11->mask;
  76. }
  77. static unsigned long s2mps11_clk_recalc_rate(struct clk_hw *hw,
  78. unsigned long parent_rate)
  79. {
  80. return 32768;
  81. }
  82. static struct clk_ops s2mps11_clk_ops = {
  83. .prepare = s2mps11_clk_prepare,
  84. .unprepare = s2mps11_clk_unprepare,
  85. .is_prepared = s2mps11_clk_is_prepared,
  86. .recalc_rate = s2mps11_clk_recalc_rate,
  87. };
  88. static struct clk_init_data s2mps11_clks_init[S2MPS11_CLKS_NUM] = {
  89. [S2MPS11_CLK_AP] = {
  90. .name = "s2mps11_ap",
  91. .ops = &s2mps11_clk_ops,
  92. .flags = CLK_IS_ROOT,
  93. },
  94. [S2MPS11_CLK_CP] = {
  95. .name = "s2mps11_cp",
  96. .ops = &s2mps11_clk_ops,
  97. .flags = CLK_IS_ROOT,
  98. },
  99. [S2MPS11_CLK_BT] = {
  100. .name = "s2mps11_bt",
  101. .ops = &s2mps11_clk_ops,
  102. .flags = CLK_IS_ROOT,
  103. },
  104. };
  105. static struct clk_init_data s2mps14_clks_init[S2MPS11_CLKS_NUM] = {
  106. [S2MPS11_CLK_AP] = {
  107. .name = "s2mps14_ap",
  108. .ops = &s2mps11_clk_ops,
  109. .flags = CLK_IS_ROOT,
  110. },
  111. [S2MPS11_CLK_BT] = {
  112. .name = "s2mps14_bt",
  113. .ops = &s2mps11_clk_ops,
  114. .flags = CLK_IS_ROOT,
  115. },
  116. };
  117. static struct device_node *s2mps11_clk_parse_dt(struct platform_device *pdev,
  118. struct clk_init_data *clks_init)
  119. {
  120. struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
  121. struct device_node *clk_np;
  122. int i;
  123. if (!iodev->dev->of_node)
  124. return ERR_PTR(-EINVAL);
  125. clk_np = of_get_child_by_name(iodev->dev->of_node, "clocks");
  126. if (!clk_np) {
  127. dev_err(&pdev->dev, "could not find clock sub-node\n");
  128. return ERR_PTR(-EINVAL);
  129. }
  130. for (i = 0; i < S2MPS11_CLKS_NUM; i++) {
  131. if (!clks_init[i].name)
  132. continue; /* Skip clocks not present in some devices */
  133. of_property_read_string_index(clk_np, "clock-output-names", i,
  134. &clks_init[i].name);
  135. }
  136. return clk_np;
  137. }
  138. static int s2mps11_clk_probe(struct platform_device *pdev)
  139. {
  140. struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
  141. struct s2mps11_clk *s2mps11_clks, *s2mps11_clk;
  142. unsigned int s2mps11_reg;
  143. struct clk_init_data *clks_init;
  144. int i, ret = 0;
  145. s2mps11_clks = devm_kzalloc(&pdev->dev, sizeof(*s2mps11_clk) *
  146. S2MPS11_CLKS_NUM, GFP_KERNEL);
  147. if (!s2mps11_clks)
  148. return -ENOMEM;
  149. s2mps11_clk = s2mps11_clks;
  150. clk_table = devm_kzalloc(&pdev->dev, sizeof(struct clk *) *
  151. S2MPS11_CLKS_NUM, GFP_KERNEL);
  152. if (!clk_table)
  153. return -ENOMEM;
  154. switch(platform_get_device_id(pdev)->driver_data) {
  155. case S2MPS11X:
  156. s2mps11_reg = S2MPS11_REG_RTC_CTRL;
  157. clks_init = s2mps11_clks_init;
  158. break;
  159. case S2MPS14X:
  160. s2mps11_reg = S2MPS14_REG_RTCCTRL;
  161. clks_init = s2mps14_clks_init;
  162. break;
  163. case S5M8767X:
  164. s2mps11_reg = S5M8767_REG_CTRL1;
  165. clks_init = s2mps11_clks_init;
  166. break;
  167. default:
  168. dev_err(&pdev->dev, "Invalid device type\n");
  169. return -EINVAL;
  170. };
  171. /* Store clocks of_node in first element of s2mps11_clks array */
  172. s2mps11_clks->clk_np = s2mps11_clk_parse_dt(pdev, clks_init);
  173. if (IS_ERR(s2mps11_clks->clk_np))
  174. return PTR_ERR(s2mps11_clks->clk_np);
  175. for (i = 0; i < S2MPS11_CLKS_NUM; i++, s2mps11_clk++) {
  176. if (!clks_init[i].name)
  177. continue; /* Skip clocks not present in some devices */
  178. s2mps11_clk->iodev = iodev;
  179. s2mps11_clk->hw.init = &clks_init[i];
  180. s2mps11_clk->mask = 1 << i;
  181. s2mps11_clk->reg = s2mps11_reg;
  182. s2mps11_clk->clk = devm_clk_register(&pdev->dev,
  183. &s2mps11_clk->hw);
  184. if (IS_ERR(s2mps11_clk->clk)) {
  185. dev_err(&pdev->dev, "Fail to register : %s\n",
  186. s2mps11_name(s2mps11_clk));
  187. ret = PTR_ERR(s2mps11_clk->clk);
  188. goto err_reg;
  189. }
  190. s2mps11_clk->lookup = clkdev_alloc(s2mps11_clk->clk,
  191. s2mps11_name(s2mps11_clk), NULL);
  192. if (!s2mps11_clk->lookup) {
  193. ret = -ENOMEM;
  194. goto err_lup;
  195. }
  196. clkdev_add(s2mps11_clk->lookup);
  197. }
  198. for (i = 0; i < S2MPS11_CLKS_NUM; i++) {
  199. /* Skip clocks not present on S2MPS14 */
  200. if (!clks_init[i].name)
  201. continue;
  202. clk_table[i] = s2mps11_clks[i].clk;
  203. }
  204. clk_data.clks = clk_table;
  205. clk_data.clk_num = S2MPS11_CLKS_NUM;
  206. of_clk_add_provider(s2mps11_clks->clk_np, of_clk_src_onecell_get,
  207. &clk_data);
  208. platform_set_drvdata(pdev, s2mps11_clks);
  209. return ret;
  210. err_lup:
  211. devm_clk_unregister(&pdev->dev, s2mps11_clk->clk);
  212. err_reg:
  213. while (s2mps11_clk > s2mps11_clks) {
  214. if (s2mps11_clk->lookup) {
  215. clkdev_drop(s2mps11_clk->lookup);
  216. devm_clk_unregister(&pdev->dev, s2mps11_clk->clk);
  217. }
  218. s2mps11_clk--;
  219. }
  220. return ret;
  221. }
  222. static int s2mps11_clk_remove(struct platform_device *pdev)
  223. {
  224. struct s2mps11_clk *s2mps11_clks = platform_get_drvdata(pdev);
  225. int i;
  226. of_clk_del_provider(s2mps11_clks[0].clk_np);
  227. /* Drop the reference obtained in s2mps11_clk_parse_dt */
  228. of_node_put(s2mps11_clks[0].clk_np);
  229. for (i = 0; i < S2MPS11_CLKS_NUM; i++) {
  230. /* Skip clocks not present on S2MPS14 */
  231. if (!s2mps11_clks[i].lookup)
  232. continue;
  233. clkdev_drop(s2mps11_clks[i].lookup);
  234. }
  235. return 0;
  236. }
  237. static const struct platform_device_id s2mps11_clk_id[] = {
  238. { "s2mps11-clk", S2MPS11X},
  239. { "s2mps14-clk", S2MPS14X},
  240. { "s5m8767-clk", S5M8767X},
  241. { },
  242. };
  243. MODULE_DEVICE_TABLE(platform, s2mps11_clk_id);
  244. static struct platform_driver s2mps11_clk_driver = {
  245. .driver = {
  246. .name = "s2mps11-clk",
  247. .owner = THIS_MODULE,
  248. },
  249. .probe = s2mps11_clk_probe,
  250. .remove = s2mps11_clk_remove,
  251. .id_table = s2mps11_clk_id,
  252. };
  253. static int __init s2mps11_clk_init(void)
  254. {
  255. return platform_driver_register(&s2mps11_clk_driver);
  256. }
  257. subsys_initcall(s2mps11_clk_init);
  258. static void __init s2mps11_clk_cleanup(void)
  259. {
  260. platform_driver_unregister(&s2mps11_clk_driver);
  261. }
  262. module_exit(s2mps11_clk_cleanup);
  263. MODULE_DESCRIPTION("S2MPS11 Clock Driver");
  264. MODULE_AUTHOR("Yadwinder Singh Brar <yadi.brar@samsung.com>");
  265. MODULE_LICENSE("GPL");