eeh_pseries.c 20 KB

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  1. /*
  2. * The file intends to implement the platform dependent EEH operations on pseries.
  3. * Actually, the pseries platform is built based on RTAS heavily. That means the
  4. * pseries platform dependent EEH operations will be built on RTAS calls. The functions
  5. * are devired from arch/powerpc/platforms/pseries/eeh.c and necessary cleanup has
  6. * been done.
  7. *
  8. * Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2011.
  9. * Copyright IBM Corporation 2001, 2005, 2006
  10. * Copyright Dave Engebretsen & Todd Inglett 2001
  11. * Copyright Linas Vepstas 2005, 2006
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  26. */
  27. #include <linux/atomic.h>
  28. #include <linux/delay.h>
  29. #include <linux/export.h>
  30. #include <linux/init.h>
  31. #include <linux/list.h>
  32. #include <linux/of.h>
  33. #include <linux/pci.h>
  34. #include <linux/proc_fs.h>
  35. #include <linux/rbtree.h>
  36. #include <linux/sched.h>
  37. #include <linux/seq_file.h>
  38. #include <linux/spinlock.h>
  39. #include <asm/eeh.h>
  40. #include <asm/eeh_event.h>
  41. #include <asm/io.h>
  42. #include <asm/machdep.h>
  43. #include <asm/ppc-pci.h>
  44. #include <asm/rtas.h>
  45. /* RTAS tokens */
  46. static int ibm_set_eeh_option;
  47. static int ibm_set_slot_reset;
  48. static int ibm_read_slot_reset_state;
  49. static int ibm_read_slot_reset_state2;
  50. static int ibm_slot_error_detail;
  51. static int ibm_get_config_addr_info;
  52. static int ibm_get_config_addr_info2;
  53. static int ibm_configure_bridge;
  54. static int ibm_configure_pe;
  55. /*
  56. * Buffer for reporting slot-error-detail rtas calls. Its here
  57. * in BSS, and not dynamically alloced, so that it ends up in
  58. * RMO where RTAS can access it.
  59. */
  60. static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
  61. static DEFINE_SPINLOCK(slot_errbuf_lock);
  62. static int eeh_error_buf_size;
  63. /**
  64. * pseries_eeh_init - EEH platform dependent initialization
  65. *
  66. * EEH platform dependent initialization on pseries.
  67. */
  68. static int pseries_eeh_init(void)
  69. {
  70. /* figure out EEH RTAS function call tokens */
  71. ibm_set_eeh_option = rtas_token("ibm,set-eeh-option");
  72. ibm_set_slot_reset = rtas_token("ibm,set-slot-reset");
  73. ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2");
  74. ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state");
  75. ibm_slot_error_detail = rtas_token("ibm,slot-error-detail");
  76. ibm_get_config_addr_info2 = rtas_token("ibm,get-config-addr-info2");
  77. ibm_get_config_addr_info = rtas_token("ibm,get-config-addr-info");
  78. ibm_configure_pe = rtas_token("ibm,configure-pe");
  79. ibm_configure_bridge = rtas_token("ibm,configure-bridge");
  80. /*
  81. * Necessary sanity check. We needn't check "get-config-addr-info"
  82. * and its variant since the old firmware probably support address
  83. * of domain/bus/slot/function for EEH RTAS operations.
  84. */
  85. if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE) {
  86. pr_warn("%s: RTAS service <ibm,set-eeh-option> invalid\n",
  87. __func__);
  88. return -EINVAL;
  89. } else if (ibm_set_slot_reset == RTAS_UNKNOWN_SERVICE) {
  90. pr_warn("%s: RTAS service <ibm,set-slot-reset> invalid\n",
  91. __func__);
  92. return -EINVAL;
  93. } else if (ibm_read_slot_reset_state2 == RTAS_UNKNOWN_SERVICE &&
  94. ibm_read_slot_reset_state == RTAS_UNKNOWN_SERVICE) {
  95. pr_warn("%s: RTAS service <ibm,read-slot-reset-state2> and "
  96. "<ibm,read-slot-reset-state> invalid\n",
  97. __func__);
  98. return -EINVAL;
  99. } else if (ibm_slot_error_detail == RTAS_UNKNOWN_SERVICE) {
  100. pr_warn("%s: RTAS service <ibm,slot-error-detail> invalid\n",
  101. __func__);
  102. return -EINVAL;
  103. } else if (ibm_configure_pe == RTAS_UNKNOWN_SERVICE &&
  104. ibm_configure_bridge == RTAS_UNKNOWN_SERVICE) {
  105. pr_warn("%s: RTAS service <ibm,configure-pe> and "
  106. "<ibm,configure-bridge> invalid\n",
  107. __func__);
  108. return -EINVAL;
  109. }
  110. /* Initialize error log lock and size */
  111. spin_lock_init(&slot_errbuf_lock);
  112. eeh_error_buf_size = rtas_token("rtas-error-log-max");
  113. if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) {
  114. pr_warn("%s: unknown EEH error log size\n",
  115. __func__);
  116. eeh_error_buf_size = 1024;
  117. } else if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) {
  118. pr_warn("%s: EEH error log size %d exceeds the maximal %d\n",
  119. __func__, eeh_error_buf_size, RTAS_ERROR_LOG_MAX);
  120. eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
  121. }
  122. /* Set EEH probe mode */
  123. eeh_add_flag(EEH_PROBE_MODE_DEVTREE | EEH_ENABLE_IO_FOR_LOG);
  124. return 0;
  125. }
  126. static int pseries_eeh_cap_start(struct device_node *dn)
  127. {
  128. struct pci_dn *pdn = PCI_DN(dn);
  129. u32 status;
  130. if (!pdn)
  131. return 0;
  132. rtas_read_config(pdn, PCI_STATUS, 2, &status);
  133. if (!(status & PCI_STATUS_CAP_LIST))
  134. return 0;
  135. return PCI_CAPABILITY_LIST;
  136. }
  137. static int pseries_eeh_find_cap(struct device_node *dn, int cap)
  138. {
  139. struct pci_dn *pdn = PCI_DN(dn);
  140. int pos = pseries_eeh_cap_start(dn);
  141. int cnt = 48; /* Maximal number of capabilities */
  142. u32 id;
  143. if (!pos)
  144. return 0;
  145. while (cnt--) {
  146. rtas_read_config(pdn, pos, 1, &pos);
  147. if (pos < 0x40)
  148. break;
  149. pos &= ~3;
  150. rtas_read_config(pdn, pos + PCI_CAP_LIST_ID, 1, &id);
  151. if (id == 0xff)
  152. break;
  153. if (id == cap)
  154. return pos;
  155. pos += PCI_CAP_LIST_NEXT;
  156. }
  157. return 0;
  158. }
  159. static int pseries_eeh_find_ecap(struct device_node *dn, int cap)
  160. {
  161. struct pci_dn *pdn = PCI_DN(dn);
  162. struct eeh_dev *edev = of_node_to_eeh_dev(dn);
  163. u32 header;
  164. int pos = 256;
  165. int ttl = (4096 - 256) / 8;
  166. if (!edev || !edev->pcie_cap)
  167. return 0;
  168. if (rtas_read_config(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
  169. return 0;
  170. else if (!header)
  171. return 0;
  172. while (ttl-- > 0) {
  173. if (PCI_EXT_CAP_ID(header) == cap && pos)
  174. return pos;
  175. pos = PCI_EXT_CAP_NEXT(header);
  176. if (pos < 256)
  177. break;
  178. if (rtas_read_config(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
  179. break;
  180. }
  181. return 0;
  182. }
  183. /**
  184. * pseries_eeh_of_probe - EEH probe on the given device
  185. * @dn: OF node
  186. * @flag: Unused
  187. *
  188. * When EEH module is installed during system boot, all PCI devices
  189. * are checked one by one to see if it supports EEH. The function
  190. * is introduced for the purpose.
  191. */
  192. static void *pseries_eeh_of_probe(struct device_node *dn, void *flag)
  193. {
  194. struct eeh_dev *edev;
  195. struct eeh_pe pe;
  196. struct pci_dn *pdn = PCI_DN(dn);
  197. const __be32 *classp, *vendorp, *devicep;
  198. u32 class_code;
  199. const __be32 *regs;
  200. u32 pcie_flags;
  201. int enable = 0;
  202. int ret;
  203. /* Retrieve OF node and eeh device */
  204. edev = of_node_to_eeh_dev(dn);
  205. if (edev->pe || !of_device_is_available(dn))
  206. return NULL;
  207. /* Retrieve class/vendor/device IDs */
  208. classp = of_get_property(dn, "class-code", NULL);
  209. vendorp = of_get_property(dn, "vendor-id", NULL);
  210. devicep = of_get_property(dn, "device-id", NULL);
  211. /* Skip for bad OF node or PCI-ISA bridge */
  212. if (!classp || !vendorp || !devicep)
  213. return NULL;
  214. if (dn->type && !strcmp(dn->type, "isa"))
  215. return NULL;
  216. class_code = of_read_number(classp, 1);
  217. /*
  218. * Update class code and mode of eeh device. We need
  219. * correctly reflects that current device is root port
  220. * or PCIe switch downstream port.
  221. */
  222. edev->class_code = class_code;
  223. edev->pcix_cap = pseries_eeh_find_cap(dn, PCI_CAP_ID_PCIX);
  224. edev->pcie_cap = pseries_eeh_find_cap(dn, PCI_CAP_ID_EXP);
  225. edev->aer_cap = pseries_eeh_find_ecap(dn, PCI_EXT_CAP_ID_ERR);
  226. edev->mode &= 0xFFFFFF00;
  227. if ((edev->class_code >> 8) == PCI_CLASS_BRIDGE_PCI) {
  228. edev->mode |= EEH_DEV_BRIDGE;
  229. if (edev->pcie_cap) {
  230. rtas_read_config(pdn, edev->pcie_cap + PCI_EXP_FLAGS,
  231. 2, &pcie_flags);
  232. pcie_flags = (pcie_flags & PCI_EXP_FLAGS_TYPE) >> 4;
  233. if (pcie_flags == PCI_EXP_TYPE_ROOT_PORT)
  234. edev->mode |= EEH_DEV_ROOT_PORT;
  235. else if (pcie_flags == PCI_EXP_TYPE_DOWNSTREAM)
  236. edev->mode |= EEH_DEV_DS_PORT;
  237. }
  238. }
  239. /* Retrieve the device address */
  240. regs = of_get_property(dn, "reg", NULL);
  241. if (!regs) {
  242. pr_warn("%s: OF node property %s::reg not found\n",
  243. __func__, dn->full_name);
  244. return NULL;
  245. }
  246. /* Initialize the fake PE */
  247. memset(&pe, 0, sizeof(struct eeh_pe));
  248. pe.phb = edev->phb;
  249. pe.config_addr = of_read_number(regs, 1);
  250. /* Enable EEH on the device */
  251. ret = eeh_ops->set_option(&pe, EEH_OPT_ENABLE);
  252. if (!ret) {
  253. edev->config_addr = of_read_number(regs, 1);
  254. /* Retrieve PE address */
  255. edev->pe_config_addr = eeh_ops->get_pe_addr(&pe);
  256. pe.addr = edev->pe_config_addr;
  257. /* Some older systems (Power4) allow the ibm,set-eeh-option
  258. * call to succeed even on nodes where EEH is not supported.
  259. * Verify support explicitly.
  260. */
  261. ret = eeh_ops->get_state(&pe, NULL);
  262. if (ret > 0 && ret != EEH_STATE_NOT_SUPPORT)
  263. enable = 1;
  264. if (enable) {
  265. eeh_add_flag(EEH_ENABLED);
  266. eeh_add_to_parent_pe(edev);
  267. pr_debug("%s: EEH enabled on %s PHB#%d-PE#%x, config addr#%x\n",
  268. __func__, dn->full_name, pe.phb->global_number,
  269. pe.addr, pe.config_addr);
  270. } else if (dn->parent && of_node_to_eeh_dev(dn->parent) &&
  271. (of_node_to_eeh_dev(dn->parent))->pe) {
  272. /* This device doesn't support EEH, but it may have an
  273. * EEH parent, in which case we mark it as supported.
  274. */
  275. edev->config_addr = of_node_to_eeh_dev(dn->parent)->config_addr;
  276. edev->pe_config_addr = of_node_to_eeh_dev(dn->parent)->pe_config_addr;
  277. eeh_add_to_parent_pe(edev);
  278. }
  279. }
  280. /* Save memory bars */
  281. eeh_save_bars(edev);
  282. return NULL;
  283. }
  284. /**
  285. * pseries_eeh_set_option - Initialize EEH or MMIO/DMA reenable
  286. * @pe: EEH PE
  287. * @option: operation to be issued
  288. *
  289. * The function is used to control the EEH functionality globally.
  290. * Currently, following options are support according to PAPR:
  291. * Enable EEH, Disable EEH, Enable MMIO and Enable DMA
  292. */
  293. static int pseries_eeh_set_option(struct eeh_pe *pe, int option)
  294. {
  295. int ret = 0;
  296. int config_addr;
  297. /*
  298. * When we're enabling or disabling EEH functioality on
  299. * the particular PE, the PE config address is possibly
  300. * unavailable. Therefore, we have to figure it out from
  301. * the FDT node.
  302. */
  303. switch (option) {
  304. case EEH_OPT_DISABLE:
  305. case EEH_OPT_ENABLE:
  306. case EEH_OPT_THAW_MMIO:
  307. case EEH_OPT_THAW_DMA:
  308. config_addr = pe->config_addr;
  309. if (pe->addr)
  310. config_addr = pe->addr;
  311. break;
  312. default:
  313. pr_err("%s: Invalid option %d\n",
  314. __func__, option);
  315. return -EINVAL;
  316. }
  317. ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
  318. config_addr, BUID_HI(pe->phb->buid),
  319. BUID_LO(pe->phb->buid), option);
  320. return ret;
  321. }
  322. /**
  323. * pseries_eeh_get_pe_addr - Retrieve PE address
  324. * @pe: EEH PE
  325. *
  326. * Retrieve the assocated PE address. Actually, there're 2 RTAS
  327. * function calls dedicated for the purpose. We need implement
  328. * it through the new function and then the old one. Besides,
  329. * you should make sure the config address is figured out from
  330. * FDT node before calling the function.
  331. *
  332. * It's notable that zero'ed return value means invalid PE config
  333. * address.
  334. */
  335. static int pseries_eeh_get_pe_addr(struct eeh_pe *pe)
  336. {
  337. int ret = 0;
  338. int rets[3];
  339. if (ibm_get_config_addr_info2 != RTAS_UNKNOWN_SERVICE) {
  340. /*
  341. * First of all, we need to make sure there has one PE
  342. * associated with the device. Otherwise, PE address is
  343. * meaningless.
  344. */
  345. ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
  346. pe->config_addr, BUID_HI(pe->phb->buid),
  347. BUID_LO(pe->phb->buid), 1);
  348. if (ret || (rets[0] == 0))
  349. return 0;
  350. /* Retrieve the associated PE config address */
  351. ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
  352. pe->config_addr, BUID_HI(pe->phb->buid),
  353. BUID_LO(pe->phb->buid), 0);
  354. if (ret) {
  355. pr_warn("%s: Failed to get address for PHB#%d-PE#%x\n",
  356. __func__, pe->phb->global_number, pe->config_addr);
  357. return 0;
  358. }
  359. return rets[0];
  360. }
  361. if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) {
  362. ret = rtas_call(ibm_get_config_addr_info, 4, 2, rets,
  363. pe->config_addr, BUID_HI(pe->phb->buid),
  364. BUID_LO(pe->phb->buid), 0);
  365. if (ret) {
  366. pr_warn("%s: Failed to get address for PHB#%d-PE#%x\n",
  367. __func__, pe->phb->global_number, pe->config_addr);
  368. return 0;
  369. }
  370. return rets[0];
  371. }
  372. return ret;
  373. }
  374. /**
  375. * pseries_eeh_get_state - Retrieve PE state
  376. * @pe: EEH PE
  377. * @state: return value
  378. *
  379. * Retrieve the state of the specified PE. On RTAS compliant
  380. * pseries platform, there already has one dedicated RTAS function
  381. * for the purpose. It's notable that the associated PE config address
  382. * might be ready when calling the function. Therefore, endeavour to
  383. * use the PE config address if possible. Further more, there're 2
  384. * RTAS calls for the purpose, we need to try the new one and back
  385. * to the old one if the new one couldn't work properly.
  386. */
  387. static int pseries_eeh_get_state(struct eeh_pe *pe, int *state)
  388. {
  389. int config_addr;
  390. int ret;
  391. int rets[4];
  392. int result;
  393. /* Figure out PE config address if possible */
  394. config_addr = pe->config_addr;
  395. if (pe->addr)
  396. config_addr = pe->addr;
  397. if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) {
  398. ret = rtas_call(ibm_read_slot_reset_state2, 3, 4, rets,
  399. config_addr, BUID_HI(pe->phb->buid),
  400. BUID_LO(pe->phb->buid));
  401. } else if (ibm_read_slot_reset_state != RTAS_UNKNOWN_SERVICE) {
  402. /* Fake PE unavailable info */
  403. rets[2] = 0;
  404. ret = rtas_call(ibm_read_slot_reset_state, 3, 3, rets,
  405. config_addr, BUID_HI(pe->phb->buid),
  406. BUID_LO(pe->phb->buid));
  407. } else {
  408. return EEH_STATE_NOT_SUPPORT;
  409. }
  410. if (ret)
  411. return ret;
  412. /* Parse the result out */
  413. result = 0;
  414. if (rets[1]) {
  415. switch(rets[0]) {
  416. case 0:
  417. result &= ~EEH_STATE_RESET_ACTIVE;
  418. result |= EEH_STATE_MMIO_ACTIVE;
  419. result |= EEH_STATE_DMA_ACTIVE;
  420. break;
  421. case 1:
  422. result |= EEH_STATE_RESET_ACTIVE;
  423. result |= EEH_STATE_MMIO_ACTIVE;
  424. result |= EEH_STATE_DMA_ACTIVE;
  425. break;
  426. case 2:
  427. result &= ~EEH_STATE_RESET_ACTIVE;
  428. result &= ~EEH_STATE_MMIO_ACTIVE;
  429. result &= ~EEH_STATE_DMA_ACTIVE;
  430. break;
  431. case 4:
  432. result &= ~EEH_STATE_RESET_ACTIVE;
  433. result &= ~EEH_STATE_MMIO_ACTIVE;
  434. result &= ~EEH_STATE_DMA_ACTIVE;
  435. result |= EEH_STATE_MMIO_ENABLED;
  436. break;
  437. case 5:
  438. if (rets[2]) {
  439. if (state) *state = rets[2];
  440. result = EEH_STATE_UNAVAILABLE;
  441. } else {
  442. result = EEH_STATE_NOT_SUPPORT;
  443. }
  444. break;
  445. default:
  446. result = EEH_STATE_NOT_SUPPORT;
  447. }
  448. } else {
  449. result = EEH_STATE_NOT_SUPPORT;
  450. }
  451. return result;
  452. }
  453. /**
  454. * pseries_eeh_reset - Reset the specified PE
  455. * @pe: EEH PE
  456. * @option: reset option
  457. *
  458. * Reset the specified PE
  459. */
  460. static int pseries_eeh_reset(struct eeh_pe *pe, int option)
  461. {
  462. int config_addr;
  463. int ret;
  464. /* Figure out PE address */
  465. config_addr = pe->config_addr;
  466. if (pe->addr)
  467. config_addr = pe->addr;
  468. /* Reset PE through RTAS call */
  469. ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
  470. config_addr, BUID_HI(pe->phb->buid),
  471. BUID_LO(pe->phb->buid), option);
  472. /* If fundamental-reset not supported, try hot-reset */
  473. if (option == EEH_RESET_FUNDAMENTAL &&
  474. ret == -8) {
  475. option = EEH_RESET_HOT;
  476. ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
  477. config_addr, BUID_HI(pe->phb->buid),
  478. BUID_LO(pe->phb->buid), option);
  479. }
  480. /* We need reset hold or settlement delay */
  481. if (option == EEH_RESET_FUNDAMENTAL ||
  482. option == EEH_RESET_HOT)
  483. msleep(EEH_PE_RST_HOLD_TIME);
  484. else
  485. msleep(EEH_PE_RST_SETTLE_TIME);
  486. return ret;
  487. }
  488. /**
  489. * pseries_eeh_wait_state - Wait for PE state
  490. * @pe: EEH PE
  491. * @max_wait: maximal period in microsecond
  492. *
  493. * Wait for the state of associated PE. It might take some time
  494. * to retrieve the PE's state.
  495. */
  496. static int pseries_eeh_wait_state(struct eeh_pe *pe, int max_wait)
  497. {
  498. int ret;
  499. int mwait;
  500. /*
  501. * According to PAPR, the state of PE might be temporarily
  502. * unavailable. Under the circumstance, we have to wait
  503. * for indicated time determined by firmware. The maximal
  504. * wait time is 5 minutes, which is acquired from the original
  505. * EEH implementation. Also, the original implementation
  506. * also defined the minimal wait time as 1 second.
  507. */
  508. #define EEH_STATE_MIN_WAIT_TIME (1000)
  509. #define EEH_STATE_MAX_WAIT_TIME (300 * 1000)
  510. while (1) {
  511. ret = pseries_eeh_get_state(pe, &mwait);
  512. /*
  513. * If the PE's state is temporarily unavailable,
  514. * we have to wait for the specified time. Otherwise,
  515. * the PE's state will be returned immediately.
  516. */
  517. if (ret != EEH_STATE_UNAVAILABLE)
  518. return ret;
  519. if (max_wait <= 0) {
  520. pr_warn("%s: Timeout when getting PE's state (%d)\n",
  521. __func__, max_wait);
  522. return EEH_STATE_NOT_SUPPORT;
  523. }
  524. if (mwait <= 0) {
  525. pr_warn("%s: Firmware returned bad wait value %d\n",
  526. __func__, mwait);
  527. mwait = EEH_STATE_MIN_WAIT_TIME;
  528. } else if (mwait > EEH_STATE_MAX_WAIT_TIME) {
  529. pr_warn("%s: Firmware returned too long wait value %d\n",
  530. __func__, mwait);
  531. mwait = EEH_STATE_MAX_WAIT_TIME;
  532. }
  533. max_wait -= mwait;
  534. msleep(mwait);
  535. }
  536. return EEH_STATE_NOT_SUPPORT;
  537. }
  538. /**
  539. * pseries_eeh_get_log - Retrieve error log
  540. * @pe: EEH PE
  541. * @severity: temporary or permanent error log
  542. * @drv_log: driver log to be combined with retrieved error log
  543. * @len: length of driver log
  544. *
  545. * Retrieve the temporary or permanent error from the PE.
  546. * Actually, the error will be retrieved through the dedicated
  547. * RTAS call.
  548. */
  549. static int pseries_eeh_get_log(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len)
  550. {
  551. int config_addr;
  552. unsigned long flags;
  553. int ret;
  554. spin_lock_irqsave(&slot_errbuf_lock, flags);
  555. memset(slot_errbuf, 0, eeh_error_buf_size);
  556. /* Figure out the PE address */
  557. config_addr = pe->config_addr;
  558. if (pe->addr)
  559. config_addr = pe->addr;
  560. ret = rtas_call(ibm_slot_error_detail, 8, 1, NULL, config_addr,
  561. BUID_HI(pe->phb->buid), BUID_LO(pe->phb->buid),
  562. virt_to_phys(drv_log), len,
  563. virt_to_phys(slot_errbuf), eeh_error_buf_size,
  564. severity);
  565. if (!ret)
  566. log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
  567. spin_unlock_irqrestore(&slot_errbuf_lock, flags);
  568. return ret;
  569. }
  570. /**
  571. * pseries_eeh_configure_bridge - Configure PCI bridges in the indicated PE
  572. * @pe: EEH PE
  573. *
  574. * The function will be called to reconfigure the bridges included
  575. * in the specified PE so that the mulfunctional PE would be recovered
  576. * again.
  577. */
  578. static int pseries_eeh_configure_bridge(struct eeh_pe *pe)
  579. {
  580. int config_addr;
  581. int ret;
  582. /* Figure out the PE address */
  583. config_addr = pe->config_addr;
  584. if (pe->addr)
  585. config_addr = pe->addr;
  586. /* Use new configure-pe function, if supported */
  587. if (ibm_configure_pe != RTAS_UNKNOWN_SERVICE) {
  588. ret = rtas_call(ibm_configure_pe, 3, 1, NULL,
  589. config_addr, BUID_HI(pe->phb->buid),
  590. BUID_LO(pe->phb->buid));
  591. } else if (ibm_configure_bridge != RTAS_UNKNOWN_SERVICE) {
  592. ret = rtas_call(ibm_configure_bridge, 3, 1, NULL,
  593. config_addr, BUID_HI(pe->phb->buid),
  594. BUID_LO(pe->phb->buid));
  595. } else {
  596. return -EFAULT;
  597. }
  598. if (ret)
  599. pr_warn("%s: Unable to configure bridge PHB#%d-PE#%x (%d)\n",
  600. __func__, pe->phb->global_number, pe->addr, ret);
  601. return ret;
  602. }
  603. /**
  604. * pseries_eeh_read_config - Read PCI config space
  605. * @dn: device node
  606. * @where: PCI address
  607. * @size: size to read
  608. * @val: return value
  609. *
  610. * Read config space from the speicifed device
  611. */
  612. static int pseries_eeh_read_config(struct device_node *dn, int where, int size, u32 *val)
  613. {
  614. struct pci_dn *pdn;
  615. pdn = PCI_DN(dn);
  616. return rtas_read_config(pdn, where, size, val);
  617. }
  618. /**
  619. * pseries_eeh_write_config - Write PCI config space
  620. * @dn: device node
  621. * @where: PCI address
  622. * @size: size to write
  623. * @val: value to be written
  624. *
  625. * Write config space to the specified device
  626. */
  627. static int pseries_eeh_write_config(struct device_node *dn, int where, int size, u32 val)
  628. {
  629. struct pci_dn *pdn;
  630. pdn = PCI_DN(dn);
  631. return rtas_write_config(pdn, where, size, val);
  632. }
  633. static struct eeh_ops pseries_eeh_ops = {
  634. .name = "pseries",
  635. .init = pseries_eeh_init,
  636. .of_probe = pseries_eeh_of_probe,
  637. .dev_probe = NULL,
  638. .set_option = pseries_eeh_set_option,
  639. .get_pe_addr = pseries_eeh_get_pe_addr,
  640. .get_state = pseries_eeh_get_state,
  641. .reset = pseries_eeh_reset,
  642. .wait_state = pseries_eeh_wait_state,
  643. .get_log = pseries_eeh_get_log,
  644. .configure_bridge = pseries_eeh_configure_bridge,
  645. .read_config = pseries_eeh_read_config,
  646. .write_config = pseries_eeh_write_config,
  647. .next_error = NULL,
  648. .restore_config = NULL
  649. };
  650. /**
  651. * eeh_pseries_init - Register platform dependent EEH operations
  652. *
  653. * EEH initialization on pseries platform. This function should be
  654. * called before any EEH related functions.
  655. */
  656. static int __init eeh_pseries_init(void)
  657. {
  658. int ret;
  659. ret = eeh_ops_register(&pseries_eeh_ops);
  660. if (!ret)
  661. pr_info("EEH: pSeries platform initialized\n");
  662. else
  663. pr_info("EEH: pSeries platform initialization failure (%d)\n",
  664. ret);
  665. return ret;
  666. }
  667. machine_early_initcall(pseries, eeh_pseries_init);