board-lager.c 24 KB

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  1. /*
  2. * Lager board support
  3. *
  4. * Copyright (C) 2013-2014 Renesas Solutions Corp.
  5. * Copyright (C) 2013 Magnus Damm
  6. * Copyright (C) 2014 Cogent Embedded, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  20. */
  21. #include <linux/gpio.h>
  22. #include <linux/gpio_keys.h>
  23. #include <linux/i2c.h>
  24. #include <linux/input.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/irq.h>
  27. #include <linux/kernel.h>
  28. #include <linux/leds.h>
  29. #include <linux/mfd/tmio.h>
  30. #include <linux/mmc/host.h>
  31. #include <linux/mmc/sh_mmcif.h>
  32. #include <linux/mmc/sh_mobile_sdhi.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <linux/mtd/mtd.h>
  35. #include <linux/pinctrl/machine.h>
  36. #include <linux/platform_data/camera-rcar.h>
  37. #include <linux/platform_data/gpio-rcar.h>
  38. #include <linux/platform_data/rcar-du.h>
  39. #include <linux/platform_data/usb-rcar-gen2-phy.h>
  40. #include <linux/platform_device.h>
  41. #include <linux/phy.h>
  42. #include <linux/regulator/driver.h>
  43. #include <linux/regulator/fixed.h>
  44. #include <linux/regulator/gpio-regulator.h>
  45. #include <linux/regulator/machine.h>
  46. #include <linux/sh_eth.h>
  47. #include <linux/spi/flash.h>
  48. #include <linux/spi/rspi.h>
  49. #include <linux/spi/spi.h>
  50. #include <linux/usb/phy.h>
  51. #include <linux/usb/renesas_usbhs.h>
  52. #include <media/soc_camera.h>
  53. #include <asm/mach-types.h>
  54. #include <asm/mach/arch.h>
  55. #include <sound/rcar_snd.h>
  56. #include <sound/simple_card.h>
  57. #include "common.h"
  58. #include "irqs.h"
  59. #include "r8a7790.h"
  60. #include "rcar-gen2.h"
  61. /*
  62. * SSI-AK4643
  63. *
  64. * SW1: 1: AK4643
  65. * 2: CN22
  66. * 3: ADV7511
  67. *
  68. * this command is required when playback.
  69. *
  70. * # amixer set "LINEOUT Mixer DACL" on
  71. */
  72. /*
  73. * SDHI0 (CN8)
  74. *
  75. * JP3: pin1
  76. * SW20: pin1
  77. * GP5_24: 1: VDD 3.3V (defult)
  78. * 0: VDD 0.0V
  79. * GP5_29: 1: VccQ 3.3V (defult)
  80. * 0: VccQ 1.8V
  81. *
  82. */
  83. /* DU */
  84. static struct rcar_du_encoder_data lager_du_encoders[] = {
  85. {
  86. .type = RCAR_DU_ENCODER_VGA,
  87. .output = RCAR_DU_OUTPUT_DPAD0,
  88. }, {
  89. .type = RCAR_DU_ENCODER_NONE,
  90. .output = RCAR_DU_OUTPUT_LVDS1,
  91. .connector.lvds.panel = {
  92. .width_mm = 210,
  93. .height_mm = 158,
  94. .mode = {
  95. .clock = 65000,
  96. .hdisplay = 1024,
  97. .hsync_start = 1048,
  98. .hsync_end = 1184,
  99. .htotal = 1344,
  100. .vdisplay = 768,
  101. .vsync_start = 771,
  102. .vsync_end = 777,
  103. .vtotal = 806,
  104. .flags = 0,
  105. },
  106. },
  107. },
  108. };
  109. static const struct rcar_du_platform_data lager_du_pdata __initconst = {
  110. .encoders = lager_du_encoders,
  111. .num_encoders = ARRAY_SIZE(lager_du_encoders),
  112. };
  113. static const struct resource du_resources[] __initconst = {
  114. DEFINE_RES_MEM(0xfeb00000, 0x70000),
  115. DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
  116. DEFINE_RES_MEM_NAMED(0xfeb94000, 0x1c, "lvds.1"),
  117. DEFINE_RES_IRQ(gic_spi(256)),
  118. DEFINE_RES_IRQ(gic_spi(268)),
  119. DEFINE_RES_IRQ(gic_spi(269)),
  120. };
  121. static void __init lager_add_du_device(void)
  122. {
  123. struct platform_device_info info = {
  124. .name = "rcar-du-r8a7790",
  125. .id = -1,
  126. .res = du_resources,
  127. .num_res = ARRAY_SIZE(du_resources),
  128. .data = &lager_du_pdata,
  129. .size_data = sizeof(lager_du_pdata),
  130. .dma_mask = DMA_BIT_MASK(32),
  131. };
  132. platform_device_register_full(&info);
  133. }
  134. /* LEDS */
  135. static struct gpio_led lager_leds[] = {
  136. {
  137. .name = "led8",
  138. .gpio = RCAR_GP_PIN(5, 17),
  139. .default_state = LEDS_GPIO_DEFSTATE_ON,
  140. }, {
  141. .name = "led7",
  142. .gpio = RCAR_GP_PIN(4, 23),
  143. .default_state = LEDS_GPIO_DEFSTATE_ON,
  144. }, {
  145. .name = "led6",
  146. .gpio = RCAR_GP_PIN(4, 22),
  147. .default_state = LEDS_GPIO_DEFSTATE_ON,
  148. },
  149. };
  150. static const struct gpio_led_platform_data lager_leds_pdata __initconst = {
  151. .leds = lager_leds,
  152. .num_leds = ARRAY_SIZE(lager_leds),
  153. };
  154. /* GPIO KEY */
  155. #define GPIO_KEY(c, g, d, ...) \
  156. { .code = c, .gpio = g, .desc = d, .active_low = 1, \
  157. .wakeup = 1, .debounce_interval = 20 }
  158. static struct gpio_keys_button gpio_buttons[] = {
  159. GPIO_KEY(KEY_4, RCAR_GP_PIN(1, 28), "SW2-pin4"),
  160. GPIO_KEY(KEY_3, RCAR_GP_PIN(1, 26), "SW2-pin3"),
  161. GPIO_KEY(KEY_2, RCAR_GP_PIN(1, 24), "SW2-pin2"),
  162. GPIO_KEY(KEY_1, RCAR_GP_PIN(1, 14), "SW2-pin1"),
  163. };
  164. static const struct gpio_keys_platform_data lager_keys_pdata __initconst = {
  165. .buttons = gpio_buttons,
  166. .nbuttons = ARRAY_SIZE(gpio_buttons),
  167. };
  168. /* Fixed 3.3V regulator to be used by MMCIF */
  169. static struct regulator_consumer_supply fixed3v3_power_consumers[] =
  170. {
  171. REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
  172. };
  173. /*
  174. * SDHI regulator macro
  175. *
  176. ** FIXME**
  177. * Lager board vqmmc is provided via DA9063 PMIC chip,
  178. * and we should use ${LINK}/drivers/mfd/da9063-* driver for it.
  179. * but, it doesn't have regulator support at this point.
  180. * It uses gpio-regulator for vqmmc as quick-hack.
  181. */
  182. #define SDHI_REGULATOR(idx, vdd_pin, vccq_pin) \
  183. static struct regulator_consumer_supply vcc_sdhi##idx##_consumer = \
  184. REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi." #idx); \
  185. \
  186. static struct regulator_init_data vcc_sdhi##idx##_init_data = { \
  187. .constraints = { \
  188. .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
  189. }, \
  190. .consumer_supplies = &vcc_sdhi##idx##_consumer, \
  191. .num_consumer_supplies = 1, \
  192. }; \
  193. \
  194. static const struct fixed_voltage_config vcc_sdhi##idx##_info __initconst = {\
  195. .supply_name = "SDHI" #idx "Vcc", \
  196. .microvolts = 3300000, \
  197. .gpio = vdd_pin, \
  198. .enable_high = 1, \
  199. .init_data = &vcc_sdhi##idx##_init_data, \
  200. }; \
  201. \
  202. static struct regulator_consumer_supply vccq_sdhi##idx##_consumer = \
  203. REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi." #idx); \
  204. \
  205. static struct regulator_init_data vccq_sdhi##idx##_init_data = { \
  206. .constraints = { \
  207. .input_uV = 3300000, \
  208. .min_uV = 1800000, \
  209. .max_uV = 3300000, \
  210. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | \
  211. REGULATOR_CHANGE_STATUS, \
  212. }, \
  213. .consumer_supplies = &vccq_sdhi##idx##_consumer, \
  214. .num_consumer_supplies = 1, \
  215. }; \
  216. \
  217. static struct gpio vccq_sdhi##idx##_gpio = \
  218. { vccq_pin, GPIOF_OUT_INIT_HIGH, "vccq-sdhi" #idx }; \
  219. \
  220. static struct gpio_regulator_state vccq_sdhi##idx##_states[] = { \
  221. { .value = 1800000, .gpios = 0 }, \
  222. { .value = 3300000, .gpios = 1 }, \
  223. }; \
  224. \
  225. static const struct gpio_regulator_config vccq_sdhi##idx##_info __initconst = {\
  226. .supply_name = "vqmmc", \
  227. .gpios = &vccq_sdhi##idx##_gpio, \
  228. .nr_gpios = 1, \
  229. .states = vccq_sdhi##idx##_states, \
  230. .nr_states = ARRAY_SIZE(vccq_sdhi##idx##_states), \
  231. .type = REGULATOR_VOLTAGE, \
  232. .init_data = &vccq_sdhi##idx##_init_data, \
  233. };
  234. SDHI_REGULATOR(0, RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 29));
  235. SDHI_REGULATOR(2, RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 30));
  236. /* MMCIF */
  237. static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
  238. .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
  239. .clk_ctrl2_present = true,
  240. .ccs_unsupported = true,
  241. };
  242. static const struct resource mmcif1_resources[] __initconst = {
  243. DEFINE_RES_MEM(0xee220000, 0x80),
  244. DEFINE_RES_IRQ(gic_spi(170)),
  245. };
  246. /* Ether */
  247. static const struct sh_eth_plat_data ether_pdata __initconst = {
  248. .phy = 0x1,
  249. .phy_irq = irq_pin(0),
  250. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  251. .phy_interface = PHY_INTERFACE_MODE_RMII,
  252. .ether_link_active_low = 1,
  253. };
  254. static const struct resource ether_resources[] __initconst = {
  255. DEFINE_RES_MEM(0xee700000, 0x400),
  256. DEFINE_RES_IRQ(gic_spi(162)),
  257. };
  258. static const struct platform_device_info ether_info __initconst = {
  259. .name = "r8a7790-ether",
  260. .id = -1,
  261. .res = ether_resources,
  262. .num_res = ARRAY_SIZE(ether_resources),
  263. .data = &ether_pdata,
  264. .size_data = sizeof(ether_pdata),
  265. .dma_mask = DMA_BIT_MASK(32),
  266. };
  267. /* SPI Flash memory (Spansion S25FL512SAGMFIG11 64Mb) */
  268. static struct mtd_partition spi_flash_part[] = {
  269. /* Reserved for user loader program, read-only */
  270. {
  271. .name = "loader",
  272. .offset = 0,
  273. .size = SZ_256K,
  274. .mask_flags = MTD_WRITEABLE,
  275. },
  276. /* Reserved for user program, read-only */
  277. {
  278. .name = "user",
  279. .offset = MTDPART_OFS_APPEND,
  280. .size = SZ_4M,
  281. .mask_flags = MTD_WRITEABLE,
  282. },
  283. /* All else is writable (e.g. JFFS2) */
  284. {
  285. .name = "flash",
  286. .offset = MTDPART_OFS_APPEND,
  287. .size = MTDPART_SIZ_FULL,
  288. .mask_flags = 0,
  289. },
  290. };
  291. static const struct flash_platform_data spi_flash_data = {
  292. .name = "m25p80",
  293. .parts = spi_flash_part,
  294. .nr_parts = ARRAY_SIZE(spi_flash_part),
  295. .type = "s25fl512s",
  296. };
  297. static const struct rspi_plat_data qspi_pdata __initconst = {
  298. .num_chipselect = 1,
  299. };
  300. static const struct spi_board_info spi_info[] __initconst = {
  301. {
  302. .modalias = "m25p80",
  303. .platform_data = &spi_flash_data,
  304. .mode = SPI_MODE_0 | SPI_TX_QUAD | SPI_RX_QUAD,
  305. .max_speed_hz = 30000000,
  306. .bus_num = 0,
  307. .chip_select = 0,
  308. },
  309. };
  310. /* QSPI resource */
  311. static const struct resource qspi_resources[] __initconst = {
  312. DEFINE_RES_MEM(0xe6b10000, 0x1000),
  313. DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"),
  314. };
  315. /* VIN */
  316. static const struct resource vin_resources[] __initconst = {
  317. /* VIN0 */
  318. DEFINE_RES_MEM(0xe6ef0000, 0x1000),
  319. DEFINE_RES_IRQ(gic_spi(188)),
  320. /* VIN1 */
  321. DEFINE_RES_MEM(0xe6ef1000, 0x1000),
  322. DEFINE_RES_IRQ(gic_spi(189)),
  323. };
  324. static void __init lager_add_vin_device(unsigned idx,
  325. struct rcar_vin_platform_data *pdata)
  326. {
  327. struct platform_device_info vin_info = {
  328. .name = "r8a7790-vin",
  329. .id = idx,
  330. .res = &vin_resources[idx * 2],
  331. .num_res = 2,
  332. .dma_mask = DMA_BIT_MASK(32),
  333. .data = pdata,
  334. .size_data = sizeof(*pdata),
  335. };
  336. BUG_ON(idx > 1);
  337. platform_device_register_full(&vin_info);
  338. }
  339. #define LAGER_CAMERA(idx, name, addr, pdata, flag) \
  340. static struct i2c_board_info i2c_cam##idx##_device = { \
  341. I2C_BOARD_INFO(name, addr), \
  342. }; \
  343. \
  344. static struct rcar_vin_platform_data vin##idx##_pdata = { \
  345. .flags = flag, \
  346. }; \
  347. \
  348. static struct soc_camera_link cam##idx##_link = { \
  349. .bus_id = idx, \
  350. .board_info = &i2c_cam##idx##_device, \
  351. .i2c_adapter_id = 2, \
  352. .module_name = name, \
  353. .priv = pdata, \
  354. }
  355. /* Camera 0 is not currently supported due to adv7612 support missing */
  356. LAGER_CAMERA(1, "adv7180", 0x20, NULL, RCAR_VIN_BT656);
  357. static void __init lager_add_camera1_device(void)
  358. {
  359. platform_device_register_data(NULL, "soc-camera-pdrv", 1,
  360. &cam1_link, sizeof(cam1_link));
  361. lager_add_vin_device(1, &vin1_pdata);
  362. }
  363. /* SATA1 */
  364. static const struct resource sata1_resources[] __initconst = {
  365. DEFINE_RES_MEM(0xee500000, 0x2000),
  366. DEFINE_RES_IRQ(gic_spi(106)),
  367. };
  368. static const struct platform_device_info sata1_info __initconst = {
  369. .name = "sata-r8a7790",
  370. .id = 1,
  371. .res = sata1_resources,
  372. .num_res = ARRAY_SIZE(sata1_resources),
  373. .dma_mask = DMA_BIT_MASK(32),
  374. };
  375. /* USBHS */
  376. static const struct resource usbhs_resources[] __initconst = {
  377. DEFINE_RES_MEM(0xe6590000, 0x100),
  378. DEFINE_RES_IRQ(gic_spi(107)),
  379. };
  380. struct usbhs_private {
  381. struct renesas_usbhs_platform_info info;
  382. struct usb_phy *phy;
  383. };
  384. #define usbhs_get_priv(pdev) \
  385. container_of(renesas_usbhs_get_info(pdev), struct usbhs_private, info)
  386. static int usbhs_power_ctrl(struct platform_device *pdev,
  387. void __iomem *base, int enable)
  388. {
  389. struct usbhs_private *priv = usbhs_get_priv(pdev);
  390. if (!priv->phy)
  391. return -ENODEV;
  392. if (enable) {
  393. int retval = usb_phy_init(priv->phy);
  394. if (!retval)
  395. retval = usb_phy_set_suspend(priv->phy, 0);
  396. return retval;
  397. }
  398. usb_phy_set_suspend(priv->phy, 1);
  399. usb_phy_shutdown(priv->phy);
  400. return 0;
  401. }
  402. static int usbhs_hardware_init(struct platform_device *pdev)
  403. {
  404. struct usbhs_private *priv = usbhs_get_priv(pdev);
  405. struct usb_phy *phy;
  406. int ret;
  407. /* USB0 Function - use PWEN as GPIO input to detect DIP Switch SW5
  408. * setting to avoid VBUS short circuit due to wrong cable.
  409. * PWEN should be pulled up high if USB Function is selected by SW5
  410. */
  411. gpio_request_one(RCAR_GP_PIN(5, 18), GPIOF_IN, NULL); /* USB0_PWEN */
  412. if (!gpio_get_value(RCAR_GP_PIN(5, 18))) {
  413. pr_warn("Error: USB Function not selected - check SW5 + SW6\n");
  414. ret = -ENOTSUPP;
  415. goto error;
  416. }
  417. phy = usb_get_phy_dev(&pdev->dev, 0);
  418. if (IS_ERR(phy)) {
  419. ret = PTR_ERR(phy);
  420. goto error;
  421. }
  422. priv->phy = phy;
  423. return 0;
  424. error:
  425. gpio_free(RCAR_GP_PIN(5, 18));
  426. return ret;
  427. }
  428. static int usbhs_hardware_exit(struct platform_device *pdev)
  429. {
  430. struct usbhs_private *priv = usbhs_get_priv(pdev);
  431. if (!priv->phy)
  432. return 0;
  433. usb_put_phy(priv->phy);
  434. priv->phy = NULL;
  435. gpio_free(RCAR_GP_PIN(5, 18));
  436. return 0;
  437. }
  438. static int usbhs_get_id(struct platform_device *pdev)
  439. {
  440. return USBHS_GADGET;
  441. }
  442. static u32 lager_usbhs_pipe_type[] = {
  443. USB_ENDPOINT_XFER_CONTROL,
  444. USB_ENDPOINT_XFER_ISOC,
  445. USB_ENDPOINT_XFER_ISOC,
  446. USB_ENDPOINT_XFER_BULK,
  447. USB_ENDPOINT_XFER_BULK,
  448. USB_ENDPOINT_XFER_BULK,
  449. USB_ENDPOINT_XFER_INT,
  450. USB_ENDPOINT_XFER_INT,
  451. USB_ENDPOINT_XFER_INT,
  452. USB_ENDPOINT_XFER_BULK,
  453. USB_ENDPOINT_XFER_BULK,
  454. USB_ENDPOINT_XFER_BULK,
  455. USB_ENDPOINT_XFER_BULK,
  456. USB_ENDPOINT_XFER_BULK,
  457. USB_ENDPOINT_XFER_BULK,
  458. USB_ENDPOINT_XFER_BULK,
  459. };
  460. static struct usbhs_private usbhs_priv __initdata = {
  461. .info = {
  462. .platform_callback = {
  463. .power_ctrl = usbhs_power_ctrl,
  464. .hardware_init = usbhs_hardware_init,
  465. .hardware_exit = usbhs_hardware_exit,
  466. .get_id = usbhs_get_id,
  467. },
  468. .driver_param = {
  469. .buswait_bwait = 4,
  470. .pipe_type = lager_usbhs_pipe_type,
  471. .pipe_size = ARRAY_SIZE(lager_usbhs_pipe_type),
  472. },
  473. }
  474. };
  475. static void __init lager_register_usbhs(void)
  476. {
  477. usb_bind_phy("renesas_usbhs", 0, "usb_phy_rcar_gen2");
  478. platform_device_register_resndata(NULL,
  479. "renesas_usbhs", -1,
  480. usbhs_resources,
  481. ARRAY_SIZE(usbhs_resources),
  482. &usbhs_priv.info,
  483. sizeof(usbhs_priv.info));
  484. }
  485. /* USBHS PHY */
  486. static const struct rcar_gen2_phy_platform_data usbhs_phy_pdata __initconst = {
  487. .chan0_pci = 0, /* Channel 0 is USBHS */
  488. .chan2_pci = 1, /* Channel 2 is PCI USB */
  489. };
  490. static const struct resource usbhs_phy_resources[] __initconst = {
  491. DEFINE_RES_MEM(0xe6590100, 0x100),
  492. };
  493. /* I2C */
  494. static struct i2c_board_info i2c2_devices[] = {
  495. {
  496. I2C_BOARD_INFO("ak4643", 0x12),
  497. }
  498. };
  499. /* Sound */
  500. static struct resource rsnd_resources[] __initdata = {
  501. [RSND_GEN2_SCU] = DEFINE_RES_MEM(0xec500000, 0x1000),
  502. [RSND_GEN2_ADG] = DEFINE_RES_MEM(0xec5a0000, 0x100),
  503. [RSND_GEN2_SSIU] = DEFINE_RES_MEM(0xec540000, 0x1000),
  504. [RSND_GEN2_SSI] = DEFINE_RES_MEM(0xec541000, 0x1280),
  505. };
  506. static struct rsnd_ssi_platform_info rsnd_ssi[] = {
  507. RSND_SSI(0, gic_spi(370), 0),
  508. RSND_SSI(0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
  509. };
  510. static struct rsnd_src_platform_info rsnd_src[2] = {
  511. /* no member at this point */
  512. };
  513. static struct rsnd_dai_platform_info rsnd_dai = {
  514. .playback = { .ssi = &rsnd_ssi[0], },
  515. .capture = { .ssi = &rsnd_ssi[1], },
  516. };
  517. static struct rcar_snd_info rsnd_info = {
  518. .flags = RSND_GEN2,
  519. .ssi_info = rsnd_ssi,
  520. .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
  521. .src_info = rsnd_src,
  522. .src_info_nr = ARRAY_SIZE(rsnd_src),
  523. .dai_info = &rsnd_dai,
  524. .dai_info_nr = 1,
  525. };
  526. static struct asoc_simple_card_info rsnd_card_info = {
  527. .name = "AK4643",
  528. .card = "SSI01-AK4643",
  529. .codec = "ak4642-codec.2-0012",
  530. .platform = "rcar_sound",
  531. .daifmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM,
  532. .cpu_dai = {
  533. .name = "rcar_sound",
  534. },
  535. .codec_dai = {
  536. .name = "ak4642-hifi",
  537. .sysclk = 11289600,
  538. },
  539. };
  540. static void __init lager_add_rsnd_device(void)
  541. {
  542. struct platform_device_info cardinfo = {
  543. .name = "asoc-simple-card",
  544. .id = -1,
  545. .data = &rsnd_card_info,
  546. .size_data = sizeof(struct asoc_simple_card_info),
  547. .dma_mask = DMA_BIT_MASK(32),
  548. };
  549. i2c_register_board_info(2, i2c2_devices,
  550. ARRAY_SIZE(i2c2_devices));
  551. platform_device_register_resndata(
  552. NULL, "rcar_sound", -1,
  553. rsnd_resources, ARRAY_SIZE(rsnd_resources),
  554. &rsnd_info, sizeof(rsnd_info));
  555. platform_device_register_full(&cardinfo);
  556. }
  557. /* SDHI0 */
  558. static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
  559. .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
  560. MMC_CAP_POWER_OFF_CARD,
  561. .tmio_caps2 = MMC_CAP2_NO_MULTI_READ,
  562. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
  563. TMIO_MMC_WRPROTECT_DISABLE,
  564. };
  565. static struct resource sdhi0_resources[] __initdata = {
  566. DEFINE_RES_MEM(0xee100000, 0x200),
  567. DEFINE_RES_IRQ(gic_spi(165)),
  568. };
  569. /* SDHI2 */
  570. static struct sh_mobile_sdhi_info sdhi2_info __initdata = {
  571. .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
  572. MMC_CAP_POWER_OFF_CARD,
  573. .tmio_caps2 = MMC_CAP2_NO_MULTI_READ,
  574. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
  575. TMIO_MMC_WRPROTECT_DISABLE,
  576. };
  577. static struct resource sdhi2_resources[] __initdata = {
  578. DEFINE_RES_MEM(0xee140000, 0x100),
  579. DEFINE_RES_IRQ(gic_spi(167)),
  580. };
  581. /* Internal PCI1 */
  582. static const struct resource pci1_resources[] __initconst = {
  583. DEFINE_RES_MEM(0xee0b0000, 0x10000), /* CFG */
  584. DEFINE_RES_MEM(0xee0a0000, 0x10000), /* MEM */
  585. DEFINE_RES_IRQ(gic_spi(112)),
  586. };
  587. static const struct platform_device_info pci1_info __initconst = {
  588. .name = "pci-rcar-gen2",
  589. .id = 1,
  590. .res = pci1_resources,
  591. .num_res = ARRAY_SIZE(pci1_resources),
  592. .dma_mask = DMA_BIT_MASK(32),
  593. };
  594. static void __init lager_add_usb1_device(void)
  595. {
  596. platform_device_register_full(&pci1_info);
  597. }
  598. /* Internal PCI2 */
  599. static const struct resource pci2_resources[] __initconst = {
  600. DEFINE_RES_MEM(0xee0d0000, 0x10000), /* CFG */
  601. DEFINE_RES_MEM(0xee0c0000, 0x10000), /* MEM */
  602. DEFINE_RES_IRQ(gic_spi(113)),
  603. };
  604. static const struct platform_device_info pci2_info __initconst = {
  605. .name = "pci-rcar-gen2",
  606. .id = 2,
  607. .res = pci2_resources,
  608. .num_res = ARRAY_SIZE(pci2_resources),
  609. .dma_mask = DMA_BIT_MASK(32),
  610. };
  611. static void __init lager_add_usb2_device(void)
  612. {
  613. platform_device_register_full(&pci2_info);
  614. }
  615. static const struct pinctrl_map lager_pinctrl_map[] = {
  616. /* DU (CN10: ARGB0, CN13: LVDS) */
  617. PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
  618. "du_rgb666", "du"),
  619. PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
  620. "du_sync_1", "du"),
  621. PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
  622. "du_clk_out_0", "du"),
  623. /* I2C2 */
  624. PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar.2", "pfc-r8a7790",
  625. "i2c2", "i2c2"),
  626. /* QSPI */
  627. PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
  628. "qspi_ctrl", "qspi"),
  629. PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
  630. "qspi_data4", "qspi"),
  631. /* SCIF0 (CN19: DEBUG SERIAL0) */
  632. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
  633. "scif0_data", "scif0"),
  634. /* SCIF1 (CN20: DEBUG SERIAL1) */
  635. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
  636. "scif1_data", "scif1"),
  637. /* SDHI0 */
  638. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
  639. "sdhi0_data4", "sdhi0"),
  640. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
  641. "sdhi0_ctrl", "sdhi0"),
  642. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
  643. "sdhi0_cd", "sdhi0"),
  644. /* SDHI2 */
  645. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
  646. "sdhi2_data4", "sdhi2"),
  647. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
  648. "sdhi2_ctrl", "sdhi2"),
  649. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
  650. "sdhi2_cd", "sdhi2"),
  651. /* SSI (CN17: sound) */
  652. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
  653. "ssi0129_ctrl", "ssi"),
  654. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
  655. "ssi0_data", "ssi"),
  656. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
  657. "ssi1_data", "ssi"),
  658. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
  659. "audio_clk_a", "audio_clk"),
  660. /* MMCIF1 */
  661. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
  662. "mmc1_data8", "mmc1"),
  663. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
  664. "mmc1_ctrl", "mmc1"),
  665. /* Ether */
  666. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
  667. "eth_link", "eth"),
  668. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
  669. "eth_mdio", "eth"),
  670. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
  671. "eth_rmii", "eth"),
  672. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
  673. "intc_irq0", "intc"),
  674. /* VIN0 */
  675. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
  676. "vin0_data24", "vin0"),
  677. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
  678. "vin0_sync", "vin0"),
  679. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
  680. "vin0_field", "vin0"),
  681. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
  682. "vin0_clkenb", "vin0"),
  683. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
  684. "vin0_clk", "vin0"),
  685. /* VIN1 */
  686. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
  687. "vin1_data8", "vin1"),
  688. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
  689. "vin1_clk", "vin1"),
  690. /* USB0 */
  691. PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7790",
  692. "usb0_ovc_vbus", "usb0"),
  693. /* USB1 */
  694. PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.1", "pfc-r8a7790",
  695. "usb1", "usb1"),
  696. /* USB2 */
  697. PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.2", "pfc-r8a7790",
  698. "usb2", "usb2"),
  699. };
  700. static void __init lager_add_standard_devices(void)
  701. {
  702. int fixed_regulator_idx = 0;
  703. int gpio_regulator_idx = 0;
  704. r8a7790_clock_init();
  705. pinctrl_register_mappings(lager_pinctrl_map,
  706. ARRAY_SIZE(lager_pinctrl_map));
  707. r8a7790_pinmux_init();
  708. r8a7790_add_standard_devices();
  709. platform_device_register_data(NULL, "leds-gpio", -1,
  710. &lager_leds_pdata,
  711. sizeof(lager_leds_pdata));
  712. platform_device_register_data(NULL, "gpio-keys", -1,
  713. &lager_keys_pdata,
  714. sizeof(lager_keys_pdata));
  715. regulator_register_always_on(fixed_regulator_idx++,
  716. "fixed-3.3V", fixed3v3_power_consumers,
  717. ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
  718. platform_device_register_resndata(NULL, "sh_mmcif", 1,
  719. mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
  720. &mmcif1_pdata, sizeof(mmcif1_pdata));
  721. platform_device_register_full(&ether_info);
  722. lager_add_du_device();
  723. platform_device_register_resndata(NULL, "qspi", 0,
  724. qspi_resources,
  725. ARRAY_SIZE(qspi_resources),
  726. &qspi_pdata, sizeof(qspi_pdata));
  727. spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
  728. platform_device_register_data(NULL, "reg-fixed-voltage", fixed_regulator_idx++,
  729. &vcc_sdhi0_info, sizeof(struct fixed_voltage_config));
  730. platform_device_register_data(NULL, "reg-fixed-voltage", fixed_regulator_idx++,
  731. &vcc_sdhi2_info, sizeof(struct fixed_voltage_config));
  732. platform_device_register_data(NULL, "gpio-regulator", gpio_regulator_idx++,
  733. &vccq_sdhi0_info, sizeof(struct gpio_regulator_config));
  734. platform_device_register_data(NULL, "gpio-regulator", gpio_regulator_idx++,
  735. &vccq_sdhi2_info, sizeof(struct gpio_regulator_config));
  736. lager_add_camera1_device();
  737. platform_device_register_full(&sata1_info);
  738. platform_device_register_resndata(NULL, "usb_phy_rcar_gen2",
  739. -1, usbhs_phy_resources,
  740. ARRAY_SIZE(usbhs_phy_resources),
  741. &usbhs_phy_pdata,
  742. sizeof(usbhs_phy_pdata));
  743. lager_register_usbhs();
  744. lager_add_usb1_device();
  745. lager_add_usb2_device();
  746. lager_add_rsnd_device();
  747. platform_device_register_resndata(NULL, "sh_mobile_sdhi", 0,
  748. sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
  749. &sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
  750. platform_device_register_resndata(NULL, "sh_mobile_sdhi", 2,
  751. sdhi2_resources, ARRAY_SIZE(sdhi2_resources),
  752. &sdhi2_info, sizeof(struct sh_mobile_sdhi_info));
  753. }
  754. /*
  755. * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
  756. * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
  757. * 14-15. We have to set them back to 01 from the default 00 value each time
  758. * the PHY is reset. It's also important because the PHY's LED0 signal is
  759. * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
  760. * bounce on and off after each packet, which we apparently want to avoid.
  761. */
  762. static int lager_ksz8041_fixup(struct phy_device *phydev)
  763. {
  764. u16 phyctrl1 = phy_read(phydev, 0x1e);
  765. phyctrl1 &= ~0xc000;
  766. phyctrl1 |= 0x4000;
  767. return phy_write(phydev, 0x1e, phyctrl1);
  768. }
  769. static void __init lager_init(void)
  770. {
  771. lager_add_standard_devices();
  772. irq_set_irq_type(irq_pin(0), IRQ_TYPE_LEVEL_LOW);
  773. if (IS_ENABLED(CONFIG_PHYLIB))
  774. phy_register_fixup_for_id("r8a7790-ether-ff:01",
  775. lager_ksz8041_fixup);
  776. }
  777. static const char * const lager_boards_compat_dt[] __initconst = {
  778. "renesas,lager",
  779. NULL,
  780. };
  781. DT_MACHINE_START(LAGER_DT, "lager")
  782. .smp = smp_ops(r8a7790_smp_ops),
  783. .init_early = shmobile_init_delay,
  784. .init_time = rcar_gen2_timer_init,
  785. .init_machine = lager_init,
  786. .init_late = shmobile_init_late,
  787. .reserve = rcar_gen2_reserve,
  788. .dt_compat = lager_boards_compat_dt,
  789. MACHINE_END