board-bockw.c 18 KB

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  1. /*
  2. * Bock-W board support
  3. *
  4. * Copyright (C) 2013-2014 Renesas Solutions Corp.
  5. * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  6. * Copyright (C) 2013-2014 Cogent Embedded, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  20. */
  21. #include <linux/mfd/tmio.h>
  22. #include <linux/mmc/host.h>
  23. #include <linux/mmc/sh_mobile_sdhi.h>
  24. #include <linux/mmc/sh_mmcif.h>
  25. #include <linux/mtd/partitions.h>
  26. #include <linux/pinctrl/machine.h>
  27. #include <linux/platform_data/camera-rcar.h>
  28. #include <linux/platform_data/usb-rcar-phy.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/regulator/fixed.h>
  31. #include <linux/regulator/machine.h>
  32. #include <linux/smsc911x.h>
  33. #include <linux/spi/spi.h>
  34. #include <linux/spi/flash.h>
  35. #include <linux/usb/renesas_usbhs.h>
  36. #include <media/soc_camera.h>
  37. #include <asm/mach/arch.h>
  38. #include <sound/rcar_snd.h>
  39. #include <sound/simple_card.h>
  40. #include "common.h"
  41. #include "irqs.h"
  42. #include "r8a7778.h"
  43. #define FPGA 0x18200000
  44. #define IRQ0MR 0x30
  45. #define COMCTLR 0x101c
  46. static void __iomem *fpga;
  47. /*
  48. * CN9(Upper side) SCIF/RCAN selection
  49. *
  50. * 1,4 3,6
  51. * SW40 SCIF RCAN
  52. * SW41 SCIF RCAN
  53. */
  54. /*
  55. * MMC (CN26) pin
  56. *
  57. * SW6 (D2) 3 pin
  58. * SW7 (D5) ON
  59. * SW8 (D3) 3 pin
  60. * SW10 (D4) 1 pin
  61. * SW12 (CLK) 1 pin
  62. * SW13 (D6) 3 pin
  63. * SW14 (CMD) ON
  64. * SW15 (D6) 1 pin
  65. * SW16 (D0) ON
  66. * SW17 (D1) ON
  67. * SW18 (D7) 3 pin
  68. * SW19 (MMC) 1 pin
  69. */
  70. /*
  71. * SSI settings
  72. *
  73. * SW45: 1-4 side (SSI5 out, ROUT/LOUT CN19 Mid)
  74. * SW46: 1101 (SSI6 Recorde)
  75. * SW47: 1110 (SSI5 Playback)
  76. * SW48: 11 (Recorde power)
  77. * SW49: 1 (SSI slave mode)
  78. * SW50: 1111 (SSI7, SSI8)
  79. * SW51: 1111 (SSI3, SSI4)
  80. * SW54: 1pin (ak4554 FPGA control)
  81. * SW55: 1 (CLKB is 24.5760MHz)
  82. * SW60: 1pin (ak4554 FPGA control)
  83. * SW61: 3pin (use X11 clock)
  84. * SW78: 3-6 (ak4642 connects I2C0)
  85. *
  86. * You can use sound as
  87. *
  88. * hw0: CN19: SSI56-AK4643
  89. * hw1: CN21: SSI3-AK4554(playback)
  90. * hw2: CN21: SSI4-AK4554(capture)
  91. * hw3: CN20: SSI7-AK4554(playback)
  92. * hw4: CN20: SSI8-AK4554(capture)
  93. *
  94. * this command is required when playback on hw0.
  95. *
  96. * # amixer set "LINEOUT Mixer DACL" on
  97. */
  98. /*
  99. * USB
  100. *
  101. * USB1 (CN29) can be Host/Function
  102. *
  103. * Host Func
  104. * SW98 1 2
  105. * SW99 1 3
  106. */
  107. /* Dummy supplies, where voltage doesn't matter */
  108. static struct regulator_consumer_supply dummy_supplies[] = {
  109. REGULATOR_SUPPLY("vddvario", "smsc911x"),
  110. REGULATOR_SUPPLY("vdd33a", "smsc911x"),
  111. };
  112. static struct regulator_consumer_supply fixed3v3_power_consumers[] = {
  113. REGULATOR_SUPPLY("vmmc", "sh_mmcif"),
  114. REGULATOR_SUPPLY("vqmmc", "sh_mmcif"),
  115. };
  116. static struct smsc911x_platform_config smsc911x_data __initdata = {
  117. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  118. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  119. .flags = SMSC911X_USE_32BIT,
  120. .phy_interface = PHY_INTERFACE_MODE_MII,
  121. };
  122. static struct resource smsc911x_resources[] __initdata = {
  123. DEFINE_RES_MEM(0x18300000, 0x1000),
  124. DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
  125. };
  126. #if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
  127. /*
  128. * When USB1 is Func
  129. */
  130. static int usbhsf_get_id(struct platform_device *pdev)
  131. {
  132. return USBHS_GADGET;
  133. }
  134. #define SUSPMODE 0x102
  135. static int usbhsf_power_ctrl(struct platform_device *pdev,
  136. void __iomem *base, int enable)
  137. {
  138. enable = !!enable;
  139. r8a7778_usb_phy_power(enable);
  140. iowrite16(enable << 14, base + SUSPMODE);
  141. return 0;
  142. }
  143. static struct resource usbhsf_resources[] __initdata = {
  144. DEFINE_RES_MEM(0xffe60000, 0x110),
  145. DEFINE_RES_IRQ(gic_iid(0x4f)),
  146. };
  147. static struct renesas_usbhs_platform_info usbhs_info __initdata = {
  148. .platform_callback = {
  149. .get_id = usbhsf_get_id,
  150. .power_ctrl = usbhsf_power_ctrl,
  151. },
  152. .driver_param = {
  153. .buswait_bwait = 4,
  154. .d0_tx_id = HPBDMA_SLAVE_USBFUNC_TX,
  155. .d1_rx_id = HPBDMA_SLAVE_USBFUNC_RX,
  156. },
  157. };
  158. #define USB_PHY_SETTING {.port1_func = 1, .ovc_pin[1].active_high = 1,}
  159. #define USB1_DEVICE "renesas_usbhs"
  160. #define ADD_USB_FUNC_DEVICE_IF_POSSIBLE() \
  161. platform_device_register_resndata( \
  162. NULL, "renesas_usbhs", -1, \
  163. usbhsf_resources, \
  164. ARRAY_SIZE(usbhsf_resources), \
  165. &usbhs_info, sizeof(struct renesas_usbhs_platform_info))
  166. #else
  167. /*
  168. * When USB1 is Host
  169. */
  170. #define USB_PHY_SETTING { }
  171. #define USB1_DEVICE "ehci-platform"
  172. #define ADD_USB_FUNC_DEVICE_IF_POSSIBLE()
  173. #endif
  174. /* USB */
  175. static struct resource usb_phy_resources[] __initdata = {
  176. DEFINE_RES_MEM(0xffe70800, 0x100),
  177. DEFINE_RES_MEM(0xffe76000, 0x100),
  178. };
  179. static struct rcar_phy_platform_data usb_phy_platform_data __initdata =
  180. USB_PHY_SETTING;
  181. /* SDHI */
  182. static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
  183. .dma_slave_tx = HPBDMA_SLAVE_SDHI0_TX,
  184. .dma_slave_rx = HPBDMA_SLAVE_SDHI0_RX,
  185. .tmio_caps = MMC_CAP_SD_HIGHSPEED,
  186. .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  187. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
  188. };
  189. static struct resource sdhi0_resources[] __initdata = {
  190. DEFINE_RES_MEM(0xFFE4C000, 0x100),
  191. DEFINE_RES_IRQ(gic_iid(0x77)),
  192. };
  193. /* Ether */
  194. static struct resource ether_resources[] __initdata = {
  195. DEFINE_RES_MEM(0xfde00000, 0x400),
  196. DEFINE_RES_IRQ(gic_iid(0x89)),
  197. };
  198. static struct sh_eth_plat_data ether_platform_data __initdata = {
  199. .phy = 0x01,
  200. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  201. .phy_interface = PHY_INTERFACE_MODE_RMII,
  202. /*
  203. * Although the LINK signal is available on the board, it's connected to
  204. * the link/activity LED output of the PHY, thus the link disappears and
  205. * reappears after each packet. We'd be better off ignoring such signal
  206. * and getting the link state from the PHY indirectly.
  207. */
  208. .no_ether_link = 1,
  209. };
  210. static struct platform_device_info ether_info __initdata = {
  211. .name = "r8a777x-ether",
  212. .id = -1,
  213. .res = ether_resources,
  214. .num_res = ARRAY_SIZE(ether_resources),
  215. .data = &ether_platform_data,
  216. .size_data = sizeof(ether_platform_data),
  217. .dma_mask = DMA_BIT_MASK(32),
  218. };
  219. /* I2C */
  220. static struct i2c_board_info i2c0_devices[] = {
  221. {
  222. I2C_BOARD_INFO("rx8581", 0x51),
  223. }, {
  224. I2C_BOARD_INFO("ak4643", 0x12),
  225. }
  226. };
  227. /* HSPI*/
  228. static struct mtd_partition m25p80_spi_flash_partitions[] = {
  229. {
  230. .name = "data(spi)",
  231. .size = 0x0100000,
  232. .offset = 0,
  233. },
  234. };
  235. static struct flash_platform_data spi_flash_data = {
  236. .name = "m25p80",
  237. .type = "s25fl008k",
  238. .parts = m25p80_spi_flash_partitions,
  239. .nr_parts = ARRAY_SIZE(m25p80_spi_flash_partitions),
  240. };
  241. static struct spi_board_info spi_board_info[] __initdata = {
  242. {
  243. .modalias = "m25p80",
  244. .max_speed_hz = 104000000,
  245. .chip_select = 0,
  246. .bus_num = 0,
  247. .mode = SPI_MODE_0,
  248. .platform_data = &spi_flash_data,
  249. },
  250. };
  251. /* MMC */
  252. static struct resource mmc_resources[] __initdata = {
  253. DEFINE_RES_MEM(0xffe4e000, 0x100),
  254. DEFINE_RES_IRQ(gic_iid(0x5d)),
  255. };
  256. static struct sh_mmcif_plat_data sh_mmcif_plat __initdata = {
  257. .sup_pclk = 0,
  258. .caps = MMC_CAP_4_BIT_DATA |
  259. MMC_CAP_8_BIT_DATA |
  260. MMC_CAP_NEEDS_POLL,
  261. };
  262. /* In the default configuration both decoders reside on I2C bus 0 */
  263. #define BOCKW_CAMERA(idx) \
  264. static struct i2c_board_info camera##idx##_info = { \
  265. I2C_BOARD_INFO("ml86v7667", 0x41 + 2 * (idx)), \
  266. }; \
  267. \
  268. static struct soc_camera_link iclink##idx##_ml86v7667 __initdata = { \
  269. .bus_id = idx, \
  270. .i2c_adapter_id = 0, \
  271. .board_info = &camera##idx##_info, \
  272. }
  273. BOCKW_CAMERA(0);
  274. BOCKW_CAMERA(1);
  275. /* VIN */
  276. static struct rcar_vin_platform_data vin_platform_data __initdata = {
  277. .flags = RCAR_VIN_BT656,
  278. };
  279. #define R8A7778_VIN(idx) \
  280. static struct resource vin##idx##_resources[] __initdata = { \
  281. DEFINE_RES_MEM(0xffc50000 + 0x1000 * (idx), 0x1000), \
  282. DEFINE_RES_IRQ(gic_iid(0x5a)), \
  283. }; \
  284. \
  285. static struct platform_device_info vin##idx##_info __initdata = { \
  286. .name = "r8a7778-vin", \
  287. .id = idx, \
  288. .res = vin##idx##_resources, \
  289. .num_res = ARRAY_SIZE(vin##idx##_resources), \
  290. .dma_mask = DMA_BIT_MASK(32), \
  291. .data = &vin_platform_data, \
  292. .size_data = sizeof(vin_platform_data), \
  293. }
  294. R8A7778_VIN(0);
  295. R8A7778_VIN(1);
  296. /* Sound */
  297. static struct resource rsnd_resources[] __initdata = {
  298. [RSND_GEN1_SRU] = DEFINE_RES_MEM(0xffd90000, 0x1000),
  299. [RSND_GEN1_SSI] = DEFINE_RES_MEM(0xffd91000, 0x1240),
  300. [RSND_GEN1_ADG] = DEFINE_RES_MEM(0xfffe0000, 0x24),
  301. };
  302. static struct rsnd_ssi_platform_info rsnd_ssi[] = {
  303. RSND_SSI_UNUSED, /* SSI 0 */
  304. RSND_SSI_UNUSED, /* SSI 1 */
  305. RSND_SSI_UNUSED, /* SSI 2 */
  306. RSND_SSI(HPBDMA_SLAVE_HPBIF3_TX, gic_iid(0x85), 0),
  307. RSND_SSI(HPBDMA_SLAVE_HPBIF4_RX, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE),
  308. RSND_SSI(HPBDMA_SLAVE_HPBIF5_TX, gic_iid(0x86), 0),
  309. RSND_SSI(HPBDMA_SLAVE_HPBIF6_RX, gic_iid(0x86), 0),
  310. RSND_SSI(HPBDMA_SLAVE_HPBIF7_TX, gic_iid(0x86), 0),
  311. RSND_SSI(HPBDMA_SLAVE_HPBIF8_RX, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE),
  312. };
  313. static struct rsnd_src_platform_info rsnd_src[9] = {
  314. RSND_SRC_UNUSED, /* SRU 0 */
  315. RSND_SRC_UNUSED, /* SRU 1 */
  316. RSND_SRC_UNUSED, /* SRU 2 */
  317. RSND_SRC(0, 0),
  318. RSND_SRC(0, 0),
  319. RSND_SRC(0, 0),
  320. RSND_SRC(0, 0),
  321. RSND_SRC(0, 0),
  322. RSND_SRC(0, 0),
  323. };
  324. static struct rsnd_dai_platform_info rsnd_dai[] = {
  325. {
  326. .playback = { .ssi = &rsnd_ssi[5], .src = &rsnd_src[5] },
  327. .capture = { .ssi = &rsnd_ssi[6], .src = &rsnd_src[6] },
  328. }, {
  329. .playback = { .ssi = &rsnd_ssi[3], .src = &rsnd_src[3] },
  330. }, {
  331. .capture = { .ssi = &rsnd_ssi[4], .src = &rsnd_src[4] },
  332. }, {
  333. .playback = { .ssi = &rsnd_ssi[7], .src = &rsnd_src[7] },
  334. }, {
  335. .capture = { .ssi = &rsnd_ssi[8], .src = &rsnd_src[8] },
  336. },
  337. };
  338. enum {
  339. AK4554_34 = 0,
  340. AK4643_56,
  341. AK4554_78,
  342. SOUND_MAX,
  343. };
  344. static int rsnd_codec_power(int id, int enable)
  345. {
  346. static int sound_user[SOUND_MAX] = {0, 0, 0};
  347. int *usr = NULL;
  348. u32 bit;
  349. switch (id) {
  350. case 3:
  351. case 4:
  352. usr = sound_user + AK4554_34;
  353. bit = (1 << 10);
  354. break;
  355. case 5:
  356. case 6:
  357. usr = sound_user + AK4643_56;
  358. bit = (1 << 6);
  359. break;
  360. case 7:
  361. case 8:
  362. usr = sound_user + AK4554_78;
  363. bit = (1 << 7);
  364. break;
  365. }
  366. if (!usr)
  367. return -EIO;
  368. if (enable) {
  369. if (*usr == 0) {
  370. u32 val = ioread16(fpga + COMCTLR);
  371. val &= ~bit;
  372. iowrite16(val, fpga + COMCTLR);
  373. }
  374. (*usr)++;
  375. } else {
  376. if (*usr == 0)
  377. return 0;
  378. (*usr)--;
  379. if (*usr == 0) {
  380. u32 val = ioread16(fpga + COMCTLR);
  381. val |= bit;
  382. iowrite16(val, fpga + COMCTLR);
  383. }
  384. }
  385. return 0;
  386. }
  387. static int rsnd_start(int id)
  388. {
  389. return rsnd_codec_power(id, 1);
  390. }
  391. static int rsnd_stop(int id)
  392. {
  393. return rsnd_codec_power(id, 0);
  394. }
  395. static struct rcar_snd_info rsnd_info = {
  396. .flags = RSND_GEN1,
  397. .ssi_info = rsnd_ssi,
  398. .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
  399. .src_info = rsnd_src,
  400. .src_info_nr = ARRAY_SIZE(rsnd_src),
  401. .dai_info = rsnd_dai,
  402. .dai_info_nr = ARRAY_SIZE(rsnd_dai),
  403. .start = rsnd_start,
  404. .stop = rsnd_stop,
  405. };
  406. static struct asoc_simple_card_info rsnd_card_info[] = {
  407. /* SSI5, SSI6 */
  408. {
  409. .name = "AK4643",
  410. .card = "SSI56-AK4643",
  411. .codec = "ak4642-codec.0-0012",
  412. .platform = "rcar_sound",
  413. .daifmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM,
  414. .cpu_dai = {
  415. .name = "rsnd-dai.0",
  416. },
  417. .codec_dai = {
  418. .name = "ak4642-hifi",
  419. .sysclk = 11289600,
  420. },
  421. },
  422. /* SSI3 */
  423. {
  424. .name = "AK4554",
  425. .card = "SSI3-AK4554(playback)",
  426. .codec = "ak4554-adc-dac.0",
  427. .platform = "rcar_sound",
  428. .daifmt = SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_RIGHT_J,
  429. .cpu_dai = {
  430. .name = "rsnd-dai.1",
  431. },
  432. .codec_dai = {
  433. .name = "ak4554-hifi",
  434. },
  435. },
  436. /* SSI4 */
  437. {
  438. .name = "AK4554",
  439. .card = "SSI4-AK4554(capture)",
  440. .codec = "ak4554-adc-dac.0",
  441. .platform = "rcar_sound",
  442. .daifmt = SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_LEFT_J,
  443. .cpu_dai = {
  444. .name = "rsnd-dai.2",
  445. },
  446. .codec_dai = {
  447. .name = "ak4554-hifi",
  448. },
  449. },
  450. /* SSI7 */
  451. {
  452. .name = "AK4554",
  453. .card = "SSI7-AK4554(playback)",
  454. .codec = "ak4554-adc-dac.1",
  455. .platform = "rcar_sound",
  456. .daifmt = SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_RIGHT_J,
  457. .cpu_dai = {
  458. .name = "rsnd-dai.3",
  459. },
  460. .codec_dai = {
  461. .name = "ak4554-hifi",
  462. },
  463. },
  464. /* SSI8 */
  465. {
  466. .name = "AK4554",
  467. .card = "SSI8-AK4554(capture)",
  468. .codec = "ak4554-adc-dac.1",
  469. .platform = "rcar_sound",
  470. .daifmt = SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_LEFT_J,
  471. .cpu_dai = {
  472. .name = "rsnd-dai.4",
  473. },
  474. .codec_dai = {
  475. .name = "ak4554-hifi",
  476. },
  477. }
  478. };
  479. static const struct pinctrl_map bockw_pinctrl_map[] = {
  480. /* AUDIO */
  481. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  482. "audio_clk_a", "audio_clk"),
  483. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  484. "audio_clk_b", "audio_clk"),
  485. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  486. "ssi34_ctrl", "ssi"),
  487. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  488. "ssi3_data", "ssi"),
  489. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  490. "ssi4_data", "ssi"),
  491. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  492. "ssi5_ctrl", "ssi"),
  493. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  494. "ssi5_data", "ssi"),
  495. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  496. "ssi6_ctrl", "ssi"),
  497. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  498. "ssi6_data", "ssi"),
  499. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  500. "ssi78_ctrl", "ssi"),
  501. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  502. "ssi7_data", "ssi"),
  503. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  504. "ssi8_data", "ssi"),
  505. /* Ether */
  506. PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
  507. "ether_rmii", "ether"),
  508. /* HSPI0 */
  509. PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778",
  510. "hspi0_a", "hspi0"),
  511. /* MMC */
  512. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
  513. "mmc_data8", "mmc"),
  514. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
  515. "mmc_ctrl", "mmc"),
  516. /* SCIF0 */
  517. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
  518. "scif0_data_a", "scif0"),
  519. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
  520. "scif0_ctrl", "scif0"),
  521. /* USB */
  522. PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
  523. "usb0", "usb0"),
  524. PIN_MAP_MUX_GROUP_DEFAULT(USB1_DEVICE, "pfc-r8a7778",
  525. "usb1", "usb1"),
  526. /* SDHI0 */
  527. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  528. "sdhi0_data4", "sdhi0"),
  529. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  530. "sdhi0_ctrl", "sdhi0"),
  531. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  532. "sdhi0_cd", "sdhi0"),
  533. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  534. "sdhi0_wp", "sdhi0"),
  535. /* VIN0 */
  536. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
  537. "vin0_clk", "vin0"),
  538. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
  539. "vin0_data8", "vin0"),
  540. /* VIN1 */
  541. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
  542. "vin1_clk", "vin1"),
  543. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
  544. "vin1_data8", "vin1"),
  545. };
  546. #define PFC 0xfffc0000
  547. #define PUPR4 0x110
  548. static void __init bockw_init(void)
  549. {
  550. void __iomem *base;
  551. struct clk *clk;
  552. struct platform_device *pdev;
  553. int i;
  554. r8a7778_clock_init();
  555. r8a7778_init_irq_extpin(1);
  556. r8a7778_add_standard_devices();
  557. platform_device_register_full(&ether_info);
  558. platform_device_register_full(&vin0_info);
  559. /* VIN1 has a pin conflict with Ether */
  560. if (!IS_ENABLED(CONFIG_SH_ETH))
  561. platform_device_register_full(&vin1_info);
  562. platform_device_register_data(NULL, "soc-camera-pdrv", 0,
  563. &iclink0_ml86v7667,
  564. sizeof(iclink0_ml86v7667));
  565. platform_device_register_data(NULL, "soc-camera-pdrv", 1,
  566. &iclink1_ml86v7667,
  567. sizeof(iclink1_ml86v7667));
  568. i2c_register_board_info(0, i2c0_devices,
  569. ARRAY_SIZE(i2c0_devices));
  570. spi_register_board_info(spi_board_info,
  571. ARRAY_SIZE(spi_board_info));
  572. pinctrl_register_mappings(bockw_pinctrl_map,
  573. ARRAY_SIZE(bockw_pinctrl_map));
  574. r8a7778_pinmux_init();
  575. platform_device_register_resndata(
  576. NULL, "sh_mmcif", -1,
  577. mmc_resources, ARRAY_SIZE(mmc_resources),
  578. &sh_mmcif_plat, sizeof(struct sh_mmcif_plat_data));
  579. platform_device_register_resndata(
  580. NULL, "rcar_usb_phy", -1,
  581. usb_phy_resources,
  582. ARRAY_SIZE(usb_phy_resources),
  583. &usb_phy_platform_data,
  584. sizeof(struct rcar_phy_platform_data));
  585. regulator_register_fixed(0, dummy_supplies,
  586. ARRAY_SIZE(dummy_supplies));
  587. regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
  588. ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
  589. /* for SMSC */
  590. fpga = ioremap_nocache(FPGA, SZ_1M);
  591. if (fpga) {
  592. /*
  593. * CAUTION
  594. *
  595. * IRQ0/1 is cascaded interrupt from FPGA.
  596. * it should be cared in the future
  597. * Now, it is assuming IRQ0 was used only from SMSC.
  598. */
  599. u16 val = ioread16(fpga + IRQ0MR);
  600. val &= ~(1 << 4); /* enable SMSC911x */
  601. iowrite16(val, fpga + IRQ0MR);
  602. platform_device_register_resndata(
  603. NULL, "smsc911x", -1,
  604. smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
  605. &smsc911x_data, sizeof(smsc911x_data));
  606. }
  607. /* for SDHI */
  608. base = ioremap_nocache(PFC, 0x200);
  609. if (base) {
  610. /*
  611. * FIXME
  612. *
  613. * SDHI CD/WP pin needs pull-up
  614. */
  615. iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
  616. iounmap(base);
  617. platform_device_register_resndata(
  618. NULL, "sh_mobile_sdhi", 0,
  619. sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
  620. &sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
  621. }
  622. /* for Audio */
  623. rsnd_codec_power(5, 1); /* enable ak4642 */
  624. platform_device_register_simple(
  625. "ak4554-adc-dac", 0, NULL, 0);
  626. platform_device_register_simple(
  627. "ak4554-adc-dac", 1, NULL, 0);
  628. pdev = platform_device_register_resndata(
  629. NULL, "rcar_sound", -1,
  630. rsnd_resources, ARRAY_SIZE(rsnd_resources),
  631. &rsnd_info, sizeof(rsnd_info));
  632. clk = clk_get(&pdev->dev, "clk_b");
  633. clk_set_rate(clk, 24576000);
  634. clk_put(clk);
  635. for (i = 0; i < ARRAY_SIZE(rsnd_card_info); i++) {
  636. struct platform_device_info cardinfo = {
  637. .name = "asoc-simple-card",
  638. .id = i,
  639. .data = &rsnd_card_info[i],
  640. .size_data = sizeof(struct asoc_simple_card_info),
  641. .dma_mask = DMA_BIT_MASK(32),
  642. };
  643. platform_device_register_full(&cardinfo);
  644. }
  645. }
  646. static void __init bockw_init_late(void)
  647. {
  648. r8a7778_init_late();
  649. ADD_USB_FUNC_DEVICE_IF_POSSIBLE();
  650. }
  651. static const char *bockw_boards_compat_dt[] __initdata = {
  652. "renesas,bockw",
  653. NULL,
  654. };
  655. DT_MACHINE_START(BOCKW_DT, "bockw")
  656. .init_early = r8a7778_init_delay,
  657. .init_irq = r8a7778_init_irq_dt,
  658. .init_machine = bockw_init,
  659. .dt_compat = bockw_boards_compat_dt,
  660. .init_late = bockw_init_late,
  661. MACHINE_END