cipher.c 136 KB

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  1. /*
  2. * Copyright 2016 Broadcom
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License, version 2, as
  6. * published by the Free Software Foundation (the "GPL").
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License version 2 (GPLv2) for more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * version 2 (GPLv2) along with this source code.
  15. */
  16. #include <linux/err.h>
  17. #include <linux/module.h>
  18. #include <linux/init.h>
  19. #include <linux/errno.h>
  20. #include <linux/kernel.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/scatterlist.h>
  24. #include <linux/crypto.h>
  25. #include <linux/kthread.h>
  26. #include <linux/rtnetlink.h>
  27. #include <linux/sched.h>
  28. #include <linux/of_address.h>
  29. #include <linux/of_device.h>
  30. #include <linux/io.h>
  31. #include <linux/bitops.h>
  32. #include <crypto/algapi.h>
  33. #include <crypto/aead.h>
  34. #include <crypto/internal/aead.h>
  35. #include <crypto/aes.h>
  36. #include <crypto/des.h>
  37. #include <crypto/hmac.h>
  38. #include <crypto/sha.h>
  39. #include <crypto/md5.h>
  40. #include <crypto/authenc.h>
  41. #include <crypto/skcipher.h>
  42. #include <crypto/hash.h>
  43. #include <crypto/aes.h>
  44. #include <crypto/sha3.h>
  45. #include "util.h"
  46. #include "cipher.h"
  47. #include "spu.h"
  48. #include "spum.h"
  49. #include "spu2.h"
  50. /* ================= Device Structure ================== */
  51. struct device_private iproc_priv;
  52. /* ==================== Parameters ===================== */
  53. int flow_debug_logging;
  54. module_param(flow_debug_logging, int, 0644);
  55. MODULE_PARM_DESC(flow_debug_logging, "Enable Flow Debug Logging");
  56. int packet_debug_logging;
  57. module_param(packet_debug_logging, int, 0644);
  58. MODULE_PARM_DESC(packet_debug_logging, "Enable Packet Debug Logging");
  59. int debug_logging_sleep;
  60. module_param(debug_logging_sleep, int, 0644);
  61. MODULE_PARM_DESC(debug_logging_sleep, "Packet Debug Logging Sleep");
  62. /*
  63. * The value of these module parameters is used to set the priority for each
  64. * algo type when this driver registers algos with the kernel crypto API.
  65. * To use a priority other than the default, set the priority in the insmod or
  66. * modprobe. Changing the module priority after init time has no effect.
  67. *
  68. * The default priorities are chosen to be lower (less preferred) than ARMv8 CE
  69. * algos, but more preferred than generic software algos.
  70. */
  71. static int cipher_pri = 150;
  72. module_param(cipher_pri, int, 0644);
  73. MODULE_PARM_DESC(cipher_pri, "Priority for cipher algos");
  74. static int hash_pri = 100;
  75. module_param(hash_pri, int, 0644);
  76. MODULE_PARM_DESC(hash_pri, "Priority for hash algos");
  77. static int aead_pri = 150;
  78. module_param(aead_pri, int, 0644);
  79. MODULE_PARM_DESC(aead_pri, "Priority for AEAD algos");
  80. #define MAX_SPUS 16
  81. /* A type 3 BCM header, expected to precede the SPU header for SPU-M.
  82. * Bits 3 and 4 in the first byte encode the channel number (the dma ringset).
  83. * 0x60 - ring 0
  84. * 0x68 - ring 1
  85. * 0x70 - ring 2
  86. * 0x78 - ring 3
  87. */
  88. char BCMHEADER[] = { 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28 };
  89. /*
  90. * Some SPU hw does not use BCM header on SPU messages. So BCM_HDR_LEN
  91. * is set dynamically after reading SPU type from device tree.
  92. */
  93. #define BCM_HDR_LEN iproc_priv.bcm_hdr_len
  94. /* min and max time to sleep before retrying when mbox queue is full. usec */
  95. #define MBOX_SLEEP_MIN 800
  96. #define MBOX_SLEEP_MAX 1000
  97. /**
  98. * select_channel() - Select a SPU channel to handle a crypto request. Selects
  99. * channel in round robin order.
  100. *
  101. * Return: channel index
  102. */
  103. static u8 select_channel(void)
  104. {
  105. u8 chan_idx = atomic_inc_return(&iproc_priv.next_chan);
  106. return chan_idx % iproc_priv.spu.num_spu;
  107. }
  108. /**
  109. * spu_ablkcipher_rx_sg_create() - Build up the scatterlist of buffers used to
  110. * receive a SPU response message for an ablkcipher request. Includes buffers to
  111. * catch SPU message headers and the response data.
  112. * @mssg: mailbox message containing the receive sg
  113. * @rctx: crypto request context
  114. * @rx_frag_num: number of scatterlist elements required to hold the
  115. * SPU response message
  116. * @chunksize: Number of bytes of response data expected
  117. * @stat_pad_len: Number of bytes required to pad the STAT field to
  118. * a 4-byte boundary
  119. *
  120. * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
  121. * when the request completes, whether the request is handled successfully or
  122. * there is an error.
  123. *
  124. * Returns:
  125. * 0 if successful
  126. * < 0 if an error
  127. */
  128. static int
  129. spu_ablkcipher_rx_sg_create(struct brcm_message *mssg,
  130. struct iproc_reqctx_s *rctx,
  131. u8 rx_frag_num,
  132. unsigned int chunksize, u32 stat_pad_len)
  133. {
  134. struct spu_hw *spu = &iproc_priv.spu;
  135. struct scatterlist *sg; /* used to build sgs in mbox message */
  136. struct iproc_ctx_s *ctx = rctx->ctx;
  137. u32 datalen; /* Number of bytes of response data expected */
  138. mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
  139. rctx->gfp);
  140. if (!mssg->spu.dst)
  141. return -ENOMEM;
  142. sg = mssg->spu.dst;
  143. sg_init_table(sg, rx_frag_num);
  144. /* Space for SPU message header */
  145. sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len);
  146. /* If XTS tweak in payload, add buffer to receive encrypted tweak */
  147. if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
  148. spu->spu_xts_tweak_in_payload())
  149. sg_set_buf(sg++, rctx->msg_buf.c.supdt_tweak,
  150. SPU_XTS_TWEAK_SIZE);
  151. /* Copy in each dst sg entry from request, up to chunksize */
  152. datalen = spu_msg_sg_add(&sg, &rctx->dst_sg, &rctx->dst_skip,
  153. rctx->dst_nents, chunksize);
  154. if (datalen < chunksize) {
  155. pr_err("%s(): failed to copy dst sg to mbox msg. chunksize %u, datalen %u",
  156. __func__, chunksize, datalen);
  157. return -EFAULT;
  158. }
  159. if (ctx->cipher.alg == CIPHER_ALG_RC4)
  160. /* Add buffer to catch 260-byte SUPDT field for RC4 */
  161. sg_set_buf(sg++, rctx->msg_buf.c.supdt_tweak, SPU_SUPDT_LEN);
  162. if (stat_pad_len)
  163. sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len);
  164. memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN);
  165. sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
  166. return 0;
  167. }
  168. /**
  169. * spu_ablkcipher_tx_sg_create() - Build up the scatterlist of buffers used to
  170. * send a SPU request message for an ablkcipher request. Includes SPU message
  171. * headers and the request data.
  172. * @mssg: mailbox message containing the transmit sg
  173. * @rctx: crypto request context
  174. * @tx_frag_num: number of scatterlist elements required to construct the
  175. * SPU request message
  176. * @chunksize: Number of bytes of request data
  177. * @pad_len: Number of pad bytes
  178. *
  179. * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
  180. * when the request completes, whether the request is handled successfully or
  181. * there is an error.
  182. *
  183. * Returns:
  184. * 0 if successful
  185. * < 0 if an error
  186. */
  187. static int
  188. spu_ablkcipher_tx_sg_create(struct brcm_message *mssg,
  189. struct iproc_reqctx_s *rctx,
  190. u8 tx_frag_num, unsigned int chunksize, u32 pad_len)
  191. {
  192. struct spu_hw *spu = &iproc_priv.spu;
  193. struct scatterlist *sg; /* used to build sgs in mbox message */
  194. struct iproc_ctx_s *ctx = rctx->ctx;
  195. u32 datalen; /* Number of bytes of response data expected */
  196. u32 stat_len;
  197. mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
  198. rctx->gfp);
  199. if (unlikely(!mssg->spu.src))
  200. return -ENOMEM;
  201. sg = mssg->spu.src;
  202. sg_init_table(sg, tx_frag_num);
  203. sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr,
  204. BCM_HDR_LEN + ctx->spu_req_hdr_len);
  205. /* if XTS tweak in payload, copy from IV (where crypto API puts it) */
  206. if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
  207. spu->spu_xts_tweak_in_payload())
  208. sg_set_buf(sg++, rctx->msg_buf.iv_ctr, SPU_XTS_TWEAK_SIZE);
  209. /* Copy in each src sg entry from request, up to chunksize */
  210. datalen = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip,
  211. rctx->src_nents, chunksize);
  212. if (unlikely(datalen < chunksize)) {
  213. pr_err("%s(): failed to copy src sg to mbox msg",
  214. __func__);
  215. return -EFAULT;
  216. }
  217. if (pad_len)
  218. sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len);
  219. stat_len = spu->spu_tx_status_len();
  220. if (stat_len) {
  221. memset(rctx->msg_buf.tx_stat, 0, stat_len);
  222. sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len);
  223. }
  224. return 0;
  225. }
  226. /**
  227. * handle_ablkcipher_req() - Submit as much of a block cipher request as fits in
  228. * a single SPU request message, starting at the current position in the request
  229. * data.
  230. * @rctx: Crypto request context
  231. *
  232. * This may be called on the crypto API thread, or, when a request is so large
  233. * it must be broken into multiple SPU messages, on the thread used to invoke
  234. * the response callback. When requests are broken into multiple SPU
  235. * messages, we assume subsequent messages depend on previous results, and
  236. * thus always wait for previous results before submitting the next message.
  237. * Because requests are submitted in lock step like this, there is no need
  238. * to synchronize access to request data structures.
  239. *
  240. * Return: -EINPROGRESS: request has been accepted and result will be returned
  241. * asynchronously
  242. * Any other value indicates an error
  243. */
  244. static int handle_ablkcipher_req(struct iproc_reqctx_s *rctx)
  245. {
  246. struct spu_hw *spu = &iproc_priv.spu;
  247. struct crypto_async_request *areq = rctx->parent;
  248. struct ablkcipher_request *req =
  249. container_of(areq, struct ablkcipher_request, base);
  250. struct iproc_ctx_s *ctx = rctx->ctx;
  251. struct spu_cipher_parms cipher_parms;
  252. int err = 0;
  253. unsigned int chunksize = 0; /* Num bytes of request to submit */
  254. int remaining = 0; /* Bytes of request still to process */
  255. int chunk_start; /* Beginning of data for current SPU msg */
  256. /* IV or ctr value to use in this SPU msg */
  257. u8 local_iv_ctr[MAX_IV_SIZE];
  258. u32 stat_pad_len; /* num bytes to align status field */
  259. u32 pad_len; /* total length of all padding */
  260. bool update_key = false;
  261. struct brcm_message *mssg; /* mailbox message */
  262. int retry_cnt = 0;
  263. /* number of entries in src and dst sg in mailbox message. */
  264. u8 rx_frag_num = 2; /* response header and STATUS */
  265. u8 tx_frag_num = 1; /* request header */
  266. flow_log("%s\n", __func__);
  267. cipher_parms.alg = ctx->cipher.alg;
  268. cipher_parms.mode = ctx->cipher.mode;
  269. cipher_parms.type = ctx->cipher_type;
  270. cipher_parms.key_len = ctx->enckeylen;
  271. cipher_parms.key_buf = ctx->enckey;
  272. cipher_parms.iv_buf = local_iv_ctr;
  273. cipher_parms.iv_len = rctx->iv_ctr_len;
  274. mssg = &rctx->mb_mssg;
  275. chunk_start = rctx->src_sent;
  276. remaining = rctx->total_todo - chunk_start;
  277. /* determine the chunk we are breaking off and update the indexes */
  278. if ((ctx->max_payload != SPU_MAX_PAYLOAD_INF) &&
  279. (remaining > ctx->max_payload))
  280. chunksize = ctx->max_payload;
  281. else
  282. chunksize = remaining;
  283. rctx->src_sent += chunksize;
  284. rctx->total_sent = rctx->src_sent;
  285. /* Count number of sg entries to be included in this request */
  286. rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip, chunksize);
  287. rctx->dst_nents = spu_sg_count(rctx->dst_sg, rctx->dst_skip, chunksize);
  288. if ((ctx->cipher.mode == CIPHER_MODE_CBC) &&
  289. rctx->is_encrypt && chunk_start)
  290. /*
  291. * Encrypting non-first first chunk. Copy last block of
  292. * previous result to IV for this chunk.
  293. */
  294. sg_copy_part_to_buf(req->dst, rctx->msg_buf.iv_ctr,
  295. rctx->iv_ctr_len,
  296. chunk_start - rctx->iv_ctr_len);
  297. if (rctx->iv_ctr_len) {
  298. /* get our local copy of the iv */
  299. __builtin_memcpy(local_iv_ctr, rctx->msg_buf.iv_ctr,
  300. rctx->iv_ctr_len);
  301. /* generate the next IV if possible */
  302. if ((ctx->cipher.mode == CIPHER_MODE_CBC) &&
  303. !rctx->is_encrypt) {
  304. /*
  305. * CBC Decrypt: next IV is the last ciphertext block in
  306. * this chunk
  307. */
  308. sg_copy_part_to_buf(req->src, rctx->msg_buf.iv_ctr,
  309. rctx->iv_ctr_len,
  310. rctx->src_sent - rctx->iv_ctr_len);
  311. } else if (ctx->cipher.mode == CIPHER_MODE_CTR) {
  312. /*
  313. * The SPU hardware increments the counter once for
  314. * each AES block of 16 bytes. So update the counter
  315. * for the next chunk, if there is one. Note that for
  316. * this chunk, the counter has already been copied to
  317. * local_iv_ctr. We can assume a block size of 16,
  318. * because we only support CTR mode for AES, not for
  319. * any other cipher alg.
  320. */
  321. add_to_ctr(rctx->msg_buf.iv_ctr, chunksize >> 4);
  322. }
  323. }
  324. if (ctx->cipher.alg == CIPHER_ALG_RC4) {
  325. rx_frag_num++;
  326. if (chunk_start) {
  327. /*
  328. * for non-first RC4 chunks, use SUPDT from previous
  329. * response as key for this chunk.
  330. */
  331. cipher_parms.key_buf = rctx->msg_buf.c.supdt_tweak;
  332. update_key = true;
  333. cipher_parms.type = CIPHER_TYPE_UPDT;
  334. } else if (!rctx->is_encrypt) {
  335. /*
  336. * First RC4 chunk. For decrypt, key in pre-built msg
  337. * header may have been changed if encrypt required
  338. * multiple chunks. So revert the key to the
  339. * ctx->enckey value.
  340. */
  341. update_key = true;
  342. cipher_parms.type = CIPHER_TYPE_INIT;
  343. }
  344. }
  345. if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
  346. flow_log("max_payload infinite\n");
  347. else
  348. flow_log("max_payload %u\n", ctx->max_payload);
  349. flow_log("sent:%u start:%u remains:%u size:%u\n",
  350. rctx->src_sent, chunk_start, remaining, chunksize);
  351. /* Copy SPU header template created at setkey time */
  352. memcpy(rctx->msg_buf.bcm_spu_req_hdr, ctx->bcm_spu_req_hdr,
  353. sizeof(rctx->msg_buf.bcm_spu_req_hdr));
  354. /*
  355. * Pass SUPDT field as key. Key field in finish() call is only used
  356. * when update_key has been set above for RC4. Will be ignored in
  357. * all other cases.
  358. */
  359. spu->spu_cipher_req_finish(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
  360. ctx->spu_req_hdr_len, !(rctx->is_encrypt),
  361. &cipher_parms, update_key, chunksize);
  362. atomic64_add(chunksize, &iproc_priv.bytes_out);
  363. stat_pad_len = spu->spu_wordalign_padlen(chunksize);
  364. if (stat_pad_len)
  365. rx_frag_num++;
  366. pad_len = stat_pad_len;
  367. if (pad_len) {
  368. tx_frag_num++;
  369. spu->spu_request_pad(rctx->msg_buf.spu_req_pad, 0,
  370. 0, ctx->auth.alg, ctx->auth.mode,
  371. rctx->total_sent, stat_pad_len);
  372. }
  373. spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
  374. ctx->spu_req_hdr_len);
  375. packet_log("payload:\n");
  376. dump_sg(rctx->src_sg, rctx->src_skip, chunksize);
  377. packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len);
  378. /*
  379. * Build mailbox message containing SPU request msg and rx buffers
  380. * to catch response message
  381. */
  382. memset(mssg, 0, sizeof(*mssg));
  383. mssg->type = BRCM_MESSAGE_SPU;
  384. mssg->ctx = rctx; /* Will be returned in response */
  385. /* Create rx scatterlist to catch result */
  386. rx_frag_num += rctx->dst_nents;
  387. if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
  388. spu->spu_xts_tweak_in_payload())
  389. rx_frag_num++; /* extra sg to insert tweak */
  390. err = spu_ablkcipher_rx_sg_create(mssg, rctx, rx_frag_num, chunksize,
  391. stat_pad_len);
  392. if (err)
  393. return err;
  394. /* Create tx scatterlist containing SPU request message */
  395. tx_frag_num += rctx->src_nents;
  396. if (spu->spu_tx_status_len())
  397. tx_frag_num++;
  398. if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
  399. spu->spu_xts_tweak_in_payload())
  400. tx_frag_num++; /* extra sg to insert tweak */
  401. err = spu_ablkcipher_tx_sg_create(mssg, rctx, tx_frag_num, chunksize,
  402. pad_len);
  403. if (err)
  404. return err;
  405. err = mbox_send_message(iproc_priv.mbox[rctx->chan_idx], mssg);
  406. if (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) {
  407. while ((err == -ENOBUFS) && (retry_cnt < SPU_MB_RETRY_MAX)) {
  408. /*
  409. * Mailbox queue is full. Since MAY_SLEEP is set, assume
  410. * not in atomic context and we can wait and try again.
  411. */
  412. retry_cnt++;
  413. usleep_range(MBOX_SLEEP_MIN, MBOX_SLEEP_MAX);
  414. err = mbox_send_message(iproc_priv.mbox[rctx->chan_idx],
  415. mssg);
  416. atomic_inc(&iproc_priv.mb_no_spc);
  417. }
  418. }
  419. if (unlikely(err < 0)) {
  420. atomic_inc(&iproc_priv.mb_send_fail);
  421. return err;
  422. }
  423. return -EINPROGRESS;
  424. }
  425. /**
  426. * handle_ablkcipher_resp() - Process a block cipher SPU response. Updates the
  427. * total received count for the request and updates global stats.
  428. * @rctx: Crypto request context
  429. */
  430. static void handle_ablkcipher_resp(struct iproc_reqctx_s *rctx)
  431. {
  432. struct spu_hw *spu = &iproc_priv.spu;
  433. #ifdef DEBUG
  434. struct crypto_async_request *areq = rctx->parent;
  435. struct ablkcipher_request *req = ablkcipher_request_cast(areq);
  436. #endif
  437. struct iproc_ctx_s *ctx = rctx->ctx;
  438. u32 payload_len;
  439. /* See how much data was returned */
  440. payload_len = spu->spu_payload_length(rctx->msg_buf.spu_resp_hdr);
  441. /*
  442. * In XTS mode, the first SPU_XTS_TWEAK_SIZE bytes may be the
  443. * encrypted tweak ("i") value; we don't count those.
  444. */
  445. if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
  446. spu->spu_xts_tweak_in_payload() &&
  447. (payload_len >= SPU_XTS_TWEAK_SIZE))
  448. payload_len -= SPU_XTS_TWEAK_SIZE;
  449. atomic64_add(payload_len, &iproc_priv.bytes_in);
  450. flow_log("%s() offset: %u, bd_len: %u BD:\n",
  451. __func__, rctx->total_received, payload_len);
  452. dump_sg(req->dst, rctx->total_received, payload_len);
  453. if (ctx->cipher.alg == CIPHER_ALG_RC4)
  454. packet_dump(" supdt ", rctx->msg_buf.c.supdt_tweak,
  455. SPU_SUPDT_LEN);
  456. rctx->total_received += payload_len;
  457. if (rctx->total_received == rctx->total_todo) {
  458. atomic_inc(&iproc_priv.op_counts[SPU_OP_CIPHER]);
  459. atomic_inc(
  460. &iproc_priv.cipher_cnt[ctx->cipher.alg][ctx->cipher.mode]);
  461. }
  462. }
  463. /**
  464. * spu_ahash_rx_sg_create() - Build up the scatterlist of buffers used to
  465. * receive a SPU response message for an ahash request.
  466. * @mssg: mailbox message containing the receive sg
  467. * @rctx: crypto request context
  468. * @rx_frag_num: number of scatterlist elements required to hold the
  469. * SPU response message
  470. * @digestsize: length of hash digest, in bytes
  471. * @stat_pad_len: Number of bytes required to pad the STAT field to
  472. * a 4-byte boundary
  473. *
  474. * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
  475. * when the request completes, whether the request is handled successfully or
  476. * there is an error.
  477. *
  478. * Return:
  479. * 0 if successful
  480. * < 0 if an error
  481. */
  482. static int
  483. spu_ahash_rx_sg_create(struct brcm_message *mssg,
  484. struct iproc_reqctx_s *rctx,
  485. u8 rx_frag_num, unsigned int digestsize,
  486. u32 stat_pad_len)
  487. {
  488. struct spu_hw *spu = &iproc_priv.spu;
  489. struct scatterlist *sg; /* used to build sgs in mbox message */
  490. struct iproc_ctx_s *ctx = rctx->ctx;
  491. mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
  492. rctx->gfp);
  493. if (!mssg->spu.dst)
  494. return -ENOMEM;
  495. sg = mssg->spu.dst;
  496. sg_init_table(sg, rx_frag_num);
  497. /* Space for SPU message header */
  498. sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len);
  499. /* Space for digest */
  500. sg_set_buf(sg++, rctx->msg_buf.digest, digestsize);
  501. if (stat_pad_len)
  502. sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len);
  503. memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN);
  504. sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
  505. return 0;
  506. }
  507. /**
  508. * spu_ahash_tx_sg_create() - Build up the scatterlist of buffers used to send
  509. * a SPU request message for an ahash request. Includes SPU message headers and
  510. * the request data.
  511. * @mssg: mailbox message containing the transmit sg
  512. * @rctx: crypto request context
  513. * @tx_frag_num: number of scatterlist elements required to construct the
  514. * SPU request message
  515. * @spu_hdr_len: length in bytes of SPU message header
  516. * @hash_carry_len: Number of bytes of data carried over from previous req
  517. * @new_data_len: Number of bytes of new request data
  518. * @pad_len: Number of pad bytes
  519. *
  520. * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
  521. * when the request completes, whether the request is handled successfully or
  522. * there is an error.
  523. *
  524. * Return:
  525. * 0 if successful
  526. * < 0 if an error
  527. */
  528. static int
  529. spu_ahash_tx_sg_create(struct brcm_message *mssg,
  530. struct iproc_reqctx_s *rctx,
  531. u8 tx_frag_num,
  532. u32 spu_hdr_len,
  533. unsigned int hash_carry_len,
  534. unsigned int new_data_len, u32 pad_len)
  535. {
  536. struct spu_hw *spu = &iproc_priv.spu;
  537. struct scatterlist *sg; /* used to build sgs in mbox message */
  538. u32 datalen; /* Number of bytes of response data expected */
  539. u32 stat_len;
  540. mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
  541. rctx->gfp);
  542. if (!mssg->spu.src)
  543. return -ENOMEM;
  544. sg = mssg->spu.src;
  545. sg_init_table(sg, tx_frag_num);
  546. sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr,
  547. BCM_HDR_LEN + spu_hdr_len);
  548. if (hash_carry_len)
  549. sg_set_buf(sg++, rctx->hash_carry, hash_carry_len);
  550. if (new_data_len) {
  551. /* Copy in each src sg entry from request, up to chunksize */
  552. datalen = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip,
  553. rctx->src_nents, new_data_len);
  554. if (datalen < new_data_len) {
  555. pr_err("%s(): failed to copy src sg to mbox msg",
  556. __func__);
  557. return -EFAULT;
  558. }
  559. }
  560. if (pad_len)
  561. sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len);
  562. stat_len = spu->spu_tx_status_len();
  563. if (stat_len) {
  564. memset(rctx->msg_buf.tx_stat, 0, stat_len);
  565. sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len);
  566. }
  567. return 0;
  568. }
  569. /**
  570. * handle_ahash_req() - Process an asynchronous hash request from the crypto
  571. * API.
  572. * @rctx: Crypto request context
  573. *
  574. * Builds a SPU request message embedded in a mailbox message and submits the
  575. * mailbox message on a selected mailbox channel. The SPU request message is
  576. * constructed as a scatterlist, including entries from the crypto API's
  577. * src scatterlist to avoid copying the data to be hashed. This function is
  578. * called either on the thread from the crypto API, or, in the case that the
  579. * crypto API request is too large to fit in a single SPU request message,
  580. * on the thread that invokes the receive callback with a response message.
  581. * Because some operations require the response from one chunk before the next
  582. * chunk can be submitted, we always wait for the response for the previous
  583. * chunk before submitting the next chunk. Because requests are submitted in
  584. * lock step like this, there is no need to synchronize access to request data
  585. * structures.
  586. *
  587. * Return:
  588. * -EINPROGRESS: request has been submitted to SPU and response will be
  589. * returned asynchronously
  590. * -EAGAIN: non-final request included a small amount of data, which for
  591. * efficiency we did not submit to the SPU, but instead stored
  592. * to be submitted to the SPU with the next part of the request
  593. * other: an error code
  594. */
  595. static int handle_ahash_req(struct iproc_reqctx_s *rctx)
  596. {
  597. struct spu_hw *spu = &iproc_priv.spu;
  598. struct crypto_async_request *areq = rctx->parent;
  599. struct ahash_request *req = ahash_request_cast(areq);
  600. struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
  601. struct crypto_tfm *tfm = crypto_ahash_tfm(ahash);
  602. unsigned int blocksize = crypto_tfm_alg_blocksize(tfm);
  603. struct iproc_ctx_s *ctx = rctx->ctx;
  604. /* number of bytes still to be hashed in this req */
  605. unsigned int nbytes_to_hash = 0;
  606. int err = 0;
  607. unsigned int chunksize = 0; /* length of hash carry + new data */
  608. /*
  609. * length of new data, not from hash carry, to be submitted in
  610. * this hw request
  611. */
  612. unsigned int new_data_len;
  613. unsigned int chunk_start = 0;
  614. u32 db_size; /* Length of data field, incl gcm and hash padding */
  615. int pad_len = 0; /* total pad len, including gcm, hash, stat padding */
  616. u32 data_pad_len = 0; /* length of GCM/CCM padding */
  617. u32 stat_pad_len = 0; /* length of padding to align STATUS word */
  618. struct brcm_message *mssg; /* mailbox message */
  619. struct spu_request_opts req_opts;
  620. struct spu_cipher_parms cipher_parms;
  621. struct spu_hash_parms hash_parms;
  622. struct spu_aead_parms aead_parms;
  623. unsigned int local_nbuf;
  624. u32 spu_hdr_len;
  625. unsigned int digestsize;
  626. u16 rem = 0;
  627. int retry_cnt = 0;
  628. /*
  629. * number of entries in src and dst sg. Always includes SPU msg header.
  630. * rx always includes a buffer to catch digest and STATUS.
  631. */
  632. u8 rx_frag_num = 3;
  633. u8 tx_frag_num = 1;
  634. flow_log("total_todo %u, total_sent %u\n",
  635. rctx->total_todo, rctx->total_sent);
  636. memset(&req_opts, 0, sizeof(req_opts));
  637. memset(&cipher_parms, 0, sizeof(cipher_parms));
  638. memset(&hash_parms, 0, sizeof(hash_parms));
  639. memset(&aead_parms, 0, sizeof(aead_parms));
  640. req_opts.bd_suppress = true;
  641. hash_parms.alg = ctx->auth.alg;
  642. hash_parms.mode = ctx->auth.mode;
  643. hash_parms.type = HASH_TYPE_NONE;
  644. hash_parms.key_buf = (u8 *)ctx->authkey;
  645. hash_parms.key_len = ctx->authkeylen;
  646. /*
  647. * For hash algorithms below assignment looks bit odd but
  648. * it's needed for AES-XCBC and AES-CMAC hash algorithms
  649. * to differentiate between 128, 192, 256 bit key values.
  650. * Based on the key values, hash algorithm is selected.
  651. * For example for 128 bit key, hash algorithm is AES-128.
  652. */
  653. cipher_parms.type = ctx->cipher_type;
  654. mssg = &rctx->mb_mssg;
  655. chunk_start = rctx->src_sent;
  656. /*
  657. * Compute the amount remaining to hash. This may include data
  658. * carried over from previous requests.
  659. */
  660. nbytes_to_hash = rctx->total_todo - rctx->total_sent;
  661. chunksize = nbytes_to_hash;
  662. if ((ctx->max_payload != SPU_MAX_PAYLOAD_INF) &&
  663. (chunksize > ctx->max_payload))
  664. chunksize = ctx->max_payload;
  665. /*
  666. * If this is not a final request and the request data is not a multiple
  667. * of a full block, then simply park the extra data and prefix it to the
  668. * data for the next request.
  669. */
  670. if (!rctx->is_final) {
  671. u8 *dest = rctx->hash_carry + rctx->hash_carry_len;
  672. u16 new_len; /* len of data to add to hash carry */
  673. rem = chunksize % blocksize; /* remainder */
  674. if (rem) {
  675. /* chunksize not a multiple of blocksize */
  676. chunksize -= rem;
  677. if (chunksize == 0) {
  678. /* Don't have a full block to submit to hw */
  679. new_len = rem - rctx->hash_carry_len;
  680. sg_copy_part_to_buf(req->src, dest, new_len,
  681. rctx->src_sent);
  682. rctx->hash_carry_len = rem;
  683. flow_log("Exiting with hash carry len: %u\n",
  684. rctx->hash_carry_len);
  685. packet_dump(" buf: ",
  686. rctx->hash_carry,
  687. rctx->hash_carry_len);
  688. return -EAGAIN;
  689. }
  690. }
  691. }
  692. /* if we have hash carry, then prefix it to the data in this request */
  693. local_nbuf = rctx->hash_carry_len;
  694. rctx->hash_carry_len = 0;
  695. if (local_nbuf)
  696. tx_frag_num++;
  697. new_data_len = chunksize - local_nbuf;
  698. /* Count number of sg entries to be used in this request */
  699. rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip,
  700. new_data_len);
  701. /* AES hashing keeps key size in type field, so need to copy it here */
  702. if (hash_parms.alg == HASH_ALG_AES)
  703. hash_parms.type = cipher_parms.type;
  704. else
  705. hash_parms.type = spu->spu_hash_type(rctx->total_sent);
  706. digestsize = spu->spu_digest_size(ctx->digestsize, ctx->auth.alg,
  707. hash_parms.type);
  708. hash_parms.digestsize = digestsize;
  709. /* update the indexes */
  710. rctx->total_sent += chunksize;
  711. /* if you sent a prebuf then that wasn't from this req->src */
  712. rctx->src_sent += new_data_len;
  713. if ((rctx->total_sent == rctx->total_todo) && rctx->is_final)
  714. hash_parms.pad_len = spu->spu_hash_pad_len(hash_parms.alg,
  715. hash_parms.mode,
  716. chunksize,
  717. blocksize);
  718. /*
  719. * If a non-first chunk, then include the digest returned from the
  720. * previous chunk so that hw can add to it (except for AES types).
  721. */
  722. if ((hash_parms.type == HASH_TYPE_UPDT) &&
  723. (hash_parms.alg != HASH_ALG_AES)) {
  724. hash_parms.key_buf = rctx->incr_hash;
  725. hash_parms.key_len = digestsize;
  726. }
  727. atomic64_add(chunksize, &iproc_priv.bytes_out);
  728. flow_log("%s() final: %u nbuf: %u ",
  729. __func__, rctx->is_final, local_nbuf);
  730. if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
  731. flow_log("max_payload infinite\n");
  732. else
  733. flow_log("max_payload %u\n", ctx->max_payload);
  734. flow_log("chunk_start: %u chunk_size: %u\n", chunk_start, chunksize);
  735. /* Prepend SPU header with type 3 BCM header */
  736. memcpy(rctx->msg_buf.bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN);
  737. hash_parms.prebuf_len = local_nbuf;
  738. spu_hdr_len = spu->spu_create_request(rctx->msg_buf.bcm_spu_req_hdr +
  739. BCM_HDR_LEN,
  740. &req_opts, &cipher_parms,
  741. &hash_parms, &aead_parms,
  742. new_data_len);
  743. if (spu_hdr_len == 0) {
  744. pr_err("Failed to create SPU request header\n");
  745. return -EFAULT;
  746. }
  747. /*
  748. * Determine total length of padding required. Put all padding in one
  749. * buffer.
  750. */
  751. data_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode, chunksize);
  752. db_size = spu_real_db_size(0, 0, local_nbuf, new_data_len,
  753. 0, 0, hash_parms.pad_len);
  754. if (spu->spu_tx_status_len())
  755. stat_pad_len = spu->spu_wordalign_padlen(db_size);
  756. if (stat_pad_len)
  757. rx_frag_num++;
  758. pad_len = hash_parms.pad_len + data_pad_len + stat_pad_len;
  759. if (pad_len) {
  760. tx_frag_num++;
  761. spu->spu_request_pad(rctx->msg_buf.spu_req_pad, data_pad_len,
  762. hash_parms.pad_len, ctx->auth.alg,
  763. ctx->auth.mode, rctx->total_sent,
  764. stat_pad_len);
  765. }
  766. spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
  767. spu_hdr_len);
  768. packet_dump(" prebuf: ", rctx->hash_carry, local_nbuf);
  769. flow_log("Data:\n");
  770. dump_sg(rctx->src_sg, rctx->src_skip, new_data_len);
  771. packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len);
  772. /*
  773. * Build mailbox message containing SPU request msg and rx buffers
  774. * to catch response message
  775. */
  776. memset(mssg, 0, sizeof(*mssg));
  777. mssg->type = BRCM_MESSAGE_SPU;
  778. mssg->ctx = rctx; /* Will be returned in response */
  779. /* Create rx scatterlist to catch result */
  780. err = spu_ahash_rx_sg_create(mssg, rctx, rx_frag_num, digestsize,
  781. stat_pad_len);
  782. if (err)
  783. return err;
  784. /* Create tx scatterlist containing SPU request message */
  785. tx_frag_num += rctx->src_nents;
  786. if (spu->spu_tx_status_len())
  787. tx_frag_num++;
  788. err = spu_ahash_tx_sg_create(mssg, rctx, tx_frag_num, spu_hdr_len,
  789. local_nbuf, new_data_len, pad_len);
  790. if (err)
  791. return err;
  792. err = mbox_send_message(iproc_priv.mbox[rctx->chan_idx], mssg);
  793. if (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) {
  794. while ((err == -ENOBUFS) && (retry_cnt < SPU_MB_RETRY_MAX)) {
  795. /*
  796. * Mailbox queue is full. Since MAY_SLEEP is set, assume
  797. * not in atomic context and we can wait and try again.
  798. */
  799. retry_cnt++;
  800. usleep_range(MBOX_SLEEP_MIN, MBOX_SLEEP_MAX);
  801. err = mbox_send_message(iproc_priv.mbox[rctx->chan_idx],
  802. mssg);
  803. atomic_inc(&iproc_priv.mb_no_spc);
  804. }
  805. }
  806. if (err < 0) {
  807. atomic_inc(&iproc_priv.mb_send_fail);
  808. return err;
  809. }
  810. return -EINPROGRESS;
  811. }
  812. /**
  813. * spu_hmac_outer_hash() - Request synchonous software compute of the outer hash
  814. * for an HMAC request.
  815. * @req: The HMAC request from the crypto API
  816. * @ctx: The session context
  817. *
  818. * Return: 0 if synchronous hash operation successful
  819. * -EINVAL if the hash algo is unrecognized
  820. * any other value indicates an error
  821. */
  822. static int spu_hmac_outer_hash(struct ahash_request *req,
  823. struct iproc_ctx_s *ctx)
  824. {
  825. struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
  826. unsigned int blocksize =
  827. crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash));
  828. int rc;
  829. switch (ctx->auth.alg) {
  830. case HASH_ALG_MD5:
  831. rc = do_shash("md5", req->result, ctx->opad, blocksize,
  832. req->result, ctx->digestsize, NULL, 0);
  833. break;
  834. case HASH_ALG_SHA1:
  835. rc = do_shash("sha1", req->result, ctx->opad, blocksize,
  836. req->result, ctx->digestsize, NULL, 0);
  837. break;
  838. case HASH_ALG_SHA224:
  839. rc = do_shash("sha224", req->result, ctx->opad, blocksize,
  840. req->result, ctx->digestsize, NULL, 0);
  841. break;
  842. case HASH_ALG_SHA256:
  843. rc = do_shash("sha256", req->result, ctx->opad, blocksize,
  844. req->result, ctx->digestsize, NULL, 0);
  845. break;
  846. case HASH_ALG_SHA384:
  847. rc = do_shash("sha384", req->result, ctx->opad, blocksize,
  848. req->result, ctx->digestsize, NULL, 0);
  849. break;
  850. case HASH_ALG_SHA512:
  851. rc = do_shash("sha512", req->result, ctx->opad, blocksize,
  852. req->result, ctx->digestsize, NULL, 0);
  853. break;
  854. default:
  855. pr_err("%s() Error : unknown hmac type\n", __func__);
  856. rc = -EINVAL;
  857. }
  858. return rc;
  859. }
  860. /**
  861. * ahash_req_done() - Process a hash result from the SPU hardware.
  862. * @rctx: Crypto request context
  863. *
  864. * Return: 0 if successful
  865. * < 0 if an error
  866. */
  867. static int ahash_req_done(struct iproc_reqctx_s *rctx)
  868. {
  869. struct spu_hw *spu = &iproc_priv.spu;
  870. struct crypto_async_request *areq = rctx->parent;
  871. struct ahash_request *req = ahash_request_cast(areq);
  872. struct iproc_ctx_s *ctx = rctx->ctx;
  873. int err;
  874. memcpy(req->result, rctx->msg_buf.digest, ctx->digestsize);
  875. if (spu->spu_type == SPU_TYPE_SPUM) {
  876. /* byte swap the output from the UPDT function to network byte
  877. * order
  878. */
  879. if (ctx->auth.alg == HASH_ALG_MD5) {
  880. __swab32s((u32 *)req->result);
  881. __swab32s(((u32 *)req->result) + 1);
  882. __swab32s(((u32 *)req->result) + 2);
  883. __swab32s(((u32 *)req->result) + 3);
  884. __swab32s(((u32 *)req->result) + 4);
  885. }
  886. }
  887. flow_dump(" digest ", req->result, ctx->digestsize);
  888. /* if this an HMAC then do the outer hash */
  889. if (rctx->is_sw_hmac) {
  890. err = spu_hmac_outer_hash(req, ctx);
  891. if (err < 0)
  892. return err;
  893. flow_dump(" hmac: ", req->result, ctx->digestsize);
  894. }
  895. if (rctx->is_sw_hmac || ctx->auth.mode == HASH_MODE_HMAC) {
  896. atomic_inc(&iproc_priv.op_counts[SPU_OP_HMAC]);
  897. atomic_inc(&iproc_priv.hmac_cnt[ctx->auth.alg]);
  898. } else {
  899. atomic_inc(&iproc_priv.op_counts[SPU_OP_HASH]);
  900. atomic_inc(&iproc_priv.hash_cnt[ctx->auth.alg]);
  901. }
  902. return 0;
  903. }
  904. /**
  905. * handle_ahash_resp() - Process a SPU response message for a hash request.
  906. * Checks if the entire crypto API request has been processed, and if so,
  907. * invokes post processing on the result.
  908. * @rctx: Crypto request context
  909. */
  910. static void handle_ahash_resp(struct iproc_reqctx_s *rctx)
  911. {
  912. struct iproc_ctx_s *ctx = rctx->ctx;
  913. #ifdef DEBUG
  914. struct crypto_async_request *areq = rctx->parent;
  915. struct ahash_request *req = ahash_request_cast(areq);
  916. struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
  917. unsigned int blocksize =
  918. crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash));
  919. #endif
  920. /*
  921. * Save hash to use as input to next op if incremental. Might be copying
  922. * too much, but that's easier than figuring out actual digest size here
  923. */
  924. memcpy(rctx->incr_hash, rctx->msg_buf.digest, MAX_DIGEST_SIZE);
  925. flow_log("%s() blocksize:%u digestsize:%u\n",
  926. __func__, blocksize, ctx->digestsize);
  927. atomic64_add(ctx->digestsize, &iproc_priv.bytes_in);
  928. if (rctx->is_final && (rctx->total_sent == rctx->total_todo))
  929. ahash_req_done(rctx);
  930. }
  931. /**
  932. * spu_aead_rx_sg_create() - Build up the scatterlist of buffers used to receive
  933. * a SPU response message for an AEAD request. Includes buffers to catch SPU
  934. * message headers and the response data.
  935. * @mssg: mailbox message containing the receive sg
  936. * @rctx: crypto request context
  937. * @rx_frag_num: number of scatterlist elements required to hold the
  938. * SPU response message
  939. * @assoc_len: Length of associated data included in the crypto request
  940. * @ret_iv_len: Length of IV returned in response
  941. * @resp_len: Number of bytes of response data expected to be written to
  942. * dst buffer from crypto API
  943. * @digestsize: Length of hash digest, in bytes
  944. * @stat_pad_len: Number of bytes required to pad the STAT field to
  945. * a 4-byte boundary
  946. *
  947. * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
  948. * when the request completes, whether the request is handled successfully or
  949. * there is an error.
  950. *
  951. * Returns:
  952. * 0 if successful
  953. * < 0 if an error
  954. */
  955. static int spu_aead_rx_sg_create(struct brcm_message *mssg,
  956. struct aead_request *req,
  957. struct iproc_reqctx_s *rctx,
  958. u8 rx_frag_num,
  959. unsigned int assoc_len,
  960. u32 ret_iv_len, unsigned int resp_len,
  961. unsigned int digestsize, u32 stat_pad_len)
  962. {
  963. struct spu_hw *spu = &iproc_priv.spu;
  964. struct scatterlist *sg; /* used to build sgs in mbox message */
  965. struct iproc_ctx_s *ctx = rctx->ctx;
  966. u32 datalen; /* Number of bytes of response data expected */
  967. u32 assoc_buf_len;
  968. u8 data_padlen = 0;
  969. if (ctx->is_rfc4543) {
  970. /* RFC4543: only pad after data, not after AAD */
  971. data_padlen = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
  972. assoc_len + resp_len);
  973. assoc_buf_len = assoc_len;
  974. } else {
  975. data_padlen = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
  976. resp_len);
  977. assoc_buf_len = spu->spu_assoc_resp_len(ctx->cipher.mode,
  978. assoc_len, ret_iv_len,
  979. rctx->is_encrypt);
  980. }
  981. if (ctx->cipher.mode == CIPHER_MODE_CCM)
  982. /* ICV (after data) must be in the next 32-bit word for CCM */
  983. data_padlen += spu->spu_wordalign_padlen(assoc_buf_len +
  984. resp_len +
  985. data_padlen);
  986. if (data_padlen)
  987. /* have to catch gcm pad in separate buffer */
  988. rx_frag_num++;
  989. mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
  990. rctx->gfp);
  991. if (!mssg->spu.dst)
  992. return -ENOMEM;
  993. sg = mssg->spu.dst;
  994. sg_init_table(sg, rx_frag_num);
  995. /* Space for SPU message header */
  996. sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len);
  997. if (assoc_buf_len) {
  998. /*
  999. * Don't write directly to req->dst, because SPU may pad the
  1000. * assoc data in the response
  1001. */
  1002. memset(rctx->msg_buf.a.resp_aad, 0, assoc_buf_len);
  1003. sg_set_buf(sg++, rctx->msg_buf.a.resp_aad, assoc_buf_len);
  1004. }
  1005. if (resp_len) {
  1006. /*
  1007. * Copy in each dst sg entry from request, up to chunksize.
  1008. * dst sg catches just the data. digest caught in separate buf.
  1009. */
  1010. datalen = spu_msg_sg_add(&sg, &rctx->dst_sg, &rctx->dst_skip,
  1011. rctx->dst_nents, resp_len);
  1012. if (datalen < (resp_len)) {
  1013. pr_err("%s(): failed to copy dst sg to mbox msg. expected len %u, datalen %u",
  1014. __func__, resp_len, datalen);
  1015. return -EFAULT;
  1016. }
  1017. }
  1018. /* If GCM/CCM data is padded, catch padding in separate buffer */
  1019. if (data_padlen) {
  1020. memset(rctx->msg_buf.a.gcmpad, 0, data_padlen);
  1021. sg_set_buf(sg++, rctx->msg_buf.a.gcmpad, data_padlen);
  1022. }
  1023. /* Always catch ICV in separate buffer */
  1024. sg_set_buf(sg++, rctx->msg_buf.digest, digestsize);
  1025. flow_log("stat_pad_len %u\n", stat_pad_len);
  1026. if (stat_pad_len) {
  1027. memset(rctx->msg_buf.rx_stat_pad, 0, stat_pad_len);
  1028. sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len);
  1029. }
  1030. memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN);
  1031. sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
  1032. return 0;
  1033. }
  1034. /**
  1035. * spu_aead_tx_sg_create() - Build up the scatterlist of buffers used to send a
  1036. * SPU request message for an AEAD request. Includes SPU message headers and the
  1037. * request data.
  1038. * @mssg: mailbox message containing the transmit sg
  1039. * @rctx: crypto request context
  1040. * @tx_frag_num: number of scatterlist elements required to construct the
  1041. * SPU request message
  1042. * @spu_hdr_len: length of SPU message header in bytes
  1043. * @assoc: crypto API associated data scatterlist
  1044. * @assoc_len: length of associated data
  1045. * @assoc_nents: number of scatterlist entries containing assoc data
  1046. * @aead_iv_len: length of AEAD IV, if included
  1047. * @chunksize: Number of bytes of request data
  1048. * @aad_pad_len: Number of bytes of padding at end of AAD. For GCM/CCM.
  1049. * @pad_len: Number of pad bytes
  1050. * @incl_icv: If true, write separate ICV buffer after data and
  1051. * any padding
  1052. *
  1053. * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
  1054. * when the request completes, whether the request is handled successfully or
  1055. * there is an error.
  1056. *
  1057. * Return:
  1058. * 0 if successful
  1059. * < 0 if an error
  1060. */
  1061. static int spu_aead_tx_sg_create(struct brcm_message *mssg,
  1062. struct iproc_reqctx_s *rctx,
  1063. u8 tx_frag_num,
  1064. u32 spu_hdr_len,
  1065. struct scatterlist *assoc,
  1066. unsigned int assoc_len,
  1067. int assoc_nents,
  1068. unsigned int aead_iv_len,
  1069. unsigned int chunksize,
  1070. u32 aad_pad_len, u32 pad_len, bool incl_icv)
  1071. {
  1072. struct spu_hw *spu = &iproc_priv.spu;
  1073. struct scatterlist *sg; /* used to build sgs in mbox message */
  1074. struct scatterlist *assoc_sg = assoc;
  1075. struct iproc_ctx_s *ctx = rctx->ctx;
  1076. u32 datalen; /* Number of bytes of data to write */
  1077. u32 written; /* Number of bytes of data written */
  1078. u32 assoc_offset = 0;
  1079. u32 stat_len;
  1080. mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
  1081. rctx->gfp);
  1082. if (!mssg->spu.src)
  1083. return -ENOMEM;
  1084. sg = mssg->spu.src;
  1085. sg_init_table(sg, tx_frag_num);
  1086. sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr,
  1087. BCM_HDR_LEN + spu_hdr_len);
  1088. if (assoc_len) {
  1089. /* Copy in each associated data sg entry from request */
  1090. written = spu_msg_sg_add(&sg, &assoc_sg, &assoc_offset,
  1091. assoc_nents, assoc_len);
  1092. if (written < assoc_len) {
  1093. pr_err("%s(): failed to copy assoc sg to mbox msg",
  1094. __func__);
  1095. return -EFAULT;
  1096. }
  1097. }
  1098. if (aead_iv_len)
  1099. sg_set_buf(sg++, rctx->msg_buf.iv_ctr, aead_iv_len);
  1100. if (aad_pad_len) {
  1101. memset(rctx->msg_buf.a.req_aad_pad, 0, aad_pad_len);
  1102. sg_set_buf(sg++, rctx->msg_buf.a.req_aad_pad, aad_pad_len);
  1103. }
  1104. datalen = chunksize;
  1105. if ((chunksize > ctx->digestsize) && incl_icv)
  1106. datalen -= ctx->digestsize;
  1107. if (datalen) {
  1108. /* For aead, a single msg should consume the entire src sg */
  1109. written = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip,
  1110. rctx->src_nents, datalen);
  1111. if (written < datalen) {
  1112. pr_err("%s(): failed to copy src sg to mbox msg",
  1113. __func__);
  1114. return -EFAULT;
  1115. }
  1116. }
  1117. if (pad_len) {
  1118. memset(rctx->msg_buf.spu_req_pad, 0, pad_len);
  1119. sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len);
  1120. }
  1121. if (incl_icv)
  1122. sg_set_buf(sg++, rctx->msg_buf.digest, ctx->digestsize);
  1123. stat_len = spu->spu_tx_status_len();
  1124. if (stat_len) {
  1125. memset(rctx->msg_buf.tx_stat, 0, stat_len);
  1126. sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len);
  1127. }
  1128. return 0;
  1129. }
  1130. /**
  1131. * handle_aead_req() - Submit a SPU request message for the next chunk of the
  1132. * current AEAD request.
  1133. * @rctx: Crypto request context
  1134. *
  1135. * Unlike other operation types, we assume the length of the request fits in
  1136. * a single SPU request message. aead_enqueue() makes sure this is true.
  1137. * Comments for other op types regarding threads applies here as well.
  1138. *
  1139. * Unlike incremental hash ops, where the spu returns the entire hash for
  1140. * truncated algs like sha-224, the SPU returns just the truncated hash in
  1141. * response to aead requests. So digestsize is always ctx->digestsize here.
  1142. *
  1143. * Return: -EINPROGRESS: crypto request has been accepted and result will be
  1144. * returned asynchronously
  1145. * Any other value indicates an error
  1146. */
  1147. static int handle_aead_req(struct iproc_reqctx_s *rctx)
  1148. {
  1149. struct spu_hw *spu = &iproc_priv.spu;
  1150. struct crypto_async_request *areq = rctx->parent;
  1151. struct aead_request *req = container_of(areq,
  1152. struct aead_request, base);
  1153. struct iproc_ctx_s *ctx = rctx->ctx;
  1154. int err;
  1155. unsigned int chunksize;
  1156. unsigned int resp_len;
  1157. u32 spu_hdr_len;
  1158. u32 db_size;
  1159. u32 stat_pad_len;
  1160. u32 pad_len;
  1161. struct brcm_message *mssg; /* mailbox message */
  1162. struct spu_request_opts req_opts;
  1163. struct spu_cipher_parms cipher_parms;
  1164. struct spu_hash_parms hash_parms;
  1165. struct spu_aead_parms aead_parms;
  1166. int assoc_nents = 0;
  1167. bool incl_icv = false;
  1168. unsigned int digestsize = ctx->digestsize;
  1169. int retry_cnt = 0;
  1170. /* number of entries in src and dst sg. Always includes SPU msg header.
  1171. */
  1172. u8 rx_frag_num = 2; /* and STATUS */
  1173. u8 tx_frag_num = 1;
  1174. /* doing the whole thing at once */
  1175. chunksize = rctx->total_todo;
  1176. flow_log("%s: chunksize %u\n", __func__, chunksize);
  1177. memset(&req_opts, 0, sizeof(req_opts));
  1178. memset(&hash_parms, 0, sizeof(hash_parms));
  1179. memset(&aead_parms, 0, sizeof(aead_parms));
  1180. req_opts.is_inbound = !(rctx->is_encrypt);
  1181. req_opts.auth_first = ctx->auth_first;
  1182. req_opts.is_aead = true;
  1183. req_opts.is_esp = ctx->is_esp;
  1184. cipher_parms.alg = ctx->cipher.alg;
  1185. cipher_parms.mode = ctx->cipher.mode;
  1186. cipher_parms.type = ctx->cipher_type;
  1187. cipher_parms.key_buf = ctx->enckey;
  1188. cipher_parms.key_len = ctx->enckeylen;
  1189. cipher_parms.iv_buf = rctx->msg_buf.iv_ctr;
  1190. cipher_parms.iv_len = rctx->iv_ctr_len;
  1191. hash_parms.alg = ctx->auth.alg;
  1192. hash_parms.mode = ctx->auth.mode;
  1193. hash_parms.type = HASH_TYPE_NONE;
  1194. hash_parms.key_buf = (u8 *)ctx->authkey;
  1195. hash_parms.key_len = ctx->authkeylen;
  1196. hash_parms.digestsize = digestsize;
  1197. if ((ctx->auth.alg == HASH_ALG_SHA224) &&
  1198. (ctx->authkeylen < SHA224_DIGEST_SIZE))
  1199. hash_parms.key_len = SHA224_DIGEST_SIZE;
  1200. aead_parms.assoc_size = req->assoclen;
  1201. if (ctx->is_esp && !ctx->is_rfc4543) {
  1202. /*
  1203. * 8-byte IV is included assoc data in request. SPU2
  1204. * expects AAD to include just SPI and seqno. So
  1205. * subtract off the IV len.
  1206. */
  1207. aead_parms.assoc_size -= GCM_ESP_IV_SIZE;
  1208. if (rctx->is_encrypt) {
  1209. aead_parms.return_iv = true;
  1210. aead_parms.ret_iv_len = GCM_ESP_IV_SIZE;
  1211. aead_parms.ret_iv_off = GCM_ESP_SALT_SIZE;
  1212. }
  1213. } else {
  1214. aead_parms.ret_iv_len = 0;
  1215. }
  1216. /*
  1217. * Count number of sg entries from the crypto API request that are to
  1218. * be included in this mailbox message. For dst sg, don't count space
  1219. * for digest. Digest gets caught in a separate buffer and copied back
  1220. * to dst sg when processing response.
  1221. */
  1222. rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip, chunksize);
  1223. rctx->dst_nents = spu_sg_count(rctx->dst_sg, rctx->dst_skip, chunksize);
  1224. if (aead_parms.assoc_size)
  1225. assoc_nents = spu_sg_count(rctx->assoc, 0,
  1226. aead_parms.assoc_size);
  1227. mssg = &rctx->mb_mssg;
  1228. rctx->total_sent = chunksize;
  1229. rctx->src_sent = chunksize;
  1230. if (spu->spu_assoc_resp_len(ctx->cipher.mode,
  1231. aead_parms.assoc_size,
  1232. aead_parms.ret_iv_len,
  1233. rctx->is_encrypt))
  1234. rx_frag_num++;
  1235. aead_parms.iv_len = spu->spu_aead_ivlen(ctx->cipher.mode,
  1236. rctx->iv_ctr_len);
  1237. if (ctx->auth.alg == HASH_ALG_AES)
  1238. hash_parms.type = ctx->cipher_type;
  1239. /* General case AAD padding (CCM and RFC4543 special cases below) */
  1240. aead_parms.aad_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
  1241. aead_parms.assoc_size);
  1242. /* General case data padding (CCM decrypt special case below) */
  1243. aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
  1244. chunksize);
  1245. if (ctx->cipher.mode == CIPHER_MODE_CCM) {
  1246. /*
  1247. * for CCM, AAD len + 2 (rather than AAD len) needs to be
  1248. * 128-bit aligned
  1249. */
  1250. aead_parms.aad_pad_len = spu->spu_gcm_ccm_pad_len(
  1251. ctx->cipher.mode,
  1252. aead_parms.assoc_size + 2);
  1253. /*
  1254. * And when decrypting CCM, need to pad without including
  1255. * size of ICV which is tacked on to end of chunk
  1256. */
  1257. if (!rctx->is_encrypt)
  1258. aead_parms.data_pad_len =
  1259. spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
  1260. chunksize - digestsize);
  1261. /* CCM also requires software to rewrite portions of IV: */
  1262. spu->spu_ccm_update_iv(digestsize, &cipher_parms, req->assoclen,
  1263. chunksize, rctx->is_encrypt,
  1264. ctx->is_esp);
  1265. }
  1266. if (ctx->is_rfc4543) {
  1267. /*
  1268. * RFC4543: data is included in AAD, so don't pad after AAD
  1269. * and pad data based on both AAD + data size
  1270. */
  1271. aead_parms.aad_pad_len = 0;
  1272. if (!rctx->is_encrypt)
  1273. aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(
  1274. ctx->cipher.mode,
  1275. aead_parms.assoc_size + chunksize -
  1276. digestsize);
  1277. else
  1278. aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(
  1279. ctx->cipher.mode,
  1280. aead_parms.assoc_size + chunksize);
  1281. req_opts.is_rfc4543 = true;
  1282. }
  1283. if (spu_req_incl_icv(ctx->cipher.mode, rctx->is_encrypt)) {
  1284. incl_icv = true;
  1285. tx_frag_num++;
  1286. /* Copy ICV from end of src scatterlist to digest buf */
  1287. sg_copy_part_to_buf(req->src, rctx->msg_buf.digest, digestsize,
  1288. req->assoclen + rctx->total_sent -
  1289. digestsize);
  1290. }
  1291. atomic64_add(chunksize, &iproc_priv.bytes_out);
  1292. flow_log("%s()-sent chunksize:%u\n", __func__, chunksize);
  1293. /* Prepend SPU header with type 3 BCM header */
  1294. memcpy(rctx->msg_buf.bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN);
  1295. spu_hdr_len = spu->spu_create_request(rctx->msg_buf.bcm_spu_req_hdr +
  1296. BCM_HDR_LEN, &req_opts,
  1297. &cipher_parms, &hash_parms,
  1298. &aead_parms, chunksize);
  1299. /* Determine total length of padding. Put all padding in one buffer. */
  1300. db_size = spu_real_db_size(aead_parms.assoc_size, aead_parms.iv_len, 0,
  1301. chunksize, aead_parms.aad_pad_len,
  1302. aead_parms.data_pad_len, 0);
  1303. stat_pad_len = spu->spu_wordalign_padlen(db_size);
  1304. if (stat_pad_len)
  1305. rx_frag_num++;
  1306. pad_len = aead_parms.data_pad_len + stat_pad_len;
  1307. if (pad_len) {
  1308. tx_frag_num++;
  1309. spu->spu_request_pad(rctx->msg_buf.spu_req_pad,
  1310. aead_parms.data_pad_len, 0,
  1311. ctx->auth.alg, ctx->auth.mode,
  1312. rctx->total_sent, stat_pad_len);
  1313. }
  1314. spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
  1315. spu_hdr_len);
  1316. dump_sg(rctx->assoc, 0, aead_parms.assoc_size);
  1317. packet_dump(" aead iv: ", rctx->msg_buf.iv_ctr, aead_parms.iv_len);
  1318. packet_log("BD:\n");
  1319. dump_sg(rctx->src_sg, rctx->src_skip, chunksize);
  1320. packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len);
  1321. /*
  1322. * Build mailbox message containing SPU request msg and rx buffers
  1323. * to catch response message
  1324. */
  1325. memset(mssg, 0, sizeof(*mssg));
  1326. mssg->type = BRCM_MESSAGE_SPU;
  1327. mssg->ctx = rctx; /* Will be returned in response */
  1328. /* Create rx scatterlist to catch result */
  1329. rx_frag_num += rctx->dst_nents;
  1330. resp_len = chunksize;
  1331. /*
  1332. * Always catch ICV in separate buffer. Have to for GCM/CCM because of
  1333. * padding. Have to for SHA-224 and other truncated SHAs because SPU
  1334. * sends entire digest back.
  1335. */
  1336. rx_frag_num++;
  1337. if (((ctx->cipher.mode == CIPHER_MODE_GCM) ||
  1338. (ctx->cipher.mode == CIPHER_MODE_CCM)) && !rctx->is_encrypt) {
  1339. /*
  1340. * Input is ciphertxt plus ICV, but ICV not incl
  1341. * in output.
  1342. */
  1343. resp_len -= ctx->digestsize;
  1344. if (resp_len == 0)
  1345. /* no rx frags to catch output data */
  1346. rx_frag_num -= rctx->dst_nents;
  1347. }
  1348. err = spu_aead_rx_sg_create(mssg, req, rctx, rx_frag_num,
  1349. aead_parms.assoc_size,
  1350. aead_parms.ret_iv_len, resp_len, digestsize,
  1351. stat_pad_len);
  1352. if (err)
  1353. return err;
  1354. /* Create tx scatterlist containing SPU request message */
  1355. tx_frag_num += rctx->src_nents;
  1356. tx_frag_num += assoc_nents;
  1357. if (aead_parms.aad_pad_len)
  1358. tx_frag_num++;
  1359. if (aead_parms.iv_len)
  1360. tx_frag_num++;
  1361. if (spu->spu_tx_status_len())
  1362. tx_frag_num++;
  1363. err = spu_aead_tx_sg_create(mssg, rctx, tx_frag_num, spu_hdr_len,
  1364. rctx->assoc, aead_parms.assoc_size,
  1365. assoc_nents, aead_parms.iv_len, chunksize,
  1366. aead_parms.aad_pad_len, pad_len, incl_icv);
  1367. if (err)
  1368. return err;
  1369. err = mbox_send_message(iproc_priv.mbox[rctx->chan_idx], mssg);
  1370. if (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) {
  1371. while ((err == -ENOBUFS) && (retry_cnt < SPU_MB_RETRY_MAX)) {
  1372. /*
  1373. * Mailbox queue is full. Since MAY_SLEEP is set, assume
  1374. * not in atomic context and we can wait and try again.
  1375. */
  1376. retry_cnt++;
  1377. usleep_range(MBOX_SLEEP_MIN, MBOX_SLEEP_MAX);
  1378. err = mbox_send_message(iproc_priv.mbox[rctx->chan_idx],
  1379. mssg);
  1380. atomic_inc(&iproc_priv.mb_no_spc);
  1381. }
  1382. }
  1383. if (err < 0) {
  1384. atomic_inc(&iproc_priv.mb_send_fail);
  1385. return err;
  1386. }
  1387. return -EINPROGRESS;
  1388. }
  1389. /**
  1390. * handle_aead_resp() - Process a SPU response message for an AEAD request.
  1391. * @rctx: Crypto request context
  1392. */
  1393. static void handle_aead_resp(struct iproc_reqctx_s *rctx)
  1394. {
  1395. struct spu_hw *spu = &iproc_priv.spu;
  1396. struct crypto_async_request *areq = rctx->parent;
  1397. struct aead_request *req = container_of(areq,
  1398. struct aead_request, base);
  1399. struct iproc_ctx_s *ctx = rctx->ctx;
  1400. u32 payload_len;
  1401. unsigned int icv_offset;
  1402. u32 result_len;
  1403. /* See how much data was returned */
  1404. payload_len = spu->spu_payload_length(rctx->msg_buf.spu_resp_hdr);
  1405. flow_log("payload_len %u\n", payload_len);
  1406. /* only count payload */
  1407. atomic64_add(payload_len, &iproc_priv.bytes_in);
  1408. if (req->assoclen)
  1409. packet_dump(" assoc_data ", rctx->msg_buf.a.resp_aad,
  1410. req->assoclen);
  1411. /*
  1412. * Copy the ICV back to the destination
  1413. * buffer. In decrypt case, SPU gives us back the digest, but crypto
  1414. * API doesn't expect ICV in dst buffer.
  1415. */
  1416. result_len = req->cryptlen;
  1417. if (rctx->is_encrypt) {
  1418. icv_offset = req->assoclen + rctx->total_sent;
  1419. packet_dump(" ICV: ", rctx->msg_buf.digest, ctx->digestsize);
  1420. flow_log("copying ICV to dst sg at offset %u\n", icv_offset);
  1421. sg_copy_part_from_buf(req->dst, rctx->msg_buf.digest,
  1422. ctx->digestsize, icv_offset);
  1423. result_len += ctx->digestsize;
  1424. }
  1425. packet_log("response data: ");
  1426. dump_sg(req->dst, req->assoclen, result_len);
  1427. atomic_inc(&iproc_priv.op_counts[SPU_OP_AEAD]);
  1428. if (ctx->cipher.alg == CIPHER_ALG_AES) {
  1429. if (ctx->cipher.mode == CIPHER_MODE_CCM)
  1430. atomic_inc(&iproc_priv.aead_cnt[AES_CCM]);
  1431. else if (ctx->cipher.mode == CIPHER_MODE_GCM)
  1432. atomic_inc(&iproc_priv.aead_cnt[AES_GCM]);
  1433. else
  1434. atomic_inc(&iproc_priv.aead_cnt[AUTHENC]);
  1435. } else {
  1436. atomic_inc(&iproc_priv.aead_cnt[AUTHENC]);
  1437. }
  1438. }
  1439. /**
  1440. * spu_chunk_cleanup() - Do cleanup after processing one chunk of a request
  1441. * @rctx: request context
  1442. *
  1443. * Mailbox scatterlists are allocated for each chunk. So free them after
  1444. * processing each chunk.
  1445. */
  1446. static void spu_chunk_cleanup(struct iproc_reqctx_s *rctx)
  1447. {
  1448. /* mailbox message used to tx request */
  1449. struct brcm_message *mssg = &rctx->mb_mssg;
  1450. kfree(mssg->spu.src);
  1451. kfree(mssg->spu.dst);
  1452. memset(mssg, 0, sizeof(struct brcm_message));
  1453. }
  1454. /**
  1455. * finish_req() - Used to invoke the complete callback from the requester when
  1456. * a request has been handled asynchronously.
  1457. * @rctx: Request context
  1458. * @err: Indicates whether the request was successful or not
  1459. *
  1460. * Ensures that cleanup has been done for request
  1461. */
  1462. static void finish_req(struct iproc_reqctx_s *rctx, int err)
  1463. {
  1464. struct crypto_async_request *areq = rctx->parent;
  1465. flow_log("%s() err:%d\n\n", __func__, err);
  1466. /* No harm done if already called */
  1467. spu_chunk_cleanup(rctx);
  1468. if (areq)
  1469. areq->complete(areq, err);
  1470. }
  1471. /**
  1472. * spu_rx_callback() - Callback from mailbox framework with a SPU response.
  1473. * @cl: mailbox client structure for SPU driver
  1474. * @msg: mailbox message containing SPU response
  1475. */
  1476. static void spu_rx_callback(struct mbox_client *cl, void *msg)
  1477. {
  1478. struct spu_hw *spu = &iproc_priv.spu;
  1479. struct brcm_message *mssg = msg;
  1480. struct iproc_reqctx_s *rctx;
  1481. struct iproc_ctx_s *ctx;
  1482. struct crypto_async_request *areq;
  1483. int err = 0;
  1484. rctx = mssg->ctx;
  1485. if (unlikely(!rctx)) {
  1486. /* This is fatal */
  1487. pr_err("%s(): no request context", __func__);
  1488. err = -EFAULT;
  1489. goto cb_finish;
  1490. }
  1491. areq = rctx->parent;
  1492. ctx = rctx->ctx;
  1493. /* process the SPU status */
  1494. err = spu->spu_status_process(rctx->msg_buf.rx_stat);
  1495. if (err != 0) {
  1496. if (err == SPU_INVALID_ICV)
  1497. atomic_inc(&iproc_priv.bad_icv);
  1498. err = -EBADMSG;
  1499. goto cb_finish;
  1500. }
  1501. /* Process the SPU response message */
  1502. switch (rctx->ctx->alg->type) {
  1503. case CRYPTO_ALG_TYPE_ABLKCIPHER:
  1504. handle_ablkcipher_resp(rctx);
  1505. break;
  1506. case CRYPTO_ALG_TYPE_AHASH:
  1507. handle_ahash_resp(rctx);
  1508. break;
  1509. case CRYPTO_ALG_TYPE_AEAD:
  1510. handle_aead_resp(rctx);
  1511. break;
  1512. default:
  1513. err = -EINVAL;
  1514. goto cb_finish;
  1515. }
  1516. /*
  1517. * If this response does not complete the request, then send the next
  1518. * request chunk.
  1519. */
  1520. if (rctx->total_sent < rctx->total_todo) {
  1521. /* Deallocate anything specific to previous chunk */
  1522. spu_chunk_cleanup(rctx);
  1523. switch (rctx->ctx->alg->type) {
  1524. case CRYPTO_ALG_TYPE_ABLKCIPHER:
  1525. err = handle_ablkcipher_req(rctx);
  1526. break;
  1527. case CRYPTO_ALG_TYPE_AHASH:
  1528. err = handle_ahash_req(rctx);
  1529. if (err == -EAGAIN)
  1530. /*
  1531. * we saved data in hash carry, but tell crypto
  1532. * API we successfully completed request.
  1533. */
  1534. err = 0;
  1535. break;
  1536. case CRYPTO_ALG_TYPE_AEAD:
  1537. err = handle_aead_req(rctx);
  1538. break;
  1539. default:
  1540. err = -EINVAL;
  1541. }
  1542. if (err == -EINPROGRESS)
  1543. /* Successfully submitted request for next chunk */
  1544. return;
  1545. }
  1546. cb_finish:
  1547. finish_req(rctx, err);
  1548. }
  1549. /* ==================== Kernel Cryptographic API ==================== */
  1550. /**
  1551. * ablkcipher_enqueue() - Handle ablkcipher encrypt or decrypt request.
  1552. * @req: Crypto API request
  1553. * @encrypt: true if encrypting; false if decrypting
  1554. *
  1555. * Return: -EINPROGRESS if request accepted and result will be returned
  1556. * asynchronously
  1557. * < 0 if an error
  1558. */
  1559. static int ablkcipher_enqueue(struct ablkcipher_request *req, bool encrypt)
  1560. {
  1561. struct iproc_reqctx_s *rctx = ablkcipher_request_ctx(req);
  1562. struct iproc_ctx_s *ctx =
  1563. crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(req));
  1564. int err;
  1565. flow_log("%s() enc:%u\n", __func__, encrypt);
  1566. rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
  1567. CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
  1568. rctx->parent = &req->base;
  1569. rctx->is_encrypt = encrypt;
  1570. rctx->bd_suppress = false;
  1571. rctx->total_todo = req->nbytes;
  1572. rctx->src_sent = 0;
  1573. rctx->total_sent = 0;
  1574. rctx->total_received = 0;
  1575. rctx->ctx = ctx;
  1576. /* Initialize current position in src and dst scatterlists */
  1577. rctx->src_sg = req->src;
  1578. rctx->src_nents = 0;
  1579. rctx->src_skip = 0;
  1580. rctx->dst_sg = req->dst;
  1581. rctx->dst_nents = 0;
  1582. rctx->dst_skip = 0;
  1583. if (ctx->cipher.mode == CIPHER_MODE_CBC ||
  1584. ctx->cipher.mode == CIPHER_MODE_CTR ||
  1585. ctx->cipher.mode == CIPHER_MODE_OFB ||
  1586. ctx->cipher.mode == CIPHER_MODE_XTS ||
  1587. ctx->cipher.mode == CIPHER_MODE_GCM ||
  1588. ctx->cipher.mode == CIPHER_MODE_CCM) {
  1589. rctx->iv_ctr_len =
  1590. crypto_ablkcipher_ivsize(crypto_ablkcipher_reqtfm(req));
  1591. memcpy(rctx->msg_buf.iv_ctr, req->info, rctx->iv_ctr_len);
  1592. } else {
  1593. rctx->iv_ctr_len = 0;
  1594. }
  1595. /* Choose a SPU to process this request */
  1596. rctx->chan_idx = select_channel();
  1597. err = handle_ablkcipher_req(rctx);
  1598. if (err != -EINPROGRESS)
  1599. /* synchronous result */
  1600. spu_chunk_cleanup(rctx);
  1601. return err;
  1602. }
  1603. static int des_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
  1604. unsigned int keylen)
  1605. {
  1606. struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
  1607. u32 tmp[DES_EXPKEY_WORDS];
  1608. if (keylen == DES_KEY_SIZE) {
  1609. if (des_ekey(tmp, key) == 0) {
  1610. if (crypto_ablkcipher_get_flags(cipher) &
  1611. CRYPTO_TFM_REQ_WEAK_KEY) {
  1612. u32 flags = CRYPTO_TFM_RES_WEAK_KEY;
  1613. crypto_ablkcipher_set_flags(cipher, flags);
  1614. return -EINVAL;
  1615. }
  1616. }
  1617. ctx->cipher_type = CIPHER_TYPE_DES;
  1618. } else {
  1619. crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  1620. return -EINVAL;
  1621. }
  1622. return 0;
  1623. }
  1624. static int threedes_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
  1625. unsigned int keylen)
  1626. {
  1627. struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
  1628. if (keylen == (DES_KEY_SIZE * 3)) {
  1629. const u32 *K = (const u32 *)key;
  1630. u32 flags = CRYPTO_TFM_RES_BAD_KEY_SCHED;
  1631. if (!((K[0] ^ K[2]) | (K[1] ^ K[3])) ||
  1632. !((K[2] ^ K[4]) | (K[3] ^ K[5]))) {
  1633. crypto_ablkcipher_set_flags(cipher, flags);
  1634. return -EINVAL;
  1635. }
  1636. ctx->cipher_type = CIPHER_TYPE_3DES;
  1637. } else {
  1638. crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  1639. return -EINVAL;
  1640. }
  1641. return 0;
  1642. }
  1643. static int aes_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
  1644. unsigned int keylen)
  1645. {
  1646. struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
  1647. if (ctx->cipher.mode == CIPHER_MODE_XTS)
  1648. /* XTS includes two keys of equal length */
  1649. keylen = keylen / 2;
  1650. switch (keylen) {
  1651. case AES_KEYSIZE_128:
  1652. ctx->cipher_type = CIPHER_TYPE_AES128;
  1653. break;
  1654. case AES_KEYSIZE_192:
  1655. ctx->cipher_type = CIPHER_TYPE_AES192;
  1656. break;
  1657. case AES_KEYSIZE_256:
  1658. ctx->cipher_type = CIPHER_TYPE_AES256;
  1659. break;
  1660. default:
  1661. crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  1662. return -EINVAL;
  1663. }
  1664. WARN_ON((ctx->max_payload != SPU_MAX_PAYLOAD_INF) &&
  1665. ((ctx->max_payload % AES_BLOCK_SIZE) != 0));
  1666. return 0;
  1667. }
  1668. static int rc4_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
  1669. unsigned int keylen)
  1670. {
  1671. struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
  1672. int i;
  1673. ctx->enckeylen = ARC4_MAX_KEY_SIZE + ARC4_STATE_SIZE;
  1674. ctx->enckey[0] = 0x00; /* 0x00 */
  1675. ctx->enckey[1] = 0x00; /* i */
  1676. ctx->enckey[2] = 0x00; /* 0x00 */
  1677. ctx->enckey[3] = 0x00; /* j */
  1678. for (i = 0; i < ARC4_MAX_KEY_SIZE; i++)
  1679. ctx->enckey[i + ARC4_STATE_SIZE] = key[i % keylen];
  1680. ctx->cipher_type = CIPHER_TYPE_INIT;
  1681. return 0;
  1682. }
  1683. static int ablkcipher_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
  1684. unsigned int keylen)
  1685. {
  1686. struct spu_hw *spu = &iproc_priv.spu;
  1687. struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
  1688. struct spu_cipher_parms cipher_parms;
  1689. u32 alloc_len = 0;
  1690. int err;
  1691. flow_log("ablkcipher_setkey() keylen: %d\n", keylen);
  1692. flow_dump(" key: ", key, keylen);
  1693. switch (ctx->cipher.alg) {
  1694. case CIPHER_ALG_DES:
  1695. err = des_setkey(cipher, key, keylen);
  1696. break;
  1697. case CIPHER_ALG_3DES:
  1698. err = threedes_setkey(cipher, key, keylen);
  1699. break;
  1700. case CIPHER_ALG_AES:
  1701. err = aes_setkey(cipher, key, keylen);
  1702. break;
  1703. case CIPHER_ALG_RC4:
  1704. err = rc4_setkey(cipher, key, keylen);
  1705. break;
  1706. default:
  1707. pr_err("%s() Error: unknown cipher alg\n", __func__);
  1708. err = -EINVAL;
  1709. }
  1710. if (err)
  1711. return err;
  1712. /* RC4 already populated ctx->enkey */
  1713. if (ctx->cipher.alg != CIPHER_ALG_RC4) {
  1714. memcpy(ctx->enckey, key, keylen);
  1715. ctx->enckeylen = keylen;
  1716. }
  1717. /* SPU needs XTS keys in the reverse order the crypto API presents */
  1718. if ((ctx->cipher.alg == CIPHER_ALG_AES) &&
  1719. (ctx->cipher.mode == CIPHER_MODE_XTS)) {
  1720. unsigned int xts_keylen = keylen / 2;
  1721. memcpy(ctx->enckey, key + xts_keylen, xts_keylen);
  1722. memcpy(ctx->enckey + xts_keylen, key, xts_keylen);
  1723. }
  1724. if (spu->spu_type == SPU_TYPE_SPUM)
  1725. alloc_len = BCM_HDR_LEN + SPU_HEADER_ALLOC_LEN;
  1726. else if (spu->spu_type == SPU_TYPE_SPU2)
  1727. alloc_len = BCM_HDR_LEN + SPU2_HEADER_ALLOC_LEN;
  1728. memset(ctx->bcm_spu_req_hdr, 0, alloc_len);
  1729. cipher_parms.iv_buf = NULL;
  1730. cipher_parms.iv_len = crypto_ablkcipher_ivsize(cipher);
  1731. flow_log("%s: iv_len %u\n", __func__, cipher_parms.iv_len);
  1732. cipher_parms.alg = ctx->cipher.alg;
  1733. cipher_parms.mode = ctx->cipher.mode;
  1734. cipher_parms.type = ctx->cipher_type;
  1735. cipher_parms.key_buf = ctx->enckey;
  1736. cipher_parms.key_len = ctx->enckeylen;
  1737. /* Prepend SPU request message with BCM header */
  1738. memcpy(ctx->bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN);
  1739. ctx->spu_req_hdr_len =
  1740. spu->spu_cipher_req_init(ctx->bcm_spu_req_hdr + BCM_HDR_LEN,
  1741. &cipher_parms);
  1742. ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
  1743. ctx->enckeylen,
  1744. false);
  1745. atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_CIPHER]);
  1746. return 0;
  1747. }
  1748. static int ablkcipher_encrypt(struct ablkcipher_request *req)
  1749. {
  1750. flow_log("ablkcipher_encrypt() nbytes:%u\n", req->nbytes);
  1751. return ablkcipher_enqueue(req, true);
  1752. }
  1753. static int ablkcipher_decrypt(struct ablkcipher_request *req)
  1754. {
  1755. flow_log("ablkcipher_decrypt() nbytes:%u\n", req->nbytes);
  1756. return ablkcipher_enqueue(req, false);
  1757. }
  1758. static int ahash_enqueue(struct ahash_request *req)
  1759. {
  1760. struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
  1761. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  1762. struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
  1763. int err = 0;
  1764. const char *alg_name;
  1765. flow_log("ahash_enqueue() nbytes:%u\n", req->nbytes);
  1766. rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
  1767. CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
  1768. rctx->parent = &req->base;
  1769. rctx->ctx = ctx;
  1770. rctx->bd_suppress = true;
  1771. memset(&rctx->mb_mssg, 0, sizeof(struct brcm_message));
  1772. /* Initialize position in src scatterlist */
  1773. rctx->src_sg = req->src;
  1774. rctx->src_skip = 0;
  1775. rctx->src_nents = 0;
  1776. rctx->dst_sg = NULL;
  1777. rctx->dst_skip = 0;
  1778. rctx->dst_nents = 0;
  1779. /* SPU2 hardware does not compute hash of zero length data */
  1780. if ((rctx->is_final == 1) && (rctx->total_todo == 0) &&
  1781. (iproc_priv.spu.spu_type == SPU_TYPE_SPU2)) {
  1782. alg_name = crypto_tfm_alg_name(crypto_ahash_tfm(tfm));
  1783. flow_log("Doing %sfinal %s zero-len hash request in software\n",
  1784. rctx->is_final ? "" : "non-", alg_name);
  1785. err = do_shash((unsigned char *)alg_name, req->result,
  1786. NULL, 0, NULL, 0, ctx->authkey,
  1787. ctx->authkeylen);
  1788. if (err < 0)
  1789. flow_log("Hash request failed with error %d\n", err);
  1790. return err;
  1791. }
  1792. /* Choose a SPU to process this request */
  1793. rctx->chan_idx = select_channel();
  1794. err = handle_ahash_req(rctx);
  1795. if (err != -EINPROGRESS)
  1796. /* synchronous result */
  1797. spu_chunk_cleanup(rctx);
  1798. if (err == -EAGAIN)
  1799. /*
  1800. * we saved data in hash carry, but tell crypto API
  1801. * we successfully completed request.
  1802. */
  1803. err = 0;
  1804. return err;
  1805. }
  1806. static int __ahash_init(struct ahash_request *req)
  1807. {
  1808. struct spu_hw *spu = &iproc_priv.spu;
  1809. struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
  1810. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  1811. struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
  1812. flow_log("%s()\n", __func__);
  1813. /* Initialize the context */
  1814. rctx->hash_carry_len = 0;
  1815. rctx->is_final = 0;
  1816. rctx->total_todo = 0;
  1817. rctx->src_sent = 0;
  1818. rctx->total_sent = 0;
  1819. rctx->total_received = 0;
  1820. ctx->digestsize = crypto_ahash_digestsize(tfm);
  1821. /* If we add a hash whose digest is larger, catch it here. */
  1822. WARN_ON(ctx->digestsize > MAX_DIGEST_SIZE);
  1823. rctx->is_sw_hmac = false;
  1824. ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen, 0,
  1825. true);
  1826. return 0;
  1827. }
  1828. /**
  1829. * spu_no_incr_hash() - Determine whether incremental hashing is supported.
  1830. * @ctx: Crypto session context
  1831. *
  1832. * SPU-2 does not support incremental hashing (we'll have to revisit and
  1833. * condition based on chip revision or device tree entry if future versions do
  1834. * support incremental hash)
  1835. *
  1836. * SPU-M also doesn't support incremental hashing of AES-XCBC
  1837. *
  1838. * Return: true if incremental hashing is not supported
  1839. * false otherwise
  1840. */
  1841. bool spu_no_incr_hash(struct iproc_ctx_s *ctx)
  1842. {
  1843. struct spu_hw *spu = &iproc_priv.spu;
  1844. if (spu->spu_type == SPU_TYPE_SPU2)
  1845. return true;
  1846. if ((ctx->auth.alg == HASH_ALG_AES) &&
  1847. (ctx->auth.mode == HASH_MODE_XCBC))
  1848. return true;
  1849. /* Otherwise, incremental hashing is supported */
  1850. return false;
  1851. }
  1852. static int ahash_init(struct ahash_request *req)
  1853. {
  1854. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  1855. struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
  1856. const char *alg_name;
  1857. struct crypto_shash *hash;
  1858. int ret;
  1859. gfp_t gfp;
  1860. if (spu_no_incr_hash(ctx)) {
  1861. /*
  1862. * If we get an incremental hashing request and it's not
  1863. * supported by the hardware, we need to handle it in software
  1864. * by calling synchronous hash functions.
  1865. */
  1866. alg_name = crypto_tfm_alg_name(crypto_ahash_tfm(tfm));
  1867. hash = crypto_alloc_shash(alg_name, 0, 0);
  1868. if (IS_ERR(hash)) {
  1869. ret = PTR_ERR(hash);
  1870. goto err;
  1871. }
  1872. gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
  1873. CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
  1874. ctx->shash = kmalloc(sizeof(*ctx->shash) +
  1875. crypto_shash_descsize(hash), gfp);
  1876. if (!ctx->shash) {
  1877. ret = -ENOMEM;
  1878. goto err_hash;
  1879. }
  1880. ctx->shash->tfm = hash;
  1881. ctx->shash->flags = 0;
  1882. /* Set the key using data we already have from setkey */
  1883. if (ctx->authkeylen > 0) {
  1884. ret = crypto_shash_setkey(hash, ctx->authkey,
  1885. ctx->authkeylen);
  1886. if (ret)
  1887. goto err_shash;
  1888. }
  1889. /* Initialize hash w/ this key and other params */
  1890. ret = crypto_shash_init(ctx->shash);
  1891. if (ret)
  1892. goto err_shash;
  1893. } else {
  1894. /* Otherwise call the internal function which uses SPU hw */
  1895. ret = __ahash_init(req);
  1896. }
  1897. return ret;
  1898. err_shash:
  1899. kfree(ctx->shash);
  1900. err_hash:
  1901. crypto_free_shash(hash);
  1902. err:
  1903. return ret;
  1904. }
  1905. static int __ahash_update(struct ahash_request *req)
  1906. {
  1907. struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
  1908. flow_log("ahash_update() nbytes:%u\n", req->nbytes);
  1909. if (!req->nbytes)
  1910. return 0;
  1911. rctx->total_todo += req->nbytes;
  1912. rctx->src_sent = 0;
  1913. return ahash_enqueue(req);
  1914. }
  1915. static int ahash_update(struct ahash_request *req)
  1916. {
  1917. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  1918. struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
  1919. u8 *tmpbuf;
  1920. int ret;
  1921. int nents;
  1922. gfp_t gfp;
  1923. if (spu_no_incr_hash(ctx)) {
  1924. /*
  1925. * If we get an incremental hashing request and it's not
  1926. * supported by the hardware, we need to handle it in software
  1927. * by calling synchronous hash functions.
  1928. */
  1929. if (req->src)
  1930. nents = sg_nents(req->src);
  1931. else
  1932. return -EINVAL;
  1933. /* Copy data from req scatterlist to tmp buffer */
  1934. gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
  1935. CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
  1936. tmpbuf = kmalloc(req->nbytes, gfp);
  1937. if (!tmpbuf)
  1938. return -ENOMEM;
  1939. if (sg_copy_to_buffer(req->src, nents, tmpbuf, req->nbytes) !=
  1940. req->nbytes) {
  1941. kfree(tmpbuf);
  1942. return -EINVAL;
  1943. }
  1944. /* Call synchronous update */
  1945. ret = crypto_shash_update(ctx->shash, tmpbuf, req->nbytes);
  1946. kfree(tmpbuf);
  1947. } else {
  1948. /* Otherwise call the internal function which uses SPU hw */
  1949. ret = __ahash_update(req);
  1950. }
  1951. return ret;
  1952. }
  1953. static int __ahash_final(struct ahash_request *req)
  1954. {
  1955. struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
  1956. flow_log("ahash_final() nbytes:%u\n", req->nbytes);
  1957. rctx->is_final = 1;
  1958. return ahash_enqueue(req);
  1959. }
  1960. static int ahash_final(struct ahash_request *req)
  1961. {
  1962. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  1963. struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
  1964. int ret;
  1965. if (spu_no_incr_hash(ctx)) {
  1966. /*
  1967. * If we get an incremental hashing request and it's not
  1968. * supported by the hardware, we need to handle it in software
  1969. * by calling synchronous hash functions.
  1970. */
  1971. ret = crypto_shash_final(ctx->shash, req->result);
  1972. /* Done with hash, can deallocate it now */
  1973. crypto_free_shash(ctx->shash->tfm);
  1974. kfree(ctx->shash);
  1975. } else {
  1976. /* Otherwise call the internal function which uses SPU hw */
  1977. ret = __ahash_final(req);
  1978. }
  1979. return ret;
  1980. }
  1981. static int __ahash_finup(struct ahash_request *req)
  1982. {
  1983. struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
  1984. flow_log("ahash_finup() nbytes:%u\n", req->nbytes);
  1985. rctx->total_todo += req->nbytes;
  1986. rctx->src_sent = 0;
  1987. rctx->is_final = 1;
  1988. return ahash_enqueue(req);
  1989. }
  1990. static int ahash_finup(struct ahash_request *req)
  1991. {
  1992. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  1993. struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
  1994. u8 *tmpbuf;
  1995. int ret;
  1996. int nents;
  1997. gfp_t gfp;
  1998. if (spu_no_incr_hash(ctx)) {
  1999. /*
  2000. * If we get an incremental hashing request and it's not
  2001. * supported by the hardware, we need to handle it in software
  2002. * by calling synchronous hash functions.
  2003. */
  2004. if (req->src) {
  2005. nents = sg_nents(req->src);
  2006. } else {
  2007. ret = -EINVAL;
  2008. goto ahash_finup_exit;
  2009. }
  2010. /* Copy data from req scatterlist to tmp buffer */
  2011. gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
  2012. CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
  2013. tmpbuf = kmalloc(req->nbytes, gfp);
  2014. if (!tmpbuf) {
  2015. ret = -ENOMEM;
  2016. goto ahash_finup_exit;
  2017. }
  2018. if (sg_copy_to_buffer(req->src, nents, tmpbuf, req->nbytes) !=
  2019. req->nbytes) {
  2020. ret = -EINVAL;
  2021. goto ahash_finup_free;
  2022. }
  2023. /* Call synchronous update */
  2024. ret = crypto_shash_finup(ctx->shash, tmpbuf, req->nbytes,
  2025. req->result);
  2026. } else {
  2027. /* Otherwise call the internal function which uses SPU hw */
  2028. return __ahash_finup(req);
  2029. }
  2030. ahash_finup_free:
  2031. kfree(tmpbuf);
  2032. ahash_finup_exit:
  2033. /* Done with hash, can deallocate it now */
  2034. crypto_free_shash(ctx->shash->tfm);
  2035. kfree(ctx->shash);
  2036. return ret;
  2037. }
  2038. static int ahash_digest(struct ahash_request *req)
  2039. {
  2040. int err = 0;
  2041. flow_log("ahash_digest() nbytes:%u\n", req->nbytes);
  2042. /* whole thing at once */
  2043. err = __ahash_init(req);
  2044. if (!err)
  2045. err = __ahash_finup(req);
  2046. return err;
  2047. }
  2048. static int ahash_setkey(struct crypto_ahash *ahash, const u8 *key,
  2049. unsigned int keylen)
  2050. {
  2051. struct iproc_ctx_s *ctx = crypto_ahash_ctx(ahash);
  2052. flow_log("%s() ahash:%p key:%p keylen:%u\n",
  2053. __func__, ahash, key, keylen);
  2054. flow_dump(" key: ", key, keylen);
  2055. if (ctx->auth.alg == HASH_ALG_AES) {
  2056. switch (keylen) {
  2057. case AES_KEYSIZE_128:
  2058. ctx->cipher_type = CIPHER_TYPE_AES128;
  2059. break;
  2060. case AES_KEYSIZE_192:
  2061. ctx->cipher_type = CIPHER_TYPE_AES192;
  2062. break;
  2063. case AES_KEYSIZE_256:
  2064. ctx->cipher_type = CIPHER_TYPE_AES256;
  2065. break;
  2066. default:
  2067. pr_err("%s() Error: Invalid key length\n", __func__);
  2068. return -EINVAL;
  2069. }
  2070. } else {
  2071. pr_err("%s() Error: unknown hash alg\n", __func__);
  2072. return -EINVAL;
  2073. }
  2074. memcpy(ctx->authkey, key, keylen);
  2075. ctx->authkeylen = keylen;
  2076. return 0;
  2077. }
  2078. static int ahash_export(struct ahash_request *req, void *out)
  2079. {
  2080. const struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
  2081. struct spu_hash_export_s *spu_exp = (struct spu_hash_export_s *)out;
  2082. spu_exp->total_todo = rctx->total_todo;
  2083. spu_exp->total_sent = rctx->total_sent;
  2084. spu_exp->is_sw_hmac = rctx->is_sw_hmac;
  2085. memcpy(spu_exp->hash_carry, rctx->hash_carry, sizeof(rctx->hash_carry));
  2086. spu_exp->hash_carry_len = rctx->hash_carry_len;
  2087. memcpy(spu_exp->incr_hash, rctx->incr_hash, sizeof(rctx->incr_hash));
  2088. return 0;
  2089. }
  2090. static int ahash_import(struct ahash_request *req, const void *in)
  2091. {
  2092. struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
  2093. struct spu_hash_export_s *spu_exp = (struct spu_hash_export_s *)in;
  2094. rctx->total_todo = spu_exp->total_todo;
  2095. rctx->total_sent = spu_exp->total_sent;
  2096. rctx->is_sw_hmac = spu_exp->is_sw_hmac;
  2097. memcpy(rctx->hash_carry, spu_exp->hash_carry, sizeof(rctx->hash_carry));
  2098. rctx->hash_carry_len = spu_exp->hash_carry_len;
  2099. memcpy(rctx->incr_hash, spu_exp->incr_hash, sizeof(rctx->incr_hash));
  2100. return 0;
  2101. }
  2102. static int ahash_hmac_setkey(struct crypto_ahash *ahash, const u8 *key,
  2103. unsigned int keylen)
  2104. {
  2105. struct iproc_ctx_s *ctx = crypto_ahash_ctx(ahash);
  2106. unsigned int blocksize =
  2107. crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash));
  2108. unsigned int digestsize = crypto_ahash_digestsize(ahash);
  2109. unsigned int index;
  2110. int rc;
  2111. flow_log("%s() ahash:%p key:%p keylen:%u blksz:%u digestsz:%u\n",
  2112. __func__, ahash, key, keylen, blocksize, digestsize);
  2113. flow_dump(" key: ", key, keylen);
  2114. if (keylen > blocksize) {
  2115. switch (ctx->auth.alg) {
  2116. case HASH_ALG_MD5:
  2117. rc = do_shash("md5", ctx->authkey, key, keylen, NULL,
  2118. 0, NULL, 0);
  2119. break;
  2120. case HASH_ALG_SHA1:
  2121. rc = do_shash("sha1", ctx->authkey, key, keylen, NULL,
  2122. 0, NULL, 0);
  2123. break;
  2124. case HASH_ALG_SHA224:
  2125. rc = do_shash("sha224", ctx->authkey, key, keylen, NULL,
  2126. 0, NULL, 0);
  2127. break;
  2128. case HASH_ALG_SHA256:
  2129. rc = do_shash("sha256", ctx->authkey, key, keylen, NULL,
  2130. 0, NULL, 0);
  2131. break;
  2132. case HASH_ALG_SHA384:
  2133. rc = do_shash("sha384", ctx->authkey, key, keylen, NULL,
  2134. 0, NULL, 0);
  2135. break;
  2136. case HASH_ALG_SHA512:
  2137. rc = do_shash("sha512", ctx->authkey, key, keylen, NULL,
  2138. 0, NULL, 0);
  2139. break;
  2140. case HASH_ALG_SHA3_224:
  2141. rc = do_shash("sha3-224", ctx->authkey, key, keylen,
  2142. NULL, 0, NULL, 0);
  2143. break;
  2144. case HASH_ALG_SHA3_256:
  2145. rc = do_shash("sha3-256", ctx->authkey, key, keylen,
  2146. NULL, 0, NULL, 0);
  2147. break;
  2148. case HASH_ALG_SHA3_384:
  2149. rc = do_shash("sha3-384", ctx->authkey, key, keylen,
  2150. NULL, 0, NULL, 0);
  2151. break;
  2152. case HASH_ALG_SHA3_512:
  2153. rc = do_shash("sha3-512", ctx->authkey, key, keylen,
  2154. NULL, 0, NULL, 0);
  2155. break;
  2156. default:
  2157. pr_err("%s() Error: unknown hash alg\n", __func__);
  2158. return -EINVAL;
  2159. }
  2160. if (rc < 0) {
  2161. pr_err("%s() Error %d computing shash for %s\n",
  2162. __func__, rc, hash_alg_name[ctx->auth.alg]);
  2163. return rc;
  2164. }
  2165. ctx->authkeylen = digestsize;
  2166. flow_log(" keylen > digestsize... hashed\n");
  2167. flow_dump(" newkey: ", ctx->authkey, ctx->authkeylen);
  2168. } else {
  2169. memcpy(ctx->authkey, key, keylen);
  2170. ctx->authkeylen = keylen;
  2171. }
  2172. /*
  2173. * Full HMAC operation in SPUM is not verified,
  2174. * So keeping the generation of IPAD, OPAD and
  2175. * outer hashing in software.
  2176. */
  2177. if (iproc_priv.spu.spu_type == SPU_TYPE_SPUM) {
  2178. memcpy(ctx->ipad, ctx->authkey, ctx->authkeylen);
  2179. memset(ctx->ipad + ctx->authkeylen, 0,
  2180. blocksize - ctx->authkeylen);
  2181. ctx->authkeylen = 0;
  2182. memcpy(ctx->opad, ctx->ipad, blocksize);
  2183. for (index = 0; index < blocksize; index++) {
  2184. ctx->ipad[index] ^= HMAC_IPAD_VALUE;
  2185. ctx->opad[index] ^= HMAC_OPAD_VALUE;
  2186. }
  2187. flow_dump(" ipad: ", ctx->ipad, blocksize);
  2188. flow_dump(" opad: ", ctx->opad, blocksize);
  2189. }
  2190. ctx->digestsize = digestsize;
  2191. atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_HMAC]);
  2192. return 0;
  2193. }
  2194. static int ahash_hmac_init(struct ahash_request *req)
  2195. {
  2196. struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
  2197. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2198. struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
  2199. unsigned int blocksize =
  2200. crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
  2201. flow_log("ahash_hmac_init()\n");
  2202. /* init the context as a hash */
  2203. ahash_init(req);
  2204. if (!spu_no_incr_hash(ctx)) {
  2205. /* SPU-M can do incr hashing but needs sw for outer HMAC */
  2206. rctx->is_sw_hmac = true;
  2207. ctx->auth.mode = HASH_MODE_HASH;
  2208. /* start with a prepended ipad */
  2209. memcpy(rctx->hash_carry, ctx->ipad, blocksize);
  2210. rctx->hash_carry_len = blocksize;
  2211. rctx->total_todo += blocksize;
  2212. }
  2213. return 0;
  2214. }
  2215. static int ahash_hmac_update(struct ahash_request *req)
  2216. {
  2217. flow_log("ahash_hmac_update() nbytes:%u\n", req->nbytes);
  2218. if (!req->nbytes)
  2219. return 0;
  2220. return ahash_update(req);
  2221. }
  2222. static int ahash_hmac_final(struct ahash_request *req)
  2223. {
  2224. flow_log("ahash_hmac_final() nbytes:%u\n", req->nbytes);
  2225. return ahash_final(req);
  2226. }
  2227. static int ahash_hmac_finup(struct ahash_request *req)
  2228. {
  2229. flow_log("ahash_hmac_finupl() nbytes:%u\n", req->nbytes);
  2230. return ahash_finup(req);
  2231. }
  2232. static int ahash_hmac_digest(struct ahash_request *req)
  2233. {
  2234. struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
  2235. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2236. struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
  2237. unsigned int blocksize =
  2238. crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
  2239. flow_log("ahash_hmac_digest() nbytes:%u\n", req->nbytes);
  2240. /* Perform initialization and then call finup */
  2241. __ahash_init(req);
  2242. if (iproc_priv.spu.spu_type == SPU_TYPE_SPU2) {
  2243. /*
  2244. * SPU2 supports full HMAC implementation in the
  2245. * hardware, need not to generate IPAD, OPAD and
  2246. * outer hash in software.
  2247. * Only for hash key len > hash block size, SPU2
  2248. * expects to perform hashing on the key, shorten
  2249. * it to digest size and feed it as hash key.
  2250. */
  2251. rctx->is_sw_hmac = false;
  2252. ctx->auth.mode = HASH_MODE_HMAC;
  2253. } else {
  2254. rctx->is_sw_hmac = true;
  2255. ctx->auth.mode = HASH_MODE_HASH;
  2256. /* start with a prepended ipad */
  2257. memcpy(rctx->hash_carry, ctx->ipad, blocksize);
  2258. rctx->hash_carry_len = blocksize;
  2259. rctx->total_todo += blocksize;
  2260. }
  2261. return __ahash_finup(req);
  2262. }
  2263. /* aead helpers */
  2264. static int aead_need_fallback(struct aead_request *req)
  2265. {
  2266. struct iproc_reqctx_s *rctx = aead_request_ctx(req);
  2267. struct spu_hw *spu = &iproc_priv.spu;
  2268. struct crypto_aead *aead = crypto_aead_reqtfm(req);
  2269. struct iproc_ctx_s *ctx = crypto_aead_ctx(aead);
  2270. u32 payload_len;
  2271. /*
  2272. * SPU hardware cannot handle the AES-GCM/CCM case where plaintext
  2273. * and AAD are both 0 bytes long. So use fallback in this case.
  2274. */
  2275. if (((ctx->cipher.mode == CIPHER_MODE_GCM) ||
  2276. (ctx->cipher.mode == CIPHER_MODE_CCM)) &&
  2277. (req->assoclen == 0)) {
  2278. if ((rctx->is_encrypt && (req->cryptlen == 0)) ||
  2279. (!rctx->is_encrypt && (req->cryptlen == ctx->digestsize))) {
  2280. flow_log("AES GCM/CCM needs fallback for 0 len req\n");
  2281. return 1;
  2282. }
  2283. }
  2284. /* SPU-M hardware only supports CCM digest size of 8, 12, or 16 bytes */
  2285. if ((ctx->cipher.mode == CIPHER_MODE_CCM) &&
  2286. (spu->spu_type == SPU_TYPE_SPUM) &&
  2287. (ctx->digestsize != 8) && (ctx->digestsize != 12) &&
  2288. (ctx->digestsize != 16)) {
  2289. flow_log("%s() AES CCM needs fallbck for digest size %d\n",
  2290. __func__, ctx->digestsize);
  2291. return 1;
  2292. }
  2293. /*
  2294. * SPU-M on NSP has an issue where AES-CCM hash is not correct
  2295. * when AAD size is 0
  2296. */
  2297. if ((ctx->cipher.mode == CIPHER_MODE_CCM) &&
  2298. (spu->spu_subtype == SPU_SUBTYPE_SPUM_NSP) &&
  2299. (req->assoclen == 0)) {
  2300. flow_log("%s() AES_CCM needs fallback for 0 len AAD on NSP\n",
  2301. __func__);
  2302. return 1;
  2303. }
  2304. payload_len = req->cryptlen;
  2305. if (spu->spu_type == SPU_TYPE_SPUM)
  2306. payload_len += req->assoclen;
  2307. flow_log("%s() payload len: %u\n", __func__, payload_len);
  2308. if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
  2309. return 0;
  2310. else
  2311. return payload_len > ctx->max_payload;
  2312. }
  2313. static void aead_complete(struct crypto_async_request *areq, int err)
  2314. {
  2315. struct aead_request *req =
  2316. container_of(areq, struct aead_request, base);
  2317. struct iproc_reqctx_s *rctx = aead_request_ctx(req);
  2318. struct crypto_aead *aead = crypto_aead_reqtfm(req);
  2319. flow_log("%s() err:%d\n", __func__, err);
  2320. areq->tfm = crypto_aead_tfm(aead);
  2321. areq->complete = rctx->old_complete;
  2322. areq->data = rctx->old_data;
  2323. areq->complete(areq, err);
  2324. }
  2325. static int aead_do_fallback(struct aead_request *req, bool is_encrypt)
  2326. {
  2327. struct crypto_aead *aead = crypto_aead_reqtfm(req);
  2328. struct crypto_tfm *tfm = crypto_aead_tfm(aead);
  2329. struct iproc_reqctx_s *rctx = aead_request_ctx(req);
  2330. struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
  2331. int err;
  2332. u32 req_flags;
  2333. flow_log("%s() enc:%u\n", __func__, is_encrypt);
  2334. if (ctx->fallback_cipher) {
  2335. /* Store the cipher tfm and then use the fallback tfm */
  2336. rctx->old_tfm = tfm;
  2337. aead_request_set_tfm(req, ctx->fallback_cipher);
  2338. /*
  2339. * Save the callback and chain ourselves in, so we can restore
  2340. * the tfm
  2341. */
  2342. rctx->old_complete = req->base.complete;
  2343. rctx->old_data = req->base.data;
  2344. req_flags = aead_request_flags(req);
  2345. aead_request_set_callback(req, req_flags, aead_complete, req);
  2346. err = is_encrypt ? crypto_aead_encrypt(req) :
  2347. crypto_aead_decrypt(req);
  2348. if (err == 0) {
  2349. /*
  2350. * fallback was synchronous (did not return
  2351. * -EINPROGRESS). So restore request state here.
  2352. */
  2353. aead_request_set_callback(req, req_flags,
  2354. rctx->old_complete, req);
  2355. req->base.data = rctx->old_data;
  2356. aead_request_set_tfm(req, aead);
  2357. flow_log("%s() fallback completed successfully\n\n",
  2358. __func__);
  2359. }
  2360. } else {
  2361. err = -EINVAL;
  2362. }
  2363. return err;
  2364. }
  2365. static int aead_enqueue(struct aead_request *req, bool is_encrypt)
  2366. {
  2367. struct iproc_reqctx_s *rctx = aead_request_ctx(req);
  2368. struct crypto_aead *aead = crypto_aead_reqtfm(req);
  2369. struct iproc_ctx_s *ctx = crypto_aead_ctx(aead);
  2370. int err;
  2371. flow_log("%s() enc:%u\n", __func__, is_encrypt);
  2372. if (req->assoclen > MAX_ASSOC_SIZE) {
  2373. pr_err
  2374. ("%s() Error: associated data too long. (%u > %u bytes)\n",
  2375. __func__, req->assoclen, MAX_ASSOC_SIZE);
  2376. return -EINVAL;
  2377. }
  2378. rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
  2379. CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
  2380. rctx->parent = &req->base;
  2381. rctx->is_encrypt = is_encrypt;
  2382. rctx->bd_suppress = false;
  2383. rctx->total_todo = req->cryptlen;
  2384. rctx->src_sent = 0;
  2385. rctx->total_sent = 0;
  2386. rctx->total_received = 0;
  2387. rctx->is_sw_hmac = false;
  2388. rctx->ctx = ctx;
  2389. memset(&rctx->mb_mssg, 0, sizeof(struct brcm_message));
  2390. /* assoc data is at start of src sg */
  2391. rctx->assoc = req->src;
  2392. /*
  2393. * Init current position in src scatterlist to be after assoc data.
  2394. * src_skip set to buffer offset where data begins. (Assoc data could
  2395. * end in the middle of a buffer.)
  2396. */
  2397. if (spu_sg_at_offset(req->src, req->assoclen, &rctx->src_sg,
  2398. &rctx->src_skip) < 0) {
  2399. pr_err("%s() Error: Unable to find start of src data\n",
  2400. __func__);
  2401. return -EINVAL;
  2402. }
  2403. rctx->src_nents = 0;
  2404. rctx->dst_nents = 0;
  2405. if (req->dst == req->src) {
  2406. rctx->dst_sg = rctx->src_sg;
  2407. rctx->dst_skip = rctx->src_skip;
  2408. } else {
  2409. /*
  2410. * Expect req->dst to have room for assoc data followed by
  2411. * output data and ICV, if encrypt. So initialize dst_sg
  2412. * to point beyond assoc len offset.
  2413. */
  2414. if (spu_sg_at_offset(req->dst, req->assoclen, &rctx->dst_sg,
  2415. &rctx->dst_skip) < 0) {
  2416. pr_err("%s() Error: Unable to find start of dst data\n",
  2417. __func__);
  2418. return -EINVAL;
  2419. }
  2420. }
  2421. if (ctx->cipher.mode == CIPHER_MODE_CBC ||
  2422. ctx->cipher.mode == CIPHER_MODE_CTR ||
  2423. ctx->cipher.mode == CIPHER_MODE_OFB ||
  2424. ctx->cipher.mode == CIPHER_MODE_XTS ||
  2425. ctx->cipher.mode == CIPHER_MODE_GCM) {
  2426. rctx->iv_ctr_len =
  2427. ctx->salt_len +
  2428. crypto_aead_ivsize(crypto_aead_reqtfm(req));
  2429. } else if (ctx->cipher.mode == CIPHER_MODE_CCM) {
  2430. rctx->iv_ctr_len = CCM_AES_IV_SIZE;
  2431. } else {
  2432. rctx->iv_ctr_len = 0;
  2433. }
  2434. rctx->hash_carry_len = 0;
  2435. flow_log(" src sg: %p\n", req->src);
  2436. flow_log(" rctx->src_sg: %p, src_skip %u\n",
  2437. rctx->src_sg, rctx->src_skip);
  2438. flow_log(" assoc: %p, assoclen %u\n", rctx->assoc, req->assoclen);
  2439. flow_log(" dst sg: %p\n", req->dst);
  2440. flow_log(" rctx->dst_sg: %p, dst_skip %u\n",
  2441. rctx->dst_sg, rctx->dst_skip);
  2442. flow_log(" iv_ctr_len:%u\n", rctx->iv_ctr_len);
  2443. flow_dump(" iv: ", req->iv, rctx->iv_ctr_len);
  2444. flow_log(" authkeylen:%u\n", ctx->authkeylen);
  2445. flow_log(" is_esp: %s\n", ctx->is_esp ? "yes" : "no");
  2446. if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
  2447. flow_log(" max_payload infinite");
  2448. else
  2449. flow_log(" max_payload: %u\n", ctx->max_payload);
  2450. if (unlikely(aead_need_fallback(req)))
  2451. return aead_do_fallback(req, is_encrypt);
  2452. /*
  2453. * Do memory allocations for request after fallback check, because if we
  2454. * do fallback, we won't call finish_req() to dealloc.
  2455. */
  2456. if (rctx->iv_ctr_len) {
  2457. if (ctx->salt_len)
  2458. memcpy(rctx->msg_buf.iv_ctr + ctx->salt_offset,
  2459. ctx->salt, ctx->salt_len);
  2460. memcpy(rctx->msg_buf.iv_ctr + ctx->salt_offset + ctx->salt_len,
  2461. req->iv,
  2462. rctx->iv_ctr_len - ctx->salt_len - ctx->salt_offset);
  2463. }
  2464. rctx->chan_idx = select_channel();
  2465. err = handle_aead_req(rctx);
  2466. if (err != -EINPROGRESS)
  2467. /* synchronous result */
  2468. spu_chunk_cleanup(rctx);
  2469. return err;
  2470. }
  2471. static int aead_authenc_setkey(struct crypto_aead *cipher,
  2472. const u8 *key, unsigned int keylen)
  2473. {
  2474. struct spu_hw *spu = &iproc_priv.spu;
  2475. struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
  2476. struct crypto_tfm *tfm = crypto_aead_tfm(cipher);
  2477. struct rtattr *rta = (void *)key;
  2478. struct crypto_authenc_key_param *param;
  2479. const u8 *origkey = key;
  2480. const unsigned int origkeylen = keylen;
  2481. int ret = 0;
  2482. flow_log("%s() aead:%p key:%p keylen:%u\n", __func__, cipher, key,
  2483. keylen);
  2484. flow_dump(" key: ", key, keylen);
  2485. if (!RTA_OK(rta, keylen))
  2486. goto badkey;
  2487. if (rta->rta_type != CRYPTO_AUTHENC_KEYA_PARAM)
  2488. goto badkey;
  2489. if (RTA_PAYLOAD(rta) < sizeof(*param))
  2490. goto badkey;
  2491. param = RTA_DATA(rta);
  2492. ctx->enckeylen = be32_to_cpu(param->enckeylen);
  2493. key += RTA_ALIGN(rta->rta_len);
  2494. keylen -= RTA_ALIGN(rta->rta_len);
  2495. if (keylen < ctx->enckeylen)
  2496. goto badkey;
  2497. if (ctx->enckeylen > MAX_KEY_SIZE)
  2498. goto badkey;
  2499. ctx->authkeylen = keylen - ctx->enckeylen;
  2500. if (ctx->authkeylen > MAX_KEY_SIZE)
  2501. goto badkey;
  2502. memcpy(ctx->enckey, key + ctx->authkeylen, ctx->enckeylen);
  2503. /* May end up padding auth key. So make sure it's zeroed. */
  2504. memset(ctx->authkey, 0, sizeof(ctx->authkey));
  2505. memcpy(ctx->authkey, key, ctx->authkeylen);
  2506. switch (ctx->alg->cipher_info.alg) {
  2507. case CIPHER_ALG_DES:
  2508. if (ctx->enckeylen == DES_KEY_SIZE) {
  2509. u32 tmp[DES_EXPKEY_WORDS];
  2510. u32 flags = CRYPTO_TFM_RES_WEAK_KEY;
  2511. if (des_ekey(tmp, key) == 0) {
  2512. if (crypto_aead_get_flags(cipher) &
  2513. CRYPTO_TFM_REQ_WEAK_KEY) {
  2514. crypto_aead_set_flags(cipher, flags);
  2515. return -EINVAL;
  2516. }
  2517. }
  2518. ctx->cipher_type = CIPHER_TYPE_DES;
  2519. } else {
  2520. goto badkey;
  2521. }
  2522. break;
  2523. case CIPHER_ALG_3DES:
  2524. if (ctx->enckeylen == (DES_KEY_SIZE * 3)) {
  2525. const u32 *K = (const u32 *)key;
  2526. u32 flags = CRYPTO_TFM_RES_BAD_KEY_SCHED;
  2527. if (!((K[0] ^ K[2]) | (K[1] ^ K[3])) ||
  2528. !((K[2] ^ K[4]) | (K[3] ^ K[5]))) {
  2529. crypto_aead_set_flags(cipher, flags);
  2530. return -EINVAL;
  2531. }
  2532. ctx->cipher_type = CIPHER_TYPE_3DES;
  2533. } else {
  2534. crypto_aead_set_flags(cipher,
  2535. CRYPTO_TFM_RES_BAD_KEY_LEN);
  2536. return -EINVAL;
  2537. }
  2538. break;
  2539. case CIPHER_ALG_AES:
  2540. switch (ctx->enckeylen) {
  2541. case AES_KEYSIZE_128:
  2542. ctx->cipher_type = CIPHER_TYPE_AES128;
  2543. break;
  2544. case AES_KEYSIZE_192:
  2545. ctx->cipher_type = CIPHER_TYPE_AES192;
  2546. break;
  2547. case AES_KEYSIZE_256:
  2548. ctx->cipher_type = CIPHER_TYPE_AES256;
  2549. break;
  2550. default:
  2551. goto badkey;
  2552. }
  2553. break;
  2554. case CIPHER_ALG_RC4:
  2555. ctx->cipher_type = CIPHER_TYPE_INIT;
  2556. break;
  2557. default:
  2558. pr_err("%s() Error: Unknown cipher alg\n", __func__);
  2559. return -EINVAL;
  2560. }
  2561. flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen,
  2562. ctx->authkeylen);
  2563. flow_dump(" enc: ", ctx->enckey, ctx->enckeylen);
  2564. flow_dump(" auth: ", ctx->authkey, ctx->authkeylen);
  2565. /* setkey the fallback just in case we needto use it */
  2566. if (ctx->fallback_cipher) {
  2567. flow_log(" running fallback setkey()\n");
  2568. ctx->fallback_cipher->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK;
  2569. ctx->fallback_cipher->base.crt_flags |=
  2570. tfm->crt_flags & CRYPTO_TFM_REQ_MASK;
  2571. ret =
  2572. crypto_aead_setkey(ctx->fallback_cipher, origkey,
  2573. origkeylen);
  2574. if (ret) {
  2575. flow_log(" fallback setkey() returned:%d\n", ret);
  2576. tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK;
  2577. tfm->crt_flags |=
  2578. (ctx->fallback_cipher->base.crt_flags &
  2579. CRYPTO_TFM_RES_MASK);
  2580. }
  2581. }
  2582. ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
  2583. ctx->enckeylen,
  2584. false);
  2585. atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_AEAD]);
  2586. return ret;
  2587. badkey:
  2588. ctx->enckeylen = 0;
  2589. ctx->authkeylen = 0;
  2590. ctx->digestsize = 0;
  2591. crypto_aead_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  2592. return -EINVAL;
  2593. }
  2594. static int aead_gcm_ccm_setkey(struct crypto_aead *cipher,
  2595. const u8 *key, unsigned int keylen)
  2596. {
  2597. struct spu_hw *spu = &iproc_priv.spu;
  2598. struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
  2599. struct crypto_tfm *tfm = crypto_aead_tfm(cipher);
  2600. int ret = 0;
  2601. flow_log("%s() keylen:%u\n", __func__, keylen);
  2602. flow_dump(" key: ", key, keylen);
  2603. if (!ctx->is_esp)
  2604. ctx->digestsize = keylen;
  2605. ctx->enckeylen = keylen;
  2606. ctx->authkeylen = 0;
  2607. memcpy(ctx->enckey, key, ctx->enckeylen);
  2608. switch (ctx->enckeylen) {
  2609. case AES_KEYSIZE_128:
  2610. ctx->cipher_type = CIPHER_TYPE_AES128;
  2611. break;
  2612. case AES_KEYSIZE_192:
  2613. ctx->cipher_type = CIPHER_TYPE_AES192;
  2614. break;
  2615. case AES_KEYSIZE_256:
  2616. ctx->cipher_type = CIPHER_TYPE_AES256;
  2617. break;
  2618. default:
  2619. goto badkey;
  2620. }
  2621. flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen,
  2622. ctx->authkeylen);
  2623. flow_dump(" enc: ", ctx->enckey, ctx->enckeylen);
  2624. flow_dump(" auth: ", ctx->authkey, ctx->authkeylen);
  2625. /* setkey the fallback just in case we need to use it */
  2626. if (ctx->fallback_cipher) {
  2627. flow_log(" running fallback setkey()\n");
  2628. ctx->fallback_cipher->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK;
  2629. ctx->fallback_cipher->base.crt_flags |=
  2630. tfm->crt_flags & CRYPTO_TFM_REQ_MASK;
  2631. ret = crypto_aead_setkey(ctx->fallback_cipher, key,
  2632. keylen + ctx->salt_len);
  2633. if (ret) {
  2634. flow_log(" fallback setkey() returned:%d\n", ret);
  2635. tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK;
  2636. tfm->crt_flags |=
  2637. (ctx->fallback_cipher->base.crt_flags &
  2638. CRYPTO_TFM_RES_MASK);
  2639. }
  2640. }
  2641. ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
  2642. ctx->enckeylen,
  2643. false);
  2644. atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_AEAD]);
  2645. flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen,
  2646. ctx->authkeylen);
  2647. return ret;
  2648. badkey:
  2649. ctx->enckeylen = 0;
  2650. ctx->authkeylen = 0;
  2651. ctx->digestsize = 0;
  2652. crypto_aead_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  2653. return -EINVAL;
  2654. }
  2655. /**
  2656. * aead_gcm_esp_setkey() - setkey() operation for ESP variant of GCM AES.
  2657. * @cipher: AEAD structure
  2658. * @key: Key followed by 4 bytes of salt
  2659. * @keylen: Length of key plus salt, in bytes
  2660. *
  2661. * Extracts salt from key and stores it to be prepended to IV on each request.
  2662. * Digest is always 16 bytes
  2663. *
  2664. * Return: Value from generic gcm setkey.
  2665. */
  2666. static int aead_gcm_esp_setkey(struct crypto_aead *cipher,
  2667. const u8 *key, unsigned int keylen)
  2668. {
  2669. struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
  2670. flow_log("%s\n", __func__);
  2671. ctx->salt_len = GCM_ESP_SALT_SIZE;
  2672. ctx->salt_offset = GCM_ESP_SALT_OFFSET;
  2673. memcpy(ctx->salt, key + keylen - GCM_ESP_SALT_SIZE, GCM_ESP_SALT_SIZE);
  2674. keylen -= GCM_ESP_SALT_SIZE;
  2675. ctx->digestsize = GCM_ESP_DIGESTSIZE;
  2676. ctx->is_esp = true;
  2677. flow_dump("salt: ", ctx->salt, GCM_ESP_SALT_SIZE);
  2678. return aead_gcm_ccm_setkey(cipher, key, keylen);
  2679. }
  2680. /**
  2681. * rfc4543_gcm_esp_setkey() - setkey operation for RFC4543 variant of GCM/GMAC.
  2682. * cipher: AEAD structure
  2683. * key: Key followed by 4 bytes of salt
  2684. * keylen: Length of key plus salt, in bytes
  2685. *
  2686. * Extracts salt from key and stores it to be prepended to IV on each request.
  2687. * Digest is always 16 bytes
  2688. *
  2689. * Return: Value from generic gcm setkey.
  2690. */
  2691. static int rfc4543_gcm_esp_setkey(struct crypto_aead *cipher,
  2692. const u8 *key, unsigned int keylen)
  2693. {
  2694. struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
  2695. flow_log("%s\n", __func__);
  2696. ctx->salt_len = GCM_ESP_SALT_SIZE;
  2697. ctx->salt_offset = GCM_ESP_SALT_OFFSET;
  2698. memcpy(ctx->salt, key + keylen - GCM_ESP_SALT_SIZE, GCM_ESP_SALT_SIZE);
  2699. keylen -= GCM_ESP_SALT_SIZE;
  2700. ctx->digestsize = GCM_ESP_DIGESTSIZE;
  2701. ctx->is_esp = true;
  2702. ctx->is_rfc4543 = true;
  2703. flow_dump("salt: ", ctx->salt, GCM_ESP_SALT_SIZE);
  2704. return aead_gcm_ccm_setkey(cipher, key, keylen);
  2705. }
  2706. /**
  2707. * aead_ccm_esp_setkey() - setkey() operation for ESP variant of CCM AES.
  2708. * @cipher: AEAD structure
  2709. * @key: Key followed by 4 bytes of salt
  2710. * @keylen: Length of key plus salt, in bytes
  2711. *
  2712. * Extracts salt from key and stores it to be prepended to IV on each request.
  2713. * Digest is always 16 bytes
  2714. *
  2715. * Return: Value from generic ccm setkey.
  2716. */
  2717. static int aead_ccm_esp_setkey(struct crypto_aead *cipher,
  2718. const u8 *key, unsigned int keylen)
  2719. {
  2720. struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
  2721. flow_log("%s\n", __func__);
  2722. ctx->salt_len = CCM_ESP_SALT_SIZE;
  2723. ctx->salt_offset = CCM_ESP_SALT_OFFSET;
  2724. memcpy(ctx->salt, key + keylen - CCM_ESP_SALT_SIZE, CCM_ESP_SALT_SIZE);
  2725. keylen -= CCM_ESP_SALT_SIZE;
  2726. ctx->is_esp = true;
  2727. flow_dump("salt: ", ctx->salt, CCM_ESP_SALT_SIZE);
  2728. return aead_gcm_ccm_setkey(cipher, key, keylen);
  2729. }
  2730. static int aead_setauthsize(struct crypto_aead *cipher, unsigned int authsize)
  2731. {
  2732. struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
  2733. int ret = 0;
  2734. flow_log("%s() authkeylen:%u authsize:%u\n",
  2735. __func__, ctx->authkeylen, authsize);
  2736. ctx->digestsize = authsize;
  2737. /* setkey the fallback just in case we needto use it */
  2738. if (ctx->fallback_cipher) {
  2739. flow_log(" running fallback setauth()\n");
  2740. ret = crypto_aead_setauthsize(ctx->fallback_cipher, authsize);
  2741. if (ret)
  2742. flow_log(" fallback setauth() returned:%d\n", ret);
  2743. }
  2744. return ret;
  2745. }
  2746. static int aead_encrypt(struct aead_request *req)
  2747. {
  2748. flow_log("%s() cryptlen:%u %08x\n", __func__, req->cryptlen,
  2749. req->cryptlen);
  2750. dump_sg(req->src, 0, req->cryptlen + req->assoclen);
  2751. flow_log(" assoc_len:%u\n", req->assoclen);
  2752. return aead_enqueue(req, true);
  2753. }
  2754. static int aead_decrypt(struct aead_request *req)
  2755. {
  2756. flow_log("%s() cryptlen:%u\n", __func__, req->cryptlen);
  2757. dump_sg(req->src, 0, req->cryptlen + req->assoclen);
  2758. flow_log(" assoc_len:%u\n", req->assoclen);
  2759. return aead_enqueue(req, false);
  2760. }
  2761. /* ==================== Supported Cipher Algorithms ==================== */
  2762. static struct iproc_alg_s driver_algs[] = {
  2763. {
  2764. .type = CRYPTO_ALG_TYPE_AEAD,
  2765. .alg.aead = {
  2766. .base = {
  2767. .cra_name = "gcm(aes)",
  2768. .cra_driver_name = "gcm-aes-iproc",
  2769. .cra_blocksize = AES_BLOCK_SIZE,
  2770. .cra_flags = CRYPTO_ALG_NEED_FALLBACK
  2771. },
  2772. .setkey = aead_gcm_ccm_setkey,
  2773. .ivsize = GCM_AES_IV_SIZE,
  2774. .maxauthsize = AES_BLOCK_SIZE,
  2775. },
  2776. .cipher_info = {
  2777. .alg = CIPHER_ALG_AES,
  2778. .mode = CIPHER_MODE_GCM,
  2779. },
  2780. .auth_info = {
  2781. .alg = HASH_ALG_AES,
  2782. .mode = HASH_MODE_GCM,
  2783. },
  2784. .auth_first = 0,
  2785. },
  2786. {
  2787. .type = CRYPTO_ALG_TYPE_AEAD,
  2788. .alg.aead = {
  2789. .base = {
  2790. .cra_name = "ccm(aes)",
  2791. .cra_driver_name = "ccm-aes-iproc",
  2792. .cra_blocksize = AES_BLOCK_SIZE,
  2793. .cra_flags = CRYPTO_ALG_NEED_FALLBACK
  2794. },
  2795. .setkey = aead_gcm_ccm_setkey,
  2796. .ivsize = CCM_AES_IV_SIZE,
  2797. .maxauthsize = AES_BLOCK_SIZE,
  2798. },
  2799. .cipher_info = {
  2800. .alg = CIPHER_ALG_AES,
  2801. .mode = CIPHER_MODE_CCM,
  2802. },
  2803. .auth_info = {
  2804. .alg = HASH_ALG_AES,
  2805. .mode = HASH_MODE_CCM,
  2806. },
  2807. .auth_first = 0,
  2808. },
  2809. {
  2810. .type = CRYPTO_ALG_TYPE_AEAD,
  2811. .alg.aead = {
  2812. .base = {
  2813. .cra_name = "rfc4106(gcm(aes))",
  2814. .cra_driver_name = "gcm-aes-esp-iproc",
  2815. .cra_blocksize = AES_BLOCK_SIZE,
  2816. .cra_flags = CRYPTO_ALG_NEED_FALLBACK
  2817. },
  2818. .setkey = aead_gcm_esp_setkey,
  2819. .ivsize = GCM_ESP_IV_SIZE,
  2820. .maxauthsize = AES_BLOCK_SIZE,
  2821. },
  2822. .cipher_info = {
  2823. .alg = CIPHER_ALG_AES,
  2824. .mode = CIPHER_MODE_GCM,
  2825. },
  2826. .auth_info = {
  2827. .alg = HASH_ALG_AES,
  2828. .mode = HASH_MODE_GCM,
  2829. },
  2830. .auth_first = 0,
  2831. },
  2832. {
  2833. .type = CRYPTO_ALG_TYPE_AEAD,
  2834. .alg.aead = {
  2835. .base = {
  2836. .cra_name = "rfc4309(ccm(aes))",
  2837. .cra_driver_name = "ccm-aes-esp-iproc",
  2838. .cra_blocksize = AES_BLOCK_SIZE,
  2839. .cra_flags = CRYPTO_ALG_NEED_FALLBACK
  2840. },
  2841. .setkey = aead_ccm_esp_setkey,
  2842. .ivsize = CCM_AES_IV_SIZE,
  2843. .maxauthsize = AES_BLOCK_SIZE,
  2844. },
  2845. .cipher_info = {
  2846. .alg = CIPHER_ALG_AES,
  2847. .mode = CIPHER_MODE_CCM,
  2848. },
  2849. .auth_info = {
  2850. .alg = HASH_ALG_AES,
  2851. .mode = HASH_MODE_CCM,
  2852. },
  2853. .auth_first = 0,
  2854. },
  2855. {
  2856. .type = CRYPTO_ALG_TYPE_AEAD,
  2857. .alg.aead = {
  2858. .base = {
  2859. .cra_name = "rfc4543(gcm(aes))",
  2860. .cra_driver_name = "gmac-aes-esp-iproc",
  2861. .cra_blocksize = AES_BLOCK_SIZE,
  2862. .cra_flags = CRYPTO_ALG_NEED_FALLBACK
  2863. },
  2864. .setkey = rfc4543_gcm_esp_setkey,
  2865. .ivsize = GCM_ESP_IV_SIZE,
  2866. .maxauthsize = AES_BLOCK_SIZE,
  2867. },
  2868. .cipher_info = {
  2869. .alg = CIPHER_ALG_AES,
  2870. .mode = CIPHER_MODE_GCM,
  2871. },
  2872. .auth_info = {
  2873. .alg = HASH_ALG_AES,
  2874. .mode = HASH_MODE_GCM,
  2875. },
  2876. .auth_first = 0,
  2877. },
  2878. {
  2879. .type = CRYPTO_ALG_TYPE_AEAD,
  2880. .alg.aead = {
  2881. .base = {
  2882. .cra_name = "authenc(hmac(md5),cbc(aes))",
  2883. .cra_driver_name = "authenc-hmac-md5-cbc-aes-iproc",
  2884. .cra_blocksize = AES_BLOCK_SIZE,
  2885. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  2886. },
  2887. .setkey = aead_authenc_setkey,
  2888. .ivsize = AES_BLOCK_SIZE,
  2889. .maxauthsize = MD5_DIGEST_SIZE,
  2890. },
  2891. .cipher_info = {
  2892. .alg = CIPHER_ALG_AES,
  2893. .mode = CIPHER_MODE_CBC,
  2894. },
  2895. .auth_info = {
  2896. .alg = HASH_ALG_MD5,
  2897. .mode = HASH_MODE_HMAC,
  2898. },
  2899. .auth_first = 0,
  2900. },
  2901. {
  2902. .type = CRYPTO_ALG_TYPE_AEAD,
  2903. .alg.aead = {
  2904. .base = {
  2905. .cra_name = "authenc(hmac(sha1),cbc(aes))",
  2906. .cra_driver_name = "authenc-hmac-sha1-cbc-aes-iproc",
  2907. .cra_blocksize = AES_BLOCK_SIZE,
  2908. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  2909. },
  2910. .setkey = aead_authenc_setkey,
  2911. .ivsize = AES_BLOCK_SIZE,
  2912. .maxauthsize = SHA1_DIGEST_SIZE,
  2913. },
  2914. .cipher_info = {
  2915. .alg = CIPHER_ALG_AES,
  2916. .mode = CIPHER_MODE_CBC,
  2917. },
  2918. .auth_info = {
  2919. .alg = HASH_ALG_SHA1,
  2920. .mode = HASH_MODE_HMAC,
  2921. },
  2922. .auth_first = 0,
  2923. },
  2924. {
  2925. .type = CRYPTO_ALG_TYPE_AEAD,
  2926. .alg.aead = {
  2927. .base = {
  2928. .cra_name = "authenc(hmac(sha256),cbc(aes))",
  2929. .cra_driver_name = "authenc-hmac-sha256-cbc-aes-iproc",
  2930. .cra_blocksize = AES_BLOCK_SIZE,
  2931. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  2932. },
  2933. .setkey = aead_authenc_setkey,
  2934. .ivsize = AES_BLOCK_SIZE,
  2935. .maxauthsize = SHA256_DIGEST_SIZE,
  2936. },
  2937. .cipher_info = {
  2938. .alg = CIPHER_ALG_AES,
  2939. .mode = CIPHER_MODE_CBC,
  2940. },
  2941. .auth_info = {
  2942. .alg = HASH_ALG_SHA256,
  2943. .mode = HASH_MODE_HMAC,
  2944. },
  2945. .auth_first = 0,
  2946. },
  2947. {
  2948. .type = CRYPTO_ALG_TYPE_AEAD,
  2949. .alg.aead = {
  2950. .base = {
  2951. .cra_name = "authenc(hmac(md5),cbc(des))",
  2952. .cra_driver_name = "authenc-hmac-md5-cbc-des-iproc",
  2953. .cra_blocksize = DES_BLOCK_SIZE,
  2954. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  2955. },
  2956. .setkey = aead_authenc_setkey,
  2957. .ivsize = DES_BLOCK_SIZE,
  2958. .maxauthsize = MD5_DIGEST_SIZE,
  2959. },
  2960. .cipher_info = {
  2961. .alg = CIPHER_ALG_DES,
  2962. .mode = CIPHER_MODE_CBC,
  2963. },
  2964. .auth_info = {
  2965. .alg = HASH_ALG_MD5,
  2966. .mode = HASH_MODE_HMAC,
  2967. },
  2968. .auth_first = 0,
  2969. },
  2970. {
  2971. .type = CRYPTO_ALG_TYPE_AEAD,
  2972. .alg.aead = {
  2973. .base = {
  2974. .cra_name = "authenc(hmac(sha1),cbc(des))",
  2975. .cra_driver_name = "authenc-hmac-sha1-cbc-des-iproc",
  2976. .cra_blocksize = DES_BLOCK_SIZE,
  2977. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  2978. },
  2979. .setkey = aead_authenc_setkey,
  2980. .ivsize = DES_BLOCK_SIZE,
  2981. .maxauthsize = SHA1_DIGEST_SIZE,
  2982. },
  2983. .cipher_info = {
  2984. .alg = CIPHER_ALG_DES,
  2985. .mode = CIPHER_MODE_CBC,
  2986. },
  2987. .auth_info = {
  2988. .alg = HASH_ALG_SHA1,
  2989. .mode = HASH_MODE_HMAC,
  2990. },
  2991. .auth_first = 0,
  2992. },
  2993. {
  2994. .type = CRYPTO_ALG_TYPE_AEAD,
  2995. .alg.aead = {
  2996. .base = {
  2997. .cra_name = "authenc(hmac(sha224),cbc(des))",
  2998. .cra_driver_name = "authenc-hmac-sha224-cbc-des-iproc",
  2999. .cra_blocksize = DES_BLOCK_SIZE,
  3000. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  3001. },
  3002. .setkey = aead_authenc_setkey,
  3003. .ivsize = DES_BLOCK_SIZE,
  3004. .maxauthsize = SHA224_DIGEST_SIZE,
  3005. },
  3006. .cipher_info = {
  3007. .alg = CIPHER_ALG_DES,
  3008. .mode = CIPHER_MODE_CBC,
  3009. },
  3010. .auth_info = {
  3011. .alg = HASH_ALG_SHA224,
  3012. .mode = HASH_MODE_HMAC,
  3013. },
  3014. .auth_first = 0,
  3015. },
  3016. {
  3017. .type = CRYPTO_ALG_TYPE_AEAD,
  3018. .alg.aead = {
  3019. .base = {
  3020. .cra_name = "authenc(hmac(sha256),cbc(des))",
  3021. .cra_driver_name = "authenc-hmac-sha256-cbc-des-iproc",
  3022. .cra_blocksize = DES_BLOCK_SIZE,
  3023. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  3024. },
  3025. .setkey = aead_authenc_setkey,
  3026. .ivsize = DES_BLOCK_SIZE,
  3027. .maxauthsize = SHA256_DIGEST_SIZE,
  3028. },
  3029. .cipher_info = {
  3030. .alg = CIPHER_ALG_DES,
  3031. .mode = CIPHER_MODE_CBC,
  3032. },
  3033. .auth_info = {
  3034. .alg = HASH_ALG_SHA256,
  3035. .mode = HASH_MODE_HMAC,
  3036. },
  3037. .auth_first = 0,
  3038. },
  3039. {
  3040. .type = CRYPTO_ALG_TYPE_AEAD,
  3041. .alg.aead = {
  3042. .base = {
  3043. .cra_name = "authenc(hmac(sha384),cbc(des))",
  3044. .cra_driver_name = "authenc-hmac-sha384-cbc-des-iproc",
  3045. .cra_blocksize = DES_BLOCK_SIZE,
  3046. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  3047. },
  3048. .setkey = aead_authenc_setkey,
  3049. .ivsize = DES_BLOCK_SIZE,
  3050. .maxauthsize = SHA384_DIGEST_SIZE,
  3051. },
  3052. .cipher_info = {
  3053. .alg = CIPHER_ALG_DES,
  3054. .mode = CIPHER_MODE_CBC,
  3055. },
  3056. .auth_info = {
  3057. .alg = HASH_ALG_SHA384,
  3058. .mode = HASH_MODE_HMAC,
  3059. },
  3060. .auth_first = 0,
  3061. },
  3062. {
  3063. .type = CRYPTO_ALG_TYPE_AEAD,
  3064. .alg.aead = {
  3065. .base = {
  3066. .cra_name = "authenc(hmac(sha512),cbc(des))",
  3067. .cra_driver_name = "authenc-hmac-sha512-cbc-des-iproc",
  3068. .cra_blocksize = DES_BLOCK_SIZE,
  3069. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  3070. },
  3071. .setkey = aead_authenc_setkey,
  3072. .ivsize = DES_BLOCK_SIZE,
  3073. .maxauthsize = SHA512_DIGEST_SIZE,
  3074. },
  3075. .cipher_info = {
  3076. .alg = CIPHER_ALG_DES,
  3077. .mode = CIPHER_MODE_CBC,
  3078. },
  3079. .auth_info = {
  3080. .alg = HASH_ALG_SHA512,
  3081. .mode = HASH_MODE_HMAC,
  3082. },
  3083. .auth_first = 0,
  3084. },
  3085. {
  3086. .type = CRYPTO_ALG_TYPE_AEAD,
  3087. .alg.aead = {
  3088. .base = {
  3089. .cra_name = "authenc(hmac(md5),cbc(des3_ede))",
  3090. .cra_driver_name = "authenc-hmac-md5-cbc-des3-iproc",
  3091. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3092. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  3093. },
  3094. .setkey = aead_authenc_setkey,
  3095. .ivsize = DES3_EDE_BLOCK_SIZE,
  3096. .maxauthsize = MD5_DIGEST_SIZE,
  3097. },
  3098. .cipher_info = {
  3099. .alg = CIPHER_ALG_3DES,
  3100. .mode = CIPHER_MODE_CBC,
  3101. },
  3102. .auth_info = {
  3103. .alg = HASH_ALG_MD5,
  3104. .mode = HASH_MODE_HMAC,
  3105. },
  3106. .auth_first = 0,
  3107. },
  3108. {
  3109. .type = CRYPTO_ALG_TYPE_AEAD,
  3110. .alg.aead = {
  3111. .base = {
  3112. .cra_name = "authenc(hmac(sha1),cbc(des3_ede))",
  3113. .cra_driver_name = "authenc-hmac-sha1-cbc-des3-iproc",
  3114. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3115. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  3116. },
  3117. .setkey = aead_authenc_setkey,
  3118. .ivsize = DES3_EDE_BLOCK_SIZE,
  3119. .maxauthsize = SHA1_DIGEST_SIZE,
  3120. },
  3121. .cipher_info = {
  3122. .alg = CIPHER_ALG_3DES,
  3123. .mode = CIPHER_MODE_CBC,
  3124. },
  3125. .auth_info = {
  3126. .alg = HASH_ALG_SHA1,
  3127. .mode = HASH_MODE_HMAC,
  3128. },
  3129. .auth_first = 0,
  3130. },
  3131. {
  3132. .type = CRYPTO_ALG_TYPE_AEAD,
  3133. .alg.aead = {
  3134. .base = {
  3135. .cra_name = "authenc(hmac(sha224),cbc(des3_ede))",
  3136. .cra_driver_name = "authenc-hmac-sha224-cbc-des3-iproc",
  3137. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3138. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  3139. },
  3140. .setkey = aead_authenc_setkey,
  3141. .ivsize = DES3_EDE_BLOCK_SIZE,
  3142. .maxauthsize = SHA224_DIGEST_SIZE,
  3143. },
  3144. .cipher_info = {
  3145. .alg = CIPHER_ALG_3DES,
  3146. .mode = CIPHER_MODE_CBC,
  3147. },
  3148. .auth_info = {
  3149. .alg = HASH_ALG_SHA224,
  3150. .mode = HASH_MODE_HMAC,
  3151. },
  3152. .auth_first = 0,
  3153. },
  3154. {
  3155. .type = CRYPTO_ALG_TYPE_AEAD,
  3156. .alg.aead = {
  3157. .base = {
  3158. .cra_name = "authenc(hmac(sha256),cbc(des3_ede))",
  3159. .cra_driver_name = "authenc-hmac-sha256-cbc-des3-iproc",
  3160. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3161. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  3162. },
  3163. .setkey = aead_authenc_setkey,
  3164. .ivsize = DES3_EDE_BLOCK_SIZE,
  3165. .maxauthsize = SHA256_DIGEST_SIZE,
  3166. },
  3167. .cipher_info = {
  3168. .alg = CIPHER_ALG_3DES,
  3169. .mode = CIPHER_MODE_CBC,
  3170. },
  3171. .auth_info = {
  3172. .alg = HASH_ALG_SHA256,
  3173. .mode = HASH_MODE_HMAC,
  3174. },
  3175. .auth_first = 0,
  3176. },
  3177. {
  3178. .type = CRYPTO_ALG_TYPE_AEAD,
  3179. .alg.aead = {
  3180. .base = {
  3181. .cra_name = "authenc(hmac(sha384),cbc(des3_ede))",
  3182. .cra_driver_name = "authenc-hmac-sha384-cbc-des3-iproc",
  3183. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3184. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  3185. },
  3186. .setkey = aead_authenc_setkey,
  3187. .ivsize = DES3_EDE_BLOCK_SIZE,
  3188. .maxauthsize = SHA384_DIGEST_SIZE,
  3189. },
  3190. .cipher_info = {
  3191. .alg = CIPHER_ALG_3DES,
  3192. .mode = CIPHER_MODE_CBC,
  3193. },
  3194. .auth_info = {
  3195. .alg = HASH_ALG_SHA384,
  3196. .mode = HASH_MODE_HMAC,
  3197. },
  3198. .auth_first = 0,
  3199. },
  3200. {
  3201. .type = CRYPTO_ALG_TYPE_AEAD,
  3202. .alg.aead = {
  3203. .base = {
  3204. .cra_name = "authenc(hmac(sha512),cbc(des3_ede))",
  3205. .cra_driver_name = "authenc-hmac-sha512-cbc-des3-iproc",
  3206. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3207. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  3208. },
  3209. .setkey = aead_authenc_setkey,
  3210. .ivsize = DES3_EDE_BLOCK_SIZE,
  3211. .maxauthsize = SHA512_DIGEST_SIZE,
  3212. },
  3213. .cipher_info = {
  3214. .alg = CIPHER_ALG_3DES,
  3215. .mode = CIPHER_MODE_CBC,
  3216. },
  3217. .auth_info = {
  3218. .alg = HASH_ALG_SHA512,
  3219. .mode = HASH_MODE_HMAC,
  3220. },
  3221. .auth_first = 0,
  3222. },
  3223. /* ABLKCIPHER algorithms. */
  3224. {
  3225. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3226. .alg.crypto = {
  3227. .cra_name = "ecb(arc4)",
  3228. .cra_driver_name = "ecb-arc4-iproc",
  3229. .cra_blocksize = ARC4_BLOCK_SIZE,
  3230. .cra_ablkcipher = {
  3231. .min_keysize = ARC4_MIN_KEY_SIZE,
  3232. .max_keysize = ARC4_MAX_KEY_SIZE,
  3233. .ivsize = 0,
  3234. }
  3235. },
  3236. .cipher_info = {
  3237. .alg = CIPHER_ALG_RC4,
  3238. .mode = CIPHER_MODE_NONE,
  3239. },
  3240. .auth_info = {
  3241. .alg = HASH_ALG_NONE,
  3242. .mode = HASH_MODE_NONE,
  3243. },
  3244. },
  3245. {
  3246. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3247. .alg.crypto = {
  3248. .cra_name = "ofb(des)",
  3249. .cra_driver_name = "ofb-des-iproc",
  3250. .cra_blocksize = DES_BLOCK_SIZE,
  3251. .cra_ablkcipher = {
  3252. .min_keysize = DES_KEY_SIZE,
  3253. .max_keysize = DES_KEY_SIZE,
  3254. .ivsize = DES_BLOCK_SIZE,
  3255. }
  3256. },
  3257. .cipher_info = {
  3258. .alg = CIPHER_ALG_DES,
  3259. .mode = CIPHER_MODE_OFB,
  3260. },
  3261. .auth_info = {
  3262. .alg = HASH_ALG_NONE,
  3263. .mode = HASH_MODE_NONE,
  3264. },
  3265. },
  3266. {
  3267. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3268. .alg.crypto = {
  3269. .cra_name = "cbc(des)",
  3270. .cra_driver_name = "cbc-des-iproc",
  3271. .cra_blocksize = DES_BLOCK_SIZE,
  3272. .cra_ablkcipher = {
  3273. .min_keysize = DES_KEY_SIZE,
  3274. .max_keysize = DES_KEY_SIZE,
  3275. .ivsize = DES_BLOCK_SIZE,
  3276. }
  3277. },
  3278. .cipher_info = {
  3279. .alg = CIPHER_ALG_DES,
  3280. .mode = CIPHER_MODE_CBC,
  3281. },
  3282. .auth_info = {
  3283. .alg = HASH_ALG_NONE,
  3284. .mode = HASH_MODE_NONE,
  3285. },
  3286. },
  3287. {
  3288. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3289. .alg.crypto = {
  3290. .cra_name = "ecb(des)",
  3291. .cra_driver_name = "ecb-des-iproc",
  3292. .cra_blocksize = DES_BLOCK_SIZE,
  3293. .cra_ablkcipher = {
  3294. .min_keysize = DES_KEY_SIZE,
  3295. .max_keysize = DES_KEY_SIZE,
  3296. .ivsize = 0,
  3297. }
  3298. },
  3299. .cipher_info = {
  3300. .alg = CIPHER_ALG_DES,
  3301. .mode = CIPHER_MODE_ECB,
  3302. },
  3303. .auth_info = {
  3304. .alg = HASH_ALG_NONE,
  3305. .mode = HASH_MODE_NONE,
  3306. },
  3307. },
  3308. {
  3309. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3310. .alg.crypto = {
  3311. .cra_name = "ofb(des3_ede)",
  3312. .cra_driver_name = "ofb-des3-iproc",
  3313. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3314. .cra_ablkcipher = {
  3315. .min_keysize = DES3_EDE_KEY_SIZE,
  3316. .max_keysize = DES3_EDE_KEY_SIZE,
  3317. .ivsize = DES3_EDE_BLOCK_SIZE,
  3318. }
  3319. },
  3320. .cipher_info = {
  3321. .alg = CIPHER_ALG_3DES,
  3322. .mode = CIPHER_MODE_OFB,
  3323. },
  3324. .auth_info = {
  3325. .alg = HASH_ALG_NONE,
  3326. .mode = HASH_MODE_NONE,
  3327. },
  3328. },
  3329. {
  3330. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3331. .alg.crypto = {
  3332. .cra_name = "cbc(des3_ede)",
  3333. .cra_driver_name = "cbc-des3-iproc",
  3334. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3335. .cra_ablkcipher = {
  3336. .min_keysize = DES3_EDE_KEY_SIZE,
  3337. .max_keysize = DES3_EDE_KEY_SIZE,
  3338. .ivsize = DES3_EDE_BLOCK_SIZE,
  3339. }
  3340. },
  3341. .cipher_info = {
  3342. .alg = CIPHER_ALG_3DES,
  3343. .mode = CIPHER_MODE_CBC,
  3344. },
  3345. .auth_info = {
  3346. .alg = HASH_ALG_NONE,
  3347. .mode = HASH_MODE_NONE,
  3348. },
  3349. },
  3350. {
  3351. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3352. .alg.crypto = {
  3353. .cra_name = "ecb(des3_ede)",
  3354. .cra_driver_name = "ecb-des3-iproc",
  3355. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3356. .cra_ablkcipher = {
  3357. .min_keysize = DES3_EDE_KEY_SIZE,
  3358. .max_keysize = DES3_EDE_KEY_SIZE,
  3359. .ivsize = 0,
  3360. }
  3361. },
  3362. .cipher_info = {
  3363. .alg = CIPHER_ALG_3DES,
  3364. .mode = CIPHER_MODE_ECB,
  3365. },
  3366. .auth_info = {
  3367. .alg = HASH_ALG_NONE,
  3368. .mode = HASH_MODE_NONE,
  3369. },
  3370. },
  3371. {
  3372. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3373. .alg.crypto = {
  3374. .cra_name = "ofb(aes)",
  3375. .cra_driver_name = "ofb-aes-iproc",
  3376. .cra_blocksize = AES_BLOCK_SIZE,
  3377. .cra_ablkcipher = {
  3378. .min_keysize = AES_MIN_KEY_SIZE,
  3379. .max_keysize = AES_MAX_KEY_SIZE,
  3380. .ivsize = AES_BLOCK_SIZE,
  3381. }
  3382. },
  3383. .cipher_info = {
  3384. .alg = CIPHER_ALG_AES,
  3385. .mode = CIPHER_MODE_OFB,
  3386. },
  3387. .auth_info = {
  3388. .alg = HASH_ALG_NONE,
  3389. .mode = HASH_MODE_NONE,
  3390. },
  3391. },
  3392. {
  3393. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3394. .alg.crypto = {
  3395. .cra_name = "cbc(aes)",
  3396. .cra_driver_name = "cbc-aes-iproc",
  3397. .cra_blocksize = AES_BLOCK_SIZE,
  3398. .cra_ablkcipher = {
  3399. .min_keysize = AES_MIN_KEY_SIZE,
  3400. .max_keysize = AES_MAX_KEY_SIZE,
  3401. .ivsize = AES_BLOCK_SIZE,
  3402. }
  3403. },
  3404. .cipher_info = {
  3405. .alg = CIPHER_ALG_AES,
  3406. .mode = CIPHER_MODE_CBC,
  3407. },
  3408. .auth_info = {
  3409. .alg = HASH_ALG_NONE,
  3410. .mode = HASH_MODE_NONE,
  3411. },
  3412. },
  3413. {
  3414. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3415. .alg.crypto = {
  3416. .cra_name = "ecb(aes)",
  3417. .cra_driver_name = "ecb-aes-iproc",
  3418. .cra_blocksize = AES_BLOCK_SIZE,
  3419. .cra_ablkcipher = {
  3420. .min_keysize = AES_MIN_KEY_SIZE,
  3421. .max_keysize = AES_MAX_KEY_SIZE,
  3422. .ivsize = 0,
  3423. }
  3424. },
  3425. .cipher_info = {
  3426. .alg = CIPHER_ALG_AES,
  3427. .mode = CIPHER_MODE_ECB,
  3428. },
  3429. .auth_info = {
  3430. .alg = HASH_ALG_NONE,
  3431. .mode = HASH_MODE_NONE,
  3432. },
  3433. },
  3434. {
  3435. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3436. .alg.crypto = {
  3437. .cra_name = "ctr(aes)",
  3438. .cra_driver_name = "ctr-aes-iproc",
  3439. .cra_blocksize = AES_BLOCK_SIZE,
  3440. .cra_ablkcipher = {
  3441. /* .geniv = "chainiv", */
  3442. .min_keysize = AES_MIN_KEY_SIZE,
  3443. .max_keysize = AES_MAX_KEY_SIZE,
  3444. .ivsize = AES_BLOCK_SIZE,
  3445. }
  3446. },
  3447. .cipher_info = {
  3448. .alg = CIPHER_ALG_AES,
  3449. .mode = CIPHER_MODE_CTR,
  3450. },
  3451. .auth_info = {
  3452. .alg = HASH_ALG_NONE,
  3453. .mode = HASH_MODE_NONE,
  3454. },
  3455. },
  3456. {
  3457. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3458. .alg.crypto = {
  3459. .cra_name = "xts(aes)",
  3460. .cra_driver_name = "xts-aes-iproc",
  3461. .cra_blocksize = AES_BLOCK_SIZE,
  3462. .cra_ablkcipher = {
  3463. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  3464. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  3465. .ivsize = AES_BLOCK_SIZE,
  3466. }
  3467. },
  3468. .cipher_info = {
  3469. .alg = CIPHER_ALG_AES,
  3470. .mode = CIPHER_MODE_XTS,
  3471. },
  3472. .auth_info = {
  3473. .alg = HASH_ALG_NONE,
  3474. .mode = HASH_MODE_NONE,
  3475. },
  3476. },
  3477. /* AHASH algorithms. */
  3478. {
  3479. .type = CRYPTO_ALG_TYPE_AHASH,
  3480. .alg.hash = {
  3481. .halg.digestsize = MD5_DIGEST_SIZE,
  3482. .halg.base = {
  3483. .cra_name = "md5",
  3484. .cra_driver_name = "md5-iproc",
  3485. .cra_blocksize = MD5_BLOCK_WORDS * 4,
  3486. .cra_flags = CRYPTO_ALG_TYPE_AHASH |
  3487. CRYPTO_ALG_ASYNC,
  3488. }
  3489. },
  3490. .cipher_info = {
  3491. .alg = CIPHER_ALG_NONE,
  3492. .mode = CIPHER_MODE_NONE,
  3493. },
  3494. .auth_info = {
  3495. .alg = HASH_ALG_MD5,
  3496. .mode = HASH_MODE_HASH,
  3497. },
  3498. },
  3499. {
  3500. .type = CRYPTO_ALG_TYPE_AHASH,
  3501. .alg.hash = {
  3502. .halg.digestsize = MD5_DIGEST_SIZE,
  3503. .halg.base = {
  3504. .cra_name = "hmac(md5)",
  3505. .cra_driver_name = "hmac-md5-iproc",
  3506. .cra_blocksize = MD5_BLOCK_WORDS * 4,
  3507. }
  3508. },
  3509. .cipher_info = {
  3510. .alg = CIPHER_ALG_NONE,
  3511. .mode = CIPHER_MODE_NONE,
  3512. },
  3513. .auth_info = {
  3514. .alg = HASH_ALG_MD5,
  3515. .mode = HASH_MODE_HMAC,
  3516. },
  3517. },
  3518. {.type = CRYPTO_ALG_TYPE_AHASH,
  3519. .alg.hash = {
  3520. .halg.digestsize = SHA1_DIGEST_SIZE,
  3521. .halg.base = {
  3522. .cra_name = "sha1",
  3523. .cra_driver_name = "sha1-iproc",
  3524. .cra_blocksize = SHA1_BLOCK_SIZE,
  3525. }
  3526. },
  3527. .cipher_info = {
  3528. .alg = CIPHER_ALG_NONE,
  3529. .mode = CIPHER_MODE_NONE,
  3530. },
  3531. .auth_info = {
  3532. .alg = HASH_ALG_SHA1,
  3533. .mode = HASH_MODE_HASH,
  3534. },
  3535. },
  3536. {.type = CRYPTO_ALG_TYPE_AHASH,
  3537. .alg.hash = {
  3538. .halg.digestsize = SHA1_DIGEST_SIZE,
  3539. .halg.base = {
  3540. .cra_name = "hmac(sha1)",
  3541. .cra_driver_name = "hmac-sha1-iproc",
  3542. .cra_blocksize = SHA1_BLOCK_SIZE,
  3543. }
  3544. },
  3545. .cipher_info = {
  3546. .alg = CIPHER_ALG_NONE,
  3547. .mode = CIPHER_MODE_NONE,
  3548. },
  3549. .auth_info = {
  3550. .alg = HASH_ALG_SHA1,
  3551. .mode = HASH_MODE_HMAC,
  3552. },
  3553. },
  3554. {.type = CRYPTO_ALG_TYPE_AHASH,
  3555. .alg.hash = {
  3556. .halg.digestsize = SHA224_DIGEST_SIZE,
  3557. .halg.base = {
  3558. .cra_name = "sha224",
  3559. .cra_driver_name = "sha224-iproc",
  3560. .cra_blocksize = SHA224_BLOCK_SIZE,
  3561. }
  3562. },
  3563. .cipher_info = {
  3564. .alg = CIPHER_ALG_NONE,
  3565. .mode = CIPHER_MODE_NONE,
  3566. },
  3567. .auth_info = {
  3568. .alg = HASH_ALG_SHA224,
  3569. .mode = HASH_MODE_HASH,
  3570. },
  3571. },
  3572. {.type = CRYPTO_ALG_TYPE_AHASH,
  3573. .alg.hash = {
  3574. .halg.digestsize = SHA224_DIGEST_SIZE,
  3575. .halg.base = {
  3576. .cra_name = "hmac(sha224)",
  3577. .cra_driver_name = "hmac-sha224-iproc",
  3578. .cra_blocksize = SHA224_BLOCK_SIZE,
  3579. }
  3580. },
  3581. .cipher_info = {
  3582. .alg = CIPHER_ALG_NONE,
  3583. .mode = CIPHER_MODE_NONE,
  3584. },
  3585. .auth_info = {
  3586. .alg = HASH_ALG_SHA224,
  3587. .mode = HASH_MODE_HMAC,
  3588. },
  3589. },
  3590. {.type = CRYPTO_ALG_TYPE_AHASH,
  3591. .alg.hash = {
  3592. .halg.digestsize = SHA256_DIGEST_SIZE,
  3593. .halg.base = {
  3594. .cra_name = "sha256",
  3595. .cra_driver_name = "sha256-iproc",
  3596. .cra_blocksize = SHA256_BLOCK_SIZE,
  3597. }
  3598. },
  3599. .cipher_info = {
  3600. .alg = CIPHER_ALG_NONE,
  3601. .mode = CIPHER_MODE_NONE,
  3602. },
  3603. .auth_info = {
  3604. .alg = HASH_ALG_SHA256,
  3605. .mode = HASH_MODE_HASH,
  3606. },
  3607. },
  3608. {.type = CRYPTO_ALG_TYPE_AHASH,
  3609. .alg.hash = {
  3610. .halg.digestsize = SHA256_DIGEST_SIZE,
  3611. .halg.base = {
  3612. .cra_name = "hmac(sha256)",
  3613. .cra_driver_name = "hmac-sha256-iproc",
  3614. .cra_blocksize = SHA256_BLOCK_SIZE,
  3615. }
  3616. },
  3617. .cipher_info = {
  3618. .alg = CIPHER_ALG_NONE,
  3619. .mode = CIPHER_MODE_NONE,
  3620. },
  3621. .auth_info = {
  3622. .alg = HASH_ALG_SHA256,
  3623. .mode = HASH_MODE_HMAC,
  3624. },
  3625. },
  3626. {
  3627. .type = CRYPTO_ALG_TYPE_AHASH,
  3628. .alg.hash = {
  3629. .halg.digestsize = SHA384_DIGEST_SIZE,
  3630. .halg.base = {
  3631. .cra_name = "sha384",
  3632. .cra_driver_name = "sha384-iproc",
  3633. .cra_blocksize = SHA384_BLOCK_SIZE,
  3634. }
  3635. },
  3636. .cipher_info = {
  3637. .alg = CIPHER_ALG_NONE,
  3638. .mode = CIPHER_MODE_NONE,
  3639. },
  3640. .auth_info = {
  3641. .alg = HASH_ALG_SHA384,
  3642. .mode = HASH_MODE_HASH,
  3643. },
  3644. },
  3645. {
  3646. .type = CRYPTO_ALG_TYPE_AHASH,
  3647. .alg.hash = {
  3648. .halg.digestsize = SHA384_DIGEST_SIZE,
  3649. .halg.base = {
  3650. .cra_name = "hmac(sha384)",
  3651. .cra_driver_name = "hmac-sha384-iproc",
  3652. .cra_blocksize = SHA384_BLOCK_SIZE,
  3653. }
  3654. },
  3655. .cipher_info = {
  3656. .alg = CIPHER_ALG_NONE,
  3657. .mode = CIPHER_MODE_NONE,
  3658. },
  3659. .auth_info = {
  3660. .alg = HASH_ALG_SHA384,
  3661. .mode = HASH_MODE_HMAC,
  3662. },
  3663. },
  3664. {
  3665. .type = CRYPTO_ALG_TYPE_AHASH,
  3666. .alg.hash = {
  3667. .halg.digestsize = SHA512_DIGEST_SIZE,
  3668. .halg.base = {
  3669. .cra_name = "sha512",
  3670. .cra_driver_name = "sha512-iproc",
  3671. .cra_blocksize = SHA512_BLOCK_SIZE,
  3672. }
  3673. },
  3674. .cipher_info = {
  3675. .alg = CIPHER_ALG_NONE,
  3676. .mode = CIPHER_MODE_NONE,
  3677. },
  3678. .auth_info = {
  3679. .alg = HASH_ALG_SHA512,
  3680. .mode = HASH_MODE_HASH,
  3681. },
  3682. },
  3683. {
  3684. .type = CRYPTO_ALG_TYPE_AHASH,
  3685. .alg.hash = {
  3686. .halg.digestsize = SHA512_DIGEST_SIZE,
  3687. .halg.base = {
  3688. .cra_name = "hmac(sha512)",
  3689. .cra_driver_name = "hmac-sha512-iproc",
  3690. .cra_blocksize = SHA512_BLOCK_SIZE,
  3691. }
  3692. },
  3693. .cipher_info = {
  3694. .alg = CIPHER_ALG_NONE,
  3695. .mode = CIPHER_MODE_NONE,
  3696. },
  3697. .auth_info = {
  3698. .alg = HASH_ALG_SHA512,
  3699. .mode = HASH_MODE_HMAC,
  3700. },
  3701. },
  3702. {
  3703. .type = CRYPTO_ALG_TYPE_AHASH,
  3704. .alg.hash = {
  3705. .halg.digestsize = SHA3_224_DIGEST_SIZE,
  3706. .halg.base = {
  3707. .cra_name = "sha3-224",
  3708. .cra_driver_name = "sha3-224-iproc",
  3709. .cra_blocksize = SHA3_224_BLOCK_SIZE,
  3710. }
  3711. },
  3712. .cipher_info = {
  3713. .alg = CIPHER_ALG_NONE,
  3714. .mode = CIPHER_MODE_NONE,
  3715. },
  3716. .auth_info = {
  3717. .alg = HASH_ALG_SHA3_224,
  3718. .mode = HASH_MODE_HASH,
  3719. },
  3720. },
  3721. {
  3722. .type = CRYPTO_ALG_TYPE_AHASH,
  3723. .alg.hash = {
  3724. .halg.digestsize = SHA3_224_DIGEST_SIZE,
  3725. .halg.base = {
  3726. .cra_name = "hmac(sha3-224)",
  3727. .cra_driver_name = "hmac-sha3-224-iproc",
  3728. .cra_blocksize = SHA3_224_BLOCK_SIZE,
  3729. }
  3730. },
  3731. .cipher_info = {
  3732. .alg = CIPHER_ALG_NONE,
  3733. .mode = CIPHER_MODE_NONE,
  3734. },
  3735. .auth_info = {
  3736. .alg = HASH_ALG_SHA3_224,
  3737. .mode = HASH_MODE_HMAC
  3738. },
  3739. },
  3740. {
  3741. .type = CRYPTO_ALG_TYPE_AHASH,
  3742. .alg.hash = {
  3743. .halg.digestsize = SHA3_256_DIGEST_SIZE,
  3744. .halg.base = {
  3745. .cra_name = "sha3-256",
  3746. .cra_driver_name = "sha3-256-iproc",
  3747. .cra_blocksize = SHA3_256_BLOCK_SIZE,
  3748. }
  3749. },
  3750. .cipher_info = {
  3751. .alg = CIPHER_ALG_NONE,
  3752. .mode = CIPHER_MODE_NONE,
  3753. },
  3754. .auth_info = {
  3755. .alg = HASH_ALG_SHA3_256,
  3756. .mode = HASH_MODE_HASH,
  3757. },
  3758. },
  3759. {
  3760. .type = CRYPTO_ALG_TYPE_AHASH,
  3761. .alg.hash = {
  3762. .halg.digestsize = SHA3_256_DIGEST_SIZE,
  3763. .halg.base = {
  3764. .cra_name = "hmac(sha3-256)",
  3765. .cra_driver_name = "hmac-sha3-256-iproc",
  3766. .cra_blocksize = SHA3_256_BLOCK_SIZE,
  3767. }
  3768. },
  3769. .cipher_info = {
  3770. .alg = CIPHER_ALG_NONE,
  3771. .mode = CIPHER_MODE_NONE,
  3772. },
  3773. .auth_info = {
  3774. .alg = HASH_ALG_SHA3_256,
  3775. .mode = HASH_MODE_HMAC,
  3776. },
  3777. },
  3778. {
  3779. .type = CRYPTO_ALG_TYPE_AHASH,
  3780. .alg.hash = {
  3781. .halg.digestsize = SHA3_384_DIGEST_SIZE,
  3782. .halg.base = {
  3783. .cra_name = "sha3-384",
  3784. .cra_driver_name = "sha3-384-iproc",
  3785. .cra_blocksize = SHA3_224_BLOCK_SIZE,
  3786. }
  3787. },
  3788. .cipher_info = {
  3789. .alg = CIPHER_ALG_NONE,
  3790. .mode = CIPHER_MODE_NONE,
  3791. },
  3792. .auth_info = {
  3793. .alg = HASH_ALG_SHA3_384,
  3794. .mode = HASH_MODE_HASH,
  3795. },
  3796. },
  3797. {
  3798. .type = CRYPTO_ALG_TYPE_AHASH,
  3799. .alg.hash = {
  3800. .halg.digestsize = SHA3_384_DIGEST_SIZE,
  3801. .halg.base = {
  3802. .cra_name = "hmac(sha3-384)",
  3803. .cra_driver_name = "hmac-sha3-384-iproc",
  3804. .cra_blocksize = SHA3_384_BLOCK_SIZE,
  3805. }
  3806. },
  3807. .cipher_info = {
  3808. .alg = CIPHER_ALG_NONE,
  3809. .mode = CIPHER_MODE_NONE,
  3810. },
  3811. .auth_info = {
  3812. .alg = HASH_ALG_SHA3_384,
  3813. .mode = HASH_MODE_HMAC,
  3814. },
  3815. },
  3816. {
  3817. .type = CRYPTO_ALG_TYPE_AHASH,
  3818. .alg.hash = {
  3819. .halg.digestsize = SHA3_512_DIGEST_SIZE,
  3820. .halg.base = {
  3821. .cra_name = "sha3-512",
  3822. .cra_driver_name = "sha3-512-iproc",
  3823. .cra_blocksize = SHA3_512_BLOCK_SIZE,
  3824. }
  3825. },
  3826. .cipher_info = {
  3827. .alg = CIPHER_ALG_NONE,
  3828. .mode = CIPHER_MODE_NONE,
  3829. },
  3830. .auth_info = {
  3831. .alg = HASH_ALG_SHA3_512,
  3832. .mode = HASH_MODE_HASH,
  3833. },
  3834. },
  3835. {
  3836. .type = CRYPTO_ALG_TYPE_AHASH,
  3837. .alg.hash = {
  3838. .halg.digestsize = SHA3_512_DIGEST_SIZE,
  3839. .halg.base = {
  3840. .cra_name = "hmac(sha3-512)",
  3841. .cra_driver_name = "hmac-sha3-512-iproc",
  3842. .cra_blocksize = SHA3_512_BLOCK_SIZE,
  3843. }
  3844. },
  3845. .cipher_info = {
  3846. .alg = CIPHER_ALG_NONE,
  3847. .mode = CIPHER_MODE_NONE,
  3848. },
  3849. .auth_info = {
  3850. .alg = HASH_ALG_SHA3_512,
  3851. .mode = HASH_MODE_HMAC,
  3852. },
  3853. },
  3854. {
  3855. .type = CRYPTO_ALG_TYPE_AHASH,
  3856. .alg.hash = {
  3857. .halg.digestsize = AES_BLOCK_SIZE,
  3858. .halg.base = {
  3859. .cra_name = "xcbc(aes)",
  3860. .cra_driver_name = "xcbc-aes-iproc",
  3861. .cra_blocksize = AES_BLOCK_SIZE,
  3862. }
  3863. },
  3864. .cipher_info = {
  3865. .alg = CIPHER_ALG_NONE,
  3866. .mode = CIPHER_MODE_NONE,
  3867. },
  3868. .auth_info = {
  3869. .alg = HASH_ALG_AES,
  3870. .mode = HASH_MODE_XCBC,
  3871. },
  3872. },
  3873. {
  3874. .type = CRYPTO_ALG_TYPE_AHASH,
  3875. .alg.hash = {
  3876. .halg.digestsize = AES_BLOCK_SIZE,
  3877. .halg.base = {
  3878. .cra_name = "cmac(aes)",
  3879. .cra_driver_name = "cmac-aes-iproc",
  3880. .cra_blocksize = AES_BLOCK_SIZE,
  3881. }
  3882. },
  3883. .cipher_info = {
  3884. .alg = CIPHER_ALG_NONE,
  3885. .mode = CIPHER_MODE_NONE,
  3886. },
  3887. .auth_info = {
  3888. .alg = HASH_ALG_AES,
  3889. .mode = HASH_MODE_CMAC,
  3890. },
  3891. },
  3892. };
  3893. static int generic_cra_init(struct crypto_tfm *tfm,
  3894. struct iproc_alg_s *cipher_alg)
  3895. {
  3896. struct spu_hw *spu = &iproc_priv.spu;
  3897. struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
  3898. unsigned int blocksize = crypto_tfm_alg_blocksize(tfm);
  3899. flow_log("%s()\n", __func__);
  3900. ctx->alg = cipher_alg;
  3901. ctx->cipher = cipher_alg->cipher_info;
  3902. ctx->auth = cipher_alg->auth_info;
  3903. ctx->auth_first = cipher_alg->auth_first;
  3904. ctx->max_payload = spu->spu_ctx_max_payload(ctx->cipher.alg,
  3905. ctx->cipher.mode,
  3906. blocksize);
  3907. ctx->fallback_cipher = NULL;
  3908. ctx->enckeylen = 0;
  3909. ctx->authkeylen = 0;
  3910. atomic_inc(&iproc_priv.stream_count);
  3911. atomic_inc(&iproc_priv.session_count);
  3912. return 0;
  3913. }
  3914. static int ablkcipher_cra_init(struct crypto_tfm *tfm)
  3915. {
  3916. struct crypto_alg *alg = tfm->__crt_alg;
  3917. struct iproc_alg_s *cipher_alg;
  3918. flow_log("%s()\n", __func__);
  3919. tfm->crt_ablkcipher.reqsize = sizeof(struct iproc_reqctx_s);
  3920. cipher_alg = container_of(alg, struct iproc_alg_s, alg.crypto);
  3921. return generic_cra_init(tfm, cipher_alg);
  3922. }
  3923. static int ahash_cra_init(struct crypto_tfm *tfm)
  3924. {
  3925. int err;
  3926. struct crypto_alg *alg = tfm->__crt_alg;
  3927. struct iproc_alg_s *cipher_alg;
  3928. cipher_alg = container_of(__crypto_ahash_alg(alg), struct iproc_alg_s,
  3929. alg.hash);
  3930. err = generic_cra_init(tfm, cipher_alg);
  3931. flow_log("%s()\n", __func__);
  3932. /*
  3933. * export state size has to be < 512 bytes. So don't include msg bufs
  3934. * in state size.
  3935. */
  3936. crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
  3937. sizeof(struct iproc_reqctx_s));
  3938. return err;
  3939. }
  3940. static int aead_cra_init(struct crypto_aead *aead)
  3941. {
  3942. struct crypto_tfm *tfm = crypto_aead_tfm(aead);
  3943. struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
  3944. struct crypto_alg *alg = tfm->__crt_alg;
  3945. struct aead_alg *aalg = container_of(alg, struct aead_alg, base);
  3946. struct iproc_alg_s *cipher_alg = container_of(aalg, struct iproc_alg_s,
  3947. alg.aead);
  3948. int err = generic_cra_init(tfm, cipher_alg);
  3949. flow_log("%s()\n", __func__);
  3950. crypto_aead_set_reqsize(aead, sizeof(struct iproc_reqctx_s));
  3951. ctx->is_esp = false;
  3952. ctx->salt_len = 0;
  3953. ctx->salt_offset = 0;
  3954. /* random first IV */
  3955. get_random_bytes(ctx->iv, MAX_IV_SIZE);
  3956. flow_dump(" iv: ", ctx->iv, MAX_IV_SIZE);
  3957. if (!err) {
  3958. if (alg->cra_flags & CRYPTO_ALG_NEED_FALLBACK) {
  3959. flow_log("%s() creating fallback cipher\n", __func__);
  3960. ctx->fallback_cipher =
  3961. crypto_alloc_aead(alg->cra_name, 0,
  3962. CRYPTO_ALG_ASYNC |
  3963. CRYPTO_ALG_NEED_FALLBACK);
  3964. if (IS_ERR(ctx->fallback_cipher)) {
  3965. pr_err("%s() Error: failed to allocate fallback for %s\n",
  3966. __func__, alg->cra_name);
  3967. return PTR_ERR(ctx->fallback_cipher);
  3968. }
  3969. }
  3970. }
  3971. return err;
  3972. }
  3973. static void generic_cra_exit(struct crypto_tfm *tfm)
  3974. {
  3975. atomic_dec(&iproc_priv.session_count);
  3976. }
  3977. static void aead_cra_exit(struct crypto_aead *aead)
  3978. {
  3979. struct crypto_tfm *tfm = crypto_aead_tfm(aead);
  3980. struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
  3981. generic_cra_exit(tfm);
  3982. if (ctx->fallback_cipher) {
  3983. crypto_free_aead(ctx->fallback_cipher);
  3984. ctx->fallback_cipher = NULL;
  3985. }
  3986. }
  3987. /**
  3988. * spu_functions_register() - Specify hardware-specific SPU functions based on
  3989. * SPU type read from device tree.
  3990. * @dev: device structure
  3991. * @spu_type: SPU hardware generation
  3992. * @spu_subtype: SPU hardware version
  3993. */
  3994. static void spu_functions_register(struct device *dev,
  3995. enum spu_spu_type spu_type,
  3996. enum spu_spu_subtype spu_subtype)
  3997. {
  3998. struct spu_hw *spu = &iproc_priv.spu;
  3999. if (spu_type == SPU_TYPE_SPUM) {
  4000. dev_dbg(dev, "Registering SPUM functions");
  4001. spu->spu_dump_msg_hdr = spum_dump_msg_hdr;
  4002. spu->spu_payload_length = spum_payload_length;
  4003. spu->spu_response_hdr_len = spum_response_hdr_len;
  4004. spu->spu_hash_pad_len = spum_hash_pad_len;
  4005. spu->spu_gcm_ccm_pad_len = spum_gcm_ccm_pad_len;
  4006. spu->spu_assoc_resp_len = spum_assoc_resp_len;
  4007. spu->spu_aead_ivlen = spum_aead_ivlen;
  4008. spu->spu_hash_type = spum_hash_type;
  4009. spu->spu_digest_size = spum_digest_size;
  4010. spu->spu_create_request = spum_create_request;
  4011. spu->spu_cipher_req_init = spum_cipher_req_init;
  4012. spu->spu_cipher_req_finish = spum_cipher_req_finish;
  4013. spu->spu_request_pad = spum_request_pad;
  4014. spu->spu_tx_status_len = spum_tx_status_len;
  4015. spu->spu_rx_status_len = spum_rx_status_len;
  4016. spu->spu_status_process = spum_status_process;
  4017. spu->spu_xts_tweak_in_payload = spum_xts_tweak_in_payload;
  4018. spu->spu_ccm_update_iv = spum_ccm_update_iv;
  4019. spu->spu_wordalign_padlen = spum_wordalign_padlen;
  4020. if (spu_subtype == SPU_SUBTYPE_SPUM_NS2)
  4021. spu->spu_ctx_max_payload = spum_ns2_ctx_max_payload;
  4022. else
  4023. spu->spu_ctx_max_payload = spum_nsp_ctx_max_payload;
  4024. } else {
  4025. dev_dbg(dev, "Registering SPU2 functions");
  4026. spu->spu_dump_msg_hdr = spu2_dump_msg_hdr;
  4027. spu->spu_ctx_max_payload = spu2_ctx_max_payload;
  4028. spu->spu_payload_length = spu2_payload_length;
  4029. spu->spu_response_hdr_len = spu2_response_hdr_len;
  4030. spu->spu_hash_pad_len = spu2_hash_pad_len;
  4031. spu->spu_gcm_ccm_pad_len = spu2_gcm_ccm_pad_len;
  4032. spu->spu_assoc_resp_len = spu2_assoc_resp_len;
  4033. spu->spu_aead_ivlen = spu2_aead_ivlen;
  4034. spu->spu_hash_type = spu2_hash_type;
  4035. spu->spu_digest_size = spu2_digest_size;
  4036. spu->spu_create_request = spu2_create_request;
  4037. spu->spu_cipher_req_init = spu2_cipher_req_init;
  4038. spu->spu_cipher_req_finish = spu2_cipher_req_finish;
  4039. spu->spu_request_pad = spu2_request_pad;
  4040. spu->spu_tx_status_len = spu2_tx_status_len;
  4041. spu->spu_rx_status_len = spu2_rx_status_len;
  4042. spu->spu_status_process = spu2_status_process;
  4043. spu->spu_xts_tweak_in_payload = spu2_xts_tweak_in_payload;
  4044. spu->spu_ccm_update_iv = spu2_ccm_update_iv;
  4045. spu->spu_wordalign_padlen = spu2_wordalign_padlen;
  4046. }
  4047. }
  4048. /**
  4049. * spu_mb_init() - Initialize mailbox client. Request ownership of a mailbox
  4050. * channel for the SPU being probed.
  4051. * @dev: SPU driver device structure
  4052. *
  4053. * Return: 0 if successful
  4054. * < 0 otherwise
  4055. */
  4056. static int spu_mb_init(struct device *dev)
  4057. {
  4058. struct mbox_client *mcl = &iproc_priv.mcl[iproc_priv.spu.num_spu];
  4059. int err;
  4060. mcl->dev = dev;
  4061. mcl->tx_block = false;
  4062. mcl->tx_tout = 0;
  4063. mcl->knows_txdone = false;
  4064. mcl->rx_callback = spu_rx_callback;
  4065. mcl->tx_done = NULL;
  4066. iproc_priv.mbox[iproc_priv.spu.num_spu] =
  4067. mbox_request_channel(mcl, 0);
  4068. if (IS_ERR(iproc_priv.mbox[iproc_priv.spu.num_spu])) {
  4069. err = (int)PTR_ERR(iproc_priv.mbox[iproc_priv.spu.num_spu]);
  4070. dev_err(dev,
  4071. "Mbox channel %d request failed with err %d",
  4072. iproc_priv.spu.num_spu, err);
  4073. iproc_priv.mbox[iproc_priv.spu.num_spu] = NULL;
  4074. return err;
  4075. }
  4076. return 0;
  4077. }
  4078. static void spu_mb_release(struct platform_device *pdev)
  4079. {
  4080. int i;
  4081. for (i = 0; i < iproc_priv.spu.num_spu; i++)
  4082. mbox_free_channel(iproc_priv.mbox[i]);
  4083. }
  4084. static void spu_counters_init(void)
  4085. {
  4086. int i;
  4087. int j;
  4088. atomic_set(&iproc_priv.session_count, 0);
  4089. atomic_set(&iproc_priv.stream_count, 0);
  4090. atomic_set(&iproc_priv.next_chan, (int)iproc_priv.spu.num_spu);
  4091. atomic64_set(&iproc_priv.bytes_in, 0);
  4092. atomic64_set(&iproc_priv.bytes_out, 0);
  4093. for (i = 0; i < SPU_OP_NUM; i++) {
  4094. atomic_set(&iproc_priv.op_counts[i], 0);
  4095. atomic_set(&iproc_priv.setkey_cnt[i], 0);
  4096. }
  4097. for (i = 0; i < CIPHER_ALG_LAST; i++)
  4098. for (j = 0; j < CIPHER_MODE_LAST; j++)
  4099. atomic_set(&iproc_priv.cipher_cnt[i][j], 0);
  4100. for (i = 0; i < HASH_ALG_LAST; i++) {
  4101. atomic_set(&iproc_priv.hash_cnt[i], 0);
  4102. atomic_set(&iproc_priv.hmac_cnt[i], 0);
  4103. }
  4104. for (i = 0; i < AEAD_TYPE_LAST; i++)
  4105. atomic_set(&iproc_priv.aead_cnt[i], 0);
  4106. atomic_set(&iproc_priv.mb_no_spc, 0);
  4107. atomic_set(&iproc_priv.mb_send_fail, 0);
  4108. atomic_set(&iproc_priv.bad_icv, 0);
  4109. }
  4110. static int spu_register_ablkcipher(struct iproc_alg_s *driver_alg)
  4111. {
  4112. struct spu_hw *spu = &iproc_priv.spu;
  4113. struct crypto_alg *crypto = &driver_alg->alg.crypto;
  4114. int err;
  4115. /* SPU2 does not support RC4 */
  4116. if ((driver_alg->cipher_info.alg == CIPHER_ALG_RC4) &&
  4117. (spu->spu_type == SPU_TYPE_SPU2))
  4118. return 0;
  4119. crypto->cra_module = THIS_MODULE;
  4120. crypto->cra_priority = cipher_pri;
  4121. crypto->cra_alignmask = 0;
  4122. crypto->cra_ctxsize = sizeof(struct iproc_ctx_s);
  4123. INIT_LIST_HEAD(&crypto->cra_list);
  4124. crypto->cra_init = ablkcipher_cra_init;
  4125. crypto->cra_exit = generic_cra_exit;
  4126. crypto->cra_type = &crypto_ablkcipher_type;
  4127. crypto->cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC |
  4128. CRYPTO_ALG_KERN_DRIVER_ONLY;
  4129. crypto->cra_ablkcipher.setkey = ablkcipher_setkey;
  4130. crypto->cra_ablkcipher.encrypt = ablkcipher_encrypt;
  4131. crypto->cra_ablkcipher.decrypt = ablkcipher_decrypt;
  4132. err = crypto_register_alg(crypto);
  4133. /* Mark alg as having been registered, if successful */
  4134. if (err == 0)
  4135. driver_alg->registered = true;
  4136. pr_debug(" registered ablkcipher %s\n", crypto->cra_driver_name);
  4137. return err;
  4138. }
  4139. static int spu_register_ahash(struct iproc_alg_s *driver_alg)
  4140. {
  4141. struct spu_hw *spu = &iproc_priv.spu;
  4142. struct ahash_alg *hash = &driver_alg->alg.hash;
  4143. int err;
  4144. /* AES-XCBC is the only AES hash type currently supported on SPU-M */
  4145. if ((driver_alg->auth_info.alg == HASH_ALG_AES) &&
  4146. (driver_alg->auth_info.mode != HASH_MODE_XCBC) &&
  4147. (spu->spu_type == SPU_TYPE_SPUM))
  4148. return 0;
  4149. /* SHA3 algorithm variants are not registered for SPU-M or SPU2. */
  4150. if ((driver_alg->auth_info.alg >= HASH_ALG_SHA3_224) &&
  4151. (spu->spu_subtype != SPU_SUBTYPE_SPU2_V2))
  4152. return 0;
  4153. hash->halg.base.cra_module = THIS_MODULE;
  4154. hash->halg.base.cra_priority = hash_pri;
  4155. hash->halg.base.cra_alignmask = 0;
  4156. hash->halg.base.cra_ctxsize = sizeof(struct iproc_ctx_s);
  4157. hash->halg.base.cra_init = ahash_cra_init;
  4158. hash->halg.base.cra_exit = generic_cra_exit;
  4159. hash->halg.base.cra_type = &crypto_ahash_type;
  4160. hash->halg.base.cra_flags = CRYPTO_ALG_TYPE_AHASH | CRYPTO_ALG_ASYNC;
  4161. hash->halg.statesize = sizeof(struct spu_hash_export_s);
  4162. if (driver_alg->auth_info.mode != HASH_MODE_HMAC) {
  4163. hash->setkey = ahash_setkey;
  4164. hash->init = ahash_init;
  4165. hash->update = ahash_update;
  4166. hash->final = ahash_final;
  4167. hash->finup = ahash_finup;
  4168. hash->digest = ahash_digest;
  4169. } else {
  4170. hash->setkey = ahash_hmac_setkey;
  4171. hash->init = ahash_hmac_init;
  4172. hash->update = ahash_hmac_update;
  4173. hash->final = ahash_hmac_final;
  4174. hash->finup = ahash_hmac_finup;
  4175. hash->digest = ahash_hmac_digest;
  4176. }
  4177. hash->export = ahash_export;
  4178. hash->import = ahash_import;
  4179. err = crypto_register_ahash(hash);
  4180. /* Mark alg as having been registered, if successful */
  4181. if (err == 0)
  4182. driver_alg->registered = true;
  4183. pr_debug(" registered ahash %s\n",
  4184. hash->halg.base.cra_driver_name);
  4185. return err;
  4186. }
  4187. static int spu_register_aead(struct iproc_alg_s *driver_alg)
  4188. {
  4189. struct aead_alg *aead = &driver_alg->alg.aead;
  4190. int err;
  4191. aead->base.cra_module = THIS_MODULE;
  4192. aead->base.cra_priority = aead_pri;
  4193. aead->base.cra_alignmask = 0;
  4194. aead->base.cra_ctxsize = sizeof(struct iproc_ctx_s);
  4195. INIT_LIST_HEAD(&aead->base.cra_list);
  4196. aead->base.cra_flags |= CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC;
  4197. /* setkey set in alg initialization */
  4198. aead->setauthsize = aead_setauthsize;
  4199. aead->encrypt = aead_encrypt;
  4200. aead->decrypt = aead_decrypt;
  4201. aead->init = aead_cra_init;
  4202. aead->exit = aead_cra_exit;
  4203. err = crypto_register_aead(aead);
  4204. /* Mark alg as having been registered, if successful */
  4205. if (err == 0)
  4206. driver_alg->registered = true;
  4207. pr_debug(" registered aead %s\n", aead->base.cra_driver_name);
  4208. return err;
  4209. }
  4210. /* register crypto algorithms the device supports */
  4211. static int spu_algs_register(struct device *dev)
  4212. {
  4213. int i, j;
  4214. int err;
  4215. for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
  4216. switch (driver_algs[i].type) {
  4217. case CRYPTO_ALG_TYPE_ABLKCIPHER:
  4218. err = spu_register_ablkcipher(&driver_algs[i]);
  4219. break;
  4220. case CRYPTO_ALG_TYPE_AHASH:
  4221. err = spu_register_ahash(&driver_algs[i]);
  4222. break;
  4223. case CRYPTO_ALG_TYPE_AEAD:
  4224. err = spu_register_aead(&driver_algs[i]);
  4225. break;
  4226. default:
  4227. dev_err(dev,
  4228. "iproc-crypto: unknown alg type: %d",
  4229. driver_algs[i].type);
  4230. err = -EINVAL;
  4231. }
  4232. if (err) {
  4233. dev_err(dev, "alg registration failed with error %d\n",
  4234. err);
  4235. goto err_algs;
  4236. }
  4237. }
  4238. return 0;
  4239. err_algs:
  4240. for (j = 0; j < i; j++) {
  4241. /* Skip any algorithm not registered */
  4242. if (!driver_algs[j].registered)
  4243. continue;
  4244. switch (driver_algs[j].type) {
  4245. case CRYPTO_ALG_TYPE_ABLKCIPHER:
  4246. crypto_unregister_alg(&driver_algs[j].alg.crypto);
  4247. driver_algs[j].registered = false;
  4248. break;
  4249. case CRYPTO_ALG_TYPE_AHASH:
  4250. crypto_unregister_ahash(&driver_algs[j].alg.hash);
  4251. driver_algs[j].registered = false;
  4252. break;
  4253. case CRYPTO_ALG_TYPE_AEAD:
  4254. crypto_unregister_aead(&driver_algs[j].alg.aead);
  4255. driver_algs[j].registered = false;
  4256. break;
  4257. }
  4258. }
  4259. return err;
  4260. }
  4261. /* ==================== Kernel Platform API ==================== */
  4262. static struct spu_type_subtype spum_ns2_types = {
  4263. SPU_TYPE_SPUM, SPU_SUBTYPE_SPUM_NS2
  4264. };
  4265. static struct spu_type_subtype spum_nsp_types = {
  4266. SPU_TYPE_SPUM, SPU_SUBTYPE_SPUM_NSP
  4267. };
  4268. static struct spu_type_subtype spu2_types = {
  4269. SPU_TYPE_SPU2, SPU_SUBTYPE_SPU2_V1
  4270. };
  4271. static struct spu_type_subtype spu2_v2_types = {
  4272. SPU_TYPE_SPU2, SPU_SUBTYPE_SPU2_V2
  4273. };
  4274. static const struct of_device_id bcm_spu_dt_ids[] = {
  4275. {
  4276. .compatible = "brcm,spum-crypto",
  4277. .data = &spum_ns2_types,
  4278. },
  4279. {
  4280. .compatible = "brcm,spum-nsp-crypto",
  4281. .data = &spum_nsp_types,
  4282. },
  4283. {
  4284. .compatible = "brcm,spu2-crypto",
  4285. .data = &spu2_types,
  4286. },
  4287. {
  4288. .compatible = "brcm,spu2-v2-crypto",
  4289. .data = &spu2_v2_types,
  4290. },
  4291. { /* sentinel */ }
  4292. };
  4293. MODULE_DEVICE_TABLE(of, bcm_spu_dt_ids);
  4294. static int spu_dt_read(struct platform_device *pdev)
  4295. {
  4296. struct device *dev = &pdev->dev;
  4297. struct spu_hw *spu = &iproc_priv.spu;
  4298. struct resource *spu_ctrl_regs;
  4299. const struct of_device_id *match;
  4300. const struct spu_type_subtype *matched_spu_type;
  4301. void __iomem *spu_reg_vbase[MAX_SPUS];
  4302. int err;
  4303. match = of_match_device(of_match_ptr(bcm_spu_dt_ids), dev);
  4304. matched_spu_type = match->data;
  4305. if (iproc_priv.spu.num_spu > 1) {
  4306. /* If this is 2nd or later SPU, make sure it's same type */
  4307. if ((spu->spu_type != matched_spu_type->type) ||
  4308. (spu->spu_subtype != matched_spu_type->subtype)) {
  4309. err = -EINVAL;
  4310. dev_err(&pdev->dev, "Multiple SPU types not allowed");
  4311. return err;
  4312. }
  4313. } else {
  4314. /* Record type of first SPU */
  4315. spu->spu_type = matched_spu_type->type;
  4316. spu->spu_subtype = matched_spu_type->subtype;
  4317. }
  4318. /* Get and map SPU registers */
  4319. spu_ctrl_regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  4320. if (!spu_ctrl_regs) {
  4321. err = -EINVAL;
  4322. dev_err(&pdev->dev, "Invalid/missing registers for SPU\n");
  4323. return err;
  4324. }
  4325. spu_reg_vbase[iproc_priv.spu.num_spu] =
  4326. devm_ioremap_resource(dev, spu_ctrl_regs);
  4327. if (IS_ERR(spu_reg_vbase[iproc_priv.spu.num_spu])) {
  4328. err = PTR_ERR(spu_reg_vbase[iproc_priv.spu.num_spu]);
  4329. dev_err(&pdev->dev, "Failed to map registers: %d\n",
  4330. err);
  4331. spu_reg_vbase[iproc_priv.spu.num_spu] = NULL;
  4332. return err;
  4333. }
  4334. dev_dbg(dev, "SPU %d detected.", iproc_priv.spu.num_spu);
  4335. spu->reg_vbase[iproc_priv.spu.num_spu] = spu_reg_vbase;
  4336. return 0;
  4337. }
  4338. int bcm_spu_probe(struct platform_device *pdev)
  4339. {
  4340. struct device *dev = &pdev->dev;
  4341. struct spu_hw *spu = &iproc_priv.spu;
  4342. int err = 0;
  4343. iproc_priv.pdev[iproc_priv.spu.num_spu] = pdev;
  4344. platform_set_drvdata(iproc_priv.pdev[iproc_priv.spu.num_spu],
  4345. &iproc_priv);
  4346. err = spu_dt_read(pdev);
  4347. if (err < 0)
  4348. goto failure;
  4349. err = spu_mb_init(&pdev->dev);
  4350. if (err < 0)
  4351. goto failure;
  4352. iproc_priv.spu.num_spu++;
  4353. /* If already initialized, we've just added another SPU and are done */
  4354. if (iproc_priv.inited)
  4355. return 0;
  4356. if (spu->spu_type == SPU_TYPE_SPUM)
  4357. iproc_priv.bcm_hdr_len = 8;
  4358. else if (spu->spu_type == SPU_TYPE_SPU2)
  4359. iproc_priv.bcm_hdr_len = 0;
  4360. spu_functions_register(&pdev->dev, spu->spu_type, spu->spu_subtype);
  4361. spu_counters_init();
  4362. spu_setup_debugfs();
  4363. err = spu_algs_register(dev);
  4364. if (err < 0)
  4365. goto fail_reg;
  4366. iproc_priv.inited = true;
  4367. return 0;
  4368. fail_reg:
  4369. spu_free_debugfs();
  4370. failure:
  4371. spu_mb_release(pdev);
  4372. dev_err(dev, "%s failed with error %d.\n", __func__, err);
  4373. return err;
  4374. }
  4375. int bcm_spu_remove(struct platform_device *pdev)
  4376. {
  4377. int i;
  4378. struct device *dev = &pdev->dev;
  4379. char *cdn;
  4380. for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
  4381. /*
  4382. * Not all algorithms were registered, depending on whether
  4383. * hardware is SPU or SPU2. So here we make sure to skip
  4384. * those algorithms that were not previously registered.
  4385. */
  4386. if (!driver_algs[i].registered)
  4387. continue;
  4388. switch (driver_algs[i].type) {
  4389. case CRYPTO_ALG_TYPE_ABLKCIPHER:
  4390. crypto_unregister_alg(&driver_algs[i].alg.crypto);
  4391. dev_dbg(dev, " unregistered cipher %s\n",
  4392. driver_algs[i].alg.crypto.cra_driver_name);
  4393. driver_algs[i].registered = false;
  4394. break;
  4395. case CRYPTO_ALG_TYPE_AHASH:
  4396. crypto_unregister_ahash(&driver_algs[i].alg.hash);
  4397. cdn = driver_algs[i].alg.hash.halg.base.cra_driver_name;
  4398. dev_dbg(dev, " unregistered hash %s\n", cdn);
  4399. driver_algs[i].registered = false;
  4400. break;
  4401. case CRYPTO_ALG_TYPE_AEAD:
  4402. crypto_unregister_aead(&driver_algs[i].alg.aead);
  4403. dev_dbg(dev, " unregistered aead %s\n",
  4404. driver_algs[i].alg.aead.base.cra_driver_name);
  4405. driver_algs[i].registered = false;
  4406. break;
  4407. }
  4408. }
  4409. spu_free_debugfs();
  4410. spu_mb_release(pdev);
  4411. return 0;
  4412. }
  4413. /* ===== Kernel Module API ===== */
  4414. static struct platform_driver bcm_spu_pdriver = {
  4415. .driver = {
  4416. .name = "brcm-spu-crypto",
  4417. .of_match_table = of_match_ptr(bcm_spu_dt_ids),
  4418. },
  4419. .probe = bcm_spu_probe,
  4420. .remove = bcm_spu_remove,
  4421. };
  4422. module_platform_driver(bcm_spu_pdriver);
  4423. MODULE_AUTHOR("Rob Rice <rob.rice@broadcom.com>");
  4424. MODULE_DESCRIPTION("Broadcom symmetric crypto offload driver");
  4425. MODULE_LICENSE("GPL v2");