trx.c 28 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2010 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. #include "../wifi.h"
  26. #include "../pci.h"
  27. #include "../base.h"
  28. #include "../stats.h"
  29. #include "reg.h"
  30. #include "def.h"
  31. #include "phy.h"
  32. #include "trx.h"
  33. #include "led.h"
  34. #include "dm.h"
  35. #include "phy.h"
  36. #include "fw.h"
  37. static u8 _rtl8821ae_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
  38. {
  39. __le16 fc = rtl_get_fc(skb);
  40. if (unlikely(ieee80211_is_beacon(fc)))
  41. return QSLT_BEACON;
  42. if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
  43. return QSLT_MGNT;
  44. return skb->priority;
  45. }
  46. static u16 odm_cfo(char value)
  47. {
  48. int ret_val;
  49. if (value < 0) {
  50. ret_val = 0 - value;
  51. ret_val = (ret_val << 1) + (ret_val >> 1);
  52. /* set bit12 as 1 for negative cfo */
  53. ret_val = ret_val | BIT(12);
  54. } else {
  55. ret_val = value;
  56. ret_val = (ret_val << 1) + (ret_val >> 1);
  57. }
  58. return ret_val;
  59. }
  60. static void query_rxphystatus(struct ieee80211_hw *hw,
  61. struct rtl_stats *pstatus, u8 *pdesc,
  62. struct rx_fwinfo_8821ae *p_drvinfo,
  63. bool bpacket_match_bssid,
  64. bool bpacket_toself, bool packet_beacon)
  65. {
  66. struct rtl_priv *rtlpriv = rtl_priv(hw);
  67. struct phy_status_rpt *p_phystrpt = (struct phy_status_rpt *)p_drvinfo;
  68. struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
  69. struct rtl_phy *rtlphy = &rtlpriv->phy;
  70. char rx_pwr_all = 0, rx_pwr[4];
  71. u8 rf_rx_num = 0, evm, evmdbm, pwdb_all;
  72. u8 i, max_spatial_stream;
  73. u32 rssi, total_rssi = 0;
  74. bool is_cck = pstatus->is_cck;
  75. u8 lan_idx, vga_idx;
  76. /* Record it for next packet processing */
  77. pstatus->packet_matchbssid = bpacket_match_bssid;
  78. pstatus->packet_toself = bpacket_toself;
  79. pstatus->packet_beacon = packet_beacon;
  80. pstatus->rx_mimo_signalquality[0] = -1;
  81. pstatus->rx_mimo_signalquality[1] = -1;
  82. if (is_cck) {
  83. u8 cck_highpwr;
  84. u8 cck_agc_rpt;
  85. cck_agc_rpt = p_phystrpt->cfosho[0];
  86. /* (1)Hardware does not provide RSSI for CCK
  87. * (2)PWDB, Average PWDB cacluated by
  88. * hardware (for rate adaptive)
  89. */
  90. cck_highpwr = (u8)rtlphy->cck_high_power;
  91. lan_idx = ((cck_agc_rpt & 0xE0) >> 5);
  92. vga_idx = (cck_agc_rpt & 0x1f);
  93. if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8812AE) {
  94. switch (lan_idx) {
  95. case 7:
  96. if (vga_idx <= 27)
  97. /*VGA_idx = 27~2*/
  98. rx_pwr_all = -100 + 2*(27-vga_idx);
  99. else
  100. rx_pwr_all = -100;
  101. break;
  102. case 6:
  103. /*VGA_idx = 2~0*/
  104. rx_pwr_all = -48 + 2*(2-vga_idx);
  105. break;
  106. case 5:
  107. /*VGA_idx = 7~5*/
  108. rx_pwr_all = -42 + 2*(7-vga_idx);
  109. break;
  110. case 4:
  111. /*VGA_idx = 7~4*/
  112. rx_pwr_all = -36 + 2*(7-vga_idx);
  113. break;
  114. case 3:
  115. /*VGA_idx = 7~0*/
  116. rx_pwr_all = -24 + 2*(7-vga_idx);
  117. break;
  118. case 2:
  119. if (cck_highpwr)
  120. /*VGA_idx = 5~0*/
  121. rx_pwr_all = -12 + 2*(5-vga_idx);
  122. else
  123. rx_pwr_all = -6 + 2*(5-vga_idx);
  124. break;
  125. case 1:
  126. rx_pwr_all = 8-2*vga_idx;
  127. break;
  128. case 0:
  129. rx_pwr_all = 14-2*vga_idx;
  130. break;
  131. default:
  132. break;
  133. }
  134. rx_pwr_all += 6;
  135. pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
  136. if (!cck_highpwr) {
  137. if (pwdb_all >= 80)
  138. pwdb_all =
  139. ((pwdb_all - 80)<<1) +
  140. ((pwdb_all - 80)>>1) + 80;
  141. else if ((pwdb_all <= 78) && (pwdb_all >= 20))
  142. pwdb_all += 3;
  143. if (pwdb_all > 100)
  144. pwdb_all = 100;
  145. }
  146. } else { /* 8821 */
  147. char pout = -6;
  148. switch (lan_idx) {
  149. case 5:
  150. rx_pwr_all = pout - 32 - (2*vga_idx);
  151. break;
  152. case 4:
  153. rx_pwr_all = pout - 24 - (2*vga_idx);
  154. break;
  155. case 2:
  156. rx_pwr_all = pout - 11 - (2*vga_idx);
  157. break;
  158. case 1:
  159. rx_pwr_all = pout + 5 - (2*vga_idx);
  160. break;
  161. case 0:
  162. rx_pwr_all = pout + 21 - (2*vga_idx);
  163. break;
  164. }
  165. pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
  166. }
  167. pstatus->rx_pwdb_all = pwdb_all;
  168. pstatus->recvsignalpower = rx_pwr_all;
  169. /* (3) Get Signal Quality (EVM) */
  170. if (bpacket_match_bssid) {
  171. u8 sq;
  172. if (pstatus->rx_pwdb_all > 40) {
  173. sq = 100;
  174. } else {
  175. sq = p_phystrpt->pwdb_all;
  176. if (sq > 64)
  177. sq = 0;
  178. else if (sq < 20)
  179. sq = 100;
  180. else
  181. sq = ((64 - sq) * 100) / 44;
  182. }
  183. pstatus->signalquality = sq;
  184. pstatus->rx_mimo_signalquality[0] = sq;
  185. pstatus->rx_mimo_signalquality[1] = -1;
  186. }
  187. } else {
  188. /* (1)Get RSSI for HT rate */
  189. for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
  190. /* we will judge RF RX path now. */
  191. if (rtlpriv->dm.rfpath_rxenable[i])
  192. rf_rx_num++;
  193. rx_pwr[i] = (p_phystrpt->gain_trsw[i] & 0x7f) - 110;
  194. /* Translate DBM to percentage. */
  195. rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
  196. total_rssi += rssi;
  197. /* Get Rx snr value in DB */
  198. pstatus->rx_snr[i] = p_phystrpt->rxsnr[i] / 2;
  199. rtlpriv->stats.rx_snr_db[i] = p_phystrpt->rxsnr[i] / 2;
  200. pstatus->cfo_short[i] = odm_cfo(p_phystrpt->cfosho[i]);
  201. pstatus->cfo_tail[i] = odm_cfo(p_phystrpt->cfotail[i]);
  202. /* Record Signal Strength for next packet */
  203. pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
  204. }
  205. /* (2)PWDB, Average PWDB cacluated by
  206. * hardware (for rate adaptive)
  207. */
  208. rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
  209. pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
  210. pstatus->rx_pwdb_all = pwdb_all;
  211. pstatus->rxpower = rx_pwr_all;
  212. pstatus->recvsignalpower = rx_pwr_all;
  213. /* (3)EVM of HT rate */
  214. if ((pstatus->is_ht && pstatus->rate >= DESC_RATEMCS8 &&
  215. pstatus->rate <= DESC_RATEMCS15) ||
  216. (pstatus->is_vht &&
  217. pstatus->rate >= DESC_RATEVHT2SS_MCS0 &&
  218. pstatus->rate <= DESC_RATEVHT2SS_MCS9))
  219. max_spatial_stream = 2;
  220. else
  221. max_spatial_stream = 1;
  222. for (i = 0; i < max_spatial_stream; i++) {
  223. evm = rtl_evm_db_to_percentage(p_phystrpt->rxevm[i]);
  224. evmdbm = rtl_evm_dbm_jaguar(p_phystrpt->rxevm[i]);
  225. if (bpacket_match_bssid) {
  226. /* Fill value in RFD, Get the first
  227. * spatial stream only
  228. */
  229. if (i == 0)
  230. pstatus->signalquality = evm;
  231. pstatus->rx_mimo_signalquality[i] = evm;
  232. pstatus->rx_mimo_evm_dbm[i] = evmdbm;
  233. }
  234. }
  235. if (bpacket_match_bssid) {
  236. for (i = RF90_PATH_A; i <= RF90_PATH_B; i++)
  237. rtl_priv(hw)->dm.cfo_tail[i] =
  238. (char)p_phystrpt->cfotail[i];
  239. rtl_priv(hw)->dm.packet_count++;
  240. }
  241. }
  242. /* UI BSS List signal strength(in percentage),
  243. * make it good looking, from 0~100.
  244. */
  245. if (is_cck)
  246. pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
  247. pwdb_all));
  248. else if (rf_rx_num != 0)
  249. pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
  250. total_rssi /= rf_rx_num));
  251. /*HW antenna diversity*/
  252. rtldm->fat_table.antsel_rx_keep_0 = p_phystrpt->antidx_anta;
  253. rtldm->fat_table.antsel_rx_keep_1 = p_phystrpt->antidx_antb;
  254. }
  255. static void translate_rx_signal_stuff(struct ieee80211_hw *hw,
  256. struct sk_buff *skb,
  257. struct rtl_stats *pstatus, u8 *pdesc,
  258. struct rx_fwinfo_8821ae *p_drvinfo)
  259. {
  260. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  261. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  262. struct ieee80211_hdr *hdr;
  263. u8 *tmp_buf;
  264. u8 *praddr;
  265. u8 *psaddr;
  266. __le16 fc;
  267. u16 type;
  268. bool packet_matchbssid, packet_toself, packet_beacon;
  269. tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
  270. hdr = (struct ieee80211_hdr *)tmp_buf;
  271. fc = hdr->frame_control;
  272. type = WLAN_FC_GET_TYPE(hdr->frame_control);
  273. praddr = hdr->addr1;
  274. psaddr = ieee80211_get_SA(hdr);
  275. ether_addr_copy(pstatus->psaddr, psaddr);
  276. packet_matchbssid = (!ieee80211_is_ctl(fc) &&
  277. (ether_addr_equal(mac->bssid,
  278. ieee80211_has_tods(fc) ?
  279. hdr->addr1 :
  280. ieee80211_has_fromds(fc) ?
  281. hdr->addr2 : hdr->addr3)) &&
  282. (!pstatus->hwerror) &&
  283. (!pstatus->crc) && (!pstatus->icv));
  284. packet_toself = packet_matchbssid &&
  285. (ether_addr_equal(praddr, rtlefuse->dev_addr));
  286. if (ieee80211_is_beacon(hdr->frame_control))
  287. packet_beacon = true;
  288. else
  289. packet_beacon = false;
  290. if (packet_beacon && packet_matchbssid)
  291. rtl_priv(hw)->dm.dbginfo.num_qry_beacon_pkt++;
  292. if (packet_matchbssid &&
  293. ieee80211_is_data_qos(hdr->frame_control) &&
  294. !is_multicast_ether_addr(ieee80211_get_DA(hdr))) {
  295. struct ieee80211_qos_hdr *hdr_qos =
  296. (struct ieee80211_qos_hdr *)tmp_buf;
  297. u16 tid = le16_to_cpu(hdr_qos->qos_ctrl) & 0xf;
  298. if (tid != 0 && tid != 3)
  299. rtl_priv(hw)->dm.dbginfo.num_non_be_pkt++;
  300. }
  301. query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
  302. packet_matchbssid, packet_toself,
  303. packet_beacon);
  304. /*_rtl8821ae_smart_antenna(hw, pstatus); */
  305. rtl_process_phyinfo(hw, tmp_buf, pstatus);
  306. }
  307. static void _rtl8821ae_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
  308. u8 *virtualaddress)
  309. {
  310. u32 dwtmp = 0;
  311. memset(virtualaddress, 0, 8);
  312. SET_EARLYMODE_PKTNUM(virtualaddress, ptcb_desc->empkt_num);
  313. if (ptcb_desc->empkt_num == 1) {
  314. dwtmp = ptcb_desc->empkt_len[0];
  315. } else {
  316. dwtmp = ptcb_desc->empkt_len[0];
  317. dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4;
  318. dwtmp += ptcb_desc->empkt_len[1];
  319. }
  320. SET_EARLYMODE_LEN0(virtualaddress, dwtmp);
  321. if (ptcb_desc->empkt_num <= 3) {
  322. dwtmp = ptcb_desc->empkt_len[2];
  323. } else {
  324. dwtmp = ptcb_desc->empkt_len[2];
  325. dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4;
  326. dwtmp += ptcb_desc->empkt_len[3];
  327. }
  328. SET_EARLYMODE_LEN1(virtualaddress, dwtmp);
  329. if (ptcb_desc->empkt_num <= 5) {
  330. dwtmp = ptcb_desc->empkt_len[4];
  331. } else {
  332. dwtmp = ptcb_desc->empkt_len[4];
  333. dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4;
  334. dwtmp += ptcb_desc->empkt_len[5];
  335. }
  336. SET_EARLYMODE_LEN2_1(virtualaddress, dwtmp & 0xF);
  337. SET_EARLYMODE_LEN2_2(virtualaddress, dwtmp >> 4);
  338. if (ptcb_desc->empkt_num <= 7) {
  339. dwtmp = ptcb_desc->empkt_len[6];
  340. } else {
  341. dwtmp = ptcb_desc->empkt_len[6];
  342. dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4;
  343. dwtmp += ptcb_desc->empkt_len[7];
  344. }
  345. SET_EARLYMODE_LEN3(virtualaddress, dwtmp);
  346. if (ptcb_desc->empkt_num <= 9) {
  347. dwtmp = ptcb_desc->empkt_len[8];
  348. } else {
  349. dwtmp = ptcb_desc->empkt_len[8];
  350. dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4;
  351. dwtmp += ptcb_desc->empkt_len[9];
  352. }
  353. SET_EARLYMODE_LEN4(virtualaddress, dwtmp);
  354. }
  355. static bool rtl8821ae_get_rxdesc_is_ht(struct ieee80211_hw *hw, u8 *pdesc)
  356. {
  357. struct rtl_priv *rtlpriv = rtl_priv(hw);
  358. u8 rx_rate = 0;
  359. rx_rate = GET_RX_DESC_RXMCS(pdesc);
  360. RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD, "rx_rate=0x%02x.\n", rx_rate);
  361. if ((rx_rate >= DESC_RATEMCS0) && (rx_rate <= DESC_RATEMCS15))
  362. return true;
  363. return false;
  364. }
  365. static bool rtl8821ae_get_rxdesc_is_vht(struct ieee80211_hw *hw, u8 *pdesc)
  366. {
  367. struct rtl_priv *rtlpriv = rtl_priv(hw);
  368. u8 rx_rate = 0;
  369. rx_rate = GET_RX_DESC_RXMCS(pdesc);
  370. RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD, "rx_rate=0x%02x.\n", rx_rate);
  371. if (rx_rate >= DESC_RATEVHT1SS_MCS0)
  372. return true;
  373. return false;
  374. }
  375. static u8 rtl8821ae_get_rx_vht_nss(struct ieee80211_hw *hw, u8 *pdesc)
  376. {
  377. u8 rx_rate = 0;
  378. u8 vht_nss = 0;
  379. rx_rate = GET_RX_DESC_RXMCS(pdesc);
  380. if ((rx_rate >= DESC_RATEVHT1SS_MCS0) &&
  381. (rx_rate <= DESC_RATEVHT1SS_MCS9))
  382. vht_nss = 1;
  383. else if ((rx_rate >= DESC_RATEVHT2SS_MCS0) &&
  384. (rx_rate <= DESC_RATEVHT2SS_MCS9))
  385. vht_nss = 2;
  386. return vht_nss;
  387. }
  388. bool rtl8821ae_rx_query_desc(struct ieee80211_hw *hw,
  389. struct rtl_stats *status,
  390. struct ieee80211_rx_status *rx_status,
  391. u8 *pdesc, struct sk_buff *skb)
  392. {
  393. struct rtl_priv *rtlpriv = rtl_priv(hw);
  394. struct rx_fwinfo_8821ae *p_drvinfo;
  395. struct ieee80211_hdr *hdr;
  396. u32 phystatus = GET_RX_DESC_PHYST(pdesc);
  397. status->length = (u16)GET_RX_DESC_PKT_LEN(pdesc);
  398. status->rx_drvinfo_size = (u8)GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
  399. RX_DRV_INFO_SIZE_UNIT;
  400. status->rx_bufshift = (u8)(GET_RX_DESC_SHIFT(pdesc) & 0x03);
  401. status->icv = (u16)GET_RX_DESC_ICV(pdesc);
  402. status->crc = (u16)GET_RX_DESC_CRC32(pdesc);
  403. status->hwerror = (status->crc | status->icv);
  404. status->decrypted = !GET_RX_DESC_SWDEC(pdesc);
  405. status->rate = (u8)GET_RX_DESC_RXMCS(pdesc);
  406. status->shortpreamble = (u16)GET_RX_DESC_SPLCP(pdesc);
  407. status->isampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1);
  408. status->isfirst_ampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1);
  409. status->timestamp_low = GET_RX_DESC_TSFL(pdesc);
  410. status->rx_packet_bw = GET_RX_DESC_BW(pdesc);
  411. status->macid = GET_RX_DESC_MACID(pdesc);
  412. status->is_short_gi = !(bool)GET_RX_DESC_SPLCP(pdesc);
  413. status->is_ht = rtl8821ae_get_rxdesc_is_ht(hw, pdesc);
  414. status->is_vht = rtl8821ae_get_rxdesc_is_vht(hw, pdesc);
  415. status->vht_nss = rtl8821ae_get_rx_vht_nss(hw, pdesc);
  416. status->is_cck = RTL8821AE_RX_HAL_IS_CCK_RATE(status->rate);
  417. RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD,
  418. "rx_packet_bw=%s,is_ht %d, is_vht %d, vht_nss=%d,is_short_gi %d.\n",
  419. (status->rx_packet_bw == 2) ? "80M" :
  420. (status->rx_packet_bw == 1) ? "40M" : "20M",
  421. status->is_ht, status->is_vht, status->vht_nss,
  422. status->is_short_gi);
  423. if (GET_RX_STATUS_DESC_RPT_SEL(pdesc))
  424. status->packet_report_type = C2H_PACKET;
  425. else
  426. status->packet_report_type = NORMAL_RX;
  427. if (GET_RX_STATUS_DESC_PATTERN_MATCH(pdesc))
  428. status->wake_match = BIT(2);
  429. else if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc))
  430. status->wake_match = BIT(1);
  431. else if (GET_RX_STATUS_DESC_UNICAST_MATCH(pdesc))
  432. status->wake_match = BIT(0);
  433. else
  434. status->wake_match = 0;
  435. if (status->wake_match)
  436. RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD,
  437. "GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",
  438. status->wake_match);
  439. rx_status->freq = hw->conf.chandef.chan->center_freq;
  440. rx_status->band = hw->conf.chandef.chan->band;
  441. hdr = (struct ieee80211_hdr *)(skb->data +
  442. status->rx_drvinfo_size + status->rx_bufshift);
  443. if (status->crc)
  444. rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
  445. if (status->rx_packet_bw == HT_CHANNEL_WIDTH_20_40)
  446. rx_status->flag |= RX_FLAG_40MHZ;
  447. else if (status->rx_packet_bw == HT_CHANNEL_WIDTH_80)
  448. rx_status->vht_flag |= RX_VHT_FLAG_80MHZ;
  449. if (status->is_ht)
  450. rx_status->flag |= RX_FLAG_HT;
  451. if (status->is_vht)
  452. rx_status->flag |= RX_FLAG_VHT;
  453. if (status->is_short_gi)
  454. rx_status->flag |= RX_FLAG_SHORT_GI;
  455. rx_status->vht_nss = status->vht_nss;
  456. rx_status->flag |= RX_FLAG_MACTIME_START;
  457. /* hw will set status->decrypted true, if it finds the
  458. * frame is open data frame or mgmt frame.
  459. * So hw will not decryption robust managment frame
  460. * for IEEE80211w but still set status->decrypted
  461. * true, so here we should set it back to undecrypted
  462. * for IEEE80211w frame, and mac80211 sw will help
  463. * to decrypt it
  464. */
  465. if (status->decrypted) {
  466. if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&
  467. (ieee80211_has_protected(hdr->frame_control)))
  468. rx_status->flag |= RX_FLAG_DECRYPTED;
  469. else
  470. rx_status->flag &= ~RX_FLAG_DECRYPTED;
  471. }
  472. /* rate_idx: index of data rate into band's
  473. * supported rates or MCS index if HT rates
  474. * are use (RX_FLAG_HT)
  475. */
  476. rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,
  477. status->is_vht,
  478. status->rate);
  479. rx_status->mactime = status->timestamp_low;
  480. if (phystatus) {
  481. p_drvinfo = (struct rx_fwinfo_8821ae *)(skb->data +
  482. status->rx_bufshift);
  483. translate_rx_signal_stuff(hw, skb, status, pdesc, p_drvinfo);
  484. }
  485. rx_status->signal = status->recvsignalpower + 10;
  486. if (status->packet_report_type == TX_REPORT2) {
  487. status->macid_valid_entry[0] =
  488. GET_RX_RPT2_DESC_MACID_VALID_1(pdesc);
  489. status->macid_valid_entry[1] =
  490. GET_RX_RPT2_DESC_MACID_VALID_2(pdesc);
  491. }
  492. return true;
  493. }
  494. static u8 rtl8821ae_bw_mapping(struct ieee80211_hw *hw,
  495. struct rtl_tcb_desc *ptcb_desc)
  496. {
  497. struct rtl_priv *rtlpriv = rtl_priv(hw);
  498. struct rtl_phy *rtlphy = &rtlpriv->phy;
  499. u8 bw_setting_of_desc = 0;
  500. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  501. "rtl8821ae_bw_mapping, current_chan_bw %d, packet_bw %d\n",
  502. rtlphy->current_chan_bw, ptcb_desc->packet_bw);
  503. if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_80) {
  504. if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80)
  505. bw_setting_of_desc = 2;
  506. else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40)
  507. bw_setting_of_desc = 1;
  508. else
  509. bw_setting_of_desc = 0;
  510. } else if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) {
  511. if ((ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) ||
  512. (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80))
  513. bw_setting_of_desc = 1;
  514. else
  515. bw_setting_of_desc = 0;
  516. } else {
  517. bw_setting_of_desc = 0;
  518. }
  519. return bw_setting_of_desc;
  520. }
  521. static u8 rtl8821ae_sc_mapping(struct ieee80211_hw *hw,
  522. struct rtl_tcb_desc *ptcb_desc)
  523. {
  524. struct rtl_priv *rtlpriv = rtl_priv(hw);
  525. struct rtl_phy *rtlphy = &rtlpriv->phy;
  526. struct rtl_mac *mac = rtl_mac(rtlpriv);
  527. u8 sc_setting_of_desc = 0;
  528. if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_80) {
  529. if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80) {
  530. sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE;
  531. } else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
  532. if (mac->cur_80_prime_sc ==
  533. HAL_PRIME_CHNL_OFFSET_LOWER)
  534. sc_setting_of_desc =
  535. VHT_DATA_SC_40_LOWER_OF_80MHZ;
  536. else if (mac->cur_80_prime_sc ==
  537. HAL_PRIME_CHNL_OFFSET_UPPER)
  538. sc_setting_of_desc =
  539. VHT_DATA_SC_40_UPPER_OF_80MHZ;
  540. else
  541. RT_TRACE(rtlpriv, COMP_SEND, DBG_LOUD,
  542. "rtl8821ae_sc_mapping: Not Correct Primary40MHz Setting\n");
  543. } else {
  544. if ((mac->cur_40_prime_sc ==
  545. HAL_PRIME_CHNL_OFFSET_LOWER) &&
  546. (mac->cur_80_prime_sc ==
  547. HAL_PRIME_CHNL_OFFSET_LOWER))
  548. sc_setting_of_desc =
  549. VHT_DATA_SC_20_LOWEST_OF_80MHZ;
  550. else if ((mac->cur_40_prime_sc ==
  551. HAL_PRIME_CHNL_OFFSET_UPPER) &&
  552. (mac->cur_80_prime_sc ==
  553. HAL_PRIME_CHNL_OFFSET_LOWER))
  554. sc_setting_of_desc =
  555. VHT_DATA_SC_20_LOWER_OF_80MHZ;
  556. else if ((mac->cur_40_prime_sc ==
  557. HAL_PRIME_CHNL_OFFSET_LOWER) &&
  558. (mac->cur_80_prime_sc ==
  559. HAL_PRIME_CHNL_OFFSET_UPPER))
  560. sc_setting_of_desc =
  561. VHT_DATA_SC_20_UPPER_OF_80MHZ;
  562. else if ((mac->cur_40_prime_sc ==
  563. HAL_PRIME_CHNL_OFFSET_UPPER) &&
  564. (mac->cur_80_prime_sc ==
  565. HAL_PRIME_CHNL_OFFSET_UPPER))
  566. sc_setting_of_desc =
  567. VHT_DATA_SC_20_UPPERST_OF_80MHZ;
  568. else
  569. RT_TRACE(rtlpriv, COMP_SEND, DBG_LOUD,
  570. "rtl8821ae_sc_mapping: Not Correct Primary40MHz Setting\n");
  571. }
  572. } else if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) {
  573. if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
  574. sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE;
  575. } else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20) {
  576. if (mac->cur_40_prime_sc ==
  577. HAL_PRIME_CHNL_OFFSET_UPPER) {
  578. sc_setting_of_desc =
  579. VHT_DATA_SC_20_UPPER_OF_80MHZ;
  580. } else if (mac->cur_40_prime_sc ==
  581. HAL_PRIME_CHNL_OFFSET_LOWER){
  582. sc_setting_of_desc =
  583. VHT_DATA_SC_20_LOWER_OF_80MHZ;
  584. } else {
  585. sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE;
  586. }
  587. }
  588. } else {
  589. sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE;
  590. }
  591. return sc_setting_of_desc;
  592. }
  593. void rtl8821ae_tx_fill_desc(struct ieee80211_hw *hw,
  594. struct ieee80211_hdr *hdr, u8 *pdesc_tx, u8 *txbd,
  595. struct ieee80211_tx_info *info,
  596. struct ieee80211_sta *sta,
  597. struct sk_buff *skb,
  598. u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
  599. {
  600. struct rtl_priv *rtlpriv = rtl_priv(hw);
  601. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  602. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  603. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  604. u8 *pdesc = (u8 *)pdesc_tx;
  605. u16 seq_number;
  606. __le16 fc = hdr->frame_control;
  607. unsigned int buf_len = 0;
  608. unsigned int skb_len = skb->len;
  609. u8 fw_qsel = _rtl8821ae_map_hwqueue_to_fwqueue(skb, hw_queue);
  610. bool firstseg = ((hdr->seq_ctrl &
  611. cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
  612. bool lastseg = ((hdr->frame_control &
  613. cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
  614. dma_addr_t mapping;
  615. u8 short_gi = 0;
  616. seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
  617. rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
  618. /* reserve 8 byte for AMPDU early mode */
  619. if (rtlhal->earlymode_enable) {
  620. skb_push(skb, EM_HDR_LEN);
  621. memset(skb->data, 0, EM_HDR_LEN);
  622. }
  623. buf_len = skb->len;
  624. mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
  625. PCI_DMA_TODEVICE);
  626. if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
  627. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  628. "DMA mapping error");
  629. return;
  630. }
  631. CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_8821ae));
  632. if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
  633. firstseg = true;
  634. lastseg = true;
  635. }
  636. if (firstseg) {
  637. if (rtlhal->earlymode_enable) {
  638. SET_TX_DESC_PKT_OFFSET(pdesc, 1);
  639. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN +
  640. EM_HDR_LEN);
  641. if (ptcb_desc->empkt_num) {
  642. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  643. "Insert 8 byte.pTcb->EMPktNum:%d\n",
  644. ptcb_desc->empkt_num);
  645. _rtl8821ae_insert_emcontent(ptcb_desc,
  646. (u8 *)(skb->data));
  647. }
  648. } else {
  649. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
  650. }
  651. /* ptcb_desc->use_driver_rate = true; */
  652. SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
  653. if (ptcb_desc->hw_rate > DESC_RATEMCS0)
  654. short_gi = (ptcb_desc->use_shortgi) ? 1 : 0;
  655. else
  656. short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;
  657. SET_TX_DESC_DATA_SHORTGI(pdesc, short_gi);
  658. if (info->flags & IEEE80211_TX_CTL_AMPDU) {
  659. SET_TX_DESC_AGG_ENABLE(pdesc, 1);
  660. SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x1f);
  661. }
  662. SET_TX_DESC_SEQ(pdesc, seq_number);
  663. SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable &&
  664. !ptcb_desc->cts_enable) ? 1 : 0));
  665. SET_TX_DESC_HW_RTS_ENABLE(pdesc, 0);
  666. SET_TX_DESC_CTS2SELF(pdesc, ((ptcb_desc->cts_enable) ? 1 : 0));
  667. SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
  668. SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc);
  669. SET_TX_DESC_RTS_SHORT(pdesc,
  670. ((ptcb_desc->rts_rate <= DESC_RATE54M) ?
  671. (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
  672. (ptcb_desc->rts_use_shortgi ? 1 : 0)));
  673. if (ptcb_desc->tx_enable_sw_calc_duration)
  674. SET_TX_DESC_NAV_USE_HDR(pdesc, 1);
  675. SET_TX_DESC_DATA_BW(pdesc,
  676. rtl8821ae_bw_mapping(hw, ptcb_desc));
  677. SET_TX_DESC_TX_SUB_CARRIER(pdesc,
  678. rtl8821ae_sc_mapping(hw, ptcb_desc));
  679. SET_TX_DESC_LINIP(pdesc, 0);
  680. SET_TX_DESC_PKT_SIZE(pdesc, (u16)skb_len);
  681. if (sta) {
  682. u8 ampdu_density = sta->ht_cap.ampdu_density;
  683. SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
  684. }
  685. if (info->control.hw_key) {
  686. struct ieee80211_key_conf *keyconf =
  687. info->control.hw_key;
  688. switch (keyconf->cipher) {
  689. case WLAN_CIPHER_SUITE_WEP40:
  690. case WLAN_CIPHER_SUITE_WEP104:
  691. case WLAN_CIPHER_SUITE_TKIP:
  692. SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
  693. break;
  694. case WLAN_CIPHER_SUITE_CCMP:
  695. SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
  696. break;
  697. default:
  698. SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
  699. break;
  700. }
  701. }
  702. SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
  703. SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
  704. SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF);
  705. SET_TX_DESC_DISABLE_FB(pdesc, ptcb_desc->disable_ratefallback ?
  706. 1 : 0);
  707. SET_TX_DESC_USE_RATE(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
  708. if (ieee80211_is_data_qos(fc)) {
  709. if (mac->rdg_en) {
  710. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  711. "Enable RDG function.\n");
  712. SET_TX_DESC_RDG_ENABLE(pdesc, 1);
  713. SET_TX_DESC_HTC(pdesc, 1);
  714. }
  715. }
  716. }
  717. SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
  718. SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
  719. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)buf_len);
  720. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
  721. /* if (rtlpriv->dm.useramask) { */
  722. if (1) {
  723. SET_TX_DESC_RATE_ID(pdesc, ptcb_desc->ratr_index);
  724. SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
  725. } else {
  726. SET_TX_DESC_RATE_ID(pdesc, 0xC + ptcb_desc->ratr_index);
  727. SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
  728. }
  729. if (!ieee80211_is_data_qos(fc)) {
  730. SET_TX_DESC_HWSEQ_EN(pdesc, 1);
  731. SET_TX_DESC_HWSEQ_SEL(pdesc, 0);
  732. }
  733. SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1));
  734. if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
  735. is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
  736. SET_TX_DESC_BMC(pdesc, 1);
  737. }
  738. rtl8821ae_dm_set_tx_ant_by_tx_info(hw, pdesc, ptcb_desc->mac_id);
  739. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
  740. }
  741. void rtl8821ae_tx_fill_cmddesc(struct ieee80211_hw *hw,
  742. u8 *pdesc, bool firstseg,
  743. bool lastseg, struct sk_buff *skb)
  744. {
  745. struct rtl_priv *rtlpriv = rtl_priv(hw);
  746. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  747. u8 fw_queue = QSLT_BEACON;
  748. dma_addr_t mapping = pci_map_single(rtlpci->pdev,
  749. skb->data, skb->len,
  750. PCI_DMA_TODEVICE);
  751. if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
  752. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  753. "DMA mapping error");
  754. return;
  755. }
  756. CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE);
  757. SET_TX_DESC_FIRST_SEG(pdesc, 1);
  758. SET_TX_DESC_LAST_SEG(pdesc, 1);
  759. SET_TX_DESC_PKT_SIZE((u8 *)pdesc, (u16)(skb->len));
  760. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
  761. SET_TX_DESC_USE_RATE(pdesc, 1);
  762. SET_TX_DESC_TX_RATE(pdesc, DESC_RATE1M);
  763. SET_TX_DESC_DISABLE_FB(pdesc, 1);
  764. SET_TX_DESC_DATA_BW(pdesc, 0);
  765. SET_TX_DESC_HWSEQ_EN(pdesc, 1);
  766. SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
  767. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
  768. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
  769. SET_TX_DESC_MACID(pdesc, 0);
  770. SET_TX_DESC_OWN(pdesc, 1);
  771. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  772. "H2C Tx Cmd Content\n",
  773. pdesc, TX_DESC_SIZE);
  774. }
  775. void rtl8821ae_set_desc(struct ieee80211_hw *hw, u8 *pdesc,
  776. bool istx, u8 desc_name, u8 *val)
  777. {
  778. if (istx) {
  779. switch (desc_name) {
  780. case HW_DESC_OWN:
  781. SET_TX_DESC_OWN(pdesc, 1);
  782. break;
  783. case HW_DESC_TX_NEXTDESC_ADDR:
  784. SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *)val);
  785. break;
  786. default:
  787. RT_ASSERT(false,
  788. "ERR txdesc :%d not process\n", desc_name);
  789. break;
  790. }
  791. } else {
  792. switch (desc_name) {
  793. case HW_DESC_RXOWN:
  794. SET_RX_DESC_OWN(pdesc, 1);
  795. break;
  796. case HW_DESC_RXBUFF_ADDR:
  797. SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *)val);
  798. break;
  799. case HW_DESC_RXPKT_LEN:
  800. SET_RX_DESC_PKT_LEN(pdesc, *(u32 *)val);
  801. break;
  802. case HW_DESC_RXERO:
  803. SET_RX_DESC_EOR(pdesc, 1);
  804. break;
  805. default:
  806. RT_ASSERT(false,
  807. "ERR rxdesc :%d not process\n", desc_name);
  808. break;
  809. }
  810. }
  811. }
  812. u32 rtl8821ae_get_desc(u8 *pdesc, bool istx, u8 desc_name)
  813. {
  814. u32 ret = 0;
  815. if (istx) {
  816. switch (desc_name) {
  817. case HW_DESC_OWN:
  818. ret = GET_TX_DESC_OWN(pdesc);
  819. break;
  820. case HW_DESC_TXBUFF_ADDR:
  821. ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc);
  822. break;
  823. default:
  824. RT_ASSERT(false,
  825. "ERR txdesc :%d not process\n", desc_name);
  826. break;
  827. }
  828. } else {
  829. switch (desc_name) {
  830. case HW_DESC_OWN:
  831. ret = GET_RX_DESC_OWN(pdesc);
  832. break;
  833. case HW_DESC_RXPKT_LEN:
  834. ret = GET_RX_DESC_PKT_LEN(pdesc);
  835. break;
  836. case HW_DESC_RXBUFF_ADDR:
  837. ret = GET_RX_DESC_BUFF_ADDR(pdesc);
  838. break;
  839. default:
  840. RT_ASSERT(false,
  841. "ERR rxdesc :%d not process\n", desc_name);
  842. break;
  843. }
  844. }
  845. return ret;
  846. }
  847. bool rtl8821ae_is_tx_desc_closed(struct ieee80211_hw *hw,
  848. u8 hw_queue, u16 index)
  849. {
  850. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  851. struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
  852. u8 *entry = (u8 *)(&ring->desc[ring->idx]);
  853. u8 own = (u8)rtl8821ae_get_desc(entry, true, HW_DESC_OWN);
  854. /**
  855. *beacon packet will only use the first
  856. *descriptor defautly,and the own may not
  857. *be cleared by the hardware
  858. */
  859. if (own)
  860. return false;
  861. return true;
  862. }
  863. void rtl8821ae_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
  864. {
  865. struct rtl_priv *rtlpriv = rtl_priv(hw);
  866. if (hw_queue == BEACON_QUEUE) {
  867. rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
  868. } else {
  869. rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
  870. BIT(0) << (hw_queue));
  871. }
  872. }
  873. u32 rtl8821ae_rx_command_packet(struct ieee80211_hw *hw,
  874. struct rtl_stats status,
  875. struct sk_buff *skb)
  876. {
  877. u32 result = 0;
  878. struct rtl_priv *rtlpriv = rtl_priv(hw);
  879. switch (status.packet_report_type) {
  880. case NORMAL_RX:
  881. result = 0;
  882. break;
  883. case C2H_PACKET:
  884. rtl8821ae_c2h_packet_handler(hw, skb->data, (u8)skb->len);
  885. result = 1;
  886. RT_TRACE(rtlpriv, COMP_RECV, DBG_LOUD,
  887. "skb->len=%d\n\n", skb->len);
  888. break;
  889. default:
  890. RT_TRACE(rtlpriv, COMP_RECV, DBG_LOUD,
  891. "No this packet type!!\n");
  892. break;
  893. }
  894. return result;
  895. }