fw.c 21 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of version 2 of the GNU General Public License as
  13. * published by the Free Software Foundation.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  18. * General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  23. * USA
  24. *
  25. * The full GNU General Public License is included in this distribution
  26. * in the file called COPYING.
  27. *
  28. * Contact Information:
  29. * Intel Linux Wireless <ilw@linux.intel.com>
  30. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  31. *
  32. * BSD LICENSE
  33. *
  34. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  35. * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  36. * All rights reserved.
  37. *
  38. * Redistribution and use in source and binary forms, with or without
  39. * modification, are permitted provided that the following conditions
  40. * are met:
  41. *
  42. * * Redistributions of source code must retain the above copyright
  43. * notice, this list of conditions and the following disclaimer.
  44. * * Redistributions in binary form must reproduce the above copyright
  45. * notice, this list of conditions and the following disclaimer in
  46. * the documentation and/or other materials provided with the
  47. * distribution.
  48. * * Neither the name Intel Corporation nor the names of its
  49. * contributors may be used to endorse or promote products derived
  50. * from this software without specific prior written permission.
  51. *
  52. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  53. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  54. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  55. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  56. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  57. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  58. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  59. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  60. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  61. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  62. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  63. *
  64. *****************************************************************************/
  65. #include <net/mac80211.h>
  66. #include "iwl-trans.h"
  67. #include "iwl-op-mode.h"
  68. #include "iwl-fw.h"
  69. #include "iwl-debug.h"
  70. #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
  71. #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
  72. #include "iwl-prph.h"
  73. #include "iwl-eeprom-parse.h"
  74. #include "mvm.h"
  75. #include "iwl-phy-db.h"
  76. #define MVM_UCODE_ALIVE_TIMEOUT HZ
  77. #define MVM_UCODE_CALIB_TIMEOUT (2*HZ)
  78. #define UCODE_VALID_OK cpu_to_le32(0x1)
  79. struct iwl_mvm_alive_data {
  80. bool valid;
  81. u32 scd_base_addr;
  82. };
  83. static inline const struct fw_img *
  84. iwl_get_ucode_image(struct iwl_mvm *mvm, enum iwl_ucode_type ucode_type)
  85. {
  86. if (ucode_type >= IWL_UCODE_TYPE_MAX)
  87. return NULL;
  88. return &mvm->fw->img[ucode_type];
  89. }
  90. static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
  91. {
  92. struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
  93. .valid = cpu_to_le32(valid_tx_ant),
  94. };
  95. IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
  96. return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
  97. sizeof(tx_ant_cmd), &tx_ant_cmd);
  98. }
  99. static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
  100. struct iwl_rx_packet *pkt, void *data)
  101. {
  102. struct iwl_mvm *mvm =
  103. container_of(notif_wait, struct iwl_mvm, notif_wait);
  104. struct iwl_mvm_alive_data *alive_data = data;
  105. struct mvm_alive_resp *palive;
  106. struct mvm_alive_resp_ver2 *palive2;
  107. if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
  108. palive = (void *)pkt->data;
  109. mvm->support_umac_log = false;
  110. mvm->error_event_table =
  111. le32_to_cpu(palive->error_event_table_ptr);
  112. mvm->log_event_table = le32_to_cpu(palive->log_event_table_ptr);
  113. alive_data->scd_base_addr = le32_to_cpu(palive->scd_base_ptr);
  114. alive_data->valid = le16_to_cpu(palive->status) ==
  115. IWL_ALIVE_STATUS_OK;
  116. IWL_DEBUG_FW(mvm,
  117. "Alive VER1 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
  118. le16_to_cpu(palive->status), palive->ver_type,
  119. palive->ver_subtype, palive->flags);
  120. } else {
  121. palive2 = (void *)pkt->data;
  122. mvm->error_event_table =
  123. le32_to_cpu(palive2->error_event_table_ptr);
  124. mvm->log_event_table =
  125. le32_to_cpu(palive2->log_event_table_ptr);
  126. alive_data->scd_base_addr = le32_to_cpu(palive2->scd_base_ptr);
  127. mvm->umac_error_event_table =
  128. le32_to_cpu(palive2->error_info_addr);
  129. mvm->sf_space.addr = le32_to_cpu(palive2->st_fwrd_addr);
  130. mvm->sf_space.size = le32_to_cpu(palive2->st_fwrd_size);
  131. alive_data->valid = le16_to_cpu(palive2->status) ==
  132. IWL_ALIVE_STATUS_OK;
  133. if (mvm->umac_error_event_table)
  134. mvm->support_umac_log = true;
  135. IWL_DEBUG_FW(mvm,
  136. "Alive VER2 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
  137. le16_to_cpu(palive2->status), palive2->ver_type,
  138. palive2->ver_subtype, palive2->flags);
  139. IWL_DEBUG_FW(mvm,
  140. "UMAC version: Major - 0x%x, Minor - 0x%x\n",
  141. palive2->umac_major, palive2->umac_minor);
  142. }
  143. return true;
  144. }
  145. static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
  146. struct iwl_rx_packet *pkt, void *data)
  147. {
  148. struct iwl_phy_db *phy_db = data;
  149. if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
  150. WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
  151. return true;
  152. }
  153. WARN_ON(iwl_phy_db_set_section(phy_db, pkt, GFP_ATOMIC));
  154. return false;
  155. }
  156. static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
  157. enum iwl_ucode_type ucode_type)
  158. {
  159. struct iwl_notification_wait alive_wait;
  160. struct iwl_mvm_alive_data alive_data;
  161. const struct fw_img *fw;
  162. int ret, i;
  163. enum iwl_ucode_type old_type = mvm->cur_ucode;
  164. static const u8 alive_cmd[] = { MVM_ALIVE };
  165. struct iwl_sf_region st_fwrd_space;
  166. if (ucode_type == IWL_UCODE_REGULAR &&
  167. iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_CUSTOM) &&
  168. iwl_fw_dbg_conf_enabled(mvm->fw, FW_DBG_CUSTOM))
  169. fw = iwl_get_ucode_image(mvm, IWL_UCODE_REGULAR_USNIFFER);
  170. else
  171. fw = iwl_get_ucode_image(mvm, ucode_type);
  172. if (WARN_ON(!fw))
  173. return -EINVAL;
  174. mvm->cur_ucode = ucode_type;
  175. mvm->ucode_loaded = false;
  176. iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
  177. alive_cmd, ARRAY_SIZE(alive_cmd),
  178. iwl_alive_fn, &alive_data);
  179. ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT);
  180. if (ret) {
  181. mvm->cur_ucode = old_type;
  182. iwl_remove_notification(&mvm->notif_wait, &alive_wait);
  183. return ret;
  184. }
  185. /*
  186. * Some things may run in the background now, but we
  187. * just wait for the ALIVE notification here.
  188. */
  189. ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
  190. MVM_UCODE_ALIVE_TIMEOUT);
  191. if (ret) {
  192. mvm->cur_ucode = old_type;
  193. return ret;
  194. }
  195. if (!alive_data.valid) {
  196. IWL_ERR(mvm, "Loaded ucode is not valid!\n");
  197. mvm->cur_ucode = old_type;
  198. return -EIO;
  199. }
  200. /*
  201. * update the sdio allocation according to the pointer we get in the
  202. * alive notification.
  203. */
  204. st_fwrd_space.addr = mvm->sf_space.addr;
  205. st_fwrd_space.size = mvm->sf_space.size;
  206. ret = iwl_trans_update_sf(mvm->trans, &st_fwrd_space);
  207. if (ret) {
  208. IWL_ERR(mvm, "Failed to update SF size. ret %d\n", ret);
  209. return ret;
  210. }
  211. iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
  212. /*
  213. * Note: all the queues are enabled as part of the interface
  214. * initialization, but in firmware restart scenarios they
  215. * could be stopped, so wake them up. In firmware restart,
  216. * mac80211 will have the queues stopped as well until the
  217. * reconfiguration completes. During normal startup, they
  218. * will be empty.
  219. */
  220. for (i = 0; i < IWL_MAX_HW_QUEUES; i++) {
  221. if (i < mvm->first_agg_queue && i != IWL_MVM_CMD_QUEUE)
  222. mvm->queue_to_mac80211[i] = i;
  223. else
  224. mvm->queue_to_mac80211[i] = IWL_INVALID_MAC80211_QUEUE;
  225. }
  226. for (i = 0; i < IEEE80211_MAX_QUEUES; i++)
  227. atomic_set(&mvm->mac80211_queue_stop_count[i], 0);
  228. mvm->ucode_loaded = true;
  229. return 0;
  230. }
  231. static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
  232. {
  233. struct iwl_phy_cfg_cmd phy_cfg_cmd;
  234. enum iwl_ucode_type ucode_type = mvm->cur_ucode;
  235. /* Set parameters */
  236. phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
  237. phy_cfg_cmd.calib_control.event_trigger =
  238. mvm->fw->default_calib[ucode_type].event_trigger;
  239. phy_cfg_cmd.calib_control.flow_trigger =
  240. mvm->fw->default_calib[ucode_type].flow_trigger;
  241. IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
  242. phy_cfg_cmd.phy_cfg);
  243. return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
  244. sizeof(phy_cfg_cmd), &phy_cfg_cmd);
  245. }
  246. int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
  247. {
  248. struct iwl_notification_wait calib_wait;
  249. static const u8 init_complete[] = {
  250. INIT_COMPLETE_NOTIF,
  251. CALIB_RES_NOTIF_PHY_DB
  252. };
  253. int ret;
  254. lockdep_assert_held(&mvm->mutex);
  255. if (WARN_ON_ONCE(mvm->init_ucode_complete || mvm->calibrating))
  256. return 0;
  257. iwl_init_notification_wait(&mvm->notif_wait,
  258. &calib_wait,
  259. init_complete,
  260. ARRAY_SIZE(init_complete),
  261. iwl_wait_phy_db_entry,
  262. mvm->phy_db);
  263. /* Will also start the device */
  264. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
  265. if (ret) {
  266. IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
  267. goto error;
  268. }
  269. ret = iwl_send_bt_init_conf(mvm);
  270. if (ret)
  271. goto error;
  272. /* Read the NVM only at driver load time, no need to do this twice */
  273. if (read_nvm) {
  274. /* Read nvm */
  275. ret = iwl_nvm_init(mvm, true);
  276. if (ret) {
  277. IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
  278. goto error;
  279. }
  280. }
  281. /* In case we read the NVM from external file, load it to the NIC */
  282. if (mvm->nvm_file_name)
  283. iwl_mvm_load_nvm_to_nic(mvm);
  284. ret = iwl_nvm_check_version(mvm->nvm_data, mvm->trans);
  285. WARN_ON(ret);
  286. /*
  287. * abort after reading the nvm in case RF Kill is on, we will complete
  288. * the init seq later when RF kill will switch to off
  289. */
  290. if (iwl_mvm_is_radio_killed(mvm)) {
  291. IWL_DEBUG_RF_KILL(mvm,
  292. "jump over all phy activities due to RF kill\n");
  293. iwl_remove_notification(&mvm->notif_wait, &calib_wait);
  294. ret = 1;
  295. goto out;
  296. }
  297. mvm->calibrating = true;
  298. /* Send TX valid antennas before triggering calibrations */
  299. ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
  300. if (ret)
  301. goto error;
  302. /*
  303. * Send phy configurations command to init uCode
  304. * to start the 16.0 uCode init image internal calibrations.
  305. */
  306. ret = iwl_send_phy_cfg_cmd(mvm);
  307. if (ret) {
  308. IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
  309. ret);
  310. goto error;
  311. }
  312. /*
  313. * Some things may run in the background now, but we
  314. * just wait for the calibration complete notification.
  315. */
  316. ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
  317. MVM_UCODE_CALIB_TIMEOUT);
  318. if (!ret)
  319. mvm->init_ucode_complete = true;
  320. if (ret && iwl_mvm_is_radio_killed(mvm)) {
  321. IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
  322. ret = 1;
  323. }
  324. goto out;
  325. error:
  326. iwl_remove_notification(&mvm->notif_wait, &calib_wait);
  327. out:
  328. mvm->calibrating = false;
  329. if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
  330. /* we want to debug INIT and we have no NVM - fake */
  331. mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
  332. sizeof(struct ieee80211_channel) +
  333. sizeof(struct ieee80211_rate),
  334. GFP_KERNEL);
  335. if (!mvm->nvm_data)
  336. return -ENOMEM;
  337. mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
  338. mvm->nvm_data->bands[0].n_channels = 1;
  339. mvm->nvm_data->bands[0].n_bitrates = 1;
  340. mvm->nvm_data->bands[0].bitrates =
  341. (void *)mvm->nvm_data->channels + 1;
  342. mvm->nvm_data->bands[0].bitrates->hw_value = 10;
  343. }
  344. return ret;
  345. }
  346. static void iwl_mvm_get_shared_mem_conf(struct iwl_mvm *mvm)
  347. {
  348. struct iwl_host_cmd cmd = {
  349. .id = SHARED_MEM_CFG,
  350. .flags = CMD_WANT_SKB,
  351. .data = { NULL, },
  352. .len = { 0, },
  353. };
  354. struct iwl_rx_packet *pkt;
  355. struct iwl_shared_mem_cfg *mem_cfg;
  356. u32 i;
  357. lockdep_assert_held(&mvm->mutex);
  358. if (WARN_ON(iwl_mvm_send_cmd(mvm, &cmd)))
  359. return;
  360. pkt = cmd.resp_pkt;
  361. if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
  362. IWL_ERR(mvm, "Bad return from SHARED_MEM_CFG (0x%08X)\n",
  363. pkt->hdr.flags);
  364. goto exit;
  365. }
  366. mem_cfg = (void *)pkt->data;
  367. mvm->shared_mem_cfg.shared_mem_addr =
  368. le32_to_cpu(mem_cfg->shared_mem_addr);
  369. mvm->shared_mem_cfg.shared_mem_size =
  370. le32_to_cpu(mem_cfg->shared_mem_size);
  371. mvm->shared_mem_cfg.sample_buff_addr =
  372. le32_to_cpu(mem_cfg->sample_buff_addr);
  373. mvm->shared_mem_cfg.sample_buff_size =
  374. le32_to_cpu(mem_cfg->sample_buff_size);
  375. mvm->shared_mem_cfg.txfifo_addr = le32_to_cpu(mem_cfg->txfifo_addr);
  376. for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.txfifo_size); i++)
  377. mvm->shared_mem_cfg.txfifo_size[i] =
  378. le32_to_cpu(mem_cfg->txfifo_size[i]);
  379. for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.rxfifo_size); i++)
  380. mvm->shared_mem_cfg.rxfifo_size[i] =
  381. le32_to_cpu(mem_cfg->rxfifo_size[i]);
  382. mvm->shared_mem_cfg.page_buff_addr =
  383. le32_to_cpu(mem_cfg->page_buff_addr);
  384. mvm->shared_mem_cfg.page_buff_size =
  385. le32_to_cpu(mem_cfg->page_buff_size);
  386. IWL_DEBUG_INFO(mvm, "SHARED MEM CFG: got memory offsets/sizes\n");
  387. exit:
  388. iwl_free_resp(&cmd);
  389. }
  390. void iwl_mvm_fw_dbg_collect(struct iwl_mvm *mvm)
  391. {
  392. /* stop recording */
  393. if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_7000) {
  394. iwl_set_bits_prph(mvm->trans, MON_BUFF_SAMPLE_CTL, 0x100);
  395. } else {
  396. iwl_write_prph(mvm->trans, DBGC_IN_SAMPLE, 0);
  397. iwl_write_prph(mvm->trans, DBGC_OUT_CTRL, 0);
  398. }
  399. schedule_work(&mvm->fw_error_dump_wk);
  400. }
  401. int iwl_mvm_start_fw_dbg_conf(struct iwl_mvm *mvm, enum iwl_fw_dbg_conf conf_id)
  402. {
  403. u8 *ptr;
  404. int ret;
  405. int i;
  406. if (WARN_ONCE(conf_id >= ARRAY_SIZE(mvm->fw->dbg_conf_tlv),
  407. "Invalid configuration %d\n", conf_id))
  408. return -EINVAL;
  409. if (!mvm->fw->dbg_conf_tlv[conf_id])
  410. return -EINVAL;
  411. if (mvm->fw_dbg_conf != FW_DBG_INVALID)
  412. IWL_WARN(mvm, "FW already configured (%d) - re-configuring\n",
  413. mvm->fw_dbg_conf);
  414. /* Send all HCMDs for configuring the FW debug */
  415. ptr = (void *)&mvm->fw->dbg_conf_tlv[conf_id]->hcmd;
  416. for (i = 0; i < mvm->fw->dbg_conf_tlv[conf_id]->num_of_hcmds; i++) {
  417. struct iwl_fw_dbg_conf_hcmd *cmd = (void *)ptr;
  418. ret = iwl_mvm_send_cmd_pdu(mvm, cmd->id, 0,
  419. le16_to_cpu(cmd->len), cmd->data);
  420. if (ret)
  421. return ret;
  422. ptr += sizeof(*cmd);
  423. ptr += le16_to_cpu(cmd->len);
  424. }
  425. mvm->fw_dbg_conf = conf_id;
  426. return ret;
  427. }
  428. static int iwl_mvm_config_ltr_v1(struct iwl_mvm *mvm)
  429. {
  430. struct iwl_ltr_config_cmd_v1 cmd_v1 = {
  431. .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
  432. };
  433. if (!mvm->trans->ltr_enabled)
  434. return 0;
  435. return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
  436. sizeof(cmd_v1), &cmd_v1);
  437. }
  438. static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
  439. {
  440. struct iwl_ltr_config_cmd cmd = {
  441. .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
  442. };
  443. if (!mvm->trans->ltr_enabled)
  444. return 0;
  445. if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_HDC_PHASE_0))
  446. return iwl_mvm_config_ltr_v1(mvm);
  447. return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
  448. sizeof(cmd), &cmd);
  449. }
  450. int iwl_mvm_up(struct iwl_mvm *mvm)
  451. {
  452. int ret, i;
  453. struct ieee80211_channel *chan;
  454. struct cfg80211_chan_def chandef;
  455. lockdep_assert_held(&mvm->mutex);
  456. ret = iwl_trans_start_hw(mvm->trans);
  457. if (ret)
  458. return ret;
  459. /*
  460. * If we haven't completed the run of the init ucode during
  461. * module loading, load init ucode now
  462. * (for example, if we were in RFKILL)
  463. */
  464. if (!mvm->init_ucode_complete) {
  465. ret = iwl_run_init_mvm_ucode(mvm, false);
  466. if (ret && !iwlmvm_mod_params.init_dbg) {
  467. IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
  468. /* this can't happen */
  469. if (WARN_ON(ret > 0))
  470. ret = -ERFKILL;
  471. goto error;
  472. }
  473. if (!iwlmvm_mod_params.init_dbg) {
  474. /*
  475. * should stop and start HW since that INIT
  476. * image just loaded
  477. */
  478. iwl_trans_stop_device(mvm->trans);
  479. ret = iwl_trans_start_hw(mvm->trans);
  480. if (ret)
  481. return ret;
  482. }
  483. }
  484. if (iwlmvm_mod_params.init_dbg)
  485. return 0;
  486. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
  487. if (ret) {
  488. IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
  489. goto error;
  490. }
  491. if (IWL_UCODE_API(mvm->fw->ucode_ver) >= 10)
  492. iwl_mvm_get_shared_mem_conf(mvm);
  493. ret = iwl_mvm_sf_update(mvm, NULL, false);
  494. if (ret)
  495. IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
  496. mvm->fw_dbg_conf = FW_DBG_INVALID;
  497. iwl_mvm_start_fw_dbg_conf(mvm, FW_DBG_CUSTOM);
  498. ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
  499. if (ret)
  500. goto error;
  501. ret = iwl_send_bt_init_conf(mvm);
  502. if (ret)
  503. goto error;
  504. /* Send phy db control command and then phy db calibration*/
  505. ret = iwl_send_phy_db_data(mvm->phy_db);
  506. if (ret)
  507. goto error;
  508. ret = iwl_send_phy_cfg_cmd(mvm);
  509. if (ret)
  510. goto error;
  511. /* init the fw <-> mac80211 STA mapping */
  512. for (i = 0; i < IWL_MVM_STATION_COUNT; i++)
  513. RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
  514. mvm->tdls_cs.peer.sta_id = IWL_MVM_STATION_COUNT;
  515. /* reset quota debouncing buffer - 0xff will yield invalid data */
  516. memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
  517. /* Add auxiliary station for scanning */
  518. ret = iwl_mvm_add_aux_sta(mvm);
  519. if (ret)
  520. goto error;
  521. /* Add all the PHY contexts */
  522. chan = &mvm->hw->wiphy->bands[IEEE80211_BAND_2GHZ]->channels[0];
  523. cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
  524. for (i = 0; i < NUM_PHY_CTX; i++) {
  525. /*
  526. * The channel used here isn't relevant as it's
  527. * going to be overwritten in the other flows.
  528. * For now use the first channel we have.
  529. */
  530. ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
  531. &chandef, 1, 1);
  532. if (ret)
  533. goto error;
  534. }
  535. /* Initialize tx backoffs to the minimal possible */
  536. iwl_mvm_tt_tx_backoff(mvm, 0);
  537. WARN_ON(iwl_mvm_config_ltr(mvm));
  538. ret = iwl_mvm_power_update_device(mvm);
  539. if (ret)
  540. goto error;
  541. if (mvm->fw->ucode_capa.capa[0] & IWL_UCODE_TLV_CAPA_UMAC_SCAN) {
  542. ret = iwl_mvm_config_scan(mvm);
  543. if (ret)
  544. goto error;
  545. }
  546. /* allow FW/transport low power modes if not during restart */
  547. if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
  548. iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN);
  549. IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
  550. return 0;
  551. error:
  552. iwl_trans_stop_device(mvm->trans);
  553. return ret;
  554. }
  555. int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
  556. {
  557. int ret, i;
  558. lockdep_assert_held(&mvm->mutex);
  559. ret = iwl_trans_start_hw(mvm->trans);
  560. if (ret)
  561. return ret;
  562. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
  563. if (ret) {
  564. IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
  565. goto error;
  566. }
  567. ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
  568. if (ret)
  569. goto error;
  570. /* Send phy db control command and then phy db calibration*/
  571. ret = iwl_send_phy_db_data(mvm->phy_db);
  572. if (ret)
  573. goto error;
  574. ret = iwl_send_phy_cfg_cmd(mvm);
  575. if (ret)
  576. goto error;
  577. /* init the fw <-> mac80211 STA mapping */
  578. for (i = 0; i < IWL_MVM_STATION_COUNT; i++)
  579. RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
  580. /* Add auxiliary station for scanning */
  581. ret = iwl_mvm_add_aux_sta(mvm);
  582. if (ret)
  583. goto error;
  584. return 0;
  585. error:
  586. iwl_trans_stop_device(mvm->trans);
  587. return ret;
  588. }
  589. int iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
  590. struct iwl_rx_cmd_buffer *rxb,
  591. struct iwl_device_cmd *cmd)
  592. {
  593. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  594. struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
  595. u32 flags = le32_to_cpu(card_state_notif->flags);
  596. IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
  597. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  598. (flags & SW_CARD_DISABLED) ? "Kill" : "On",
  599. (flags & CT_KILL_CARD_DISABLED) ?
  600. "Reached" : "Not reached");
  601. return 0;
  602. }
  603. int iwl_mvm_rx_radio_ver(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb,
  604. struct iwl_device_cmd *cmd)
  605. {
  606. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  607. struct iwl_radio_version_notif *radio_version = (void *)pkt->data;
  608. /* TODO: what to do with that? */
  609. IWL_DEBUG_INFO(mvm,
  610. "Radio version: flavor: 0x%08x, step 0x%08x, dash 0x%08x\n",
  611. le32_to_cpu(radio_version->radio_flavor),
  612. le32_to_cpu(radio_version->radio_step),
  613. le32_to_cpu(radio_version->radio_dash));
  614. return 0;
  615. }
  616. int iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
  617. struct iwl_rx_cmd_buffer *rxb,
  618. struct iwl_device_cmd *cmd)
  619. {
  620. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  621. struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
  622. IWL_DEBUG_INFO(mvm,
  623. "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
  624. le32_to_cpu(mfuart_notif->installed_ver),
  625. le32_to_cpu(mfuart_notif->external_ver),
  626. le32_to_cpu(mfuart_notif->status),
  627. le32_to_cpu(mfuart_notif->duration));
  628. return 0;
  629. }