netcp_ethss.c 58 KB

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  1. /*
  2. * Keystone GBE and XGBE subsystem code
  3. *
  4. * Copyright (C) 2014 Texas Instruments Incorporated
  5. * Authors: Sandeep Nair <sandeep_n@ti.com>
  6. * Sandeep Paulraj <s-paulraj@ti.com>
  7. * Cyril Chemparathy <cyril@ti.com>
  8. * Santosh Shilimkar <santosh.shilimkar@ti.com>
  9. * Wingman Kwok <w-kwok2@ti.com>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation version 2.
  14. *
  15. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  16. * kind, whether express or implied; without even the implied warranty
  17. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. */
  20. #include <linux/io.h>
  21. #include <linux/module.h>
  22. #include <linux/of_mdio.h>
  23. #include <linux/of_address.h>
  24. #include <linux/if_vlan.h>
  25. #include <linux/ethtool.h>
  26. #include "cpsw_ale.h"
  27. #include "netcp.h"
  28. #define NETCP_DRIVER_NAME "TI KeyStone Ethernet Driver"
  29. #define NETCP_DRIVER_VERSION "v1.0"
  30. #define GBE_IDENT(reg) ((reg >> 16) & 0xffff)
  31. #define GBE_MAJOR_VERSION(reg) (reg >> 8 & 0x7)
  32. #define GBE_MINOR_VERSION(reg) (reg & 0xff)
  33. #define GBE_RTL_VERSION(reg) ((reg >> 11) & 0x1f)
  34. /* 1G Ethernet SS defines */
  35. #define GBE_MODULE_NAME "netcp-gbe"
  36. #define GBE_SS_VERSION_14 0x4ed21104
  37. #define GBE13_SGMII_MODULE_OFFSET 0x100
  38. #define GBE13_SGMII34_MODULE_OFFSET 0x400
  39. #define GBE13_SWITCH_MODULE_OFFSET 0x800
  40. #define GBE13_HOST_PORT_OFFSET 0x834
  41. #define GBE13_SLAVE_PORT_OFFSET 0x860
  42. #define GBE13_EMAC_OFFSET 0x900
  43. #define GBE13_SLAVE_PORT2_OFFSET 0xa00
  44. #define GBE13_HW_STATS_OFFSET 0xb00
  45. #define GBE13_ALE_OFFSET 0xe00
  46. #define GBE13_HOST_PORT_NUM 0
  47. #define GBE13_NUM_SLAVES 4
  48. #define GBE13_NUM_ALE_PORTS (GBE13_NUM_SLAVES + 1)
  49. #define GBE13_NUM_ALE_ENTRIES 1024
  50. /* 10G Ethernet SS defines */
  51. #define XGBE_MODULE_NAME "netcp-xgbe"
  52. #define XGBE_SS_VERSION_10 0x4ee42100
  53. #define XGBE_SERDES_REG_INDEX 1
  54. #define XGBE10_SGMII_MODULE_OFFSET 0x100
  55. #define XGBE10_SWITCH_MODULE_OFFSET 0x1000
  56. #define XGBE10_HOST_PORT_OFFSET 0x1034
  57. #define XGBE10_SLAVE_PORT_OFFSET 0x1064
  58. #define XGBE10_EMAC_OFFSET 0x1400
  59. #define XGBE10_ALE_OFFSET 0x1700
  60. #define XGBE10_HW_STATS_OFFSET 0x1800
  61. #define XGBE10_HOST_PORT_NUM 0
  62. #define XGBE10_NUM_SLAVES 2
  63. #define XGBE10_NUM_ALE_PORTS (XGBE10_NUM_SLAVES + 1)
  64. #define XGBE10_NUM_ALE_ENTRIES 1024
  65. #define GBE_TIMER_INTERVAL (HZ / 2)
  66. /* Soft reset register values */
  67. #define SOFT_RESET_MASK BIT(0)
  68. #define SOFT_RESET BIT(0)
  69. #define DEVICE_EMACSL_RESET_POLL_COUNT 100
  70. #define GMACSL_RET_WARN_RESET_INCOMPLETE -2
  71. #define MACSL_RX_ENABLE_CSF BIT(23)
  72. #define MACSL_ENABLE_EXT_CTL BIT(18)
  73. #define MACSL_XGMII_ENABLE BIT(13)
  74. #define MACSL_XGIG_MODE BIT(8)
  75. #define MACSL_GIG_MODE BIT(7)
  76. #define MACSL_GMII_ENABLE BIT(5)
  77. #define MACSL_FULLDUPLEX BIT(0)
  78. #define GBE_CTL_P0_ENABLE BIT(2)
  79. #define GBE_REG_VAL_STAT_ENABLE_ALL 0xff
  80. #define XGBE_REG_VAL_STAT_ENABLE_ALL 0xf
  81. #define GBE_STATS_CD_SEL BIT(28)
  82. #define GBE_PORT_MASK(x) (BIT(x) - 1)
  83. #define GBE_MASK_NO_PORTS 0
  84. #define GBE_DEF_1G_MAC_CONTROL \
  85. (MACSL_GIG_MODE | MACSL_GMII_ENABLE | \
  86. MACSL_ENABLE_EXT_CTL | MACSL_RX_ENABLE_CSF)
  87. #define GBE_DEF_10G_MAC_CONTROL \
  88. (MACSL_XGIG_MODE | MACSL_XGMII_ENABLE | \
  89. MACSL_ENABLE_EXT_CTL | MACSL_RX_ENABLE_CSF)
  90. #define GBE_STATSA_MODULE 0
  91. #define GBE_STATSB_MODULE 1
  92. #define GBE_STATSC_MODULE 2
  93. #define GBE_STATSD_MODULE 3
  94. #define XGBE_STATS0_MODULE 0
  95. #define XGBE_STATS1_MODULE 1
  96. #define XGBE_STATS2_MODULE 2
  97. #define MAX_SLAVES GBE13_NUM_SLAVES
  98. /* s: 0-based slave_port */
  99. #define SGMII_BASE(s) \
  100. (((s) < 2) ? gbe_dev->sgmii_port_regs : gbe_dev->sgmii_port34_regs)
  101. #define GBE_TX_QUEUE 648
  102. #define GBE_TXHOOK_ORDER 0
  103. #define GBE_DEFAULT_ALE_AGEOUT 30
  104. #define SLAVE_LINK_IS_XGMII(s) ((s)->link_interface >= XGMII_LINK_MAC_PHY)
  105. #define NETCP_LINK_STATE_INVALID -1
  106. #define GBE_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \
  107. offsetof(struct gbe##_##rb, rn)
  108. #define XGBE_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \
  109. offsetof(struct xgbe##_##rb, rn)
  110. #define GBE_REG_ADDR(p, rb, rn) (p->rb + p->rb##_ofs.rn)
  111. struct xgbe_ss_regs {
  112. u32 id_ver;
  113. u32 synce_count;
  114. u32 synce_mux;
  115. u32 control;
  116. };
  117. struct xgbe_switch_regs {
  118. u32 id_ver;
  119. u32 control;
  120. u32 emcontrol;
  121. u32 stat_port_en;
  122. u32 ptype;
  123. u32 soft_idle;
  124. u32 thru_rate;
  125. u32 gap_thresh;
  126. u32 tx_start_wds;
  127. u32 flow_control;
  128. u32 cppi_thresh;
  129. };
  130. struct xgbe_port_regs {
  131. u32 blk_cnt;
  132. u32 port_vlan;
  133. u32 tx_pri_map;
  134. u32 sa_lo;
  135. u32 sa_hi;
  136. u32 ts_ctl;
  137. u32 ts_seq_ltype;
  138. u32 ts_vlan;
  139. u32 ts_ctl_ltype2;
  140. u32 ts_ctl2;
  141. u32 control;
  142. };
  143. struct xgbe_host_port_regs {
  144. u32 blk_cnt;
  145. u32 port_vlan;
  146. u32 tx_pri_map;
  147. u32 src_id;
  148. u32 rx_pri_map;
  149. u32 rx_maxlen;
  150. };
  151. struct xgbe_emac_regs {
  152. u32 id_ver;
  153. u32 mac_control;
  154. u32 mac_status;
  155. u32 soft_reset;
  156. u32 rx_maxlen;
  157. u32 __reserved_0;
  158. u32 rx_pause;
  159. u32 tx_pause;
  160. u32 em_control;
  161. u32 __reserved_1;
  162. u32 tx_gap;
  163. u32 rsvd[4];
  164. };
  165. struct xgbe_host_hw_stats {
  166. u32 rx_good_frames;
  167. u32 rx_broadcast_frames;
  168. u32 rx_multicast_frames;
  169. u32 __rsvd_0[3];
  170. u32 rx_oversized_frames;
  171. u32 __rsvd_1;
  172. u32 rx_undersized_frames;
  173. u32 __rsvd_2;
  174. u32 overrun_type4;
  175. u32 overrun_type5;
  176. u32 rx_bytes;
  177. u32 tx_good_frames;
  178. u32 tx_broadcast_frames;
  179. u32 tx_multicast_frames;
  180. u32 __rsvd_3[9];
  181. u32 tx_bytes;
  182. u32 tx_64byte_frames;
  183. u32 tx_65_to_127byte_frames;
  184. u32 tx_128_to_255byte_frames;
  185. u32 tx_256_to_511byte_frames;
  186. u32 tx_512_to_1023byte_frames;
  187. u32 tx_1024byte_frames;
  188. u32 net_bytes;
  189. u32 rx_sof_overruns;
  190. u32 rx_mof_overruns;
  191. u32 rx_dma_overruns;
  192. };
  193. struct xgbe_hw_stats {
  194. u32 rx_good_frames;
  195. u32 rx_broadcast_frames;
  196. u32 rx_multicast_frames;
  197. u32 rx_pause_frames;
  198. u32 rx_crc_errors;
  199. u32 rx_align_code_errors;
  200. u32 rx_oversized_frames;
  201. u32 rx_jabber_frames;
  202. u32 rx_undersized_frames;
  203. u32 rx_fragments;
  204. u32 overrun_type4;
  205. u32 overrun_type5;
  206. u32 rx_bytes;
  207. u32 tx_good_frames;
  208. u32 tx_broadcast_frames;
  209. u32 tx_multicast_frames;
  210. u32 tx_pause_frames;
  211. u32 tx_deferred_frames;
  212. u32 tx_collision_frames;
  213. u32 tx_single_coll_frames;
  214. u32 tx_mult_coll_frames;
  215. u32 tx_excessive_collisions;
  216. u32 tx_late_collisions;
  217. u32 tx_underrun;
  218. u32 tx_carrier_sense_errors;
  219. u32 tx_bytes;
  220. u32 tx_64byte_frames;
  221. u32 tx_65_to_127byte_frames;
  222. u32 tx_128_to_255byte_frames;
  223. u32 tx_256_to_511byte_frames;
  224. u32 tx_512_to_1023byte_frames;
  225. u32 tx_1024byte_frames;
  226. u32 net_bytes;
  227. u32 rx_sof_overruns;
  228. u32 rx_mof_overruns;
  229. u32 rx_dma_overruns;
  230. };
  231. #define XGBE10_NUM_STAT_ENTRIES (sizeof(struct xgbe_hw_stats)/sizeof(u32))
  232. struct gbe_ss_regs {
  233. u32 id_ver;
  234. u32 synce_count;
  235. u32 synce_mux;
  236. };
  237. struct gbe_ss_regs_ofs {
  238. u16 id_ver;
  239. u16 control;
  240. };
  241. struct gbe_switch_regs {
  242. u32 id_ver;
  243. u32 control;
  244. u32 soft_reset;
  245. u32 stat_port_en;
  246. u32 ptype;
  247. u32 soft_idle;
  248. u32 thru_rate;
  249. u32 gap_thresh;
  250. u32 tx_start_wds;
  251. u32 flow_control;
  252. };
  253. struct gbe_switch_regs_ofs {
  254. u16 id_ver;
  255. u16 control;
  256. u16 soft_reset;
  257. u16 emcontrol;
  258. u16 stat_port_en;
  259. u16 ptype;
  260. u16 flow_control;
  261. };
  262. struct gbe_port_regs {
  263. u32 max_blks;
  264. u32 blk_cnt;
  265. u32 port_vlan;
  266. u32 tx_pri_map;
  267. u32 sa_lo;
  268. u32 sa_hi;
  269. u32 ts_ctl;
  270. u32 ts_seq_ltype;
  271. u32 ts_vlan;
  272. u32 ts_ctl_ltype2;
  273. u32 ts_ctl2;
  274. };
  275. struct gbe_port_regs_ofs {
  276. u16 port_vlan;
  277. u16 tx_pri_map;
  278. u16 sa_lo;
  279. u16 sa_hi;
  280. u16 ts_ctl;
  281. u16 ts_seq_ltype;
  282. u16 ts_vlan;
  283. u16 ts_ctl_ltype2;
  284. u16 ts_ctl2;
  285. };
  286. struct gbe_host_port_regs {
  287. u32 src_id;
  288. u32 port_vlan;
  289. u32 rx_pri_map;
  290. u32 rx_maxlen;
  291. };
  292. struct gbe_host_port_regs_ofs {
  293. u16 port_vlan;
  294. u16 tx_pri_map;
  295. u16 rx_maxlen;
  296. };
  297. struct gbe_emac_regs {
  298. u32 id_ver;
  299. u32 mac_control;
  300. u32 mac_status;
  301. u32 soft_reset;
  302. u32 rx_maxlen;
  303. u32 __reserved_0;
  304. u32 rx_pause;
  305. u32 tx_pause;
  306. u32 __reserved_1;
  307. u32 rx_pri_map;
  308. u32 rsvd[6];
  309. };
  310. struct gbe_emac_regs_ofs {
  311. u16 mac_control;
  312. u16 soft_reset;
  313. u16 rx_maxlen;
  314. };
  315. struct gbe_hw_stats {
  316. u32 rx_good_frames;
  317. u32 rx_broadcast_frames;
  318. u32 rx_multicast_frames;
  319. u32 rx_pause_frames;
  320. u32 rx_crc_errors;
  321. u32 rx_align_code_errors;
  322. u32 rx_oversized_frames;
  323. u32 rx_jabber_frames;
  324. u32 rx_undersized_frames;
  325. u32 rx_fragments;
  326. u32 __pad_0[2];
  327. u32 rx_bytes;
  328. u32 tx_good_frames;
  329. u32 tx_broadcast_frames;
  330. u32 tx_multicast_frames;
  331. u32 tx_pause_frames;
  332. u32 tx_deferred_frames;
  333. u32 tx_collision_frames;
  334. u32 tx_single_coll_frames;
  335. u32 tx_mult_coll_frames;
  336. u32 tx_excessive_collisions;
  337. u32 tx_late_collisions;
  338. u32 tx_underrun;
  339. u32 tx_carrier_sense_errors;
  340. u32 tx_bytes;
  341. u32 tx_64byte_frames;
  342. u32 tx_65_to_127byte_frames;
  343. u32 tx_128_to_255byte_frames;
  344. u32 tx_256_to_511byte_frames;
  345. u32 tx_512_to_1023byte_frames;
  346. u32 tx_1024byte_frames;
  347. u32 net_bytes;
  348. u32 rx_sof_overruns;
  349. u32 rx_mof_overruns;
  350. u32 rx_dma_overruns;
  351. };
  352. #define GBE13_NUM_HW_STAT_ENTRIES (sizeof(struct gbe_hw_stats)/sizeof(u32))
  353. #define GBE13_NUM_HW_STATS_MOD 2
  354. #define XGBE10_NUM_HW_STATS_MOD 3
  355. #define GBE_MAX_HW_STAT_MODS 3
  356. #define GBE_HW_STATS_REG_MAP_SZ 0x100
  357. struct gbe_slave {
  358. void __iomem *port_regs;
  359. void __iomem *emac_regs;
  360. struct gbe_port_regs_ofs port_regs_ofs;
  361. struct gbe_emac_regs_ofs emac_regs_ofs;
  362. int slave_num; /* 0 based logical number */
  363. int port_num; /* actual port number */
  364. atomic_t link_state;
  365. bool open;
  366. struct phy_device *phy;
  367. u32 link_interface;
  368. u32 mac_control;
  369. u8 phy_port_t;
  370. struct device_node *phy_node;
  371. struct list_head slave_list;
  372. };
  373. struct gbe_priv {
  374. struct device *dev;
  375. struct netcp_device *netcp_device;
  376. struct timer_list timer;
  377. u32 num_slaves;
  378. u32 ale_entries;
  379. u32 ale_ports;
  380. bool enable_ale;
  381. struct netcp_tx_pipe tx_pipe;
  382. int host_port;
  383. u32 rx_packet_max;
  384. u32 ss_version;
  385. void __iomem *ss_regs;
  386. void __iomem *switch_regs;
  387. void __iomem *host_port_regs;
  388. void __iomem *ale_reg;
  389. void __iomem *sgmii_port_regs;
  390. void __iomem *sgmii_port34_regs;
  391. void __iomem *xgbe_serdes_regs;
  392. void __iomem *hw_stats_regs[GBE_MAX_HW_STAT_MODS];
  393. struct gbe_ss_regs_ofs ss_regs_ofs;
  394. struct gbe_switch_regs_ofs switch_regs_ofs;
  395. struct gbe_host_port_regs_ofs host_port_regs_ofs;
  396. struct cpsw_ale *ale;
  397. unsigned int tx_queue_id;
  398. const char *dma_chan_name;
  399. struct list_head gbe_intf_head;
  400. struct list_head secondary_slaves;
  401. struct net_device *dummy_ndev;
  402. u64 *hw_stats;
  403. const struct netcp_ethtool_stat *et_stats;
  404. int num_et_stats;
  405. /* Lock for updating the hwstats */
  406. spinlock_t hw_stats_lock;
  407. };
  408. struct gbe_intf {
  409. struct net_device *ndev;
  410. struct device *dev;
  411. struct gbe_priv *gbe_dev;
  412. struct netcp_tx_pipe tx_pipe;
  413. struct gbe_slave *slave;
  414. struct list_head gbe_intf_list;
  415. unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
  416. };
  417. static struct netcp_module gbe_module;
  418. static struct netcp_module xgbe_module;
  419. /* Statistic management */
  420. struct netcp_ethtool_stat {
  421. char desc[ETH_GSTRING_LEN];
  422. int type;
  423. u32 size;
  424. int offset;
  425. };
  426. #define GBE_STATSA_INFO(field) "GBE_A:"#field, GBE_STATSA_MODULE,\
  427. FIELD_SIZEOF(struct gbe_hw_stats, field), \
  428. offsetof(struct gbe_hw_stats, field)
  429. #define GBE_STATSB_INFO(field) "GBE_B:"#field, GBE_STATSB_MODULE,\
  430. FIELD_SIZEOF(struct gbe_hw_stats, field), \
  431. offsetof(struct gbe_hw_stats, field)
  432. #define GBE_STATSC_INFO(field) "GBE_C:"#field, GBE_STATSC_MODULE,\
  433. FIELD_SIZEOF(struct gbe_hw_stats, field), \
  434. offsetof(struct gbe_hw_stats, field)
  435. #define GBE_STATSD_INFO(field) "GBE_D:"#field, GBE_STATSD_MODULE,\
  436. FIELD_SIZEOF(struct gbe_hw_stats, field), \
  437. offsetof(struct gbe_hw_stats, field)
  438. static const struct netcp_ethtool_stat gbe13_et_stats[] = {
  439. /* GBE module A */
  440. {GBE_STATSA_INFO(rx_good_frames)},
  441. {GBE_STATSA_INFO(rx_broadcast_frames)},
  442. {GBE_STATSA_INFO(rx_multicast_frames)},
  443. {GBE_STATSA_INFO(rx_pause_frames)},
  444. {GBE_STATSA_INFO(rx_crc_errors)},
  445. {GBE_STATSA_INFO(rx_align_code_errors)},
  446. {GBE_STATSA_INFO(rx_oversized_frames)},
  447. {GBE_STATSA_INFO(rx_jabber_frames)},
  448. {GBE_STATSA_INFO(rx_undersized_frames)},
  449. {GBE_STATSA_INFO(rx_fragments)},
  450. {GBE_STATSA_INFO(rx_bytes)},
  451. {GBE_STATSA_INFO(tx_good_frames)},
  452. {GBE_STATSA_INFO(tx_broadcast_frames)},
  453. {GBE_STATSA_INFO(tx_multicast_frames)},
  454. {GBE_STATSA_INFO(tx_pause_frames)},
  455. {GBE_STATSA_INFO(tx_deferred_frames)},
  456. {GBE_STATSA_INFO(tx_collision_frames)},
  457. {GBE_STATSA_INFO(tx_single_coll_frames)},
  458. {GBE_STATSA_INFO(tx_mult_coll_frames)},
  459. {GBE_STATSA_INFO(tx_excessive_collisions)},
  460. {GBE_STATSA_INFO(tx_late_collisions)},
  461. {GBE_STATSA_INFO(tx_underrun)},
  462. {GBE_STATSA_INFO(tx_carrier_sense_errors)},
  463. {GBE_STATSA_INFO(tx_bytes)},
  464. {GBE_STATSA_INFO(tx_64byte_frames)},
  465. {GBE_STATSA_INFO(tx_65_to_127byte_frames)},
  466. {GBE_STATSA_INFO(tx_128_to_255byte_frames)},
  467. {GBE_STATSA_INFO(tx_256_to_511byte_frames)},
  468. {GBE_STATSA_INFO(tx_512_to_1023byte_frames)},
  469. {GBE_STATSA_INFO(tx_1024byte_frames)},
  470. {GBE_STATSA_INFO(net_bytes)},
  471. {GBE_STATSA_INFO(rx_sof_overruns)},
  472. {GBE_STATSA_INFO(rx_mof_overruns)},
  473. {GBE_STATSA_INFO(rx_dma_overruns)},
  474. /* GBE module B */
  475. {GBE_STATSB_INFO(rx_good_frames)},
  476. {GBE_STATSB_INFO(rx_broadcast_frames)},
  477. {GBE_STATSB_INFO(rx_multicast_frames)},
  478. {GBE_STATSB_INFO(rx_pause_frames)},
  479. {GBE_STATSB_INFO(rx_crc_errors)},
  480. {GBE_STATSB_INFO(rx_align_code_errors)},
  481. {GBE_STATSB_INFO(rx_oversized_frames)},
  482. {GBE_STATSB_INFO(rx_jabber_frames)},
  483. {GBE_STATSB_INFO(rx_undersized_frames)},
  484. {GBE_STATSB_INFO(rx_fragments)},
  485. {GBE_STATSB_INFO(rx_bytes)},
  486. {GBE_STATSB_INFO(tx_good_frames)},
  487. {GBE_STATSB_INFO(tx_broadcast_frames)},
  488. {GBE_STATSB_INFO(tx_multicast_frames)},
  489. {GBE_STATSB_INFO(tx_pause_frames)},
  490. {GBE_STATSB_INFO(tx_deferred_frames)},
  491. {GBE_STATSB_INFO(tx_collision_frames)},
  492. {GBE_STATSB_INFO(tx_single_coll_frames)},
  493. {GBE_STATSB_INFO(tx_mult_coll_frames)},
  494. {GBE_STATSB_INFO(tx_excessive_collisions)},
  495. {GBE_STATSB_INFO(tx_late_collisions)},
  496. {GBE_STATSB_INFO(tx_underrun)},
  497. {GBE_STATSB_INFO(tx_carrier_sense_errors)},
  498. {GBE_STATSB_INFO(tx_bytes)},
  499. {GBE_STATSB_INFO(tx_64byte_frames)},
  500. {GBE_STATSB_INFO(tx_65_to_127byte_frames)},
  501. {GBE_STATSB_INFO(tx_128_to_255byte_frames)},
  502. {GBE_STATSB_INFO(tx_256_to_511byte_frames)},
  503. {GBE_STATSB_INFO(tx_512_to_1023byte_frames)},
  504. {GBE_STATSB_INFO(tx_1024byte_frames)},
  505. {GBE_STATSB_INFO(net_bytes)},
  506. {GBE_STATSB_INFO(rx_sof_overruns)},
  507. {GBE_STATSB_INFO(rx_mof_overruns)},
  508. {GBE_STATSB_INFO(rx_dma_overruns)},
  509. /* GBE module C */
  510. {GBE_STATSC_INFO(rx_good_frames)},
  511. {GBE_STATSC_INFO(rx_broadcast_frames)},
  512. {GBE_STATSC_INFO(rx_multicast_frames)},
  513. {GBE_STATSC_INFO(rx_pause_frames)},
  514. {GBE_STATSC_INFO(rx_crc_errors)},
  515. {GBE_STATSC_INFO(rx_align_code_errors)},
  516. {GBE_STATSC_INFO(rx_oversized_frames)},
  517. {GBE_STATSC_INFO(rx_jabber_frames)},
  518. {GBE_STATSC_INFO(rx_undersized_frames)},
  519. {GBE_STATSC_INFO(rx_fragments)},
  520. {GBE_STATSC_INFO(rx_bytes)},
  521. {GBE_STATSC_INFO(tx_good_frames)},
  522. {GBE_STATSC_INFO(tx_broadcast_frames)},
  523. {GBE_STATSC_INFO(tx_multicast_frames)},
  524. {GBE_STATSC_INFO(tx_pause_frames)},
  525. {GBE_STATSC_INFO(tx_deferred_frames)},
  526. {GBE_STATSC_INFO(tx_collision_frames)},
  527. {GBE_STATSC_INFO(tx_single_coll_frames)},
  528. {GBE_STATSC_INFO(tx_mult_coll_frames)},
  529. {GBE_STATSC_INFO(tx_excessive_collisions)},
  530. {GBE_STATSC_INFO(tx_late_collisions)},
  531. {GBE_STATSC_INFO(tx_underrun)},
  532. {GBE_STATSC_INFO(tx_carrier_sense_errors)},
  533. {GBE_STATSC_INFO(tx_bytes)},
  534. {GBE_STATSC_INFO(tx_64byte_frames)},
  535. {GBE_STATSC_INFO(tx_65_to_127byte_frames)},
  536. {GBE_STATSC_INFO(tx_128_to_255byte_frames)},
  537. {GBE_STATSC_INFO(tx_256_to_511byte_frames)},
  538. {GBE_STATSC_INFO(tx_512_to_1023byte_frames)},
  539. {GBE_STATSC_INFO(tx_1024byte_frames)},
  540. {GBE_STATSC_INFO(net_bytes)},
  541. {GBE_STATSC_INFO(rx_sof_overruns)},
  542. {GBE_STATSC_INFO(rx_mof_overruns)},
  543. {GBE_STATSC_INFO(rx_dma_overruns)},
  544. /* GBE module D */
  545. {GBE_STATSD_INFO(rx_good_frames)},
  546. {GBE_STATSD_INFO(rx_broadcast_frames)},
  547. {GBE_STATSD_INFO(rx_multicast_frames)},
  548. {GBE_STATSD_INFO(rx_pause_frames)},
  549. {GBE_STATSD_INFO(rx_crc_errors)},
  550. {GBE_STATSD_INFO(rx_align_code_errors)},
  551. {GBE_STATSD_INFO(rx_oversized_frames)},
  552. {GBE_STATSD_INFO(rx_jabber_frames)},
  553. {GBE_STATSD_INFO(rx_undersized_frames)},
  554. {GBE_STATSD_INFO(rx_fragments)},
  555. {GBE_STATSD_INFO(rx_bytes)},
  556. {GBE_STATSD_INFO(tx_good_frames)},
  557. {GBE_STATSD_INFO(tx_broadcast_frames)},
  558. {GBE_STATSD_INFO(tx_multicast_frames)},
  559. {GBE_STATSD_INFO(tx_pause_frames)},
  560. {GBE_STATSD_INFO(tx_deferred_frames)},
  561. {GBE_STATSD_INFO(tx_collision_frames)},
  562. {GBE_STATSD_INFO(tx_single_coll_frames)},
  563. {GBE_STATSD_INFO(tx_mult_coll_frames)},
  564. {GBE_STATSD_INFO(tx_excessive_collisions)},
  565. {GBE_STATSD_INFO(tx_late_collisions)},
  566. {GBE_STATSD_INFO(tx_underrun)},
  567. {GBE_STATSD_INFO(tx_carrier_sense_errors)},
  568. {GBE_STATSD_INFO(tx_bytes)},
  569. {GBE_STATSD_INFO(tx_64byte_frames)},
  570. {GBE_STATSD_INFO(tx_65_to_127byte_frames)},
  571. {GBE_STATSD_INFO(tx_128_to_255byte_frames)},
  572. {GBE_STATSD_INFO(tx_256_to_511byte_frames)},
  573. {GBE_STATSD_INFO(tx_512_to_1023byte_frames)},
  574. {GBE_STATSD_INFO(tx_1024byte_frames)},
  575. {GBE_STATSD_INFO(net_bytes)},
  576. {GBE_STATSD_INFO(rx_sof_overruns)},
  577. {GBE_STATSD_INFO(rx_mof_overruns)},
  578. {GBE_STATSD_INFO(rx_dma_overruns)},
  579. };
  580. #define XGBE_STATS0_INFO(field) "GBE_0:"#field, XGBE_STATS0_MODULE, \
  581. FIELD_SIZEOF(struct xgbe_hw_stats, field), \
  582. offsetof(struct xgbe_hw_stats, field)
  583. #define XGBE_STATS1_INFO(field) "GBE_1:"#field, XGBE_STATS1_MODULE, \
  584. FIELD_SIZEOF(struct xgbe_hw_stats, field), \
  585. offsetof(struct xgbe_hw_stats, field)
  586. #define XGBE_STATS2_INFO(field) "GBE_2:"#field, XGBE_STATS2_MODULE, \
  587. FIELD_SIZEOF(struct xgbe_hw_stats, field), \
  588. offsetof(struct xgbe_hw_stats, field)
  589. static const struct netcp_ethtool_stat xgbe10_et_stats[] = {
  590. /* GBE module 0 */
  591. {XGBE_STATS0_INFO(rx_good_frames)},
  592. {XGBE_STATS0_INFO(rx_broadcast_frames)},
  593. {XGBE_STATS0_INFO(rx_multicast_frames)},
  594. {XGBE_STATS0_INFO(rx_oversized_frames)},
  595. {XGBE_STATS0_INFO(rx_undersized_frames)},
  596. {XGBE_STATS0_INFO(overrun_type4)},
  597. {XGBE_STATS0_INFO(overrun_type5)},
  598. {XGBE_STATS0_INFO(rx_bytes)},
  599. {XGBE_STATS0_INFO(tx_good_frames)},
  600. {XGBE_STATS0_INFO(tx_broadcast_frames)},
  601. {XGBE_STATS0_INFO(tx_multicast_frames)},
  602. {XGBE_STATS0_INFO(tx_bytes)},
  603. {XGBE_STATS0_INFO(tx_64byte_frames)},
  604. {XGBE_STATS0_INFO(tx_65_to_127byte_frames)},
  605. {XGBE_STATS0_INFO(tx_128_to_255byte_frames)},
  606. {XGBE_STATS0_INFO(tx_256_to_511byte_frames)},
  607. {XGBE_STATS0_INFO(tx_512_to_1023byte_frames)},
  608. {XGBE_STATS0_INFO(tx_1024byte_frames)},
  609. {XGBE_STATS0_INFO(net_bytes)},
  610. {XGBE_STATS0_INFO(rx_sof_overruns)},
  611. {XGBE_STATS0_INFO(rx_mof_overruns)},
  612. {XGBE_STATS0_INFO(rx_dma_overruns)},
  613. /* XGBE module 1 */
  614. {XGBE_STATS1_INFO(rx_good_frames)},
  615. {XGBE_STATS1_INFO(rx_broadcast_frames)},
  616. {XGBE_STATS1_INFO(rx_multicast_frames)},
  617. {XGBE_STATS1_INFO(rx_pause_frames)},
  618. {XGBE_STATS1_INFO(rx_crc_errors)},
  619. {XGBE_STATS1_INFO(rx_align_code_errors)},
  620. {XGBE_STATS1_INFO(rx_oversized_frames)},
  621. {XGBE_STATS1_INFO(rx_jabber_frames)},
  622. {XGBE_STATS1_INFO(rx_undersized_frames)},
  623. {XGBE_STATS1_INFO(rx_fragments)},
  624. {XGBE_STATS1_INFO(overrun_type4)},
  625. {XGBE_STATS1_INFO(overrun_type5)},
  626. {XGBE_STATS1_INFO(rx_bytes)},
  627. {XGBE_STATS1_INFO(tx_good_frames)},
  628. {XGBE_STATS1_INFO(tx_broadcast_frames)},
  629. {XGBE_STATS1_INFO(tx_multicast_frames)},
  630. {XGBE_STATS1_INFO(tx_pause_frames)},
  631. {XGBE_STATS1_INFO(tx_deferred_frames)},
  632. {XGBE_STATS1_INFO(tx_collision_frames)},
  633. {XGBE_STATS1_INFO(tx_single_coll_frames)},
  634. {XGBE_STATS1_INFO(tx_mult_coll_frames)},
  635. {XGBE_STATS1_INFO(tx_excessive_collisions)},
  636. {XGBE_STATS1_INFO(tx_late_collisions)},
  637. {XGBE_STATS1_INFO(tx_underrun)},
  638. {XGBE_STATS1_INFO(tx_carrier_sense_errors)},
  639. {XGBE_STATS1_INFO(tx_bytes)},
  640. {XGBE_STATS1_INFO(tx_64byte_frames)},
  641. {XGBE_STATS1_INFO(tx_65_to_127byte_frames)},
  642. {XGBE_STATS1_INFO(tx_128_to_255byte_frames)},
  643. {XGBE_STATS1_INFO(tx_256_to_511byte_frames)},
  644. {XGBE_STATS1_INFO(tx_512_to_1023byte_frames)},
  645. {XGBE_STATS1_INFO(tx_1024byte_frames)},
  646. {XGBE_STATS1_INFO(net_bytes)},
  647. {XGBE_STATS1_INFO(rx_sof_overruns)},
  648. {XGBE_STATS1_INFO(rx_mof_overruns)},
  649. {XGBE_STATS1_INFO(rx_dma_overruns)},
  650. /* XGBE module 2 */
  651. {XGBE_STATS2_INFO(rx_good_frames)},
  652. {XGBE_STATS2_INFO(rx_broadcast_frames)},
  653. {XGBE_STATS2_INFO(rx_multicast_frames)},
  654. {XGBE_STATS2_INFO(rx_pause_frames)},
  655. {XGBE_STATS2_INFO(rx_crc_errors)},
  656. {XGBE_STATS2_INFO(rx_align_code_errors)},
  657. {XGBE_STATS2_INFO(rx_oversized_frames)},
  658. {XGBE_STATS2_INFO(rx_jabber_frames)},
  659. {XGBE_STATS2_INFO(rx_undersized_frames)},
  660. {XGBE_STATS2_INFO(rx_fragments)},
  661. {XGBE_STATS2_INFO(overrun_type4)},
  662. {XGBE_STATS2_INFO(overrun_type5)},
  663. {XGBE_STATS2_INFO(rx_bytes)},
  664. {XGBE_STATS2_INFO(tx_good_frames)},
  665. {XGBE_STATS2_INFO(tx_broadcast_frames)},
  666. {XGBE_STATS2_INFO(tx_multicast_frames)},
  667. {XGBE_STATS2_INFO(tx_pause_frames)},
  668. {XGBE_STATS2_INFO(tx_deferred_frames)},
  669. {XGBE_STATS2_INFO(tx_collision_frames)},
  670. {XGBE_STATS2_INFO(tx_single_coll_frames)},
  671. {XGBE_STATS2_INFO(tx_mult_coll_frames)},
  672. {XGBE_STATS2_INFO(tx_excessive_collisions)},
  673. {XGBE_STATS2_INFO(tx_late_collisions)},
  674. {XGBE_STATS2_INFO(tx_underrun)},
  675. {XGBE_STATS2_INFO(tx_carrier_sense_errors)},
  676. {XGBE_STATS2_INFO(tx_bytes)},
  677. {XGBE_STATS2_INFO(tx_64byte_frames)},
  678. {XGBE_STATS2_INFO(tx_65_to_127byte_frames)},
  679. {XGBE_STATS2_INFO(tx_128_to_255byte_frames)},
  680. {XGBE_STATS2_INFO(tx_256_to_511byte_frames)},
  681. {XGBE_STATS2_INFO(tx_512_to_1023byte_frames)},
  682. {XGBE_STATS2_INFO(tx_1024byte_frames)},
  683. {XGBE_STATS2_INFO(net_bytes)},
  684. {XGBE_STATS2_INFO(rx_sof_overruns)},
  685. {XGBE_STATS2_INFO(rx_mof_overruns)},
  686. {XGBE_STATS2_INFO(rx_dma_overruns)},
  687. };
  688. #define for_each_intf(i, priv) \
  689. list_for_each_entry((i), &(priv)->gbe_intf_head, gbe_intf_list)
  690. #define for_each_sec_slave(slave, priv) \
  691. list_for_each_entry((slave), &(priv)->secondary_slaves, slave_list)
  692. #define first_sec_slave(priv) \
  693. list_first_entry(&priv->secondary_slaves, \
  694. struct gbe_slave, slave_list)
  695. static void keystone_get_drvinfo(struct net_device *ndev,
  696. struct ethtool_drvinfo *info)
  697. {
  698. strncpy(info->driver, NETCP_DRIVER_NAME, sizeof(info->driver));
  699. strncpy(info->version, NETCP_DRIVER_VERSION, sizeof(info->version));
  700. }
  701. static u32 keystone_get_msglevel(struct net_device *ndev)
  702. {
  703. struct netcp_intf *netcp = netdev_priv(ndev);
  704. return netcp->msg_enable;
  705. }
  706. static void keystone_set_msglevel(struct net_device *ndev, u32 value)
  707. {
  708. struct netcp_intf *netcp = netdev_priv(ndev);
  709. netcp->msg_enable = value;
  710. }
  711. static void keystone_get_stat_strings(struct net_device *ndev,
  712. uint32_t stringset, uint8_t *data)
  713. {
  714. struct netcp_intf *netcp = netdev_priv(ndev);
  715. struct gbe_intf *gbe_intf;
  716. struct gbe_priv *gbe_dev;
  717. int i;
  718. gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
  719. if (!gbe_intf)
  720. return;
  721. gbe_dev = gbe_intf->gbe_dev;
  722. switch (stringset) {
  723. case ETH_SS_STATS:
  724. for (i = 0; i < gbe_dev->num_et_stats; i++) {
  725. memcpy(data, gbe_dev->et_stats[i].desc,
  726. ETH_GSTRING_LEN);
  727. data += ETH_GSTRING_LEN;
  728. }
  729. break;
  730. case ETH_SS_TEST:
  731. break;
  732. }
  733. }
  734. static int keystone_get_sset_count(struct net_device *ndev, int stringset)
  735. {
  736. struct netcp_intf *netcp = netdev_priv(ndev);
  737. struct gbe_intf *gbe_intf;
  738. struct gbe_priv *gbe_dev;
  739. gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
  740. if (!gbe_intf)
  741. return -EINVAL;
  742. gbe_dev = gbe_intf->gbe_dev;
  743. switch (stringset) {
  744. case ETH_SS_TEST:
  745. return 0;
  746. case ETH_SS_STATS:
  747. return gbe_dev->num_et_stats;
  748. default:
  749. return -EINVAL;
  750. }
  751. }
  752. static void gbe_update_stats(struct gbe_priv *gbe_dev, uint64_t *data)
  753. {
  754. void __iomem *base = NULL;
  755. u32 __iomem *p;
  756. u32 tmp = 0;
  757. int i;
  758. for (i = 0; i < gbe_dev->num_et_stats; i++) {
  759. base = gbe_dev->hw_stats_regs[gbe_dev->et_stats[i].type];
  760. p = base + gbe_dev->et_stats[i].offset;
  761. tmp = readl(p);
  762. gbe_dev->hw_stats[i] = gbe_dev->hw_stats[i] + tmp;
  763. if (data)
  764. data[i] = gbe_dev->hw_stats[i];
  765. /* write-to-decrement:
  766. * new register value = old register value - write value
  767. */
  768. writel(tmp, p);
  769. }
  770. }
  771. static void gbe_update_stats_ver14(struct gbe_priv *gbe_dev, uint64_t *data)
  772. {
  773. void __iomem *gbe_statsa = gbe_dev->hw_stats_regs[0];
  774. void __iomem *gbe_statsb = gbe_dev->hw_stats_regs[1];
  775. u64 *hw_stats = &gbe_dev->hw_stats[0];
  776. void __iomem *base = NULL;
  777. u32 __iomem *p;
  778. u32 tmp = 0, val, pair_size = (gbe_dev->num_et_stats / 2);
  779. int i, j, pair;
  780. for (pair = 0; pair < 2; pair++) {
  781. val = readl(GBE_REG_ADDR(gbe_dev, switch_regs, stat_port_en));
  782. if (pair == 0)
  783. val &= ~GBE_STATS_CD_SEL;
  784. else
  785. val |= GBE_STATS_CD_SEL;
  786. /* make the stat modules visible */
  787. writel(val, GBE_REG_ADDR(gbe_dev, switch_regs, stat_port_en));
  788. for (i = 0; i < pair_size; i++) {
  789. j = pair * pair_size + i;
  790. switch (gbe_dev->et_stats[j].type) {
  791. case GBE_STATSA_MODULE:
  792. case GBE_STATSC_MODULE:
  793. base = gbe_statsa;
  794. break;
  795. case GBE_STATSB_MODULE:
  796. case GBE_STATSD_MODULE:
  797. base = gbe_statsb;
  798. break;
  799. }
  800. p = base + gbe_dev->et_stats[j].offset;
  801. tmp = readl(p);
  802. hw_stats[j] += tmp;
  803. if (data)
  804. data[j] = hw_stats[j];
  805. /* write-to-decrement:
  806. * new register value = old register value - write value
  807. */
  808. writel(tmp, p);
  809. }
  810. }
  811. }
  812. static void keystone_get_ethtool_stats(struct net_device *ndev,
  813. struct ethtool_stats *stats,
  814. uint64_t *data)
  815. {
  816. struct netcp_intf *netcp = netdev_priv(ndev);
  817. struct gbe_intf *gbe_intf;
  818. struct gbe_priv *gbe_dev;
  819. gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
  820. if (!gbe_intf)
  821. return;
  822. gbe_dev = gbe_intf->gbe_dev;
  823. spin_lock_bh(&gbe_dev->hw_stats_lock);
  824. if (gbe_dev->ss_version == GBE_SS_VERSION_14)
  825. gbe_update_stats_ver14(gbe_dev, data);
  826. else
  827. gbe_update_stats(gbe_dev, data);
  828. spin_unlock_bh(&gbe_dev->hw_stats_lock);
  829. }
  830. static int keystone_get_settings(struct net_device *ndev,
  831. struct ethtool_cmd *cmd)
  832. {
  833. struct netcp_intf *netcp = netdev_priv(ndev);
  834. struct phy_device *phy = ndev->phydev;
  835. struct gbe_intf *gbe_intf;
  836. int ret;
  837. if (!phy)
  838. return -EINVAL;
  839. gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
  840. if (!gbe_intf)
  841. return -EINVAL;
  842. if (!gbe_intf->slave)
  843. return -EINVAL;
  844. ret = phy_ethtool_gset(phy, cmd);
  845. if (!ret)
  846. cmd->port = gbe_intf->slave->phy_port_t;
  847. return ret;
  848. }
  849. static int keystone_set_settings(struct net_device *ndev,
  850. struct ethtool_cmd *cmd)
  851. {
  852. struct netcp_intf *netcp = netdev_priv(ndev);
  853. struct phy_device *phy = ndev->phydev;
  854. struct gbe_intf *gbe_intf;
  855. u32 features = cmd->advertising & cmd->supported;
  856. if (!phy)
  857. return -EINVAL;
  858. gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
  859. if (!gbe_intf)
  860. return -EINVAL;
  861. if (!gbe_intf->slave)
  862. return -EINVAL;
  863. if (cmd->port != gbe_intf->slave->phy_port_t) {
  864. if ((cmd->port == PORT_TP) && !(features & ADVERTISED_TP))
  865. return -EINVAL;
  866. if ((cmd->port == PORT_AUI) && !(features & ADVERTISED_AUI))
  867. return -EINVAL;
  868. if ((cmd->port == PORT_BNC) && !(features & ADVERTISED_BNC))
  869. return -EINVAL;
  870. if ((cmd->port == PORT_MII) && !(features & ADVERTISED_MII))
  871. return -EINVAL;
  872. if ((cmd->port == PORT_FIBRE) && !(features & ADVERTISED_FIBRE))
  873. return -EINVAL;
  874. }
  875. gbe_intf->slave->phy_port_t = cmd->port;
  876. return phy_ethtool_sset(phy, cmd);
  877. }
  878. static const struct ethtool_ops keystone_ethtool_ops = {
  879. .get_drvinfo = keystone_get_drvinfo,
  880. .get_link = ethtool_op_get_link,
  881. .get_msglevel = keystone_get_msglevel,
  882. .set_msglevel = keystone_set_msglevel,
  883. .get_strings = keystone_get_stat_strings,
  884. .get_sset_count = keystone_get_sset_count,
  885. .get_ethtool_stats = keystone_get_ethtool_stats,
  886. .get_settings = keystone_get_settings,
  887. .set_settings = keystone_set_settings,
  888. };
  889. #define mac_hi(mac) (((mac)[0] << 0) | ((mac)[1] << 8) | \
  890. ((mac)[2] << 16) | ((mac)[3] << 24))
  891. #define mac_lo(mac) (((mac)[4] << 0) | ((mac)[5] << 8))
  892. static void gbe_set_slave_mac(struct gbe_slave *slave,
  893. struct gbe_intf *gbe_intf)
  894. {
  895. struct net_device *ndev = gbe_intf->ndev;
  896. writel(mac_hi(ndev->dev_addr), GBE_REG_ADDR(slave, port_regs, sa_hi));
  897. writel(mac_lo(ndev->dev_addr), GBE_REG_ADDR(slave, port_regs, sa_lo));
  898. }
  899. static int gbe_get_slave_port(struct gbe_priv *priv, u32 slave_num)
  900. {
  901. if (priv->host_port == 0)
  902. return slave_num + 1;
  903. return slave_num;
  904. }
  905. static void netcp_ethss_link_state_action(struct gbe_priv *gbe_dev,
  906. struct net_device *ndev,
  907. struct gbe_slave *slave,
  908. int up)
  909. {
  910. struct phy_device *phy = slave->phy;
  911. u32 mac_control = 0;
  912. if (up) {
  913. mac_control = slave->mac_control;
  914. if (phy && (phy->speed == SPEED_1000)) {
  915. mac_control |= MACSL_GIG_MODE;
  916. mac_control &= ~MACSL_XGIG_MODE;
  917. } else if (phy && (phy->speed == SPEED_10000)) {
  918. mac_control |= MACSL_XGIG_MODE;
  919. mac_control &= ~MACSL_GIG_MODE;
  920. }
  921. writel(mac_control, GBE_REG_ADDR(slave, emac_regs,
  922. mac_control));
  923. cpsw_ale_control_set(gbe_dev->ale, slave->port_num,
  924. ALE_PORT_STATE,
  925. ALE_PORT_STATE_FORWARD);
  926. if (ndev && slave->open)
  927. netif_carrier_on(ndev);
  928. } else {
  929. writel(mac_control, GBE_REG_ADDR(slave, emac_regs,
  930. mac_control));
  931. cpsw_ale_control_set(gbe_dev->ale, slave->port_num,
  932. ALE_PORT_STATE,
  933. ALE_PORT_STATE_DISABLE);
  934. if (ndev)
  935. netif_carrier_off(ndev);
  936. }
  937. if (phy)
  938. phy_print_status(phy);
  939. }
  940. static bool gbe_phy_link_status(struct gbe_slave *slave)
  941. {
  942. return !slave->phy || slave->phy->link;
  943. }
  944. static void netcp_ethss_update_link_state(struct gbe_priv *gbe_dev,
  945. struct gbe_slave *slave,
  946. struct net_device *ndev)
  947. {
  948. int sp = slave->slave_num;
  949. int phy_link_state, sgmii_link_state = 1, link_state;
  950. if (!slave->open)
  951. return;
  952. if (!SLAVE_LINK_IS_XGMII(slave))
  953. sgmii_link_state = netcp_sgmii_get_port_link(SGMII_BASE(sp),
  954. sp);
  955. phy_link_state = gbe_phy_link_status(slave);
  956. link_state = phy_link_state & sgmii_link_state;
  957. if (atomic_xchg(&slave->link_state, link_state) != link_state)
  958. netcp_ethss_link_state_action(gbe_dev, ndev, slave,
  959. link_state);
  960. }
  961. static void xgbe_adjust_link(struct net_device *ndev)
  962. {
  963. struct netcp_intf *netcp = netdev_priv(ndev);
  964. struct gbe_intf *gbe_intf;
  965. gbe_intf = netcp_module_get_intf_data(&xgbe_module, netcp);
  966. if (!gbe_intf)
  967. return;
  968. netcp_ethss_update_link_state(gbe_intf->gbe_dev, gbe_intf->slave,
  969. ndev);
  970. }
  971. static void gbe_adjust_link(struct net_device *ndev)
  972. {
  973. struct netcp_intf *netcp = netdev_priv(ndev);
  974. struct gbe_intf *gbe_intf;
  975. gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
  976. if (!gbe_intf)
  977. return;
  978. netcp_ethss_update_link_state(gbe_intf->gbe_dev, gbe_intf->slave,
  979. ndev);
  980. }
  981. static void gbe_adjust_link_sec_slaves(struct net_device *ndev)
  982. {
  983. struct gbe_priv *gbe_dev = netdev_priv(ndev);
  984. struct gbe_slave *slave;
  985. for_each_sec_slave(slave, gbe_dev)
  986. netcp_ethss_update_link_state(gbe_dev, slave, NULL);
  987. }
  988. /* Reset EMAC
  989. * Soft reset is set and polled until clear, or until a timeout occurs
  990. */
  991. static int gbe_port_reset(struct gbe_slave *slave)
  992. {
  993. u32 i, v;
  994. /* Set the soft reset bit */
  995. writel(SOFT_RESET, GBE_REG_ADDR(slave, emac_regs, soft_reset));
  996. /* Wait for the bit to clear */
  997. for (i = 0; i < DEVICE_EMACSL_RESET_POLL_COUNT; i++) {
  998. v = readl(GBE_REG_ADDR(slave, emac_regs, soft_reset));
  999. if ((v & SOFT_RESET_MASK) != SOFT_RESET)
  1000. return 0;
  1001. }
  1002. /* Timeout on the reset */
  1003. return GMACSL_RET_WARN_RESET_INCOMPLETE;
  1004. }
  1005. /* Configure EMAC */
  1006. static void gbe_port_config(struct gbe_priv *gbe_dev, struct gbe_slave *slave,
  1007. int max_rx_len)
  1008. {
  1009. u32 xgmii_mode;
  1010. if (max_rx_len > NETCP_MAX_FRAME_SIZE)
  1011. max_rx_len = NETCP_MAX_FRAME_SIZE;
  1012. /* Enable correct MII mode at SS level */
  1013. if ((gbe_dev->ss_version == XGBE_SS_VERSION_10) &&
  1014. (slave->link_interface >= XGMII_LINK_MAC_PHY)) {
  1015. xgmii_mode = readl(GBE_REG_ADDR(gbe_dev, ss_regs, control));
  1016. xgmii_mode |= (1 << slave->slave_num);
  1017. writel(xgmii_mode, GBE_REG_ADDR(gbe_dev, ss_regs, control));
  1018. }
  1019. writel(max_rx_len, GBE_REG_ADDR(slave, emac_regs, rx_maxlen));
  1020. writel(slave->mac_control, GBE_REG_ADDR(slave, emac_regs, mac_control));
  1021. }
  1022. static void gbe_slave_stop(struct gbe_intf *intf)
  1023. {
  1024. struct gbe_priv *gbe_dev = intf->gbe_dev;
  1025. struct gbe_slave *slave = intf->slave;
  1026. gbe_port_reset(slave);
  1027. /* Disable forwarding */
  1028. cpsw_ale_control_set(gbe_dev->ale, slave->port_num,
  1029. ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
  1030. cpsw_ale_del_mcast(gbe_dev->ale, intf->ndev->broadcast,
  1031. 1 << slave->port_num, 0, 0);
  1032. if (!slave->phy)
  1033. return;
  1034. phy_stop(slave->phy);
  1035. phy_disconnect(slave->phy);
  1036. slave->phy = NULL;
  1037. }
  1038. static void gbe_sgmii_config(struct gbe_priv *priv, struct gbe_slave *slave)
  1039. {
  1040. void __iomem *sgmii_port_regs;
  1041. sgmii_port_regs = priv->sgmii_port_regs;
  1042. if ((priv->ss_version == GBE_SS_VERSION_14) && (slave->slave_num >= 2))
  1043. sgmii_port_regs = priv->sgmii_port34_regs;
  1044. if (!SLAVE_LINK_IS_XGMII(slave)) {
  1045. netcp_sgmii_reset(sgmii_port_regs, slave->slave_num);
  1046. netcp_sgmii_config(sgmii_port_regs, slave->slave_num,
  1047. slave->link_interface);
  1048. }
  1049. }
  1050. static int gbe_slave_open(struct gbe_intf *gbe_intf)
  1051. {
  1052. struct gbe_priv *priv = gbe_intf->gbe_dev;
  1053. struct gbe_slave *slave = gbe_intf->slave;
  1054. phy_interface_t phy_mode;
  1055. bool has_phy = false;
  1056. void (*hndlr)(struct net_device *) = gbe_adjust_link;
  1057. gbe_sgmii_config(priv, slave);
  1058. gbe_port_reset(slave);
  1059. gbe_port_config(priv, slave, priv->rx_packet_max);
  1060. gbe_set_slave_mac(slave, gbe_intf);
  1061. /* enable forwarding */
  1062. cpsw_ale_control_set(priv->ale, slave->port_num,
  1063. ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
  1064. cpsw_ale_add_mcast(priv->ale, gbe_intf->ndev->broadcast,
  1065. 1 << slave->port_num, 0, 0, ALE_MCAST_FWD_2);
  1066. if (slave->link_interface == SGMII_LINK_MAC_PHY) {
  1067. has_phy = true;
  1068. phy_mode = PHY_INTERFACE_MODE_SGMII;
  1069. slave->phy_port_t = PORT_MII;
  1070. } else if (slave->link_interface == XGMII_LINK_MAC_PHY) {
  1071. has_phy = true;
  1072. phy_mode = PHY_INTERFACE_MODE_NA;
  1073. slave->phy_port_t = PORT_FIBRE;
  1074. }
  1075. if (has_phy) {
  1076. if (priv->ss_version == XGBE_SS_VERSION_10)
  1077. hndlr = xgbe_adjust_link;
  1078. slave->phy = of_phy_connect(gbe_intf->ndev,
  1079. slave->phy_node,
  1080. hndlr, 0,
  1081. phy_mode);
  1082. if (!slave->phy) {
  1083. dev_err(priv->dev, "phy not found on slave %d\n",
  1084. slave->slave_num);
  1085. return -ENODEV;
  1086. }
  1087. dev_dbg(priv->dev, "phy found: id is: 0x%s\n",
  1088. dev_name(&slave->phy->dev));
  1089. phy_start(slave->phy);
  1090. phy_read_status(slave->phy);
  1091. }
  1092. return 0;
  1093. }
  1094. static void gbe_init_host_port(struct gbe_priv *priv)
  1095. {
  1096. int bypass_en = 1;
  1097. /* Max length register */
  1098. writel(NETCP_MAX_FRAME_SIZE, GBE_REG_ADDR(priv, host_port_regs,
  1099. rx_maxlen));
  1100. cpsw_ale_start(priv->ale);
  1101. if (priv->enable_ale)
  1102. bypass_en = 0;
  1103. cpsw_ale_control_set(priv->ale, 0, ALE_BYPASS, bypass_en);
  1104. cpsw_ale_control_set(priv->ale, 0, ALE_NO_PORT_VLAN, 1);
  1105. cpsw_ale_control_set(priv->ale, priv->host_port,
  1106. ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
  1107. cpsw_ale_control_set(priv->ale, 0,
  1108. ALE_PORT_UNKNOWN_VLAN_MEMBER,
  1109. GBE_PORT_MASK(priv->ale_ports));
  1110. cpsw_ale_control_set(priv->ale, 0,
  1111. ALE_PORT_UNKNOWN_MCAST_FLOOD,
  1112. GBE_PORT_MASK(priv->ale_ports - 1));
  1113. cpsw_ale_control_set(priv->ale, 0,
  1114. ALE_PORT_UNKNOWN_REG_MCAST_FLOOD,
  1115. GBE_PORT_MASK(priv->ale_ports));
  1116. cpsw_ale_control_set(priv->ale, 0,
  1117. ALE_PORT_UNTAGGED_EGRESS,
  1118. GBE_PORT_MASK(priv->ale_ports));
  1119. }
  1120. static void gbe_add_mcast_addr(struct gbe_intf *gbe_intf, u8 *addr)
  1121. {
  1122. struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
  1123. u16 vlan_id;
  1124. cpsw_ale_add_mcast(gbe_dev->ale, addr,
  1125. GBE_PORT_MASK(gbe_dev->ale_ports), 0, 0,
  1126. ALE_MCAST_FWD_2);
  1127. for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID) {
  1128. cpsw_ale_add_mcast(gbe_dev->ale, addr,
  1129. GBE_PORT_MASK(gbe_dev->ale_ports),
  1130. ALE_VLAN, vlan_id, ALE_MCAST_FWD_2);
  1131. }
  1132. }
  1133. static void gbe_add_ucast_addr(struct gbe_intf *gbe_intf, u8 *addr)
  1134. {
  1135. struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
  1136. u16 vlan_id;
  1137. cpsw_ale_add_ucast(gbe_dev->ale, addr, gbe_dev->host_port, 0, 0);
  1138. for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID)
  1139. cpsw_ale_add_ucast(gbe_dev->ale, addr, gbe_dev->host_port,
  1140. ALE_VLAN, vlan_id);
  1141. }
  1142. static void gbe_del_mcast_addr(struct gbe_intf *gbe_intf, u8 *addr)
  1143. {
  1144. struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
  1145. u16 vlan_id;
  1146. cpsw_ale_del_mcast(gbe_dev->ale, addr, 0, 0, 0);
  1147. for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID) {
  1148. cpsw_ale_del_mcast(gbe_dev->ale, addr, 0, ALE_VLAN, vlan_id);
  1149. }
  1150. }
  1151. static void gbe_del_ucast_addr(struct gbe_intf *gbe_intf, u8 *addr)
  1152. {
  1153. struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
  1154. u16 vlan_id;
  1155. cpsw_ale_del_ucast(gbe_dev->ale, addr, gbe_dev->host_port, 0, 0);
  1156. for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID) {
  1157. cpsw_ale_del_ucast(gbe_dev->ale, addr, gbe_dev->host_port,
  1158. ALE_VLAN, vlan_id);
  1159. }
  1160. }
  1161. static int gbe_add_addr(void *intf_priv, struct netcp_addr *naddr)
  1162. {
  1163. struct gbe_intf *gbe_intf = intf_priv;
  1164. struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
  1165. dev_dbg(gbe_dev->dev, "ethss adding address %pM, type %d\n",
  1166. naddr->addr, naddr->type);
  1167. switch (naddr->type) {
  1168. case ADDR_MCAST:
  1169. case ADDR_BCAST:
  1170. gbe_add_mcast_addr(gbe_intf, naddr->addr);
  1171. break;
  1172. case ADDR_UCAST:
  1173. case ADDR_DEV:
  1174. gbe_add_ucast_addr(gbe_intf, naddr->addr);
  1175. break;
  1176. case ADDR_ANY:
  1177. /* nothing to do for promiscuous */
  1178. default:
  1179. break;
  1180. }
  1181. return 0;
  1182. }
  1183. static int gbe_del_addr(void *intf_priv, struct netcp_addr *naddr)
  1184. {
  1185. struct gbe_intf *gbe_intf = intf_priv;
  1186. struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
  1187. dev_dbg(gbe_dev->dev, "ethss deleting address %pM, type %d\n",
  1188. naddr->addr, naddr->type);
  1189. switch (naddr->type) {
  1190. case ADDR_MCAST:
  1191. case ADDR_BCAST:
  1192. gbe_del_mcast_addr(gbe_intf, naddr->addr);
  1193. break;
  1194. case ADDR_UCAST:
  1195. case ADDR_DEV:
  1196. gbe_del_ucast_addr(gbe_intf, naddr->addr);
  1197. break;
  1198. case ADDR_ANY:
  1199. /* nothing to do for promiscuous */
  1200. default:
  1201. break;
  1202. }
  1203. return 0;
  1204. }
  1205. static int gbe_add_vid(void *intf_priv, int vid)
  1206. {
  1207. struct gbe_intf *gbe_intf = intf_priv;
  1208. struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
  1209. set_bit(vid, gbe_intf->active_vlans);
  1210. cpsw_ale_add_vlan(gbe_dev->ale, vid,
  1211. GBE_PORT_MASK(gbe_dev->ale_ports),
  1212. GBE_MASK_NO_PORTS,
  1213. GBE_PORT_MASK(gbe_dev->ale_ports),
  1214. GBE_PORT_MASK(gbe_dev->ale_ports - 1));
  1215. return 0;
  1216. }
  1217. static int gbe_del_vid(void *intf_priv, int vid)
  1218. {
  1219. struct gbe_intf *gbe_intf = intf_priv;
  1220. struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
  1221. cpsw_ale_del_vlan(gbe_dev->ale, vid, 0);
  1222. clear_bit(vid, gbe_intf->active_vlans);
  1223. return 0;
  1224. }
  1225. static int gbe_ioctl(void *intf_priv, struct ifreq *req, int cmd)
  1226. {
  1227. struct gbe_intf *gbe_intf = intf_priv;
  1228. struct phy_device *phy = gbe_intf->slave->phy;
  1229. int ret = -EOPNOTSUPP;
  1230. if (phy)
  1231. ret = phy_mii_ioctl(phy, req, cmd);
  1232. return ret;
  1233. }
  1234. static void netcp_ethss_timer(unsigned long arg)
  1235. {
  1236. struct gbe_priv *gbe_dev = (struct gbe_priv *)arg;
  1237. struct gbe_intf *gbe_intf;
  1238. struct gbe_slave *slave;
  1239. /* Check & update SGMII link state of interfaces */
  1240. for_each_intf(gbe_intf, gbe_dev) {
  1241. if (!gbe_intf->slave->open)
  1242. continue;
  1243. netcp_ethss_update_link_state(gbe_dev, gbe_intf->slave,
  1244. gbe_intf->ndev);
  1245. }
  1246. /* Check & update SGMII link state of secondary ports */
  1247. for_each_sec_slave(slave, gbe_dev) {
  1248. netcp_ethss_update_link_state(gbe_dev, slave, NULL);
  1249. }
  1250. spin_lock_bh(&gbe_dev->hw_stats_lock);
  1251. if (gbe_dev->ss_version == GBE_SS_VERSION_14)
  1252. gbe_update_stats_ver14(gbe_dev, NULL);
  1253. else
  1254. gbe_update_stats(gbe_dev, NULL);
  1255. spin_unlock_bh(&gbe_dev->hw_stats_lock);
  1256. gbe_dev->timer.expires = jiffies + GBE_TIMER_INTERVAL;
  1257. add_timer(&gbe_dev->timer);
  1258. }
  1259. static int gbe_tx_hook(int order, void *data, struct netcp_packet *p_info)
  1260. {
  1261. struct gbe_intf *gbe_intf = data;
  1262. p_info->tx_pipe = &gbe_intf->tx_pipe;
  1263. return 0;
  1264. }
  1265. static int gbe_open(void *intf_priv, struct net_device *ndev)
  1266. {
  1267. struct gbe_intf *gbe_intf = intf_priv;
  1268. struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
  1269. struct netcp_intf *netcp = netdev_priv(ndev);
  1270. struct gbe_slave *slave = gbe_intf->slave;
  1271. int port_num = slave->port_num;
  1272. u32 reg;
  1273. int ret;
  1274. reg = readl(GBE_REG_ADDR(gbe_dev, switch_regs, id_ver));
  1275. dev_dbg(gbe_dev->dev, "initializing gbe version %d.%d (%d) GBE identification value 0x%x\n",
  1276. GBE_MAJOR_VERSION(reg), GBE_MINOR_VERSION(reg),
  1277. GBE_RTL_VERSION(reg), GBE_IDENT(reg));
  1278. if (gbe_dev->enable_ale)
  1279. gbe_intf->tx_pipe.dma_psflags = 0;
  1280. else
  1281. gbe_intf->tx_pipe.dma_psflags = port_num;
  1282. dev_dbg(gbe_dev->dev, "opened TX channel %s: %p with psflags %d\n",
  1283. gbe_intf->tx_pipe.dma_chan_name,
  1284. gbe_intf->tx_pipe.dma_channel,
  1285. gbe_intf->tx_pipe.dma_psflags);
  1286. gbe_slave_stop(gbe_intf);
  1287. /* disable priority elevation and enable statistics on all ports */
  1288. writel(0, GBE_REG_ADDR(gbe_dev, switch_regs, ptype));
  1289. /* Control register */
  1290. writel(GBE_CTL_P0_ENABLE, GBE_REG_ADDR(gbe_dev, switch_regs, control));
  1291. /* All statistics enabled and STAT AB visible by default */
  1292. writel(GBE_REG_VAL_STAT_ENABLE_ALL, GBE_REG_ADDR(gbe_dev, switch_regs,
  1293. stat_port_en));
  1294. ret = gbe_slave_open(gbe_intf);
  1295. if (ret)
  1296. goto fail;
  1297. netcp_register_txhook(netcp, GBE_TXHOOK_ORDER, gbe_tx_hook,
  1298. gbe_intf);
  1299. slave->open = true;
  1300. netcp_ethss_update_link_state(gbe_dev, slave, ndev);
  1301. return 0;
  1302. fail:
  1303. gbe_slave_stop(gbe_intf);
  1304. return ret;
  1305. }
  1306. static int gbe_close(void *intf_priv, struct net_device *ndev)
  1307. {
  1308. struct gbe_intf *gbe_intf = intf_priv;
  1309. struct netcp_intf *netcp = netdev_priv(ndev);
  1310. gbe_slave_stop(gbe_intf);
  1311. netcp_unregister_txhook(netcp, GBE_TXHOOK_ORDER, gbe_tx_hook,
  1312. gbe_intf);
  1313. gbe_intf->slave->open = false;
  1314. atomic_set(&gbe_intf->slave->link_state, NETCP_LINK_STATE_INVALID);
  1315. return 0;
  1316. }
  1317. static int init_slave(struct gbe_priv *gbe_dev, struct gbe_slave *slave,
  1318. struct device_node *node)
  1319. {
  1320. int port_reg_num;
  1321. u32 port_reg_ofs, emac_reg_ofs;
  1322. if (of_property_read_u32(node, "slave-port", &slave->slave_num)) {
  1323. dev_err(gbe_dev->dev, "missing slave-port parameter\n");
  1324. return -EINVAL;
  1325. }
  1326. if (of_property_read_u32(node, "link-interface",
  1327. &slave->link_interface)) {
  1328. dev_warn(gbe_dev->dev,
  1329. "missing link-interface value defaulting to 1G mac-phy link\n");
  1330. slave->link_interface = SGMII_LINK_MAC_PHY;
  1331. }
  1332. slave->open = false;
  1333. slave->phy_node = of_parse_phandle(node, "phy-handle", 0);
  1334. slave->port_num = gbe_get_slave_port(gbe_dev, slave->slave_num);
  1335. if (slave->link_interface >= XGMII_LINK_MAC_PHY)
  1336. slave->mac_control = GBE_DEF_10G_MAC_CONTROL;
  1337. else
  1338. slave->mac_control = GBE_DEF_1G_MAC_CONTROL;
  1339. /* Emac regs memmap are contiguous but port regs are not */
  1340. port_reg_num = slave->slave_num;
  1341. if (gbe_dev->ss_version == GBE_SS_VERSION_14) {
  1342. if (slave->slave_num > 1) {
  1343. port_reg_ofs = GBE13_SLAVE_PORT2_OFFSET;
  1344. port_reg_num -= 2;
  1345. } else {
  1346. port_reg_ofs = GBE13_SLAVE_PORT_OFFSET;
  1347. }
  1348. } else if (gbe_dev->ss_version == XGBE_SS_VERSION_10) {
  1349. port_reg_ofs = XGBE10_SLAVE_PORT_OFFSET;
  1350. } else {
  1351. dev_err(gbe_dev->dev, "unknown ethss(0x%x)\n",
  1352. gbe_dev->ss_version);
  1353. return -EINVAL;
  1354. }
  1355. if (gbe_dev->ss_version == GBE_SS_VERSION_14)
  1356. emac_reg_ofs = GBE13_EMAC_OFFSET;
  1357. else if (gbe_dev->ss_version == XGBE_SS_VERSION_10)
  1358. emac_reg_ofs = XGBE10_EMAC_OFFSET;
  1359. slave->port_regs = gbe_dev->ss_regs + port_reg_ofs +
  1360. (0x30 * port_reg_num);
  1361. slave->emac_regs = gbe_dev->ss_regs + emac_reg_ofs +
  1362. (0x40 * slave->slave_num);
  1363. if (gbe_dev->ss_version == GBE_SS_VERSION_14) {
  1364. /* Initialize slave port register offsets */
  1365. GBE_SET_REG_OFS(slave, port_regs, port_vlan);
  1366. GBE_SET_REG_OFS(slave, port_regs, tx_pri_map);
  1367. GBE_SET_REG_OFS(slave, port_regs, sa_lo);
  1368. GBE_SET_REG_OFS(slave, port_regs, sa_hi);
  1369. GBE_SET_REG_OFS(slave, port_regs, ts_ctl);
  1370. GBE_SET_REG_OFS(slave, port_regs, ts_seq_ltype);
  1371. GBE_SET_REG_OFS(slave, port_regs, ts_vlan);
  1372. GBE_SET_REG_OFS(slave, port_regs, ts_ctl_ltype2);
  1373. GBE_SET_REG_OFS(slave, port_regs, ts_ctl2);
  1374. /* Initialize EMAC register offsets */
  1375. GBE_SET_REG_OFS(slave, emac_regs, mac_control);
  1376. GBE_SET_REG_OFS(slave, emac_regs, soft_reset);
  1377. GBE_SET_REG_OFS(slave, emac_regs, rx_maxlen);
  1378. } else if (gbe_dev->ss_version == XGBE_SS_VERSION_10) {
  1379. /* Initialize slave port register offsets */
  1380. XGBE_SET_REG_OFS(slave, port_regs, port_vlan);
  1381. XGBE_SET_REG_OFS(slave, port_regs, tx_pri_map);
  1382. XGBE_SET_REG_OFS(slave, port_regs, sa_lo);
  1383. XGBE_SET_REG_OFS(slave, port_regs, sa_hi);
  1384. XGBE_SET_REG_OFS(slave, port_regs, ts_ctl);
  1385. XGBE_SET_REG_OFS(slave, port_regs, ts_seq_ltype);
  1386. XGBE_SET_REG_OFS(slave, port_regs, ts_vlan);
  1387. XGBE_SET_REG_OFS(slave, port_regs, ts_ctl_ltype2);
  1388. XGBE_SET_REG_OFS(slave, port_regs, ts_ctl2);
  1389. /* Initialize EMAC register offsets */
  1390. XGBE_SET_REG_OFS(slave, emac_regs, mac_control);
  1391. XGBE_SET_REG_OFS(slave, emac_regs, soft_reset);
  1392. XGBE_SET_REG_OFS(slave, emac_regs, rx_maxlen);
  1393. }
  1394. atomic_set(&slave->link_state, NETCP_LINK_STATE_INVALID);
  1395. return 0;
  1396. }
  1397. static void init_secondary_ports(struct gbe_priv *gbe_dev,
  1398. struct device_node *node)
  1399. {
  1400. struct device *dev = gbe_dev->dev;
  1401. phy_interface_t phy_mode;
  1402. struct gbe_priv **priv;
  1403. struct device_node *port;
  1404. struct gbe_slave *slave;
  1405. bool mac_phy_link = false;
  1406. for_each_child_of_node(node, port) {
  1407. slave = devm_kzalloc(dev, sizeof(*slave), GFP_KERNEL);
  1408. if (!slave) {
  1409. dev_err(dev,
  1410. "memomry alloc failed for secondary port(%s), skipping...\n",
  1411. port->name);
  1412. continue;
  1413. }
  1414. if (init_slave(gbe_dev, slave, port)) {
  1415. dev_err(dev,
  1416. "Failed to initialize secondary port(%s), skipping...\n",
  1417. port->name);
  1418. devm_kfree(dev, slave);
  1419. continue;
  1420. }
  1421. gbe_sgmii_config(gbe_dev, slave);
  1422. gbe_port_reset(slave);
  1423. gbe_port_config(gbe_dev, slave, gbe_dev->rx_packet_max);
  1424. list_add_tail(&slave->slave_list, &gbe_dev->secondary_slaves);
  1425. gbe_dev->num_slaves++;
  1426. if ((slave->link_interface == SGMII_LINK_MAC_PHY) ||
  1427. (slave->link_interface == XGMII_LINK_MAC_PHY))
  1428. mac_phy_link = true;
  1429. slave->open = true;
  1430. }
  1431. /* of_phy_connect() is needed only for MAC-PHY interface */
  1432. if (!mac_phy_link)
  1433. return;
  1434. /* Allocate dummy netdev device for attaching to phy device */
  1435. gbe_dev->dummy_ndev = alloc_netdev(sizeof(gbe_dev), "dummy",
  1436. NET_NAME_UNKNOWN, ether_setup);
  1437. if (!gbe_dev->dummy_ndev) {
  1438. dev_err(dev,
  1439. "Failed to allocate dummy netdev for secondary ports, skipping phy_connect()...\n");
  1440. return;
  1441. }
  1442. priv = netdev_priv(gbe_dev->dummy_ndev);
  1443. *priv = gbe_dev;
  1444. if (slave->link_interface == SGMII_LINK_MAC_PHY) {
  1445. phy_mode = PHY_INTERFACE_MODE_SGMII;
  1446. slave->phy_port_t = PORT_MII;
  1447. } else {
  1448. phy_mode = PHY_INTERFACE_MODE_NA;
  1449. slave->phy_port_t = PORT_FIBRE;
  1450. }
  1451. for_each_sec_slave(slave, gbe_dev) {
  1452. if ((slave->link_interface != SGMII_LINK_MAC_PHY) &&
  1453. (slave->link_interface != XGMII_LINK_MAC_PHY))
  1454. continue;
  1455. slave->phy =
  1456. of_phy_connect(gbe_dev->dummy_ndev,
  1457. slave->phy_node,
  1458. gbe_adjust_link_sec_slaves,
  1459. 0, phy_mode);
  1460. if (!slave->phy) {
  1461. dev_err(dev, "phy not found for slave %d\n",
  1462. slave->slave_num);
  1463. slave->phy = NULL;
  1464. } else {
  1465. dev_dbg(dev, "phy found: id is: 0x%s\n",
  1466. dev_name(&slave->phy->dev));
  1467. phy_start(slave->phy);
  1468. phy_read_status(slave->phy);
  1469. }
  1470. }
  1471. }
  1472. static void free_secondary_ports(struct gbe_priv *gbe_dev)
  1473. {
  1474. struct gbe_slave *slave;
  1475. for (;;) {
  1476. slave = first_sec_slave(gbe_dev);
  1477. if (!slave)
  1478. break;
  1479. if (slave->phy)
  1480. phy_disconnect(slave->phy);
  1481. list_del(&slave->slave_list);
  1482. }
  1483. if (gbe_dev->dummy_ndev)
  1484. free_netdev(gbe_dev->dummy_ndev);
  1485. }
  1486. static int set_xgbe_ethss10_priv(struct gbe_priv *gbe_dev,
  1487. struct device_node *node)
  1488. {
  1489. struct resource res;
  1490. void __iomem *regs;
  1491. int ret, i;
  1492. ret = of_address_to_resource(node, 0, &res);
  1493. if (ret) {
  1494. dev_err(gbe_dev->dev, "Can't translate of node(%s) address for xgbe subsystem regs\n",
  1495. node->name);
  1496. return ret;
  1497. }
  1498. regs = devm_ioremap_resource(gbe_dev->dev, &res);
  1499. if (IS_ERR(regs)) {
  1500. dev_err(gbe_dev->dev, "Failed to map xgbe register base\n");
  1501. return PTR_ERR(regs);
  1502. }
  1503. gbe_dev->ss_regs = regs;
  1504. ret = of_address_to_resource(node, XGBE_SERDES_REG_INDEX, &res);
  1505. if (ret) {
  1506. dev_err(gbe_dev->dev, "Can't translate of node(%s) address for xgbe serdes regs\n",
  1507. node->name);
  1508. return ret;
  1509. }
  1510. regs = devm_ioremap_resource(gbe_dev->dev, &res);
  1511. if (IS_ERR(regs)) {
  1512. dev_err(gbe_dev->dev, "Failed to map xgbe serdes register base\n");
  1513. return PTR_ERR(regs);
  1514. }
  1515. gbe_dev->xgbe_serdes_regs = regs;
  1516. gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev,
  1517. XGBE10_NUM_STAT_ENTRIES *
  1518. (XGBE10_NUM_SLAVES + 1) * sizeof(u64),
  1519. GFP_KERNEL);
  1520. if (!gbe_dev->hw_stats) {
  1521. dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n");
  1522. return -ENOMEM;
  1523. }
  1524. gbe_dev->ss_version = XGBE_SS_VERSION_10;
  1525. gbe_dev->sgmii_port_regs = gbe_dev->ss_regs +
  1526. XGBE10_SGMII_MODULE_OFFSET;
  1527. gbe_dev->switch_regs = gbe_dev->ss_regs + XGBE10_SWITCH_MODULE_OFFSET;
  1528. gbe_dev->host_port_regs = gbe_dev->ss_regs + XGBE10_HOST_PORT_OFFSET;
  1529. for (i = 0; i < XGBE10_NUM_HW_STATS_MOD; i++)
  1530. gbe_dev->hw_stats_regs[i] = gbe_dev->ss_regs +
  1531. XGBE10_HW_STATS_OFFSET + (GBE_HW_STATS_REG_MAP_SZ * i);
  1532. gbe_dev->ale_reg = gbe_dev->ss_regs + XGBE10_ALE_OFFSET;
  1533. gbe_dev->ale_ports = XGBE10_NUM_ALE_PORTS;
  1534. gbe_dev->host_port = XGBE10_HOST_PORT_NUM;
  1535. gbe_dev->ale_entries = XGBE10_NUM_ALE_ENTRIES;
  1536. gbe_dev->et_stats = xgbe10_et_stats;
  1537. gbe_dev->num_et_stats = ARRAY_SIZE(xgbe10_et_stats);
  1538. /* Subsystem registers */
  1539. XGBE_SET_REG_OFS(gbe_dev, ss_regs, id_ver);
  1540. XGBE_SET_REG_OFS(gbe_dev, ss_regs, control);
  1541. /* Switch module registers */
  1542. XGBE_SET_REG_OFS(gbe_dev, switch_regs, id_ver);
  1543. XGBE_SET_REG_OFS(gbe_dev, switch_regs, control);
  1544. XGBE_SET_REG_OFS(gbe_dev, switch_regs, ptype);
  1545. XGBE_SET_REG_OFS(gbe_dev, switch_regs, stat_port_en);
  1546. XGBE_SET_REG_OFS(gbe_dev, switch_regs, flow_control);
  1547. /* Host port registers */
  1548. XGBE_SET_REG_OFS(gbe_dev, host_port_regs, port_vlan);
  1549. XGBE_SET_REG_OFS(gbe_dev, host_port_regs, tx_pri_map);
  1550. XGBE_SET_REG_OFS(gbe_dev, host_port_regs, rx_maxlen);
  1551. return 0;
  1552. }
  1553. static int get_gbe_resource_version(struct gbe_priv *gbe_dev,
  1554. struct device_node *node)
  1555. {
  1556. struct resource res;
  1557. void __iomem *regs;
  1558. int ret;
  1559. ret = of_address_to_resource(node, 0, &res);
  1560. if (ret) {
  1561. dev_err(gbe_dev->dev, "Can't translate of node(%s) address\n",
  1562. node->name);
  1563. return ret;
  1564. }
  1565. regs = devm_ioremap_resource(gbe_dev->dev, &res);
  1566. if (IS_ERR(regs)) {
  1567. dev_err(gbe_dev->dev, "Failed to map gbe register base\n");
  1568. return PTR_ERR(regs);
  1569. }
  1570. gbe_dev->ss_regs = regs;
  1571. gbe_dev->ss_version = readl(gbe_dev->ss_regs);
  1572. return 0;
  1573. }
  1574. static int set_gbe_ethss14_priv(struct gbe_priv *gbe_dev,
  1575. struct device_node *node)
  1576. {
  1577. void __iomem *regs;
  1578. int i;
  1579. gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev,
  1580. GBE13_NUM_HW_STAT_ENTRIES *
  1581. GBE13_NUM_SLAVES * sizeof(u64),
  1582. GFP_KERNEL);
  1583. if (!gbe_dev->hw_stats) {
  1584. dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n");
  1585. return -ENOMEM;
  1586. }
  1587. regs = gbe_dev->ss_regs;
  1588. gbe_dev->sgmii_port_regs = regs + GBE13_SGMII_MODULE_OFFSET;
  1589. gbe_dev->sgmii_port34_regs = regs + GBE13_SGMII34_MODULE_OFFSET;
  1590. gbe_dev->switch_regs = regs + GBE13_SWITCH_MODULE_OFFSET;
  1591. gbe_dev->host_port_regs = regs + GBE13_HOST_PORT_OFFSET;
  1592. for (i = 0; i < GBE13_NUM_HW_STATS_MOD; i++)
  1593. gbe_dev->hw_stats_regs[i] = regs + GBE13_HW_STATS_OFFSET +
  1594. (GBE_HW_STATS_REG_MAP_SZ * i);
  1595. gbe_dev->ale_reg = regs + GBE13_ALE_OFFSET;
  1596. gbe_dev->ale_ports = GBE13_NUM_ALE_PORTS;
  1597. gbe_dev->host_port = GBE13_HOST_PORT_NUM;
  1598. gbe_dev->ale_entries = GBE13_NUM_ALE_ENTRIES;
  1599. gbe_dev->et_stats = gbe13_et_stats;
  1600. gbe_dev->num_et_stats = ARRAY_SIZE(gbe13_et_stats);
  1601. /* Subsystem registers */
  1602. GBE_SET_REG_OFS(gbe_dev, ss_regs, id_ver);
  1603. /* Switch module registers */
  1604. GBE_SET_REG_OFS(gbe_dev, switch_regs, id_ver);
  1605. GBE_SET_REG_OFS(gbe_dev, switch_regs, control);
  1606. GBE_SET_REG_OFS(gbe_dev, switch_regs, soft_reset);
  1607. GBE_SET_REG_OFS(gbe_dev, switch_regs, stat_port_en);
  1608. GBE_SET_REG_OFS(gbe_dev, switch_regs, ptype);
  1609. GBE_SET_REG_OFS(gbe_dev, switch_regs, flow_control);
  1610. /* Host port registers */
  1611. GBE_SET_REG_OFS(gbe_dev, host_port_regs, port_vlan);
  1612. GBE_SET_REG_OFS(gbe_dev, host_port_regs, rx_maxlen);
  1613. return 0;
  1614. }
  1615. static int gbe_probe(struct netcp_device *netcp_device, struct device *dev,
  1616. struct device_node *node, void **inst_priv)
  1617. {
  1618. struct device_node *interfaces, *interface;
  1619. struct device_node *secondary_ports;
  1620. struct cpsw_ale_params ale_params;
  1621. struct gbe_priv *gbe_dev;
  1622. u32 slave_num;
  1623. int ret = 0;
  1624. if (!node) {
  1625. dev_err(dev, "device tree info unavailable\n");
  1626. return -ENODEV;
  1627. }
  1628. gbe_dev = devm_kzalloc(dev, sizeof(struct gbe_priv), GFP_KERNEL);
  1629. if (!gbe_dev)
  1630. return -ENOMEM;
  1631. gbe_dev->dev = dev;
  1632. gbe_dev->netcp_device = netcp_device;
  1633. gbe_dev->rx_packet_max = NETCP_MAX_FRAME_SIZE;
  1634. /* init the hw stats lock */
  1635. spin_lock_init(&gbe_dev->hw_stats_lock);
  1636. if (of_find_property(node, "enable-ale", NULL)) {
  1637. gbe_dev->enable_ale = true;
  1638. dev_info(dev, "ALE enabled\n");
  1639. } else {
  1640. gbe_dev->enable_ale = false;
  1641. dev_dbg(dev, "ALE bypass enabled*\n");
  1642. }
  1643. ret = of_property_read_u32(node, "tx-queue",
  1644. &gbe_dev->tx_queue_id);
  1645. if (ret < 0) {
  1646. dev_err(dev, "missing tx_queue parameter\n");
  1647. gbe_dev->tx_queue_id = GBE_TX_QUEUE;
  1648. }
  1649. ret = of_property_read_string(node, "tx-channel",
  1650. &gbe_dev->dma_chan_name);
  1651. if (ret < 0) {
  1652. dev_err(dev, "missing \"tx-channel\" parameter\n");
  1653. ret = -ENODEV;
  1654. goto quit;
  1655. }
  1656. if (!strcmp(node->name, "gbe")) {
  1657. ret = get_gbe_resource_version(gbe_dev, node);
  1658. if (ret)
  1659. goto quit;
  1660. ret = set_gbe_ethss14_priv(gbe_dev, node);
  1661. if (ret)
  1662. goto quit;
  1663. } else if (!strcmp(node->name, "xgbe")) {
  1664. ret = set_xgbe_ethss10_priv(gbe_dev, node);
  1665. if (ret)
  1666. goto quit;
  1667. ret = netcp_xgbe_serdes_init(gbe_dev->xgbe_serdes_regs,
  1668. gbe_dev->ss_regs);
  1669. if (ret)
  1670. goto quit;
  1671. } else {
  1672. dev_err(dev, "unknown GBE node(%s)\n", node->name);
  1673. ret = -ENODEV;
  1674. goto quit;
  1675. }
  1676. interfaces = of_get_child_by_name(node, "interfaces");
  1677. if (!interfaces)
  1678. dev_err(dev, "could not find interfaces\n");
  1679. ret = netcp_txpipe_init(&gbe_dev->tx_pipe, netcp_device,
  1680. gbe_dev->dma_chan_name, gbe_dev->tx_queue_id);
  1681. if (ret)
  1682. goto quit;
  1683. ret = netcp_txpipe_open(&gbe_dev->tx_pipe);
  1684. if (ret)
  1685. goto quit;
  1686. /* Create network interfaces */
  1687. INIT_LIST_HEAD(&gbe_dev->gbe_intf_head);
  1688. for_each_child_of_node(interfaces, interface) {
  1689. ret = of_property_read_u32(interface, "slave-port", &slave_num);
  1690. if (ret) {
  1691. dev_err(dev, "missing slave-port parameter, skipping interface configuration for %s\n",
  1692. interface->name);
  1693. continue;
  1694. }
  1695. gbe_dev->num_slaves++;
  1696. }
  1697. if (!gbe_dev->num_slaves)
  1698. dev_warn(dev, "No network interface configured\n");
  1699. /* Initialize Secondary slave ports */
  1700. secondary_ports = of_get_child_by_name(node, "secondary-slave-ports");
  1701. INIT_LIST_HEAD(&gbe_dev->secondary_slaves);
  1702. if (secondary_ports)
  1703. init_secondary_ports(gbe_dev, secondary_ports);
  1704. of_node_put(secondary_ports);
  1705. if (!gbe_dev->num_slaves) {
  1706. dev_err(dev, "No network interface or secondary ports configured\n");
  1707. ret = -ENODEV;
  1708. goto quit;
  1709. }
  1710. memset(&ale_params, 0, sizeof(ale_params));
  1711. ale_params.dev = gbe_dev->dev;
  1712. ale_params.ale_regs = gbe_dev->ale_reg;
  1713. ale_params.ale_ageout = GBE_DEFAULT_ALE_AGEOUT;
  1714. ale_params.ale_entries = gbe_dev->ale_entries;
  1715. ale_params.ale_ports = gbe_dev->ale_ports;
  1716. gbe_dev->ale = cpsw_ale_create(&ale_params);
  1717. if (!gbe_dev->ale) {
  1718. dev_err(gbe_dev->dev, "error initializing ale engine\n");
  1719. ret = -ENODEV;
  1720. goto quit;
  1721. } else {
  1722. dev_dbg(gbe_dev->dev, "Created a gbe ale engine\n");
  1723. }
  1724. /* initialize host port */
  1725. gbe_init_host_port(gbe_dev);
  1726. init_timer(&gbe_dev->timer);
  1727. gbe_dev->timer.data = (unsigned long)gbe_dev;
  1728. gbe_dev->timer.function = netcp_ethss_timer;
  1729. gbe_dev->timer.expires = jiffies + GBE_TIMER_INTERVAL;
  1730. add_timer(&gbe_dev->timer);
  1731. *inst_priv = gbe_dev;
  1732. return 0;
  1733. quit:
  1734. if (gbe_dev->hw_stats)
  1735. devm_kfree(dev, gbe_dev->hw_stats);
  1736. cpsw_ale_destroy(gbe_dev->ale);
  1737. if (gbe_dev->ss_regs)
  1738. devm_iounmap(dev, gbe_dev->ss_regs);
  1739. of_node_put(interfaces);
  1740. devm_kfree(dev, gbe_dev);
  1741. return ret;
  1742. }
  1743. static int gbe_attach(void *inst_priv, struct net_device *ndev,
  1744. struct device_node *node, void **intf_priv)
  1745. {
  1746. struct gbe_priv *gbe_dev = inst_priv;
  1747. struct gbe_intf *gbe_intf;
  1748. int ret;
  1749. if (!node) {
  1750. dev_err(gbe_dev->dev, "interface node not available\n");
  1751. return -ENODEV;
  1752. }
  1753. gbe_intf = devm_kzalloc(gbe_dev->dev, sizeof(*gbe_intf), GFP_KERNEL);
  1754. if (!gbe_intf)
  1755. return -ENOMEM;
  1756. gbe_intf->ndev = ndev;
  1757. gbe_intf->dev = gbe_dev->dev;
  1758. gbe_intf->gbe_dev = gbe_dev;
  1759. gbe_intf->slave = devm_kzalloc(gbe_dev->dev,
  1760. sizeof(*gbe_intf->slave),
  1761. GFP_KERNEL);
  1762. if (!gbe_intf->slave) {
  1763. ret = -ENOMEM;
  1764. goto fail;
  1765. }
  1766. if (init_slave(gbe_dev, gbe_intf->slave, node)) {
  1767. ret = -ENODEV;
  1768. goto fail;
  1769. }
  1770. gbe_intf->tx_pipe = gbe_dev->tx_pipe;
  1771. ndev->ethtool_ops = &keystone_ethtool_ops;
  1772. list_add_tail(&gbe_intf->gbe_intf_list, &gbe_dev->gbe_intf_head);
  1773. *intf_priv = gbe_intf;
  1774. return 0;
  1775. fail:
  1776. if (gbe_intf->slave)
  1777. devm_kfree(gbe_dev->dev, gbe_intf->slave);
  1778. if (gbe_intf)
  1779. devm_kfree(gbe_dev->dev, gbe_intf);
  1780. return ret;
  1781. }
  1782. static int gbe_release(void *intf_priv)
  1783. {
  1784. struct gbe_intf *gbe_intf = intf_priv;
  1785. gbe_intf->ndev->ethtool_ops = NULL;
  1786. list_del(&gbe_intf->gbe_intf_list);
  1787. devm_kfree(gbe_intf->dev, gbe_intf->slave);
  1788. devm_kfree(gbe_intf->dev, gbe_intf);
  1789. return 0;
  1790. }
  1791. static int gbe_remove(struct netcp_device *netcp_device, void *inst_priv)
  1792. {
  1793. struct gbe_priv *gbe_dev = inst_priv;
  1794. del_timer_sync(&gbe_dev->timer);
  1795. cpsw_ale_stop(gbe_dev->ale);
  1796. cpsw_ale_destroy(gbe_dev->ale);
  1797. netcp_txpipe_close(&gbe_dev->tx_pipe);
  1798. free_secondary_ports(gbe_dev);
  1799. if (!list_empty(&gbe_dev->gbe_intf_head))
  1800. dev_alert(gbe_dev->dev, "unreleased ethss interfaces present\n");
  1801. devm_kfree(gbe_dev->dev, gbe_dev->hw_stats);
  1802. devm_iounmap(gbe_dev->dev, gbe_dev->ss_regs);
  1803. memset(gbe_dev, 0x00, sizeof(*gbe_dev));
  1804. devm_kfree(gbe_dev->dev, gbe_dev);
  1805. return 0;
  1806. }
  1807. static struct netcp_module gbe_module = {
  1808. .name = GBE_MODULE_NAME,
  1809. .owner = THIS_MODULE,
  1810. .primary = true,
  1811. .probe = gbe_probe,
  1812. .open = gbe_open,
  1813. .close = gbe_close,
  1814. .remove = gbe_remove,
  1815. .attach = gbe_attach,
  1816. .release = gbe_release,
  1817. .add_addr = gbe_add_addr,
  1818. .del_addr = gbe_del_addr,
  1819. .add_vid = gbe_add_vid,
  1820. .del_vid = gbe_del_vid,
  1821. .ioctl = gbe_ioctl,
  1822. };
  1823. static struct netcp_module xgbe_module = {
  1824. .name = XGBE_MODULE_NAME,
  1825. .owner = THIS_MODULE,
  1826. .primary = true,
  1827. .probe = gbe_probe,
  1828. .open = gbe_open,
  1829. .close = gbe_close,
  1830. .remove = gbe_remove,
  1831. .attach = gbe_attach,
  1832. .release = gbe_release,
  1833. .add_addr = gbe_add_addr,
  1834. .del_addr = gbe_del_addr,
  1835. .add_vid = gbe_add_vid,
  1836. .del_vid = gbe_del_vid,
  1837. .ioctl = gbe_ioctl,
  1838. };
  1839. static int __init keystone_gbe_init(void)
  1840. {
  1841. int ret;
  1842. ret = netcp_register_module(&gbe_module);
  1843. if (ret)
  1844. return ret;
  1845. ret = netcp_register_module(&xgbe_module);
  1846. if (ret)
  1847. return ret;
  1848. return 0;
  1849. }
  1850. module_init(keystone_gbe_init);
  1851. static void __exit keystone_gbe_exit(void)
  1852. {
  1853. netcp_unregister_module(&gbe_module);
  1854. netcp_unregister_module(&xgbe_module);
  1855. }
  1856. module_exit(keystone_gbe_exit);
  1857. MODULE_LICENSE("GPL v2");
  1858. MODULE_DESCRIPTION("TI NETCP ETHSS driver for Keystone SOCs");
  1859. MODULE_AUTHOR("Sandeep Nair <sandeep_n@ti.com");