book3s_hv_ras.c 11 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License, version 2, as
  4. * published by the Free Software Foundation.
  5. *
  6. * Copyright 2012 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
  7. */
  8. #include <linux/types.h>
  9. #include <linux/string.h>
  10. #include <linux/kvm.h>
  11. #include <linux/kvm_host.h>
  12. #include <linux/kernel.h>
  13. #include <asm/opal.h>
  14. #include <asm/mce.h>
  15. #include <asm/machdep.h>
  16. #include <asm/cputhreads.h>
  17. #include <asm/hmi.h>
  18. #include <asm/kvm_ppc.h>
  19. /* SRR1 bits for machine check on POWER7 */
  20. #define SRR1_MC_LDSTERR (1ul << (63-42))
  21. #define SRR1_MC_IFETCH_SH (63-45)
  22. #define SRR1_MC_IFETCH_MASK 0x7
  23. #define SRR1_MC_IFETCH_SLBPAR 2 /* SLB parity error */
  24. #define SRR1_MC_IFETCH_SLBMULTI 3 /* SLB multi-hit */
  25. #define SRR1_MC_IFETCH_SLBPARMULTI 4 /* SLB parity + multi-hit */
  26. #define SRR1_MC_IFETCH_TLBMULTI 5 /* I-TLB multi-hit */
  27. /* DSISR bits for machine check on POWER7 */
  28. #define DSISR_MC_DERAT_MULTI 0x800 /* D-ERAT multi-hit */
  29. #define DSISR_MC_TLB_MULTI 0x400 /* D-TLB multi-hit */
  30. #define DSISR_MC_SLB_PARITY 0x100 /* SLB parity error */
  31. #define DSISR_MC_SLB_MULTI 0x080 /* SLB multi-hit */
  32. #define DSISR_MC_SLB_PARMULTI 0x040 /* SLB parity + multi-hit */
  33. /* POWER7 SLB flush and reload */
  34. static void reload_slb(struct kvm_vcpu *vcpu)
  35. {
  36. struct slb_shadow *slb;
  37. unsigned long i, n;
  38. /* First clear out SLB */
  39. asm volatile("slbmte %0,%0; slbia" : : "r" (0));
  40. /* Do they have an SLB shadow buffer registered? */
  41. slb = vcpu->arch.slb_shadow.pinned_addr;
  42. if (!slb)
  43. return;
  44. /* Sanity check */
  45. n = min_t(u32, be32_to_cpu(slb->persistent), SLB_MIN_SIZE);
  46. if ((void *) &slb->save_area[n] > vcpu->arch.slb_shadow.pinned_end)
  47. return;
  48. /* Load up the SLB from that */
  49. for (i = 0; i < n; ++i) {
  50. unsigned long rb = be64_to_cpu(slb->save_area[i].esid);
  51. unsigned long rs = be64_to_cpu(slb->save_area[i].vsid);
  52. rb = (rb & ~0xFFFul) | i; /* insert entry number */
  53. asm volatile("slbmte %0,%1" : : "r" (rs), "r" (rb));
  54. }
  55. }
  56. /*
  57. * On POWER7, see if we can handle a machine check that occurred inside
  58. * the guest in real mode, without switching to the host partition.
  59. *
  60. * Returns: 0 => exit guest, 1 => deliver machine check to guest
  61. */
  62. static long kvmppc_realmode_mc_power7(struct kvm_vcpu *vcpu)
  63. {
  64. unsigned long srr1 = vcpu->arch.shregs.msr;
  65. struct machine_check_event mce_evt;
  66. long handled = 1;
  67. if (srr1 & SRR1_MC_LDSTERR) {
  68. /* error on load/store */
  69. unsigned long dsisr = vcpu->arch.shregs.dsisr;
  70. if (dsisr & (DSISR_MC_SLB_PARMULTI | DSISR_MC_SLB_MULTI |
  71. DSISR_MC_SLB_PARITY | DSISR_MC_DERAT_MULTI)) {
  72. /* flush and reload SLB; flushes D-ERAT too */
  73. reload_slb(vcpu);
  74. dsisr &= ~(DSISR_MC_SLB_PARMULTI | DSISR_MC_SLB_MULTI |
  75. DSISR_MC_SLB_PARITY | DSISR_MC_DERAT_MULTI);
  76. }
  77. if (dsisr & DSISR_MC_TLB_MULTI) {
  78. tlbiel_all_lpid(vcpu->kvm->arch.radix);
  79. dsisr &= ~DSISR_MC_TLB_MULTI;
  80. }
  81. /* Any other errors we don't understand? */
  82. if (dsisr & 0xffffffffUL)
  83. handled = 0;
  84. }
  85. switch ((srr1 >> SRR1_MC_IFETCH_SH) & SRR1_MC_IFETCH_MASK) {
  86. case 0:
  87. break;
  88. case SRR1_MC_IFETCH_SLBPAR:
  89. case SRR1_MC_IFETCH_SLBMULTI:
  90. case SRR1_MC_IFETCH_SLBPARMULTI:
  91. reload_slb(vcpu);
  92. break;
  93. case SRR1_MC_IFETCH_TLBMULTI:
  94. tlbiel_all_lpid(vcpu->kvm->arch.radix);
  95. break;
  96. default:
  97. handled = 0;
  98. }
  99. /*
  100. * See if we have already handled the condition in the linux host.
  101. * We assume that if the condition is recovered then linux host
  102. * will have generated an error log event that we will pick
  103. * up and log later.
  104. * Don't release mce event now. We will queue up the event so that
  105. * we can log the MCE event info on host console.
  106. */
  107. if (!get_mce_event(&mce_evt, MCE_EVENT_DONTRELEASE))
  108. goto out;
  109. if (mce_evt.version == MCE_V1 &&
  110. (mce_evt.severity == MCE_SEV_NO_ERROR ||
  111. mce_evt.disposition == MCE_DISPOSITION_RECOVERED))
  112. handled = 1;
  113. out:
  114. /*
  115. * For guest that supports FWNMI capability, hook the MCE event into
  116. * vcpu structure. We are going to exit the guest with KVM_EXIT_NMI
  117. * exit reason. On our way to exit we will pull this event from vcpu
  118. * structure and print it from thread 0 of the core/subcore.
  119. *
  120. * For guest that does not support FWNMI capability (old QEMU):
  121. * We are now going enter guest either through machine check
  122. * interrupt (for unhandled errors) or will continue from
  123. * current HSRR0 (for handled errors) in guest. Hence
  124. * queue up the event so that we can log it from host console later.
  125. */
  126. if (vcpu->kvm->arch.fwnmi_enabled) {
  127. /*
  128. * Hook up the mce event on to vcpu structure.
  129. * First clear the old event.
  130. */
  131. memset(&vcpu->arch.mce_evt, 0, sizeof(vcpu->arch.mce_evt));
  132. if (get_mce_event(&mce_evt, MCE_EVENT_RELEASE)) {
  133. vcpu->arch.mce_evt = mce_evt;
  134. }
  135. } else
  136. machine_check_queue_event();
  137. return handled;
  138. }
  139. long kvmppc_realmode_machine_check(struct kvm_vcpu *vcpu)
  140. {
  141. return kvmppc_realmode_mc_power7(vcpu);
  142. }
  143. /* Check if dynamic split is in force and return subcore size accordingly. */
  144. static inline int kvmppc_cur_subcore_size(void)
  145. {
  146. if (local_paca->kvm_hstate.kvm_split_mode)
  147. return local_paca->kvm_hstate.kvm_split_mode->subcore_size;
  148. return threads_per_subcore;
  149. }
  150. void kvmppc_subcore_enter_guest(void)
  151. {
  152. int thread_id, subcore_id;
  153. thread_id = cpu_thread_in_core(local_paca->paca_index);
  154. subcore_id = thread_id / kvmppc_cur_subcore_size();
  155. local_paca->sibling_subcore_state->in_guest[subcore_id] = 1;
  156. }
  157. EXPORT_SYMBOL_GPL(kvmppc_subcore_enter_guest);
  158. void kvmppc_subcore_exit_guest(void)
  159. {
  160. int thread_id, subcore_id;
  161. thread_id = cpu_thread_in_core(local_paca->paca_index);
  162. subcore_id = thread_id / kvmppc_cur_subcore_size();
  163. local_paca->sibling_subcore_state->in_guest[subcore_id] = 0;
  164. }
  165. EXPORT_SYMBOL_GPL(kvmppc_subcore_exit_guest);
  166. static bool kvmppc_tb_resync_required(void)
  167. {
  168. if (test_and_set_bit(CORE_TB_RESYNC_REQ_BIT,
  169. &local_paca->sibling_subcore_state->flags))
  170. return false;
  171. return true;
  172. }
  173. static void kvmppc_tb_resync_done(void)
  174. {
  175. clear_bit(CORE_TB_RESYNC_REQ_BIT,
  176. &local_paca->sibling_subcore_state->flags);
  177. }
  178. /*
  179. * kvmppc_realmode_hmi_handler() is called only by primary thread during
  180. * guest exit path.
  181. *
  182. * There are multiple reasons why HMI could occur, one of them is
  183. * Timebase (TB) error. If this HMI is due to TB error, then TB would
  184. * have been in stopped state. The opal hmi handler Will fix it and
  185. * restore the TB value with host timebase value. For HMI caused due
  186. * to non-TB errors, opal hmi handler will not touch/restore TB register
  187. * and hence there won't be any change in TB value.
  188. *
  189. * Since we are not sure about the cause of this HMI, we can't be sure
  190. * about the content of TB register whether it holds guest or host timebase
  191. * value. Hence the idea is to resync the TB on every HMI, so that we
  192. * know about the exact state of the TB value. Resync TB call will
  193. * restore TB to host timebase.
  194. *
  195. * Things to consider:
  196. * - On TB error, HMI interrupt is reported on all the threads of the core
  197. * that has encountered TB error irrespective of split-core mode.
  198. * - The very first thread on the core that get chance to fix TB error
  199. * would rsync the TB with local chipTOD value.
  200. * - The resync TB is a core level action i.e. it will sync all the TBs
  201. * in that core independent of split-core mode. This means if we trigger
  202. * TB sync from a thread from one subcore, it would affect TB values of
  203. * sibling subcores of the same core.
  204. *
  205. * All threads need to co-ordinate before making opal hmi handler.
  206. * All threads will use sibling_subcore_state->in_guest[] (shared by all
  207. * threads in the core) in paca which holds information about whether
  208. * sibling subcores are in Guest mode or host mode. The in_guest[] array
  209. * is of size MAX_SUBCORE_PER_CORE=4, indexed using subcore id to set/unset
  210. * subcore status. Only primary threads from each subcore is responsible
  211. * to set/unset its designated array element while entering/exiting the
  212. * guset.
  213. *
  214. * After invoking opal hmi handler call, one of the thread (of entire core)
  215. * will need to resync the TB. Bit 63 from subcore state bitmap flags
  216. * (sibling_subcore_state->flags) will be used to co-ordinate between
  217. * primary threads to decide who takes up the responsibility.
  218. *
  219. * This is what we do:
  220. * - Primary thread from each subcore tries to set resync required bit[63]
  221. * of paca->sibling_subcore_state->flags.
  222. * - The first primary thread that is able to set the flag takes the
  223. * responsibility of TB resync. (Let us call it as thread leader)
  224. * - All other threads which are in host will call
  225. * wait_for_subcore_guest_exit() and wait for in_guest[0-3] from
  226. * paca->sibling_subcore_state to get cleared.
  227. * - All the primary thread will clear its subcore status from subcore
  228. * state in_guest[] array respectively.
  229. * - Once all primary threads clear in_guest[0-3], all of them will invoke
  230. * opal hmi handler.
  231. * - Now all threads will wait for TB resync to complete by invoking
  232. * wait_for_tb_resync() except the thread leader.
  233. * - Thread leader will do a TB resync by invoking opal_resync_timebase()
  234. * call and the it will clear the resync required bit.
  235. * - All other threads will now come out of resync wait loop and proceed
  236. * with individual execution.
  237. * - On return of this function, primary thread will signal all
  238. * secondary threads to proceed.
  239. * - All secondary threads will eventually call opal hmi handler on
  240. * their exit path.
  241. *
  242. * Returns 1 if the timebase offset should be applied, 0 if not.
  243. */
  244. long kvmppc_realmode_hmi_handler(void)
  245. {
  246. bool resync_req;
  247. __this_cpu_inc(irq_stat.hmi_exceptions);
  248. if (hmi_handle_debugtrig(NULL) >= 0)
  249. return 1;
  250. /*
  251. * By now primary thread has already completed guest->host
  252. * partition switch but haven't signaled secondaries yet.
  253. * All the secondary threads on this subcore is waiting
  254. * for primary thread to signal them to go ahead.
  255. *
  256. * For threads from subcore which isn't in guest, they all will
  257. * wait until all other subcores on this core exit the guest.
  258. *
  259. * Now set the resync required bit. If you are the first to
  260. * set this bit then kvmppc_tb_resync_required() function will
  261. * return true. For rest all other subcores
  262. * kvmppc_tb_resync_required() will return false.
  263. *
  264. * If resync_req == true, then this thread is responsible to
  265. * initiate TB resync after hmi handler has completed.
  266. * All other threads on this core will wait until this thread
  267. * clears the resync required bit flag.
  268. */
  269. resync_req = kvmppc_tb_resync_required();
  270. /* Reset the subcore status to indicate it has exited guest */
  271. kvmppc_subcore_exit_guest();
  272. /*
  273. * Wait for other subcores on this core to exit the guest.
  274. * All the primary threads and threads from subcore that are
  275. * not in guest will wait here until all subcores are out
  276. * of guest context.
  277. */
  278. wait_for_subcore_guest_exit();
  279. /*
  280. * At this point we are sure that primary threads from each
  281. * subcore on this core have completed guest->host partition
  282. * switch. Now it is safe to call HMI handler.
  283. */
  284. if (ppc_md.hmi_exception_early)
  285. ppc_md.hmi_exception_early(NULL);
  286. /*
  287. * Check if this thread is responsible to resync TB.
  288. * All other threads will wait until this thread completes the
  289. * TB resync.
  290. */
  291. if (resync_req) {
  292. opal_resync_timebase();
  293. /* Reset TB resync req bit */
  294. kvmppc_tb_resync_done();
  295. } else {
  296. wait_for_tb_resync();
  297. }
  298. /*
  299. * Reset tb_offset_applied so the guest exit code won't try
  300. * to subtract the previous timebase offset from the timebase.
  301. */
  302. if (local_paca->kvm_hstate.kvm_vcore)
  303. local_paca->kvm_hstate.kvm_vcore->tb_offset_applied = 0;
  304. return 0;
  305. }