utils.c 41 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  10. * Copyright (C) 2015 - 2017 Intel Deutschland GmbH
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of version 2 of the GNU General Public License as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  24. * USA
  25. *
  26. * The full GNU General Public License is included in this distribution
  27. * in the file called COPYING.
  28. *
  29. * Contact Information:
  30. * Intel Linux Wireless <linuxwifi@intel.com>
  31. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  32. *
  33. * BSD LICENSE
  34. *
  35. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  36. * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  37. * Copyright (C) 2015 - 2017 Intel Deutschland GmbH
  38. * All rights reserved.
  39. *
  40. * Redistribution and use in source and binary forms, with or without
  41. * modification, are permitted provided that the following conditions
  42. * are met:
  43. *
  44. * * Redistributions of source code must retain the above copyright
  45. * notice, this list of conditions and the following disclaimer.
  46. * * Redistributions in binary form must reproduce the above copyright
  47. * notice, this list of conditions and the following disclaimer in
  48. * the documentation and/or other materials provided with the
  49. * distribution.
  50. * * Neither the name Intel Corporation nor the names of its
  51. * contributors may be used to endorse or promote products derived
  52. * from this software without specific prior written permission.
  53. *
  54. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  55. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  56. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  57. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  58. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  59. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  60. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  61. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  62. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  63. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  64. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  65. *
  66. *****************************************************************************/
  67. #include <net/mac80211.h>
  68. #include "iwl-debug.h"
  69. #include "iwl-io.h"
  70. #include "iwl-prph.h"
  71. #include "iwl-csr.h"
  72. #include "mvm.h"
  73. #include "fw/api/rs.h"
  74. /*
  75. * Will return 0 even if the cmd failed when RFKILL is asserted unless
  76. * CMD_WANT_SKB is set in cmd->flags.
  77. */
  78. int iwl_mvm_send_cmd(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd)
  79. {
  80. int ret;
  81. #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
  82. if (WARN_ON(mvm->d3_test_active))
  83. return -EIO;
  84. #endif
  85. /*
  86. * Synchronous commands from this op-mode must hold
  87. * the mutex, this ensures we don't try to send two
  88. * (or more) synchronous commands at a time.
  89. */
  90. if (!(cmd->flags & CMD_ASYNC)) {
  91. lockdep_assert_held(&mvm->mutex);
  92. if (!(cmd->flags & CMD_SEND_IN_IDLE))
  93. iwl_mvm_ref(mvm, IWL_MVM_REF_SENDING_CMD);
  94. }
  95. ret = iwl_trans_send_cmd(mvm->trans, cmd);
  96. if (!(cmd->flags & (CMD_ASYNC | CMD_SEND_IN_IDLE)))
  97. iwl_mvm_unref(mvm, IWL_MVM_REF_SENDING_CMD);
  98. /*
  99. * If the caller wants the SKB, then don't hide any problems, the
  100. * caller might access the response buffer which will be NULL if
  101. * the command failed.
  102. */
  103. if (cmd->flags & CMD_WANT_SKB)
  104. return ret;
  105. /* Silently ignore failures if RFKILL is asserted */
  106. if (!ret || ret == -ERFKILL)
  107. return 0;
  108. return ret;
  109. }
  110. int iwl_mvm_send_cmd_pdu(struct iwl_mvm *mvm, u32 id,
  111. u32 flags, u16 len, const void *data)
  112. {
  113. struct iwl_host_cmd cmd = {
  114. .id = id,
  115. .len = { len, },
  116. .data = { data, },
  117. .flags = flags,
  118. };
  119. return iwl_mvm_send_cmd(mvm, &cmd);
  120. }
  121. /*
  122. * We assume that the caller set the status to the success value
  123. */
  124. int iwl_mvm_send_cmd_status(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd,
  125. u32 *status)
  126. {
  127. struct iwl_rx_packet *pkt;
  128. struct iwl_cmd_response *resp;
  129. int ret, resp_len;
  130. lockdep_assert_held(&mvm->mutex);
  131. #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
  132. if (WARN_ON(mvm->d3_test_active))
  133. return -EIO;
  134. #endif
  135. /*
  136. * Only synchronous commands can wait for status,
  137. * we use WANT_SKB so the caller can't.
  138. */
  139. if (WARN_ONCE(cmd->flags & (CMD_ASYNC | CMD_WANT_SKB),
  140. "cmd flags %x", cmd->flags))
  141. return -EINVAL;
  142. cmd->flags |= CMD_WANT_SKB;
  143. ret = iwl_trans_send_cmd(mvm->trans, cmd);
  144. if (ret == -ERFKILL) {
  145. /*
  146. * The command failed because of RFKILL, don't update
  147. * the status, leave it as success and return 0.
  148. */
  149. return 0;
  150. } else if (ret) {
  151. return ret;
  152. }
  153. pkt = cmd->resp_pkt;
  154. resp_len = iwl_rx_packet_payload_len(pkt);
  155. if (WARN_ON_ONCE(resp_len != sizeof(*resp))) {
  156. ret = -EIO;
  157. goto out_free_resp;
  158. }
  159. resp = (void *)pkt->data;
  160. *status = le32_to_cpu(resp->status);
  161. out_free_resp:
  162. iwl_free_resp(cmd);
  163. return ret;
  164. }
  165. /*
  166. * We assume that the caller set the status to the sucess value
  167. */
  168. int iwl_mvm_send_cmd_pdu_status(struct iwl_mvm *mvm, u32 id, u16 len,
  169. const void *data, u32 *status)
  170. {
  171. struct iwl_host_cmd cmd = {
  172. .id = id,
  173. .len = { len, },
  174. .data = { data, },
  175. };
  176. return iwl_mvm_send_cmd_status(mvm, &cmd, status);
  177. }
  178. #define IWL_DECLARE_RATE_INFO(r) \
  179. [IWL_RATE_##r##M_INDEX] = IWL_RATE_##r##M_PLCP
  180. /*
  181. * Translate from fw_rate_index (IWL_RATE_XXM_INDEX) to PLCP
  182. */
  183. static const u8 fw_rate_idx_to_plcp[IWL_RATE_COUNT] = {
  184. IWL_DECLARE_RATE_INFO(1),
  185. IWL_DECLARE_RATE_INFO(2),
  186. IWL_DECLARE_RATE_INFO(5),
  187. IWL_DECLARE_RATE_INFO(11),
  188. IWL_DECLARE_RATE_INFO(6),
  189. IWL_DECLARE_RATE_INFO(9),
  190. IWL_DECLARE_RATE_INFO(12),
  191. IWL_DECLARE_RATE_INFO(18),
  192. IWL_DECLARE_RATE_INFO(24),
  193. IWL_DECLARE_RATE_INFO(36),
  194. IWL_DECLARE_RATE_INFO(48),
  195. IWL_DECLARE_RATE_INFO(54),
  196. };
  197. int iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags,
  198. enum nl80211_band band)
  199. {
  200. int rate = rate_n_flags & RATE_LEGACY_RATE_MSK;
  201. int idx;
  202. int band_offset = 0;
  203. /* Legacy rate format, search for match in table */
  204. if (band == NL80211_BAND_5GHZ)
  205. band_offset = IWL_FIRST_OFDM_RATE;
  206. for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
  207. if (fw_rate_idx_to_plcp[idx] == rate)
  208. return idx - band_offset;
  209. return -1;
  210. }
  211. u8 iwl_mvm_mac80211_idx_to_hwrate(int rate_idx)
  212. {
  213. /* Get PLCP rate for tx_cmd->rate_n_flags */
  214. return fw_rate_idx_to_plcp[rate_idx];
  215. }
  216. void iwl_mvm_rx_fw_error(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb)
  217. {
  218. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  219. struct iwl_error_resp *err_resp = (void *)pkt->data;
  220. IWL_ERR(mvm, "FW Error notification: type 0x%08X cmd_id 0x%02X\n",
  221. le32_to_cpu(err_resp->error_type), err_resp->cmd_id);
  222. IWL_ERR(mvm, "FW Error notification: seq 0x%04X service 0x%08X\n",
  223. le16_to_cpu(err_resp->bad_cmd_seq_num),
  224. le32_to_cpu(err_resp->error_service));
  225. IWL_ERR(mvm, "FW Error notification: timestamp 0x%16llX\n",
  226. le64_to_cpu(err_resp->timestamp));
  227. }
  228. /*
  229. * Returns the first antenna as ANT_[ABC], as defined in iwl-config.h.
  230. * The parameter should also be a combination of ANT_[ABC].
  231. */
  232. u8 first_antenna(u8 mask)
  233. {
  234. BUILD_BUG_ON(ANT_A != BIT(0)); /* using ffs is wrong if not */
  235. if (WARN_ON_ONCE(!mask)) /* ffs will return 0 if mask is zeroed */
  236. return BIT(0);
  237. return BIT(ffs(mask) - 1);
  238. }
  239. /*
  240. * Toggles between TX antennas to send the probe request on.
  241. * Receives the bitmask of valid TX antennas and the *index* used
  242. * for the last TX, and returns the next valid *index* to use.
  243. * In order to set it in the tx_cmd, must do BIT(idx).
  244. */
  245. u8 iwl_mvm_next_antenna(struct iwl_mvm *mvm, u8 valid, u8 last_idx)
  246. {
  247. u8 ind = last_idx;
  248. int i;
  249. for (i = 0; i < RATE_MCS_ANT_NUM; i++) {
  250. ind = (ind + 1) % RATE_MCS_ANT_NUM;
  251. if (valid & BIT(ind))
  252. return ind;
  253. }
  254. WARN_ONCE(1, "Failed to toggle between antennas 0x%x", valid);
  255. return last_idx;
  256. }
  257. static const struct {
  258. const char *name;
  259. u8 num;
  260. } advanced_lookup[] = {
  261. { "NMI_INTERRUPT_WDG", 0x34 },
  262. { "SYSASSERT", 0x35 },
  263. { "UCODE_VERSION_MISMATCH", 0x37 },
  264. { "BAD_COMMAND", 0x38 },
  265. { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
  266. { "FATAL_ERROR", 0x3D },
  267. { "NMI_TRM_HW_ERR", 0x46 },
  268. { "NMI_INTERRUPT_TRM", 0x4C },
  269. { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
  270. { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
  271. { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
  272. { "NMI_INTERRUPT_HOST", 0x66 },
  273. { "NMI_INTERRUPT_ACTION_PT", 0x7C },
  274. { "NMI_INTERRUPT_UNKNOWN", 0x84 },
  275. { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
  276. { "ADVANCED_SYSASSERT", 0 },
  277. };
  278. static const char *desc_lookup(u32 num)
  279. {
  280. int i;
  281. for (i = 0; i < ARRAY_SIZE(advanced_lookup) - 1; i++)
  282. if (advanced_lookup[i].num == num)
  283. return advanced_lookup[i].name;
  284. /* No entry matches 'num', so it is the last: ADVANCED_SYSASSERT */
  285. return advanced_lookup[i].name;
  286. }
  287. /*
  288. * Note: This structure is read from the device with IO accesses,
  289. * and the reading already does the endian conversion. As it is
  290. * read with u32-sized accesses, any members with a different size
  291. * need to be ordered correctly though!
  292. */
  293. struct iwl_error_event_table_v1 {
  294. u32 valid; /* (nonzero) valid, (0) log is empty */
  295. u32 error_id; /* type of error */
  296. u32 pc; /* program counter */
  297. u32 blink1; /* branch link */
  298. u32 blink2; /* branch link */
  299. u32 ilink1; /* interrupt link */
  300. u32 ilink2; /* interrupt link */
  301. u32 data1; /* error-specific data */
  302. u32 data2; /* error-specific data */
  303. u32 data3; /* error-specific data */
  304. u32 bcon_time; /* beacon timer */
  305. u32 tsf_low; /* network timestamp function timer */
  306. u32 tsf_hi; /* network timestamp function timer */
  307. u32 gp1; /* GP1 timer register */
  308. u32 gp2; /* GP2 timer register */
  309. u32 gp3; /* GP3 timer register */
  310. u32 ucode_ver; /* uCode version */
  311. u32 hw_ver; /* HW Silicon version */
  312. u32 brd_ver; /* HW board version */
  313. u32 log_pc; /* log program counter */
  314. u32 frame_ptr; /* frame pointer */
  315. u32 stack_ptr; /* stack pointer */
  316. u32 hcmd; /* last host command header */
  317. u32 isr0; /* isr status register LMPM_NIC_ISR0:
  318. * rxtx_flag */
  319. u32 isr1; /* isr status register LMPM_NIC_ISR1:
  320. * host_flag */
  321. u32 isr2; /* isr status register LMPM_NIC_ISR2:
  322. * enc_flag */
  323. u32 isr3; /* isr status register LMPM_NIC_ISR3:
  324. * time_flag */
  325. u32 isr4; /* isr status register LMPM_NIC_ISR4:
  326. * wico interrupt */
  327. u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
  328. u32 wait_event; /* wait event() caller address */
  329. u32 l2p_control; /* L2pControlField */
  330. u32 l2p_duration; /* L2pDurationField */
  331. u32 l2p_mhvalid; /* L2pMhValidBits */
  332. u32 l2p_addr_match; /* L2pAddrMatchStat */
  333. u32 lmpm_pmg_sel; /* indicate which clocks are turned on
  334. * (LMPM_PMG_SEL) */
  335. u32 u_timestamp; /* indicate when the date and time of the
  336. * compilation */
  337. u32 flow_handler; /* FH read/write pointers, RX credit */
  338. } __packed /* LOG_ERROR_TABLE_API_S_VER_1 */;
  339. struct iwl_error_event_table {
  340. u32 valid; /* (nonzero) valid, (0) log is empty */
  341. u32 error_id; /* type of error */
  342. u32 trm_hw_status0; /* TRM HW status */
  343. u32 trm_hw_status1; /* TRM HW status */
  344. u32 blink2; /* branch link */
  345. u32 ilink1; /* interrupt link */
  346. u32 ilink2; /* interrupt link */
  347. u32 data1; /* error-specific data */
  348. u32 data2; /* error-specific data */
  349. u32 data3; /* error-specific data */
  350. u32 bcon_time; /* beacon timer */
  351. u32 tsf_low; /* network timestamp function timer */
  352. u32 tsf_hi; /* network timestamp function timer */
  353. u32 gp1; /* GP1 timer register */
  354. u32 gp2; /* GP2 timer register */
  355. u32 fw_rev_type; /* firmware revision type */
  356. u32 major; /* uCode version major */
  357. u32 minor; /* uCode version minor */
  358. u32 hw_ver; /* HW Silicon version */
  359. u32 brd_ver; /* HW board version */
  360. u32 log_pc; /* log program counter */
  361. u32 frame_ptr; /* frame pointer */
  362. u32 stack_ptr; /* stack pointer */
  363. u32 hcmd; /* last host command header */
  364. u32 isr0; /* isr status register LMPM_NIC_ISR0:
  365. * rxtx_flag */
  366. u32 isr1; /* isr status register LMPM_NIC_ISR1:
  367. * host_flag */
  368. u32 isr2; /* isr status register LMPM_NIC_ISR2:
  369. * enc_flag */
  370. u32 isr3; /* isr status register LMPM_NIC_ISR3:
  371. * time_flag */
  372. u32 isr4; /* isr status register LMPM_NIC_ISR4:
  373. * wico interrupt */
  374. u32 last_cmd_id; /* last HCMD id handled by the firmware */
  375. u32 wait_event; /* wait event() caller address */
  376. u32 l2p_control; /* L2pControlField */
  377. u32 l2p_duration; /* L2pDurationField */
  378. u32 l2p_mhvalid; /* L2pMhValidBits */
  379. u32 l2p_addr_match; /* L2pAddrMatchStat */
  380. u32 lmpm_pmg_sel; /* indicate which clocks are turned on
  381. * (LMPM_PMG_SEL) */
  382. u32 u_timestamp; /* indicate when the date and time of the
  383. * compilation */
  384. u32 flow_handler; /* FH read/write pointers, RX credit */
  385. } __packed /* LOG_ERROR_TABLE_API_S_VER_3 */;
  386. /*
  387. * UMAC error struct - relevant starting from family 8000 chip.
  388. * Note: This structure is read from the device with IO accesses,
  389. * and the reading already does the endian conversion. As it is
  390. * read with u32-sized accesses, any members with a different size
  391. * need to be ordered correctly though!
  392. */
  393. struct iwl_umac_error_event_table {
  394. u32 valid; /* (nonzero) valid, (0) log is empty */
  395. u32 error_id; /* type of error */
  396. u32 blink1; /* branch link */
  397. u32 blink2; /* branch link */
  398. u32 ilink1; /* interrupt link */
  399. u32 ilink2; /* interrupt link */
  400. u32 data1; /* error-specific data */
  401. u32 data2; /* error-specific data */
  402. u32 data3; /* error-specific data */
  403. u32 umac_major;
  404. u32 umac_minor;
  405. u32 frame_pointer; /* core register 27*/
  406. u32 stack_pointer; /* core register 28 */
  407. u32 cmd_header; /* latest host cmd sent to UMAC */
  408. u32 nic_isr_pref; /* ISR status register */
  409. } __packed;
  410. #define ERROR_START_OFFSET (1 * sizeof(u32))
  411. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  412. static void iwl_mvm_dump_umac_error_log(struct iwl_mvm *mvm)
  413. {
  414. struct iwl_trans *trans = mvm->trans;
  415. struct iwl_umac_error_event_table table;
  416. if (!mvm->support_umac_log)
  417. return;
  418. iwl_trans_read_mem_bytes(trans, mvm->umac_error_event_table, &table,
  419. sizeof(table));
  420. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  421. IWL_ERR(trans, "Start IWL Error Log Dump:\n");
  422. IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
  423. mvm->status, table.valid);
  424. }
  425. IWL_ERR(mvm, "0x%08X | %s\n", table.error_id,
  426. desc_lookup(table.error_id));
  427. IWL_ERR(mvm, "0x%08X | umac branchlink1\n", table.blink1);
  428. IWL_ERR(mvm, "0x%08X | umac branchlink2\n", table.blink2);
  429. IWL_ERR(mvm, "0x%08X | umac interruptlink1\n", table.ilink1);
  430. IWL_ERR(mvm, "0x%08X | umac interruptlink2\n", table.ilink2);
  431. IWL_ERR(mvm, "0x%08X | umac data1\n", table.data1);
  432. IWL_ERR(mvm, "0x%08X | umac data2\n", table.data2);
  433. IWL_ERR(mvm, "0x%08X | umac data3\n", table.data3);
  434. IWL_ERR(mvm, "0x%08X | umac major\n", table.umac_major);
  435. IWL_ERR(mvm, "0x%08X | umac minor\n", table.umac_minor);
  436. IWL_ERR(mvm, "0x%08X | frame pointer\n", table.frame_pointer);
  437. IWL_ERR(mvm, "0x%08X | stack pointer\n", table.stack_pointer);
  438. IWL_ERR(mvm, "0x%08X | last host cmd\n", table.cmd_header);
  439. IWL_ERR(mvm, "0x%08X | isr status reg\n", table.nic_isr_pref);
  440. }
  441. static void iwl_mvm_dump_lmac_error_log(struct iwl_mvm *mvm, u32 base)
  442. {
  443. struct iwl_trans *trans = mvm->trans;
  444. struct iwl_error_event_table table;
  445. u32 val;
  446. if (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) {
  447. if (!base)
  448. base = mvm->fw->init_errlog_ptr;
  449. } else {
  450. if (!base)
  451. base = mvm->fw->inst_errlog_ptr;
  452. }
  453. if (base < 0x400000) {
  454. IWL_ERR(mvm,
  455. "Not valid error log pointer 0x%08X for %s uCode\n",
  456. base,
  457. (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT)
  458. ? "Init" : "RT");
  459. return;
  460. }
  461. /* check if there is a HW error */
  462. val = iwl_trans_read_mem32(trans, base);
  463. if (((val & ~0xf) == 0xa5a5a5a0) || ((val & ~0xf) == 0x5a5a5a50)) {
  464. int err;
  465. IWL_ERR(trans, "HW error, resetting before reading\n");
  466. /* reset the device */
  467. iwl_set_bit(trans, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  468. usleep_range(5000, 6000);
  469. /* set INIT_DONE flag */
  470. iwl_set_bit(trans, CSR_GP_CNTRL,
  471. CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  472. /* and wait for clock stabilization */
  473. if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
  474. udelay(2);
  475. err = iwl_poll_bit(trans, CSR_GP_CNTRL,
  476. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  477. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  478. 25000);
  479. if (err < 0) {
  480. IWL_DEBUG_INFO(trans,
  481. "Failed to reset the card for the dump\n");
  482. return;
  483. }
  484. }
  485. iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
  486. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  487. IWL_ERR(trans, "Start IWL Error Log Dump:\n");
  488. IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
  489. mvm->status, table.valid);
  490. }
  491. /* Do not change this output - scripts rely on it */
  492. IWL_ERR(mvm, "Loaded firmware version: %s\n", mvm->fw->fw_version);
  493. trace_iwlwifi_dev_ucode_error(trans->dev, table.error_id, table.tsf_low,
  494. table.data1, table.data2, table.data3,
  495. table.blink2, table.ilink1,
  496. table.ilink2, table.bcon_time, table.gp1,
  497. table.gp2, table.fw_rev_type, table.major,
  498. table.minor, table.hw_ver, table.brd_ver);
  499. IWL_ERR(mvm, "0x%08X | %-28s\n", table.error_id,
  500. desc_lookup(table.error_id));
  501. IWL_ERR(mvm, "0x%08X | trm_hw_status0\n", table.trm_hw_status0);
  502. IWL_ERR(mvm, "0x%08X | trm_hw_status1\n", table.trm_hw_status1);
  503. IWL_ERR(mvm, "0x%08X | branchlink2\n", table.blink2);
  504. IWL_ERR(mvm, "0x%08X | interruptlink1\n", table.ilink1);
  505. IWL_ERR(mvm, "0x%08X | interruptlink2\n", table.ilink2);
  506. IWL_ERR(mvm, "0x%08X | data1\n", table.data1);
  507. IWL_ERR(mvm, "0x%08X | data2\n", table.data2);
  508. IWL_ERR(mvm, "0x%08X | data3\n", table.data3);
  509. IWL_ERR(mvm, "0x%08X | beacon time\n", table.bcon_time);
  510. IWL_ERR(mvm, "0x%08X | tsf low\n", table.tsf_low);
  511. IWL_ERR(mvm, "0x%08X | tsf hi\n", table.tsf_hi);
  512. IWL_ERR(mvm, "0x%08X | time gp1\n", table.gp1);
  513. IWL_ERR(mvm, "0x%08X | time gp2\n", table.gp2);
  514. IWL_ERR(mvm, "0x%08X | uCode revision type\n", table.fw_rev_type);
  515. IWL_ERR(mvm, "0x%08X | uCode version major\n", table.major);
  516. IWL_ERR(mvm, "0x%08X | uCode version minor\n", table.minor);
  517. IWL_ERR(mvm, "0x%08X | hw version\n", table.hw_ver);
  518. IWL_ERR(mvm, "0x%08X | board version\n", table.brd_ver);
  519. IWL_ERR(mvm, "0x%08X | hcmd\n", table.hcmd);
  520. IWL_ERR(mvm, "0x%08X | isr0\n", table.isr0);
  521. IWL_ERR(mvm, "0x%08X | isr1\n", table.isr1);
  522. IWL_ERR(mvm, "0x%08X | isr2\n", table.isr2);
  523. IWL_ERR(mvm, "0x%08X | isr3\n", table.isr3);
  524. IWL_ERR(mvm, "0x%08X | isr4\n", table.isr4);
  525. IWL_ERR(mvm, "0x%08X | last cmd Id\n", table.last_cmd_id);
  526. IWL_ERR(mvm, "0x%08X | wait_event\n", table.wait_event);
  527. IWL_ERR(mvm, "0x%08X | l2p_control\n", table.l2p_control);
  528. IWL_ERR(mvm, "0x%08X | l2p_duration\n", table.l2p_duration);
  529. IWL_ERR(mvm, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid);
  530. IWL_ERR(mvm, "0x%08X | l2p_addr_match\n", table.l2p_addr_match);
  531. IWL_ERR(mvm, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel);
  532. IWL_ERR(mvm, "0x%08X | timestamp\n", table.u_timestamp);
  533. IWL_ERR(mvm, "0x%08X | flow_handler\n", table.flow_handler);
  534. }
  535. void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm)
  536. {
  537. iwl_mvm_dump_lmac_error_log(mvm, mvm->error_event_table[0]);
  538. if (mvm->error_event_table[1])
  539. iwl_mvm_dump_lmac_error_log(mvm, mvm->error_event_table[1]);
  540. iwl_mvm_dump_umac_error_log(mvm);
  541. }
  542. int iwl_mvm_find_free_queue(struct iwl_mvm *mvm, u8 sta_id, u8 minq, u8 maxq)
  543. {
  544. int i;
  545. lockdep_assert_held(&mvm->queue_info_lock);
  546. /* This should not be hit with new TX path */
  547. if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
  548. return -ENOSPC;
  549. /* Start by looking for a free queue */
  550. for (i = minq; i <= maxq; i++)
  551. if (mvm->queue_info[i].hw_queue_refcount == 0 &&
  552. mvm->queue_info[i].status == IWL_MVM_QUEUE_FREE)
  553. return i;
  554. /*
  555. * If no free queue found - settle for an inactive one to reconfigure
  556. * Make sure that the inactive queue either already belongs to this STA,
  557. * or that if it belongs to another one - it isn't the reserved queue
  558. */
  559. for (i = minq; i <= maxq; i++)
  560. if (mvm->queue_info[i].status == IWL_MVM_QUEUE_INACTIVE &&
  561. (sta_id == mvm->queue_info[i].ra_sta_id ||
  562. !mvm->queue_info[i].reserved))
  563. return i;
  564. return -ENOSPC;
  565. }
  566. int iwl_mvm_reconfig_scd(struct iwl_mvm *mvm, int queue, int fifo, int sta_id,
  567. int tid, int frame_limit, u16 ssn)
  568. {
  569. struct iwl_scd_txq_cfg_cmd cmd = {
  570. .scd_queue = queue,
  571. .action = SCD_CFG_ENABLE_QUEUE,
  572. .window = frame_limit,
  573. .sta_id = sta_id,
  574. .ssn = cpu_to_le16(ssn),
  575. .tx_fifo = fifo,
  576. .aggregate = (queue >= IWL_MVM_DQA_MIN_DATA_QUEUE ||
  577. queue == IWL_MVM_DQA_BSS_CLIENT_QUEUE),
  578. .tid = tid,
  579. };
  580. int ret;
  581. if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
  582. return -EINVAL;
  583. spin_lock_bh(&mvm->queue_info_lock);
  584. if (WARN(mvm->queue_info[queue].hw_queue_refcount == 0,
  585. "Trying to reconfig unallocated queue %d\n", queue)) {
  586. spin_unlock_bh(&mvm->queue_info_lock);
  587. return -ENXIO;
  588. }
  589. spin_unlock_bh(&mvm->queue_info_lock);
  590. IWL_DEBUG_TX_QUEUES(mvm, "Reconfig SCD for TXQ #%d\n", queue);
  591. ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd);
  592. WARN_ONCE(ret, "Failed to re-configure queue %d on FIFO %d, ret=%d\n",
  593. queue, fifo, ret);
  594. return ret;
  595. }
  596. static bool iwl_mvm_update_txq_mapping(struct iwl_mvm *mvm, int queue,
  597. int mac80211_queue, u8 sta_id, u8 tid)
  598. {
  599. bool enable_queue = true;
  600. spin_lock_bh(&mvm->queue_info_lock);
  601. /* Make sure this TID isn't already enabled */
  602. if (mvm->queue_info[queue].tid_bitmap & BIT(tid)) {
  603. spin_unlock_bh(&mvm->queue_info_lock);
  604. IWL_ERR(mvm, "Trying to enable TXQ %d with existing TID %d\n",
  605. queue, tid);
  606. return false;
  607. }
  608. /* Update mappings and refcounts */
  609. if (mvm->queue_info[queue].hw_queue_refcount > 0)
  610. enable_queue = false;
  611. if (mac80211_queue != IEEE80211_INVAL_HW_QUEUE) {
  612. WARN(mac80211_queue >=
  613. BITS_PER_BYTE * sizeof(mvm->hw_queue_to_mac80211[0]),
  614. "cannot track mac80211 queue %d (queue %d, sta %d, tid %d)\n",
  615. mac80211_queue, queue, sta_id, tid);
  616. mvm->hw_queue_to_mac80211[queue] |= BIT(mac80211_queue);
  617. }
  618. mvm->queue_info[queue].hw_queue_refcount++;
  619. mvm->queue_info[queue].tid_bitmap |= BIT(tid);
  620. mvm->queue_info[queue].ra_sta_id = sta_id;
  621. if (enable_queue) {
  622. if (tid != IWL_MAX_TID_COUNT)
  623. mvm->queue_info[queue].mac80211_ac =
  624. tid_to_mac80211_ac[tid];
  625. else
  626. mvm->queue_info[queue].mac80211_ac = IEEE80211_AC_VO;
  627. mvm->queue_info[queue].txq_tid = tid;
  628. }
  629. IWL_DEBUG_TX_QUEUES(mvm,
  630. "Enabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
  631. queue, mvm->queue_info[queue].hw_queue_refcount,
  632. mvm->hw_queue_to_mac80211[queue]);
  633. spin_unlock_bh(&mvm->queue_info_lock);
  634. return enable_queue;
  635. }
  636. int iwl_mvm_tvqm_enable_txq(struct iwl_mvm *mvm, int mac80211_queue,
  637. u8 sta_id, u8 tid, unsigned int timeout)
  638. {
  639. struct iwl_tx_queue_cfg_cmd cmd = {
  640. .flags = cpu_to_le16(TX_QUEUE_CFG_ENABLE_QUEUE),
  641. .sta_id = sta_id,
  642. .tid = tid,
  643. };
  644. int queue;
  645. if (cmd.tid == IWL_MAX_TID_COUNT)
  646. cmd.tid = IWL_MGMT_TID;
  647. queue = iwl_trans_txq_alloc(mvm->trans, (void *)&cmd,
  648. SCD_QUEUE_CFG, timeout);
  649. if (queue < 0) {
  650. IWL_DEBUG_TX_QUEUES(mvm,
  651. "Failed allocating TXQ for sta %d tid %d, ret: %d\n",
  652. sta_id, tid, queue);
  653. return queue;
  654. }
  655. IWL_DEBUG_TX_QUEUES(mvm, "Enabling TXQ #%d for sta %d tid %d\n",
  656. queue, sta_id, tid);
  657. mvm->hw_queue_to_mac80211[queue] |= BIT(mac80211_queue);
  658. IWL_DEBUG_TX_QUEUES(mvm,
  659. "Enabling TXQ #%d (mac80211 map:0x%x)\n",
  660. queue, mvm->hw_queue_to_mac80211[queue]);
  661. return queue;
  662. }
  663. bool iwl_mvm_enable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
  664. u16 ssn, const struct iwl_trans_txq_scd_cfg *cfg,
  665. unsigned int wdg_timeout)
  666. {
  667. struct iwl_scd_txq_cfg_cmd cmd = {
  668. .scd_queue = queue,
  669. .action = SCD_CFG_ENABLE_QUEUE,
  670. .window = cfg->frame_limit,
  671. .sta_id = cfg->sta_id,
  672. .ssn = cpu_to_le16(ssn),
  673. .tx_fifo = cfg->fifo,
  674. .aggregate = cfg->aggregate,
  675. .tid = cfg->tid,
  676. };
  677. bool inc_ssn;
  678. if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
  679. return false;
  680. /* Send the enabling command if we need to */
  681. if (!iwl_mvm_update_txq_mapping(mvm, queue, mac80211_queue,
  682. cfg->sta_id, cfg->tid))
  683. return false;
  684. inc_ssn = iwl_trans_txq_enable_cfg(mvm->trans, queue, ssn,
  685. NULL, wdg_timeout);
  686. if (inc_ssn)
  687. le16_add_cpu(&cmd.ssn, 1);
  688. WARN(iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd),
  689. "Failed to configure queue %d on FIFO %d\n", queue, cfg->fifo);
  690. return inc_ssn;
  691. }
  692. int iwl_mvm_disable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
  693. u8 tid, u8 flags)
  694. {
  695. struct iwl_scd_txq_cfg_cmd cmd = {
  696. .scd_queue = queue,
  697. .action = SCD_CFG_DISABLE_QUEUE,
  698. };
  699. bool remove_mac_queue = true;
  700. int ret;
  701. if (iwl_mvm_has_new_tx_api(mvm)) {
  702. spin_lock_bh(&mvm->queue_info_lock);
  703. mvm->hw_queue_to_mac80211[queue] &= ~BIT(mac80211_queue);
  704. spin_unlock_bh(&mvm->queue_info_lock);
  705. iwl_trans_txq_free(mvm->trans, queue);
  706. return 0;
  707. }
  708. spin_lock_bh(&mvm->queue_info_lock);
  709. if (WARN_ON(mvm->queue_info[queue].hw_queue_refcount == 0)) {
  710. spin_unlock_bh(&mvm->queue_info_lock);
  711. return 0;
  712. }
  713. mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
  714. /*
  715. * If there is another TID with the same AC - don't remove the MAC queue
  716. * from the mapping
  717. */
  718. if (tid < IWL_MAX_TID_COUNT) {
  719. unsigned long tid_bitmap =
  720. mvm->queue_info[queue].tid_bitmap;
  721. int ac = tid_to_mac80211_ac[tid];
  722. int i;
  723. for_each_set_bit(i, &tid_bitmap, IWL_MAX_TID_COUNT) {
  724. if (tid_to_mac80211_ac[i] == ac)
  725. remove_mac_queue = false;
  726. }
  727. }
  728. if (remove_mac_queue)
  729. mvm->hw_queue_to_mac80211[queue] &=
  730. ~BIT(mac80211_queue);
  731. mvm->queue_info[queue].hw_queue_refcount--;
  732. cmd.action = mvm->queue_info[queue].hw_queue_refcount ?
  733. SCD_CFG_ENABLE_QUEUE : SCD_CFG_DISABLE_QUEUE;
  734. if (cmd.action == SCD_CFG_DISABLE_QUEUE)
  735. mvm->queue_info[queue].status = IWL_MVM_QUEUE_FREE;
  736. IWL_DEBUG_TX_QUEUES(mvm,
  737. "Disabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
  738. queue,
  739. mvm->queue_info[queue].hw_queue_refcount,
  740. mvm->hw_queue_to_mac80211[queue]);
  741. /* If the queue is still enabled - nothing left to do in this func */
  742. if (cmd.action == SCD_CFG_ENABLE_QUEUE) {
  743. spin_unlock_bh(&mvm->queue_info_lock);
  744. return 0;
  745. }
  746. cmd.sta_id = mvm->queue_info[queue].ra_sta_id;
  747. cmd.tid = mvm->queue_info[queue].txq_tid;
  748. /* Make sure queue info is correct even though we overwrite it */
  749. WARN(mvm->queue_info[queue].hw_queue_refcount ||
  750. mvm->queue_info[queue].tid_bitmap ||
  751. mvm->hw_queue_to_mac80211[queue],
  752. "TXQ #%d info out-of-sync - refcount=%d, mac map=0x%x, tid=0x%x\n",
  753. queue, mvm->queue_info[queue].hw_queue_refcount,
  754. mvm->hw_queue_to_mac80211[queue],
  755. mvm->queue_info[queue].tid_bitmap);
  756. /* If we are here - the queue is freed and we can zero out these vals */
  757. mvm->queue_info[queue].hw_queue_refcount = 0;
  758. mvm->queue_info[queue].tid_bitmap = 0;
  759. mvm->hw_queue_to_mac80211[queue] = 0;
  760. /* Regardless if this is a reserved TXQ for a STA - mark it as false */
  761. mvm->queue_info[queue].reserved = false;
  762. spin_unlock_bh(&mvm->queue_info_lock);
  763. iwl_trans_txq_disable(mvm->trans, queue, false);
  764. ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, flags,
  765. sizeof(struct iwl_scd_txq_cfg_cmd), &cmd);
  766. if (ret)
  767. IWL_ERR(mvm, "Failed to disable queue %d (ret=%d)\n",
  768. queue, ret);
  769. return ret;
  770. }
  771. /**
  772. * iwl_mvm_send_lq_cmd() - Send link quality command
  773. * @init: This command is sent as part of station initialization right
  774. * after station has been added.
  775. *
  776. * The link quality command is sent as the last step of station creation.
  777. * This is the special case in which init is set and we call a callback in
  778. * this case to clear the state indicating that station creation is in
  779. * progress.
  780. */
  781. int iwl_mvm_send_lq_cmd(struct iwl_mvm *mvm, struct iwl_lq_cmd *lq, bool init)
  782. {
  783. struct iwl_host_cmd cmd = {
  784. .id = LQ_CMD,
  785. .len = { sizeof(struct iwl_lq_cmd), },
  786. .flags = init ? 0 : CMD_ASYNC,
  787. .data = { lq, },
  788. };
  789. if (WARN_ON(lq->sta_id == IWL_MVM_INVALID_STA))
  790. return -EINVAL;
  791. return iwl_mvm_send_cmd(mvm, &cmd);
  792. }
  793. /**
  794. * iwl_mvm_update_smps - Get a request to change the SMPS mode
  795. * @req_type: The part of the driver who call for a change.
  796. * @smps_requests: The request to change the SMPS mode.
  797. *
  798. * Get a requst to change the SMPS mode,
  799. * and change it according to all other requests in the driver.
  800. */
  801. void iwl_mvm_update_smps(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  802. enum iwl_mvm_smps_type_request req_type,
  803. enum ieee80211_smps_mode smps_request)
  804. {
  805. struct iwl_mvm_vif *mvmvif;
  806. enum ieee80211_smps_mode smps_mode;
  807. int i;
  808. lockdep_assert_held(&mvm->mutex);
  809. /* SMPS is irrelevant for NICs that don't have at least 2 RX antenna */
  810. if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
  811. return;
  812. if (vif->type == NL80211_IFTYPE_AP)
  813. smps_mode = IEEE80211_SMPS_OFF;
  814. else
  815. smps_mode = IEEE80211_SMPS_AUTOMATIC;
  816. mvmvif = iwl_mvm_vif_from_mac80211(vif);
  817. mvmvif->smps_requests[req_type] = smps_request;
  818. for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
  819. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC) {
  820. smps_mode = IEEE80211_SMPS_STATIC;
  821. break;
  822. }
  823. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
  824. smps_mode = IEEE80211_SMPS_DYNAMIC;
  825. }
  826. ieee80211_request_smps(vif, smps_mode);
  827. }
  828. int iwl_mvm_request_statistics(struct iwl_mvm *mvm, bool clear)
  829. {
  830. struct iwl_statistics_cmd scmd = {
  831. .flags = clear ? cpu_to_le32(IWL_STATISTICS_FLG_CLEAR) : 0,
  832. };
  833. struct iwl_host_cmd cmd = {
  834. .id = STATISTICS_CMD,
  835. .len[0] = sizeof(scmd),
  836. .data[0] = &scmd,
  837. .flags = CMD_WANT_SKB,
  838. };
  839. int ret;
  840. ret = iwl_mvm_send_cmd(mvm, &cmd);
  841. if (ret)
  842. return ret;
  843. iwl_mvm_handle_rx_statistics(mvm, cmd.resp_pkt);
  844. iwl_free_resp(&cmd);
  845. if (clear)
  846. iwl_mvm_accu_radio_stats(mvm);
  847. return 0;
  848. }
  849. void iwl_mvm_accu_radio_stats(struct iwl_mvm *mvm)
  850. {
  851. mvm->accu_radio_stats.rx_time += mvm->radio_stats.rx_time;
  852. mvm->accu_radio_stats.tx_time += mvm->radio_stats.tx_time;
  853. mvm->accu_radio_stats.on_time_rf += mvm->radio_stats.on_time_rf;
  854. mvm->accu_radio_stats.on_time_scan += mvm->radio_stats.on_time_scan;
  855. }
  856. static void iwl_mvm_diversity_iter(void *_data, u8 *mac,
  857. struct ieee80211_vif *vif)
  858. {
  859. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  860. bool *result = _data;
  861. int i;
  862. for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
  863. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC ||
  864. mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
  865. *result = false;
  866. }
  867. }
  868. bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm)
  869. {
  870. bool result = true;
  871. lockdep_assert_held(&mvm->mutex);
  872. if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
  873. return false;
  874. if (mvm->cfg->rx_with_siso_diversity)
  875. return false;
  876. ieee80211_iterate_active_interfaces_atomic(
  877. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  878. iwl_mvm_diversity_iter, &result);
  879. return result;
  880. }
  881. int iwl_mvm_update_low_latency(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  882. bool prev)
  883. {
  884. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  885. int res;
  886. lockdep_assert_held(&mvm->mutex);
  887. if (iwl_mvm_vif_low_latency(mvmvif) == prev)
  888. return 0;
  889. res = iwl_mvm_update_quotas(mvm, false, NULL);
  890. if (res)
  891. return res;
  892. iwl_mvm_bt_coex_vif_change(mvm);
  893. return iwl_mvm_power_update_mac(mvm);
  894. }
  895. static void iwl_mvm_ll_iter(void *_data, u8 *mac, struct ieee80211_vif *vif)
  896. {
  897. bool *result = _data;
  898. if (iwl_mvm_vif_low_latency(iwl_mvm_vif_from_mac80211(vif)))
  899. *result = true;
  900. }
  901. bool iwl_mvm_low_latency(struct iwl_mvm *mvm)
  902. {
  903. bool result = false;
  904. ieee80211_iterate_active_interfaces_atomic(
  905. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  906. iwl_mvm_ll_iter, &result);
  907. return result;
  908. }
  909. struct iwl_bss_iter_data {
  910. struct ieee80211_vif *vif;
  911. bool error;
  912. };
  913. static void iwl_mvm_bss_iface_iterator(void *_data, u8 *mac,
  914. struct ieee80211_vif *vif)
  915. {
  916. struct iwl_bss_iter_data *data = _data;
  917. if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
  918. return;
  919. if (data->vif) {
  920. data->error = true;
  921. return;
  922. }
  923. data->vif = vif;
  924. }
  925. struct ieee80211_vif *iwl_mvm_get_bss_vif(struct iwl_mvm *mvm)
  926. {
  927. struct iwl_bss_iter_data bss_iter_data = {};
  928. ieee80211_iterate_active_interfaces_atomic(
  929. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  930. iwl_mvm_bss_iface_iterator, &bss_iter_data);
  931. if (bss_iter_data.error) {
  932. IWL_ERR(mvm, "More than one managed interface active!\n");
  933. return ERR_PTR(-EINVAL);
  934. }
  935. return bss_iter_data.vif;
  936. }
  937. struct iwl_sta_iter_data {
  938. bool assoc;
  939. };
  940. static void iwl_mvm_sta_iface_iterator(void *_data, u8 *mac,
  941. struct ieee80211_vif *vif)
  942. {
  943. struct iwl_sta_iter_data *data = _data;
  944. if (vif->type != NL80211_IFTYPE_STATION)
  945. return;
  946. if (vif->bss_conf.assoc)
  947. data->assoc = true;
  948. }
  949. bool iwl_mvm_is_vif_assoc(struct iwl_mvm *mvm)
  950. {
  951. struct iwl_sta_iter_data data = {
  952. .assoc = false,
  953. };
  954. ieee80211_iterate_active_interfaces_atomic(mvm->hw,
  955. IEEE80211_IFACE_ITER_NORMAL,
  956. iwl_mvm_sta_iface_iterator,
  957. &data);
  958. return data.assoc;
  959. }
  960. unsigned int iwl_mvm_get_wd_timeout(struct iwl_mvm *mvm,
  961. struct ieee80211_vif *vif,
  962. bool tdls, bool cmd_q)
  963. {
  964. struct iwl_fw_dbg_trigger_tlv *trigger;
  965. struct iwl_fw_dbg_trigger_txq_timer *txq_timer;
  966. unsigned int default_timeout =
  967. cmd_q ? IWL_DEF_WD_TIMEOUT : mvm->cfg->base_params->wd_timeout;
  968. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS)) {
  969. /*
  970. * We can't know when the station is asleep or awake, so we
  971. * must disable the queue hang detection.
  972. */
  973. if (fw_has_capa(&mvm->fw->ucode_capa,
  974. IWL_UCODE_TLV_CAPA_STA_PM_NOTIF) &&
  975. vif && vif->type == NL80211_IFTYPE_AP)
  976. return IWL_WATCHDOG_DISABLED;
  977. return iwlmvm_mod_params.tfd_q_hang_detect ?
  978. default_timeout : IWL_WATCHDOG_DISABLED;
  979. }
  980. trigger = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS);
  981. txq_timer = (void *)trigger->data;
  982. if (tdls)
  983. return le32_to_cpu(txq_timer->tdls);
  984. if (cmd_q)
  985. return le32_to_cpu(txq_timer->command_queue);
  986. if (WARN_ON(!vif))
  987. return default_timeout;
  988. switch (ieee80211_vif_type_p2p(vif)) {
  989. case NL80211_IFTYPE_ADHOC:
  990. return le32_to_cpu(txq_timer->ibss);
  991. case NL80211_IFTYPE_STATION:
  992. return le32_to_cpu(txq_timer->bss);
  993. case NL80211_IFTYPE_AP:
  994. return le32_to_cpu(txq_timer->softap);
  995. case NL80211_IFTYPE_P2P_CLIENT:
  996. return le32_to_cpu(txq_timer->p2p_client);
  997. case NL80211_IFTYPE_P2P_GO:
  998. return le32_to_cpu(txq_timer->p2p_go);
  999. case NL80211_IFTYPE_P2P_DEVICE:
  1000. return le32_to_cpu(txq_timer->p2p_device);
  1001. default:
  1002. WARN_ON(1);
  1003. return mvm->cfg->base_params->wd_timeout;
  1004. }
  1005. }
  1006. void iwl_mvm_connection_loss(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  1007. const char *errmsg)
  1008. {
  1009. struct iwl_fw_dbg_trigger_tlv *trig;
  1010. struct iwl_fw_dbg_trigger_mlme *trig_mlme;
  1011. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_MLME))
  1012. goto out;
  1013. trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_MLME);
  1014. trig_mlme = (void *)trig->data;
  1015. if (!iwl_fw_dbg_trigger_check_stop(&mvm->fwrt,
  1016. ieee80211_vif_to_wdev(vif), trig))
  1017. goto out;
  1018. if (trig_mlme->stop_connection_loss &&
  1019. --trig_mlme->stop_connection_loss)
  1020. goto out;
  1021. iwl_fw_dbg_collect_trig(&mvm->fwrt, trig, "%s", errmsg);
  1022. out:
  1023. ieee80211_connection_loss(vif);
  1024. }
  1025. /*
  1026. * Remove inactive TIDs of a given queue.
  1027. * If all queue TIDs are inactive - mark the queue as inactive
  1028. * If only some the queue TIDs are inactive - unmap them from the queue
  1029. */
  1030. static void iwl_mvm_remove_inactive_tids(struct iwl_mvm *mvm,
  1031. struct iwl_mvm_sta *mvmsta, int queue,
  1032. unsigned long tid_bitmap)
  1033. {
  1034. int tid;
  1035. lockdep_assert_held(&mvmsta->lock);
  1036. lockdep_assert_held(&mvm->queue_info_lock);
  1037. if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
  1038. return;
  1039. /* Go over all non-active TIDs, incl. IWL_MAX_TID_COUNT (for mgmt) */
  1040. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  1041. /* If some TFDs are still queued - don't mark TID as inactive */
  1042. if (iwl_mvm_tid_queued(mvm, &mvmsta->tid_data[tid]))
  1043. tid_bitmap &= ~BIT(tid);
  1044. /* Don't mark as inactive any TID that has an active BA */
  1045. if (mvmsta->tid_data[tid].state != IWL_AGG_OFF)
  1046. tid_bitmap &= ~BIT(tid);
  1047. }
  1048. /* If all TIDs in the queue are inactive - mark queue as inactive. */
  1049. if (tid_bitmap == mvm->queue_info[queue].tid_bitmap) {
  1050. mvm->queue_info[queue].status = IWL_MVM_QUEUE_INACTIVE;
  1051. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1)
  1052. mvmsta->tid_data[tid].is_tid_active = false;
  1053. IWL_DEBUG_TX_QUEUES(mvm, "Queue %d marked as inactive\n",
  1054. queue);
  1055. return;
  1056. }
  1057. /*
  1058. * If we are here, this is a shared queue and not all TIDs timed-out.
  1059. * Remove the ones that did.
  1060. */
  1061. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  1062. int mac_queue = mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]];
  1063. mvmsta->tid_data[tid].txq_id = IWL_MVM_INVALID_QUEUE;
  1064. mvm->hw_queue_to_mac80211[queue] &= ~BIT(mac_queue);
  1065. mvm->queue_info[queue].hw_queue_refcount--;
  1066. mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
  1067. mvmsta->tid_data[tid].is_tid_active = false;
  1068. IWL_DEBUG_TX_QUEUES(mvm,
  1069. "Removing inactive TID %d from shared Q:%d\n",
  1070. tid, queue);
  1071. }
  1072. IWL_DEBUG_TX_QUEUES(mvm,
  1073. "TXQ #%d left with tid bitmap 0x%x\n", queue,
  1074. mvm->queue_info[queue].tid_bitmap);
  1075. /*
  1076. * There may be different TIDs with the same mac queues, so make
  1077. * sure all TIDs have existing corresponding mac queues enabled
  1078. */
  1079. tid_bitmap = mvm->queue_info[queue].tid_bitmap;
  1080. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  1081. mvm->hw_queue_to_mac80211[queue] |=
  1082. BIT(mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]]);
  1083. }
  1084. /* If the queue is marked as shared - "unshare" it */
  1085. if (mvm->queue_info[queue].hw_queue_refcount == 1 &&
  1086. mvm->queue_info[queue].status == IWL_MVM_QUEUE_SHARED) {
  1087. mvm->queue_info[queue].status = IWL_MVM_QUEUE_RECONFIGURING;
  1088. IWL_DEBUG_TX_QUEUES(mvm, "Marking Q:%d for reconfig\n",
  1089. queue);
  1090. }
  1091. }
  1092. void iwl_mvm_inactivity_check(struct iwl_mvm *mvm)
  1093. {
  1094. unsigned long timeout_queues_map = 0;
  1095. unsigned long now = jiffies;
  1096. int i;
  1097. if (iwl_mvm_has_new_tx_api(mvm))
  1098. return;
  1099. spin_lock_bh(&mvm->queue_info_lock);
  1100. for (i = 0; i < IWL_MAX_HW_QUEUES; i++)
  1101. if (mvm->queue_info[i].hw_queue_refcount > 0)
  1102. timeout_queues_map |= BIT(i);
  1103. spin_unlock_bh(&mvm->queue_info_lock);
  1104. rcu_read_lock();
  1105. /*
  1106. * If a queue time outs - mark it as INACTIVE (don't remove right away
  1107. * if we don't have to.) This is an optimization in case traffic comes
  1108. * later, and we don't HAVE to use a currently-inactive queue
  1109. */
  1110. for_each_set_bit(i, &timeout_queues_map, IWL_MAX_HW_QUEUES) {
  1111. struct ieee80211_sta *sta;
  1112. struct iwl_mvm_sta *mvmsta;
  1113. u8 sta_id;
  1114. int tid;
  1115. unsigned long inactive_tid_bitmap = 0;
  1116. unsigned long queue_tid_bitmap;
  1117. spin_lock_bh(&mvm->queue_info_lock);
  1118. queue_tid_bitmap = mvm->queue_info[i].tid_bitmap;
  1119. /* If TXQ isn't in active use anyway - nothing to do here... */
  1120. if (mvm->queue_info[i].status != IWL_MVM_QUEUE_READY &&
  1121. mvm->queue_info[i].status != IWL_MVM_QUEUE_SHARED) {
  1122. spin_unlock_bh(&mvm->queue_info_lock);
  1123. continue;
  1124. }
  1125. /* Check to see if there are inactive TIDs on this queue */
  1126. for_each_set_bit(tid, &queue_tid_bitmap,
  1127. IWL_MAX_TID_COUNT + 1) {
  1128. if (time_after(mvm->queue_info[i].last_frame_time[tid] +
  1129. IWL_MVM_DQA_QUEUE_TIMEOUT, now))
  1130. continue;
  1131. inactive_tid_bitmap |= BIT(tid);
  1132. }
  1133. spin_unlock_bh(&mvm->queue_info_lock);
  1134. /* If all TIDs are active - finish check on this queue */
  1135. if (!inactive_tid_bitmap)
  1136. continue;
  1137. /*
  1138. * If we are here - the queue hadn't been served recently and is
  1139. * in use
  1140. */
  1141. sta_id = mvm->queue_info[i].ra_sta_id;
  1142. sta = rcu_dereference(mvm->fw_id_to_mac_id[sta_id]);
  1143. /*
  1144. * If the STA doesn't exist anymore, it isn't an error. It could
  1145. * be that it was removed since getting the queues, and in this
  1146. * case it should've inactivated its queues anyway.
  1147. */
  1148. if (IS_ERR_OR_NULL(sta))
  1149. continue;
  1150. mvmsta = iwl_mvm_sta_from_mac80211(sta);
  1151. spin_lock_bh(&mvmsta->lock);
  1152. spin_lock(&mvm->queue_info_lock);
  1153. iwl_mvm_remove_inactive_tids(mvm, mvmsta, i,
  1154. inactive_tid_bitmap);
  1155. spin_unlock(&mvm->queue_info_lock);
  1156. spin_unlock_bh(&mvmsta->lock);
  1157. }
  1158. rcu_read_unlock();
  1159. }
  1160. void iwl_mvm_event_frame_timeout_callback(struct iwl_mvm *mvm,
  1161. struct ieee80211_vif *vif,
  1162. const struct ieee80211_sta *sta,
  1163. u16 tid)
  1164. {
  1165. struct iwl_fw_dbg_trigger_tlv *trig;
  1166. struct iwl_fw_dbg_trigger_ba *ba_trig;
  1167. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_BA))
  1168. return;
  1169. trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_BA);
  1170. ba_trig = (void *)trig->data;
  1171. if (!iwl_fw_dbg_trigger_check_stop(&mvm->fwrt,
  1172. ieee80211_vif_to_wdev(vif), trig))
  1173. return;
  1174. if (!(le16_to_cpu(ba_trig->frame_timeout) & BIT(tid)))
  1175. return;
  1176. iwl_fw_dbg_collect_trig(&mvm->fwrt, trig,
  1177. "Frame from %pM timed out, tid %d",
  1178. sta->addr, tid);
  1179. }
  1180. void iwl_mvm_get_sync_time(struct iwl_mvm *mvm, u32 *gp2, u64 *boottime)
  1181. {
  1182. bool ps_disabled;
  1183. lockdep_assert_held(&mvm->mutex);
  1184. /* Disable power save when reading GP2 */
  1185. ps_disabled = mvm->ps_disabled;
  1186. if (!ps_disabled) {
  1187. mvm->ps_disabled = true;
  1188. iwl_mvm_power_update_device(mvm);
  1189. }
  1190. *gp2 = iwl_read_prph(mvm->trans, DEVICE_SYSTEM_TIME_REG);
  1191. *boottime = ktime_get_boot_ns();
  1192. if (!ps_disabled) {
  1193. mvm->ps_disabled = ps_disabled;
  1194. iwl_mvm_power_update_device(mvm);
  1195. }
  1196. }