patch_hdmi.c 94 KB

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  1. /*
  2. *
  3. * patch_hdmi.c - routines for HDMI/DisplayPort codecs
  4. *
  5. * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
  6. * Copyright (c) 2006 ATI Technologies Inc.
  7. * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
  8. * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  9. * Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  10. *
  11. * Authors:
  12. * Wu Fengguang <wfg@linux.intel.com>
  13. *
  14. * Maintained by:
  15. * Wu Fengguang <wfg@linux.intel.com>
  16. *
  17. * This program is free software; you can redistribute it and/or modify it
  18. * under the terms of the GNU General Public License as published by the Free
  19. * Software Foundation; either version 2 of the License, or (at your option)
  20. * any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful, but
  23. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  24. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  25. * for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software Foundation,
  29. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  30. */
  31. #include <linux/init.h>
  32. #include <linux/delay.h>
  33. #include <linux/slab.h>
  34. #include <linux/module.h>
  35. #include <sound/core.h>
  36. #include <sound/jack.h>
  37. #include <sound/asoundef.h>
  38. #include <sound/tlv.h>
  39. #include "hda_codec.h"
  40. #include "hda_local.h"
  41. #include "hda_jack.h"
  42. static bool static_hdmi_pcm;
  43. module_param(static_hdmi_pcm, bool, 0644);
  44. MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  45. #define is_haswell(codec) ((codec)->vendor_id == 0x80862807)
  46. #define is_broadwell(codec) ((codec)->vendor_id == 0x80862808)
  47. #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec))
  48. #define is_valleyview(codec) ((codec)->vendor_id == 0x80862882)
  49. struct hdmi_spec_per_cvt {
  50. hda_nid_t cvt_nid;
  51. int assigned;
  52. unsigned int channels_min;
  53. unsigned int channels_max;
  54. u32 rates;
  55. u64 formats;
  56. unsigned int maxbps;
  57. };
  58. /* max. connections to a widget */
  59. #define HDA_MAX_CONNECTIONS 32
  60. struct hdmi_spec_per_pin {
  61. hda_nid_t pin_nid;
  62. int num_mux_nids;
  63. hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  64. hda_nid_t cvt_nid;
  65. struct hda_codec *codec;
  66. struct hdmi_eld sink_eld;
  67. struct mutex lock;
  68. struct delayed_work work;
  69. struct snd_kcontrol *eld_ctl;
  70. int repoll_count;
  71. bool setup; /* the stream has been set up by prepare callback */
  72. int channels; /* current number of channels */
  73. bool non_pcm;
  74. bool chmap_set; /* channel-map override by ALSA API? */
  75. unsigned char chmap[8]; /* ALSA API channel-map */
  76. char pcm_name[8]; /* filled in build_pcm callbacks */
  77. #ifdef CONFIG_PROC_FS
  78. struct snd_info_entry *proc_entry;
  79. #endif
  80. };
  81. struct cea_channel_speaker_allocation;
  82. /* operations used by generic code that can be overridden by patches */
  83. struct hdmi_ops {
  84. int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
  85. unsigned char *buf, int *eld_size);
  86. /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
  87. int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
  88. int asp_slot);
  89. int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
  90. int asp_slot, int channel);
  91. void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
  92. int ca, int active_channels, int conn_type);
  93. /* enable/disable HBR (HD passthrough) */
  94. int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
  95. int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
  96. hda_nid_t pin_nid, u32 stream_tag, int format);
  97. /* Helpers for producing the channel map TLVs. These can be overridden
  98. * for devices that have non-standard mapping requirements. */
  99. int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap,
  100. int channels);
  101. void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap,
  102. unsigned int *chmap, int channels);
  103. /* check that the user-given chmap is supported */
  104. int (*chmap_validate)(int ca, int channels, unsigned char *chmap);
  105. };
  106. struct hdmi_spec {
  107. int num_cvts;
  108. struct snd_array cvts; /* struct hdmi_spec_per_cvt */
  109. hda_nid_t cvt_nids[4]; /* only for haswell fix */
  110. int num_pins;
  111. struct snd_array pins; /* struct hdmi_spec_per_pin */
  112. struct snd_array pcm_rec; /* struct hda_pcm */
  113. unsigned int channels_max; /* max over all cvts */
  114. struct hdmi_eld temp_eld;
  115. struct hdmi_ops ops;
  116. bool dyn_pin_out;
  117. /*
  118. * Non-generic VIA/NVIDIA specific
  119. */
  120. struct hda_multi_out multiout;
  121. struct hda_pcm_stream pcm_playback;
  122. };
  123. struct hdmi_audio_infoframe {
  124. u8 type; /* 0x84 */
  125. u8 ver; /* 0x01 */
  126. u8 len; /* 0x0a */
  127. u8 checksum;
  128. u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
  129. u8 SS01_SF24;
  130. u8 CXT04;
  131. u8 CA;
  132. u8 LFEPBL01_LSV36_DM_INH7;
  133. };
  134. struct dp_audio_infoframe {
  135. u8 type; /* 0x84 */
  136. u8 len; /* 0x1b */
  137. u8 ver; /* 0x11 << 2 */
  138. u8 CC02_CT47; /* match with HDMI infoframe from this on */
  139. u8 SS01_SF24;
  140. u8 CXT04;
  141. u8 CA;
  142. u8 LFEPBL01_LSV36_DM_INH7;
  143. };
  144. union audio_infoframe {
  145. struct hdmi_audio_infoframe hdmi;
  146. struct dp_audio_infoframe dp;
  147. u8 bytes[0];
  148. };
  149. /*
  150. * CEA speaker placement:
  151. *
  152. * FLH FCH FRH
  153. * FLW FL FLC FC FRC FR FRW
  154. *
  155. * LFE
  156. * TC
  157. *
  158. * RL RLC RC RRC RR
  159. *
  160. * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
  161. * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
  162. */
  163. enum cea_speaker_placement {
  164. FL = (1 << 0), /* Front Left */
  165. FC = (1 << 1), /* Front Center */
  166. FR = (1 << 2), /* Front Right */
  167. FLC = (1 << 3), /* Front Left Center */
  168. FRC = (1 << 4), /* Front Right Center */
  169. RL = (1 << 5), /* Rear Left */
  170. RC = (1 << 6), /* Rear Center */
  171. RR = (1 << 7), /* Rear Right */
  172. RLC = (1 << 8), /* Rear Left Center */
  173. RRC = (1 << 9), /* Rear Right Center */
  174. LFE = (1 << 10), /* Low Frequency Effect */
  175. FLW = (1 << 11), /* Front Left Wide */
  176. FRW = (1 << 12), /* Front Right Wide */
  177. FLH = (1 << 13), /* Front Left High */
  178. FCH = (1 << 14), /* Front Center High */
  179. FRH = (1 << 15), /* Front Right High */
  180. TC = (1 << 16), /* Top Center */
  181. };
  182. /*
  183. * ELD SA bits in the CEA Speaker Allocation data block
  184. */
  185. static int eld_speaker_allocation_bits[] = {
  186. [0] = FL | FR,
  187. [1] = LFE,
  188. [2] = FC,
  189. [3] = RL | RR,
  190. [4] = RC,
  191. [5] = FLC | FRC,
  192. [6] = RLC | RRC,
  193. /* the following are not defined in ELD yet */
  194. [7] = FLW | FRW,
  195. [8] = FLH | FRH,
  196. [9] = TC,
  197. [10] = FCH,
  198. };
  199. struct cea_channel_speaker_allocation {
  200. int ca_index;
  201. int speakers[8];
  202. /* derived values, just for convenience */
  203. int channels;
  204. int spk_mask;
  205. };
  206. /*
  207. * ALSA sequence is:
  208. *
  209. * surround40 surround41 surround50 surround51 surround71
  210. * ch0 front left = = = =
  211. * ch1 front right = = = =
  212. * ch2 rear left = = = =
  213. * ch3 rear right = = = =
  214. * ch4 LFE center center center
  215. * ch5 LFE LFE
  216. * ch6 side left
  217. * ch7 side right
  218. *
  219. * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
  220. */
  221. static int hdmi_channel_mapping[0x32][8] = {
  222. /* stereo */
  223. [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  224. /* 2.1 */
  225. [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  226. /* Dolby Surround */
  227. [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
  228. /* surround40 */
  229. [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
  230. /* 4ch */
  231. [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
  232. /* surround41 */
  233. [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
  234. /* surround50 */
  235. [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
  236. /* surround51 */
  237. [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
  238. /* 7.1 */
  239. [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
  240. };
  241. /*
  242. * This is an ordered list!
  243. *
  244. * The preceding ones have better chances to be selected by
  245. * hdmi_channel_allocation().
  246. */
  247. static struct cea_channel_speaker_allocation channel_allocations[] = {
  248. /* channel: 7 6 5 4 3 2 1 0 */
  249. { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
  250. /* 2.1 */
  251. { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
  252. /* Dolby Surround */
  253. { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
  254. /* surround40 */
  255. { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
  256. /* surround41 */
  257. { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
  258. /* surround50 */
  259. { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
  260. /* surround51 */
  261. { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
  262. /* 6.1 */
  263. { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
  264. /* surround71 */
  265. { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
  266. { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
  267. { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
  268. { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
  269. { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
  270. { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
  271. { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
  272. { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
  273. { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
  274. { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
  275. { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
  276. { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
  277. { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
  278. { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
  279. { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
  280. { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
  281. { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
  282. { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
  283. { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
  284. { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
  285. { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
  286. { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
  287. { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
  288. { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
  289. { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
  290. { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
  291. { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
  292. { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
  293. { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
  294. { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
  295. { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
  296. { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
  297. { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
  298. { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
  299. { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
  300. { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
  301. { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
  302. { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
  303. { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
  304. { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
  305. { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
  306. { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
  307. };
  308. /*
  309. * HDMI routines
  310. */
  311. #define get_pin(spec, idx) \
  312. ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
  313. #define get_cvt(spec, idx) \
  314. ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
  315. #define get_pcm_rec(spec, idx) \
  316. ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
  317. static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
  318. {
  319. int pin_idx;
  320. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  321. if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
  322. return pin_idx;
  323. snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
  324. return -EINVAL;
  325. }
  326. static int hinfo_to_pin_index(struct hdmi_spec *spec,
  327. struct hda_pcm_stream *hinfo)
  328. {
  329. int pin_idx;
  330. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  331. if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
  332. return pin_idx;
  333. snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
  334. return -EINVAL;
  335. }
  336. static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
  337. {
  338. int cvt_idx;
  339. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
  340. if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
  341. return cvt_idx;
  342. snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
  343. return -EINVAL;
  344. }
  345. static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
  346. struct snd_ctl_elem_info *uinfo)
  347. {
  348. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  349. struct hdmi_spec *spec = codec->spec;
  350. struct hdmi_spec_per_pin *per_pin;
  351. struct hdmi_eld *eld;
  352. int pin_idx;
  353. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  354. pin_idx = kcontrol->private_value;
  355. per_pin = get_pin(spec, pin_idx);
  356. eld = &per_pin->sink_eld;
  357. mutex_lock(&per_pin->lock);
  358. uinfo->count = eld->eld_valid ? eld->eld_size : 0;
  359. mutex_unlock(&per_pin->lock);
  360. return 0;
  361. }
  362. static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
  363. struct snd_ctl_elem_value *ucontrol)
  364. {
  365. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  366. struct hdmi_spec *spec = codec->spec;
  367. struct hdmi_spec_per_pin *per_pin;
  368. struct hdmi_eld *eld;
  369. int pin_idx;
  370. pin_idx = kcontrol->private_value;
  371. per_pin = get_pin(spec, pin_idx);
  372. eld = &per_pin->sink_eld;
  373. mutex_lock(&per_pin->lock);
  374. if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
  375. mutex_unlock(&per_pin->lock);
  376. snd_BUG();
  377. return -EINVAL;
  378. }
  379. memset(ucontrol->value.bytes.data, 0,
  380. ARRAY_SIZE(ucontrol->value.bytes.data));
  381. if (eld->eld_valid)
  382. memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
  383. eld->eld_size);
  384. mutex_unlock(&per_pin->lock);
  385. return 0;
  386. }
  387. static struct snd_kcontrol_new eld_bytes_ctl = {
  388. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  389. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  390. .name = "ELD",
  391. .info = hdmi_eld_ctl_info,
  392. .get = hdmi_eld_ctl_get,
  393. };
  394. static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
  395. int device)
  396. {
  397. struct snd_kcontrol *kctl;
  398. struct hdmi_spec *spec = codec->spec;
  399. int err;
  400. kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
  401. if (!kctl)
  402. return -ENOMEM;
  403. kctl->private_value = pin_idx;
  404. kctl->id.device = device;
  405. err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
  406. if (err < 0)
  407. return err;
  408. get_pin(spec, pin_idx)->eld_ctl = kctl;
  409. return 0;
  410. }
  411. #ifdef BE_PARANOID
  412. static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  413. int *packet_index, int *byte_index)
  414. {
  415. int val;
  416. val = snd_hda_codec_read(codec, pin_nid, 0,
  417. AC_VERB_GET_HDMI_DIP_INDEX, 0);
  418. *packet_index = val >> 5;
  419. *byte_index = val & 0x1f;
  420. }
  421. #endif
  422. static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  423. int packet_index, int byte_index)
  424. {
  425. int val;
  426. val = (packet_index << 5) | (byte_index & 0x1f);
  427. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
  428. }
  429. static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
  430. unsigned char val)
  431. {
  432. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
  433. }
  434. static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  435. {
  436. struct hdmi_spec *spec = codec->spec;
  437. int pin_out;
  438. /* Unmute */
  439. if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
  440. snd_hda_codec_write(codec, pin_nid, 0,
  441. AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
  442. if (spec->dyn_pin_out)
  443. /* Disable pin out until stream is active */
  444. pin_out = 0;
  445. else
  446. /* Enable pin out: some machines with GM965 gets broken output
  447. * when the pin is disabled or changed while using with HDMI
  448. */
  449. pin_out = PIN_OUT;
  450. snd_hda_codec_write(codec, pin_nid, 0,
  451. AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
  452. }
  453. static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
  454. {
  455. return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
  456. AC_VERB_GET_CVT_CHAN_COUNT, 0);
  457. }
  458. static void hdmi_set_channel_count(struct hda_codec *codec,
  459. hda_nid_t cvt_nid, int chs)
  460. {
  461. if (chs != hdmi_get_channel_count(codec, cvt_nid))
  462. snd_hda_codec_write(codec, cvt_nid, 0,
  463. AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
  464. }
  465. /*
  466. * ELD proc files
  467. */
  468. #ifdef CONFIG_PROC_FS
  469. static void print_eld_info(struct snd_info_entry *entry,
  470. struct snd_info_buffer *buffer)
  471. {
  472. struct hdmi_spec_per_pin *per_pin = entry->private_data;
  473. mutex_lock(&per_pin->lock);
  474. snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
  475. mutex_unlock(&per_pin->lock);
  476. }
  477. static void write_eld_info(struct snd_info_entry *entry,
  478. struct snd_info_buffer *buffer)
  479. {
  480. struct hdmi_spec_per_pin *per_pin = entry->private_data;
  481. mutex_lock(&per_pin->lock);
  482. snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
  483. mutex_unlock(&per_pin->lock);
  484. }
  485. static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
  486. {
  487. char name[32];
  488. struct hda_codec *codec = per_pin->codec;
  489. struct snd_info_entry *entry;
  490. int err;
  491. snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
  492. err = snd_card_proc_new(codec->bus->card, name, &entry);
  493. if (err < 0)
  494. return err;
  495. snd_info_set_text_ops(entry, per_pin, print_eld_info);
  496. entry->c.text.write = write_eld_info;
  497. entry->mode |= S_IWUSR;
  498. per_pin->proc_entry = entry;
  499. return 0;
  500. }
  501. static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
  502. {
  503. if (!per_pin->codec->bus->shutdown && per_pin->proc_entry) {
  504. snd_device_free(per_pin->codec->bus->card, per_pin->proc_entry);
  505. per_pin->proc_entry = NULL;
  506. }
  507. }
  508. #else
  509. static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
  510. int index)
  511. {
  512. return 0;
  513. }
  514. static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
  515. {
  516. }
  517. #endif
  518. /*
  519. * Channel mapping routines
  520. */
  521. /*
  522. * Compute derived values in channel_allocations[].
  523. */
  524. static void init_channel_allocations(void)
  525. {
  526. int i, j;
  527. struct cea_channel_speaker_allocation *p;
  528. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  529. p = channel_allocations + i;
  530. p->channels = 0;
  531. p->spk_mask = 0;
  532. for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
  533. if (p->speakers[j]) {
  534. p->channels++;
  535. p->spk_mask |= p->speakers[j];
  536. }
  537. }
  538. }
  539. static int get_channel_allocation_order(int ca)
  540. {
  541. int i;
  542. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  543. if (channel_allocations[i].ca_index == ca)
  544. break;
  545. }
  546. return i;
  547. }
  548. /*
  549. * The transformation takes two steps:
  550. *
  551. * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
  552. * spk_mask => (channel_allocations[]) => ai->CA
  553. *
  554. * TODO: it could select the wrong CA from multiple candidates.
  555. */
  556. static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
  557. {
  558. int i;
  559. int ca = 0;
  560. int spk_mask = 0;
  561. char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
  562. /*
  563. * CA defaults to 0 for basic stereo audio
  564. */
  565. if (channels <= 2)
  566. return 0;
  567. /*
  568. * expand ELD's speaker allocation mask
  569. *
  570. * ELD tells the speaker mask in a compact(paired) form,
  571. * expand ELD's notions to match the ones used by Audio InfoFrame.
  572. */
  573. for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
  574. if (eld->info.spk_alloc & (1 << i))
  575. spk_mask |= eld_speaker_allocation_bits[i];
  576. }
  577. /* search for the first working match in the CA table */
  578. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  579. if (channels == channel_allocations[i].channels &&
  580. (spk_mask & channel_allocations[i].spk_mask) ==
  581. channel_allocations[i].spk_mask) {
  582. ca = channel_allocations[i].ca_index;
  583. break;
  584. }
  585. }
  586. if (!ca) {
  587. /* if there was no match, select the regular ALSA channel
  588. * allocation with the matching number of channels */
  589. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  590. if (channels == channel_allocations[i].channels) {
  591. ca = channel_allocations[i].ca_index;
  592. break;
  593. }
  594. }
  595. }
  596. snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
  597. snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
  598. ca, channels, buf);
  599. return ca;
  600. }
  601. static void hdmi_debug_channel_mapping(struct hda_codec *codec,
  602. hda_nid_t pin_nid)
  603. {
  604. #ifdef CONFIG_SND_DEBUG_VERBOSE
  605. struct hdmi_spec *spec = codec->spec;
  606. int i;
  607. int channel;
  608. for (i = 0; i < 8; i++) {
  609. channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i);
  610. printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
  611. channel, i);
  612. }
  613. #endif
  614. }
  615. static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
  616. hda_nid_t pin_nid,
  617. bool non_pcm,
  618. int ca)
  619. {
  620. struct hdmi_spec *spec = codec->spec;
  621. struct cea_channel_speaker_allocation *ch_alloc;
  622. int i;
  623. int err;
  624. int order;
  625. int non_pcm_mapping[8];
  626. order = get_channel_allocation_order(ca);
  627. ch_alloc = &channel_allocations[order];
  628. if (hdmi_channel_mapping[ca][1] == 0) {
  629. int hdmi_slot = 0;
  630. /* fill actual channel mappings in ALSA channel (i) order */
  631. for (i = 0; i < ch_alloc->channels; i++) {
  632. while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
  633. hdmi_slot++; /* skip zero slots */
  634. hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
  635. }
  636. /* fill the rest of the slots with ALSA channel 0xf */
  637. for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
  638. if (!ch_alloc->speakers[7 - hdmi_slot])
  639. hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
  640. }
  641. if (non_pcm) {
  642. for (i = 0; i < ch_alloc->channels; i++)
  643. non_pcm_mapping[i] = (i << 4) | i;
  644. for (; i < 8; i++)
  645. non_pcm_mapping[i] = (0xf << 4) | i;
  646. }
  647. for (i = 0; i < 8; i++) {
  648. int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i];
  649. int hdmi_slot = slotsetup & 0x0f;
  650. int channel = (slotsetup & 0xf0) >> 4;
  651. err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel);
  652. if (err) {
  653. snd_printdd(KERN_NOTICE
  654. "HDMI: channel mapping failed\n");
  655. break;
  656. }
  657. }
  658. }
  659. struct channel_map_table {
  660. unsigned char map; /* ALSA API channel map position */
  661. int spk_mask; /* speaker position bit mask */
  662. };
  663. static struct channel_map_table map_tables[] = {
  664. { SNDRV_CHMAP_FL, FL },
  665. { SNDRV_CHMAP_FR, FR },
  666. { SNDRV_CHMAP_RL, RL },
  667. { SNDRV_CHMAP_RR, RR },
  668. { SNDRV_CHMAP_LFE, LFE },
  669. { SNDRV_CHMAP_FC, FC },
  670. { SNDRV_CHMAP_RLC, RLC },
  671. { SNDRV_CHMAP_RRC, RRC },
  672. { SNDRV_CHMAP_RC, RC },
  673. { SNDRV_CHMAP_FLC, FLC },
  674. { SNDRV_CHMAP_FRC, FRC },
  675. { SNDRV_CHMAP_TFL, FLH },
  676. { SNDRV_CHMAP_TFR, FRH },
  677. { SNDRV_CHMAP_FLW, FLW },
  678. { SNDRV_CHMAP_FRW, FRW },
  679. { SNDRV_CHMAP_TC, TC },
  680. { SNDRV_CHMAP_TFC, FCH },
  681. {} /* terminator */
  682. };
  683. /* from ALSA API channel position to speaker bit mask */
  684. static int to_spk_mask(unsigned char c)
  685. {
  686. struct channel_map_table *t = map_tables;
  687. for (; t->map; t++) {
  688. if (t->map == c)
  689. return t->spk_mask;
  690. }
  691. return 0;
  692. }
  693. /* from ALSA API channel position to CEA slot */
  694. static int to_cea_slot(int ordered_ca, unsigned char pos)
  695. {
  696. int mask = to_spk_mask(pos);
  697. int i;
  698. if (mask) {
  699. for (i = 0; i < 8; i++) {
  700. if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
  701. return i;
  702. }
  703. }
  704. return -1;
  705. }
  706. /* from speaker bit mask to ALSA API channel position */
  707. static int spk_to_chmap(int spk)
  708. {
  709. struct channel_map_table *t = map_tables;
  710. for (; t->map; t++) {
  711. if (t->spk_mask == spk)
  712. return t->map;
  713. }
  714. return 0;
  715. }
  716. /* from CEA slot to ALSA API channel position */
  717. static int from_cea_slot(int ordered_ca, unsigned char slot)
  718. {
  719. int mask = channel_allocations[ordered_ca].speakers[7 - slot];
  720. return spk_to_chmap(mask);
  721. }
  722. /* get the CA index corresponding to the given ALSA API channel map */
  723. static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
  724. {
  725. int i, spks = 0, spk_mask = 0;
  726. for (i = 0; i < chs; i++) {
  727. int mask = to_spk_mask(map[i]);
  728. if (mask) {
  729. spk_mask |= mask;
  730. spks++;
  731. }
  732. }
  733. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  734. if ((chs == channel_allocations[i].channels ||
  735. spks == channel_allocations[i].channels) &&
  736. (spk_mask & channel_allocations[i].spk_mask) ==
  737. channel_allocations[i].spk_mask)
  738. return channel_allocations[i].ca_index;
  739. }
  740. return -1;
  741. }
  742. /* set up the channel slots for the given ALSA API channel map */
  743. static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
  744. hda_nid_t pin_nid,
  745. int chs, unsigned char *map,
  746. int ca)
  747. {
  748. struct hdmi_spec *spec = codec->spec;
  749. int ordered_ca = get_channel_allocation_order(ca);
  750. int alsa_pos, hdmi_slot;
  751. int assignments[8] = {[0 ... 7] = 0xf};
  752. for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
  753. hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
  754. if (hdmi_slot < 0)
  755. continue; /* unassigned channel */
  756. assignments[hdmi_slot] = alsa_pos;
  757. }
  758. for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
  759. int err;
  760. err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot,
  761. assignments[hdmi_slot]);
  762. if (err)
  763. return -EINVAL;
  764. }
  765. return 0;
  766. }
  767. /* store ALSA API channel map from the current default map */
  768. static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
  769. {
  770. int i;
  771. int ordered_ca = get_channel_allocation_order(ca);
  772. for (i = 0; i < 8; i++) {
  773. if (i < channel_allocations[ordered_ca].channels)
  774. map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
  775. else
  776. map[i] = 0;
  777. }
  778. }
  779. static void hdmi_setup_channel_mapping(struct hda_codec *codec,
  780. hda_nid_t pin_nid, bool non_pcm, int ca,
  781. int channels, unsigned char *map,
  782. bool chmap_set)
  783. {
  784. if (!non_pcm && chmap_set) {
  785. hdmi_manual_setup_channel_mapping(codec, pin_nid,
  786. channels, map, ca);
  787. } else {
  788. hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
  789. hdmi_setup_fake_chmap(map, ca);
  790. }
  791. hdmi_debug_channel_mapping(codec, pin_nid);
  792. }
  793. static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
  794. int asp_slot, int channel)
  795. {
  796. return snd_hda_codec_write(codec, pin_nid, 0,
  797. AC_VERB_SET_HDMI_CHAN_SLOT,
  798. (channel << 4) | asp_slot);
  799. }
  800. static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
  801. int asp_slot)
  802. {
  803. return (snd_hda_codec_read(codec, pin_nid, 0,
  804. AC_VERB_GET_HDMI_CHAN_SLOT,
  805. asp_slot) & 0xf0) >> 4;
  806. }
  807. /*
  808. * Audio InfoFrame routines
  809. */
  810. /*
  811. * Enable Audio InfoFrame Transmission
  812. */
  813. static void hdmi_start_infoframe_trans(struct hda_codec *codec,
  814. hda_nid_t pin_nid)
  815. {
  816. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  817. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  818. AC_DIPXMIT_BEST);
  819. }
  820. /*
  821. * Disable Audio InfoFrame Transmission
  822. */
  823. static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
  824. hda_nid_t pin_nid)
  825. {
  826. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  827. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  828. AC_DIPXMIT_DISABLE);
  829. }
  830. static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
  831. {
  832. #ifdef CONFIG_SND_DEBUG_VERBOSE
  833. int i;
  834. int size;
  835. size = snd_hdmi_get_eld_size(codec, pin_nid);
  836. printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
  837. for (i = 0; i < 8; i++) {
  838. size = snd_hda_codec_read(codec, pin_nid, 0,
  839. AC_VERB_GET_HDMI_DIP_SIZE, i);
  840. printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
  841. }
  842. #endif
  843. }
  844. static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
  845. {
  846. #ifdef BE_PARANOID
  847. int i, j;
  848. int size;
  849. int pi, bi;
  850. for (i = 0; i < 8; i++) {
  851. size = snd_hda_codec_read(codec, pin_nid, 0,
  852. AC_VERB_GET_HDMI_DIP_SIZE, i);
  853. if (size == 0)
  854. continue;
  855. hdmi_set_dip_index(codec, pin_nid, i, 0x0);
  856. for (j = 1; j < 1000; j++) {
  857. hdmi_write_dip_byte(codec, pin_nid, 0x0);
  858. hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
  859. if (pi != i)
  860. snd_printd(KERN_INFO "dip index %d: %d != %d\n",
  861. bi, pi, i);
  862. if (bi == 0) /* byte index wrapped around */
  863. break;
  864. }
  865. snd_printd(KERN_INFO
  866. "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
  867. i, size, j);
  868. }
  869. #endif
  870. }
  871. static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
  872. {
  873. u8 *bytes = (u8 *)hdmi_ai;
  874. u8 sum = 0;
  875. int i;
  876. hdmi_ai->checksum = 0;
  877. for (i = 0; i < sizeof(*hdmi_ai); i++)
  878. sum += bytes[i];
  879. hdmi_ai->checksum = -sum;
  880. }
  881. static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
  882. hda_nid_t pin_nid,
  883. u8 *dip, int size)
  884. {
  885. int i;
  886. hdmi_debug_dip_size(codec, pin_nid);
  887. hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
  888. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  889. for (i = 0; i < size; i++)
  890. hdmi_write_dip_byte(codec, pin_nid, dip[i]);
  891. }
  892. static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
  893. u8 *dip, int size)
  894. {
  895. u8 val;
  896. int i;
  897. if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
  898. != AC_DIPXMIT_BEST)
  899. return false;
  900. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  901. for (i = 0; i < size; i++) {
  902. val = snd_hda_codec_read(codec, pin_nid, 0,
  903. AC_VERB_GET_HDMI_DIP_DATA, 0);
  904. if (val != dip[i])
  905. return false;
  906. }
  907. return true;
  908. }
  909. static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
  910. hda_nid_t pin_nid,
  911. int ca, int active_channels,
  912. int conn_type)
  913. {
  914. union audio_infoframe ai;
  915. if (conn_type == 0) { /* HDMI */
  916. struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
  917. hdmi_ai->type = 0x84;
  918. hdmi_ai->ver = 0x01;
  919. hdmi_ai->len = 0x0a;
  920. hdmi_ai->CC02_CT47 = active_channels - 1;
  921. hdmi_ai->CA = ca;
  922. hdmi_checksum_audio_infoframe(hdmi_ai);
  923. } else if (conn_type == 1) { /* DisplayPort */
  924. struct dp_audio_infoframe *dp_ai = &ai.dp;
  925. dp_ai->type = 0x84;
  926. dp_ai->len = 0x1b;
  927. dp_ai->ver = 0x11 << 2;
  928. dp_ai->CC02_CT47 = active_channels - 1;
  929. dp_ai->CA = ca;
  930. } else {
  931. snd_printd("HDMI: unknown connection type at pin %d\n",
  932. pin_nid);
  933. return;
  934. }
  935. /*
  936. * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
  937. * sizeof(*dp_ai) to avoid partial match/update problems when
  938. * the user switches between HDMI/DP monitors.
  939. */
  940. if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
  941. sizeof(ai))) {
  942. snd_printdd("hdmi_pin_setup_infoframe: "
  943. "pin=%d channels=%d ca=0x%02x\n",
  944. pin_nid,
  945. active_channels, ca);
  946. hdmi_stop_infoframe_trans(codec, pin_nid);
  947. hdmi_fill_audio_infoframe(codec, pin_nid,
  948. ai.bytes, sizeof(ai));
  949. hdmi_start_infoframe_trans(codec, pin_nid);
  950. }
  951. }
  952. static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
  953. struct hdmi_spec_per_pin *per_pin,
  954. bool non_pcm)
  955. {
  956. struct hdmi_spec *spec = codec->spec;
  957. hda_nid_t pin_nid = per_pin->pin_nid;
  958. int channels = per_pin->channels;
  959. int active_channels;
  960. struct hdmi_eld *eld;
  961. int ca, ordered_ca;
  962. if (!channels)
  963. return;
  964. if (is_haswell_plus(codec))
  965. snd_hda_codec_write(codec, pin_nid, 0,
  966. AC_VERB_SET_AMP_GAIN_MUTE,
  967. AMP_OUT_UNMUTE);
  968. eld = &per_pin->sink_eld;
  969. if (!eld->monitor_present)
  970. return;
  971. if (!non_pcm && per_pin->chmap_set)
  972. ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
  973. else
  974. ca = hdmi_channel_allocation(eld, channels);
  975. if (ca < 0)
  976. ca = 0;
  977. ordered_ca = get_channel_allocation_order(ca);
  978. active_channels = channel_allocations[ordered_ca].channels;
  979. hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
  980. /*
  981. * always configure channel mapping, it may have been changed by the
  982. * user in the meantime
  983. */
  984. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  985. channels, per_pin->chmap,
  986. per_pin->chmap_set);
  987. spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
  988. eld->info.conn_type);
  989. per_pin->non_pcm = non_pcm;
  990. }
  991. /*
  992. * Unsolicited events
  993. */
  994. static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
  995. static void jack_callback(struct hda_codec *codec, struct hda_jack_tbl *jack)
  996. {
  997. struct hdmi_spec *spec = codec->spec;
  998. int pin_idx = pin_nid_to_pin_index(spec, jack->nid);
  999. if (pin_idx < 0)
  1000. return;
  1001. if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
  1002. snd_hda_jack_report_sync(codec);
  1003. }
  1004. static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
  1005. {
  1006. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  1007. struct hda_jack_tbl *jack;
  1008. int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
  1009. jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
  1010. if (!jack)
  1011. return;
  1012. jack->jack_dirty = 1;
  1013. _snd_printd(SND_PR_VERBOSE,
  1014. "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
  1015. codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
  1016. !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
  1017. jack_callback(codec, jack);
  1018. }
  1019. static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
  1020. {
  1021. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  1022. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  1023. int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
  1024. int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
  1025. printk(KERN_INFO
  1026. "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
  1027. codec->addr,
  1028. tag,
  1029. subtag,
  1030. cp_state,
  1031. cp_ready);
  1032. /* TODO */
  1033. if (cp_state)
  1034. ;
  1035. if (cp_ready)
  1036. ;
  1037. }
  1038. static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
  1039. {
  1040. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  1041. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  1042. if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
  1043. snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
  1044. return;
  1045. }
  1046. if (subtag == 0)
  1047. hdmi_intrinsic_event(codec, res);
  1048. else
  1049. hdmi_non_intrinsic_event(codec, res);
  1050. }
  1051. static void haswell_verify_D0(struct hda_codec *codec,
  1052. hda_nid_t cvt_nid, hda_nid_t nid)
  1053. {
  1054. int pwr;
  1055. /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
  1056. * thus pins could only choose converter 0 for use. Make sure the
  1057. * converters are in correct power state */
  1058. if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
  1059. snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
  1060. if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
  1061. snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
  1062. AC_PWRST_D0);
  1063. msleep(40);
  1064. pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
  1065. pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
  1066. snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
  1067. }
  1068. }
  1069. /*
  1070. * Callbacks
  1071. */
  1072. /* HBR should be Non-PCM, 8 channels */
  1073. #define is_hbr_format(format) \
  1074. ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
  1075. static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
  1076. bool hbr)
  1077. {
  1078. int pinctl, new_pinctl;
  1079. if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
  1080. pinctl = snd_hda_codec_read(codec, pin_nid, 0,
  1081. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  1082. if (pinctl < 0)
  1083. return hbr ? -EINVAL : 0;
  1084. new_pinctl = pinctl & ~AC_PINCTL_EPT;
  1085. if (hbr)
  1086. new_pinctl |= AC_PINCTL_EPT_HBR;
  1087. else
  1088. new_pinctl |= AC_PINCTL_EPT_NATIVE;
  1089. snd_printdd("hdmi_pin_hbr_setup: "
  1090. "NID=0x%x, %spinctl=0x%x\n",
  1091. pin_nid,
  1092. pinctl == new_pinctl ? "" : "new-",
  1093. new_pinctl);
  1094. if (pinctl != new_pinctl)
  1095. snd_hda_codec_write(codec, pin_nid, 0,
  1096. AC_VERB_SET_PIN_WIDGET_CONTROL,
  1097. new_pinctl);
  1098. } else if (hbr)
  1099. return -EINVAL;
  1100. return 0;
  1101. }
  1102. static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
  1103. hda_nid_t pin_nid, u32 stream_tag, int format)
  1104. {
  1105. struct hdmi_spec *spec = codec->spec;
  1106. int err;
  1107. if (is_haswell_plus(codec))
  1108. haswell_verify_D0(codec, cvt_nid, pin_nid);
  1109. err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
  1110. if (err) {
  1111. snd_printdd("hdmi_setup_stream: HBR is not supported\n");
  1112. return err;
  1113. }
  1114. snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
  1115. return 0;
  1116. }
  1117. static int hdmi_choose_cvt(struct hda_codec *codec,
  1118. int pin_idx, int *cvt_id, int *mux_id)
  1119. {
  1120. struct hdmi_spec *spec = codec->spec;
  1121. struct hdmi_spec_per_pin *per_pin;
  1122. struct hdmi_spec_per_cvt *per_cvt = NULL;
  1123. int cvt_idx, mux_idx = 0;
  1124. per_pin = get_pin(spec, pin_idx);
  1125. /* Dynamically assign converter to stream */
  1126. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
  1127. per_cvt = get_cvt(spec, cvt_idx);
  1128. /* Must not already be assigned */
  1129. if (per_cvt->assigned)
  1130. continue;
  1131. /* Must be in pin's mux's list of converters */
  1132. for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
  1133. if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
  1134. break;
  1135. /* Not in mux list */
  1136. if (mux_idx == per_pin->num_mux_nids)
  1137. continue;
  1138. break;
  1139. }
  1140. /* No free converters */
  1141. if (cvt_idx == spec->num_cvts)
  1142. return -ENODEV;
  1143. if (cvt_id)
  1144. *cvt_id = cvt_idx;
  1145. if (mux_id)
  1146. *mux_id = mux_idx;
  1147. return 0;
  1148. }
  1149. /* Intel HDMI workaround to fix audio routing issue:
  1150. * For some Intel display codecs, pins share the same connection list.
  1151. * So a conveter can be selected by multiple pins and playback on any of these
  1152. * pins will generate sound on the external display, because audio flows from
  1153. * the same converter to the display pipeline. Also muting one pin may make
  1154. * other pins have no sound output.
  1155. * So this function assures that an assigned converter for a pin is not selected
  1156. * by any other pins.
  1157. */
  1158. static void intel_not_share_assigned_cvt(struct hda_codec *codec,
  1159. hda_nid_t pin_nid, int mux_idx)
  1160. {
  1161. struct hdmi_spec *spec = codec->spec;
  1162. hda_nid_t nid, end_nid;
  1163. int cvt_idx, curr;
  1164. struct hdmi_spec_per_cvt *per_cvt;
  1165. /* configure all pins, including "no physical connection" ones */
  1166. end_nid = codec->start_nid + codec->num_nodes;
  1167. for (nid = codec->start_nid; nid < end_nid; nid++) {
  1168. unsigned int wid_caps = get_wcaps(codec, nid);
  1169. unsigned int wid_type = get_wcaps_type(wid_caps);
  1170. if (wid_type != AC_WID_PIN)
  1171. continue;
  1172. if (nid == pin_nid)
  1173. continue;
  1174. curr = snd_hda_codec_read(codec, nid, 0,
  1175. AC_VERB_GET_CONNECT_SEL, 0);
  1176. if (curr != mux_idx)
  1177. continue;
  1178. /* choose an unassigned converter. The conveters in the
  1179. * connection list are in the same order as in the codec.
  1180. */
  1181. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
  1182. per_cvt = get_cvt(spec, cvt_idx);
  1183. if (!per_cvt->assigned) {
  1184. snd_printdd("choose cvt %d for pin nid %d\n",
  1185. cvt_idx, nid);
  1186. snd_hda_codec_write_cache(codec, nid, 0,
  1187. AC_VERB_SET_CONNECT_SEL,
  1188. cvt_idx);
  1189. break;
  1190. }
  1191. }
  1192. }
  1193. }
  1194. /*
  1195. * HDA PCM callbacks
  1196. */
  1197. static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
  1198. struct hda_codec *codec,
  1199. struct snd_pcm_substream *substream)
  1200. {
  1201. struct hdmi_spec *spec = codec->spec;
  1202. struct snd_pcm_runtime *runtime = substream->runtime;
  1203. int pin_idx, cvt_idx, mux_idx = 0;
  1204. struct hdmi_spec_per_pin *per_pin;
  1205. struct hdmi_eld *eld;
  1206. struct hdmi_spec_per_cvt *per_cvt = NULL;
  1207. int err;
  1208. /* Validate hinfo */
  1209. pin_idx = hinfo_to_pin_index(spec, hinfo);
  1210. if (snd_BUG_ON(pin_idx < 0))
  1211. return -EINVAL;
  1212. per_pin = get_pin(spec, pin_idx);
  1213. eld = &per_pin->sink_eld;
  1214. err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
  1215. if (err < 0)
  1216. return err;
  1217. per_cvt = get_cvt(spec, cvt_idx);
  1218. /* Claim converter */
  1219. per_cvt->assigned = 1;
  1220. per_pin->cvt_nid = per_cvt->cvt_nid;
  1221. hinfo->nid = per_cvt->cvt_nid;
  1222. snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
  1223. AC_VERB_SET_CONNECT_SEL,
  1224. mux_idx);
  1225. /* configure unused pins to choose other converters */
  1226. if (is_haswell_plus(codec) || is_valleyview(codec))
  1227. intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
  1228. snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
  1229. /* Initially set the converter's capabilities */
  1230. hinfo->channels_min = per_cvt->channels_min;
  1231. hinfo->channels_max = per_cvt->channels_max;
  1232. hinfo->rates = per_cvt->rates;
  1233. hinfo->formats = per_cvt->formats;
  1234. hinfo->maxbps = per_cvt->maxbps;
  1235. /* Restrict capabilities by ELD if this isn't disabled */
  1236. if (!static_hdmi_pcm && eld->eld_valid) {
  1237. snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
  1238. if (hinfo->channels_min > hinfo->channels_max ||
  1239. !hinfo->rates || !hinfo->formats) {
  1240. per_cvt->assigned = 0;
  1241. hinfo->nid = 0;
  1242. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1243. return -ENODEV;
  1244. }
  1245. }
  1246. /* Store the updated parameters */
  1247. runtime->hw.channels_min = hinfo->channels_min;
  1248. runtime->hw.channels_max = hinfo->channels_max;
  1249. runtime->hw.formats = hinfo->formats;
  1250. runtime->hw.rates = hinfo->rates;
  1251. snd_pcm_hw_constraint_step(substream->runtime, 0,
  1252. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  1253. return 0;
  1254. }
  1255. /*
  1256. * HDA/HDMI auto parsing
  1257. */
  1258. static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
  1259. {
  1260. struct hdmi_spec *spec = codec->spec;
  1261. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1262. hda_nid_t pin_nid = per_pin->pin_nid;
  1263. if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
  1264. snd_printk(KERN_WARNING
  1265. "HDMI: pin %d wcaps %#x "
  1266. "does not support connection list\n",
  1267. pin_nid, get_wcaps(codec, pin_nid));
  1268. return -EINVAL;
  1269. }
  1270. per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
  1271. per_pin->mux_nids,
  1272. HDA_MAX_CONNECTIONS);
  1273. return 0;
  1274. }
  1275. static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
  1276. {
  1277. struct hda_jack_tbl *jack;
  1278. struct hda_codec *codec = per_pin->codec;
  1279. struct hdmi_spec *spec = codec->spec;
  1280. struct hdmi_eld *eld = &spec->temp_eld;
  1281. struct hdmi_eld *pin_eld = &per_pin->sink_eld;
  1282. hda_nid_t pin_nid = per_pin->pin_nid;
  1283. /*
  1284. * Always execute a GetPinSense verb here, even when called from
  1285. * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
  1286. * response's PD bit is not the real PD value, but indicates that
  1287. * the real PD value changed. An older version of the HD-audio
  1288. * specification worked this way. Hence, we just ignore the data in
  1289. * the unsolicited response to avoid custom WARs.
  1290. */
  1291. int present;
  1292. bool update_eld = false;
  1293. bool eld_changed = false;
  1294. bool ret;
  1295. snd_hda_power_up(codec);
  1296. present = snd_hda_pin_sense(codec, pin_nid);
  1297. mutex_lock(&per_pin->lock);
  1298. pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
  1299. if (pin_eld->monitor_present)
  1300. eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
  1301. else
  1302. eld->eld_valid = false;
  1303. _snd_printd(SND_PR_VERBOSE,
  1304. "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  1305. codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
  1306. if (eld->eld_valid) {
  1307. if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
  1308. &eld->eld_size) < 0)
  1309. eld->eld_valid = false;
  1310. else {
  1311. memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
  1312. if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
  1313. eld->eld_size) < 0)
  1314. eld->eld_valid = false;
  1315. }
  1316. if (eld->eld_valid) {
  1317. snd_hdmi_show_eld(&eld->info);
  1318. update_eld = true;
  1319. }
  1320. else if (repoll) {
  1321. queue_delayed_work(codec->bus->workq,
  1322. &per_pin->work,
  1323. msecs_to_jiffies(300));
  1324. goto unlock;
  1325. }
  1326. }
  1327. if (pin_eld->eld_valid && !eld->eld_valid) {
  1328. update_eld = true;
  1329. eld_changed = true;
  1330. }
  1331. if (update_eld) {
  1332. bool old_eld_valid = pin_eld->eld_valid;
  1333. pin_eld->eld_valid = eld->eld_valid;
  1334. eld_changed = pin_eld->eld_size != eld->eld_size ||
  1335. memcmp(pin_eld->eld_buffer, eld->eld_buffer,
  1336. eld->eld_size) != 0;
  1337. if (eld_changed)
  1338. memcpy(pin_eld->eld_buffer, eld->eld_buffer,
  1339. eld->eld_size);
  1340. pin_eld->eld_size = eld->eld_size;
  1341. pin_eld->info = eld->info;
  1342. /*
  1343. * Re-setup pin and infoframe. This is needed e.g. when
  1344. * - sink is first plugged-in (infoframe is not set up if !monitor_present)
  1345. * - transcoder can change during stream playback on Haswell
  1346. */
  1347. if (eld->eld_valid && !old_eld_valid && per_pin->setup)
  1348. hdmi_setup_audio_infoframe(codec, per_pin,
  1349. per_pin->non_pcm);
  1350. }
  1351. if (eld_changed)
  1352. snd_ctl_notify(codec->bus->card,
  1353. SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
  1354. &per_pin->eld_ctl->id);
  1355. unlock:
  1356. ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
  1357. jack = snd_hda_jack_tbl_get(codec, pin_nid);
  1358. if (jack)
  1359. jack->block_report = !ret;
  1360. mutex_unlock(&per_pin->lock);
  1361. snd_hda_power_down(codec);
  1362. return ret;
  1363. }
  1364. static void hdmi_repoll_eld(struct work_struct *work)
  1365. {
  1366. struct hdmi_spec_per_pin *per_pin =
  1367. container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
  1368. if (per_pin->repoll_count++ > 6)
  1369. per_pin->repoll_count = 0;
  1370. if (hdmi_present_sense(per_pin, per_pin->repoll_count))
  1371. snd_hda_jack_report_sync(per_pin->codec);
  1372. }
  1373. static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
  1374. hda_nid_t nid);
  1375. static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  1376. {
  1377. struct hdmi_spec *spec = codec->spec;
  1378. unsigned int caps, config;
  1379. int pin_idx;
  1380. struct hdmi_spec_per_pin *per_pin;
  1381. int err;
  1382. caps = snd_hda_query_pin_caps(codec, pin_nid);
  1383. if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
  1384. return 0;
  1385. config = snd_hda_codec_get_pincfg(codec, pin_nid);
  1386. if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
  1387. return 0;
  1388. if (is_haswell_plus(codec))
  1389. intel_haswell_fixup_connect_list(codec, pin_nid);
  1390. pin_idx = spec->num_pins;
  1391. per_pin = snd_array_new(&spec->pins);
  1392. if (!per_pin)
  1393. return -ENOMEM;
  1394. per_pin->pin_nid = pin_nid;
  1395. per_pin->non_pcm = false;
  1396. err = hdmi_read_pin_conn(codec, pin_idx);
  1397. if (err < 0)
  1398. return err;
  1399. spec->num_pins++;
  1400. return 0;
  1401. }
  1402. static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1403. {
  1404. struct hdmi_spec *spec = codec->spec;
  1405. struct hdmi_spec_per_cvt *per_cvt;
  1406. unsigned int chans;
  1407. int err;
  1408. chans = get_wcaps(codec, cvt_nid);
  1409. chans = get_wcaps_channels(chans);
  1410. per_cvt = snd_array_new(&spec->cvts);
  1411. if (!per_cvt)
  1412. return -ENOMEM;
  1413. per_cvt->cvt_nid = cvt_nid;
  1414. per_cvt->channels_min = 2;
  1415. if (chans <= 16) {
  1416. per_cvt->channels_max = chans;
  1417. if (chans > spec->channels_max)
  1418. spec->channels_max = chans;
  1419. }
  1420. err = snd_hda_query_supported_pcm(codec, cvt_nid,
  1421. &per_cvt->rates,
  1422. &per_cvt->formats,
  1423. &per_cvt->maxbps);
  1424. if (err < 0)
  1425. return err;
  1426. if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
  1427. spec->cvt_nids[spec->num_cvts] = cvt_nid;
  1428. spec->num_cvts++;
  1429. return 0;
  1430. }
  1431. static int hdmi_parse_codec(struct hda_codec *codec)
  1432. {
  1433. hda_nid_t nid;
  1434. int i, nodes;
  1435. nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
  1436. if (!nid || nodes < 0) {
  1437. snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
  1438. return -EINVAL;
  1439. }
  1440. for (i = 0; i < nodes; i++, nid++) {
  1441. unsigned int caps;
  1442. unsigned int type;
  1443. caps = get_wcaps(codec, nid);
  1444. type = get_wcaps_type(caps);
  1445. if (!(caps & AC_WCAP_DIGITAL))
  1446. continue;
  1447. switch (type) {
  1448. case AC_WID_AUD_OUT:
  1449. hdmi_add_cvt(codec, nid);
  1450. break;
  1451. case AC_WID_PIN:
  1452. hdmi_add_pin(codec, nid);
  1453. break;
  1454. }
  1455. }
  1456. return 0;
  1457. }
  1458. /*
  1459. */
  1460. static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1461. {
  1462. struct hda_spdif_out *spdif;
  1463. bool non_pcm;
  1464. mutex_lock(&codec->spdif_mutex);
  1465. spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
  1466. non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
  1467. mutex_unlock(&codec->spdif_mutex);
  1468. return non_pcm;
  1469. }
  1470. /*
  1471. * HDMI callbacks
  1472. */
  1473. static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1474. struct hda_codec *codec,
  1475. unsigned int stream_tag,
  1476. unsigned int format,
  1477. struct snd_pcm_substream *substream)
  1478. {
  1479. hda_nid_t cvt_nid = hinfo->nid;
  1480. struct hdmi_spec *spec = codec->spec;
  1481. int pin_idx = hinfo_to_pin_index(spec, hinfo);
  1482. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1483. hda_nid_t pin_nid = per_pin->pin_nid;
  1484. bool non_pcm;
  1485. int pinctl;
  1486. non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
  1487. mutex_lock(&per_pin->lock);
  1488. per_pin->channels = substream->runtime->channels;
  1489. per_pin->setup = true;
  1490. hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
  1491. mutex_unlock(&per_pin->lock);
  1492. if (spec->dyn_pin_out) {
  1493. pinctl = snd_hda_codec_read(codec, pin_nid, 0,
  1494. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  1495. snd_hda_codec_write(codec, pin_nid, 0,
  1496. AC_VERB_SET_PIN_WIDGET_CONTROL,
  1497. pinctl | PIN_OUT);
  1498. }
  1499. return spec->ops.setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
  1500. }
  1501. static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  1502. struct hda_codec *codec,
  1503. struct snd_pcm_substream *substream)
  1504. {
  1505. snd_hda_codec_cleanup_stream(codec, hinfo->nid);
  1506. return 0;
  1507. }
  1508. static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
  1509. struct hda_codec *codec,
  1510. struct snd_pcm_substream *substream)
  1511. {
  1512. struct hdmi_spec *spec = codec->spec;
  1513. int cvt_idx, pin_idx;
  1514. struct hdmi_spec_per_cvt *per_cvt;
  1515. struct hdmi_spec_per_pin *per_pin;
  1516. int pinctl;
  1517. if (hinfo->nid) {
  1518. cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
  1519. if (snd_BUG_ON(cvt_idx < 0))
  1520. return -EINVAL;
  1521. per_cvt = get_cvt(spec, cvt_idx);
  1522. snd_BUG_ON(!per_cvt->assigned);
  1523. per_cvt->assigned = 0;
  1524. hinfo->nid = 0;
  1525. pin_idx = hinfo_to_pin_index(spec, hinfo);
  1526. if (snd_BUG_ON(pin_idx < 0))
  1527. return -EINVAL;
  1528. per_pin = get_pin(spec, pin_idx);
  1529. if (spec->dyn_pin_out) {
  1530. pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
  1531. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  1532. snd_hda_codec_write(codec, per_pin->pin_nid, 0,
  1533. AC_VERB_SET_PIN_WIDGET_CONTROL,
  1534. pinctl & ~PIN_OUT);
  1535. }
  1536. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1537. mutex_lock(&per_pin->lock);
  1538. per_pin->chmap_set = false;
  1539. memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
  1540. per_pin->setup = false;
  1541. per_pin->channels = 0;
  1542. mutex_unlock(&per_pin->lock);
  1543. }
  1544. return 0;
  1545. }
  1546. static const struct hda_pcm_ops generic_ops = {
  1547. .open = hdmi_pcm_open,
  1548. .close = hdmi_pcm_close,
  1549. .prepare = generic_hdmi_playback_pcm_prepare,
  1550. .cleanup = generic_hdmi_playback_pcm_cleanup,
  1551. };
  1552. /*
  1553. * ALSA API channel-map control callbacks
  1554. */
  1555. static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
  1556. struct snd_ctl_elem_info *uinfo)
  1557. {
  1558. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1559. struct hda_codec *codec = info->private_data;
  1560. struct hdmi_spec *spec = codec->spec;
  1561. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1562. uinfo->count = spec->channels_max;
  1563. uinfo->value.integer.min = 0;
  1564. uinfo->value.integer.max = SNDRV_CHMAP_LAST;
  1565. return 0;
  1566. }
  1567. static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
  1568. int channels)
  1569. {
  1570. /* If the speaker allocation matches the channel count, it is OK.*/
  1571. if (cap->channels != channels)
  1572. return -1;
  1573. /* all channels are remappable freely */
  1574. return SNDRV_CTL_TLVT_CHMAP_VAR;
  1575. }
  1576. static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
  1577. unsigned int *chmap, int channels)
  1578. {
  1579. int count = 0;
  1580. int c;
  1581. for (c = 7; c >= 0; c--) {
  1582. int spk = cap->speakers[c];
  1583. if (!spk)
  1584. continue;
  1585. chmap[count++] = spk_to_chmap(spk);
  1586. }
  1587. WARN_ON(count != channels);
  1588. }
  1589. static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
  1590. unsigned int size, unsigned int __user *tlv)
  1591. {
  1592. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1593. struct hda_codec *codec = info->private_data;
  1594. struct hdmi_spec *spec = codec->spec;
  1595. unsigned int __user *dst;
  1596. int chs, count = 0;
  1597. if (size < 8)
  1598. return -ENOMEM;
  1599. if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
  1600. return -EFAULT;
  1601. size -= 8;
  1602. dst = tlv + 2;
  1603. for (chs = 2; chs <= spec->channels_max; chs++) {
  1604. int i;
  1605. struct cea_channel_speaker_allocation *cap;
  1606. cap = channel_allocations;
  1607. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
  1608. int chs_bytes = chs * 4;
  1609. int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs);
  1610. unsigned int tlv_chmap[8];
  1611. if (type < 0)
  1612. continue;
  1613. if (size < 8)
  1614. return -ENOMEM;
  1615. if (put_user(type, dst) ||
  1616. put_user(chs_bytes, dst + 1))
  1617. return -EFAULT;
  1618. dst += 2;
  1619. size -= 8;
  1620. count += 8;
  1621. if (size < chs_bytes)
  1622. return -ENOMEM;
  1623. size -= chs_bytes;
  1624. count += chs_bytes;
  1625. spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs);
  1626. if (copy_to_user(dst, tlv_chmap, chs_bytes))
  1627. return -EFAULT;
  1628. dst += chs;
  1629. }
  1630. }
  1631. if (put_user(count, tlv + 1))
  1632. return -EFAULT;
  1633. return 0;
  1634. }
  1635. static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
  1636. struct snd_ctl_elem_value *ucontrol)
  1637. {
  1638. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1639. struct hda_codec *codec = info->private_data;
  1640. struct hdmi_spec *spec = codec->spec;
  1641. int pin_idx = kcontrol->private_value;
  1642. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1643. int i;
  1644. for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
  1645. ucontrol->value.integer.value[i] = per_pin->chmap[i];
  1646. return 0;
  1647. }
  1648. static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
  1649. struct snd_ctl_elem_value *ucontrol)
  1650. {
  1651. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1652. struct hda_codec *codec = info->private_data;
  1653. struct hdmi_spec *spec = codec->spec;
  1654. int pin_idx = kcontrol->private_value;
  1655. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1656. unsigned int ctl_idx;
  1657. struct snd_pcm_substream *substream;
  1658. unsigned char chmap[8];
  1659. int i, err, ca, prepared = 0;
  1660. ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1661. substream = snd_pcm_chmap_substream(info, ctl_idx);
  1662. if (!substream || !substream->runtime)
  1663. return 0; /* just for avoiding error from alsactl restore */
  1664. switch (substream->runtime->status->state) {
  1665. case SNDRV_PCM_STATE_OPEN:
  1666. case SNDRV_PCM_STATE_SETUP:
  1667. break;
  1668. case SNDRV_PCM_STATE_PREPARED:
  1669. prepared = 1;
  1670. break;
  1671. default:
  1672. return -EBUSY;
  1673. }
  1674. memset(chmap, 0, sizeof(chmap));
  1675. for (i = 0; i < ARRAY_SIZE(chmap); i++)
  1676. chmap[i] = ucontrol->value.integer.value[i];
  1677. if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
  1678. return 0;
  1679. ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
  1680. if (ca < 0)
  1681. return -EINVAL;
  1682. if (spec->ops.chmap_validate) {
  1683. err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap);
  1684. if (err)
  1685. return err;
  1686. }
  1687. mutex_lock(&per_pin->lock);
  1688. per_pin->chmap_set = true;
  1689. memcpy(per_pin->chmap, chmap, sizeof(chmap));
  1690. if (prepared)
  1691. hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
  1692. mutex_unlock(&per_pin->lock);
  1693. return 0;
  1694. }
  1695. static int generic_hdmi_build_pcms(struct hda_codec *codec)
  1696. {
  1697. struct hdmi_spec *spec = codec->spec;
  1698. int pin_idx;
  1699. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1700. struct hda_pcm *info;
  1701. struct hda_pcm_stream *pstr;
  1702. struct hdmi_spec_per_pin *per_pin;
  1703. per_pin = get_pin(spec, pin_idx);
  1704. sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
  1705. info = snd_array_new(&spec->pcm_rec);
  1706. if (!info)
  1707. return -ENOMEM;
  1708. info->name = per_pin->pcm_name;
  1709. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1710. info->own_chmap = true;
  1711. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1712. pstr->substreams = 1;
  1713. pstr->ops = generic_ops;
  1714. /* other pstr fields are set in open */
  1715. }
  1716. codec->num_pcms = spec->num_pins;
  1717. codec->pcm_info = spec->pcm_rec.list;
  1718. return 0;
  1719. }
  1720. static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
  1721. {
  1722. char hdmi_str[32] = "HDMI/DP";
  1723. struct hdmi_spec *spec = codec->spec;
  1724. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1725. int pcmdev = get_pcm_rec(spec, pin_idx)->device;
  1726. if (pcmdev > 0)
  1727. sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
  1728. if (!is_jack_detectable(codec, per_pin->pin_nid))
  1729. strncat(hdmi_str, " Phantom",
  1730. sizeof(hdmi_str) - strlen(hdmi_str) - 1);
  1731. return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
  1732. }
  1733. static int generic_hdmi_build_controls(struct hda_codec *codec)
  1734. {
  1735. struct hdmi_spec *spec = codec->spec;
  1736. int err;
  1737. int pin_idx;
  1738. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1739. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1740. err = generic_hdmi_build_jack(codec, pin_idx);
  1741. if (err < 0)
  1742. return err;
  1743. err = snd_hda_create_dig_out_ctls(codec,
  1744. per_pin->pin_nid,
  1745. per_pin->mux_nids[0],
  1746. HDA_PCM_TYPE_HDMI);
  1747. if (err < 0)
  1748. return err;
  1749. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1750. /* add control for ELD Bytes */
  1751. err = hdmi_create_eld_ctl(codec, pin_idx,
  1752. get_pcm_rec(spec, pin_idx)->device);
  1753. if (err < 0)
  1754. return err;
  1755. hdmi_present_sense(per_pin, 0);
  1756. }
  1757. /* add channel maps */
  1758. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1759. struct snd_pcm_chmap *chmap;
  1760. struct snd_kcontrol *kctl;
  1761. int i;
  1762. if (!codec->pcm_info[pin_idx].pcm)
  1763. break;
  1764. err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
  1765. SNDRV_PCM_STREAM_PLAYBACK,
  1766. NULL, 0, pin_idx, &chmap);
  1767. if (err < 0)
  1768. return err;
  1769. /* override handlers */
  1770. chmap->private_data = codec;
  1771. kctl = chmap->kctl;
  1772. for (i = 0; i < kctl->count; i++)
  1773. kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
  1774. kctl->info = hdmi_chmap_ctl_info;
  1775. kctl->get = hdmi_chmap_ctl_get;
  1776. kctl->put = hdmi_chmap_ctl_put;
  1777. kctl->tlv.c = hdmi_chmap_ctl_tlv;
  1778. }
  1779. return 0;
  1780. }
  1781. static int generic_hdmi_init_per_pins(struct hda_codec *codec)
  1782. {
  1783. struct hdmi_spec *spec = codec->spec;
  1784. int pin_idx;
  1785. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1786. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1787. per_pin->codec = codec;
  1788. mutex_init(&per_pin->lock);
  1789. INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
  1790. eld_proc_new(per_pin, pin_idx);
  1791. }
  1792. return 0;
  1793. }
  1794. static int generic_hdmi_init(struct hda_codec *codec)
  1795. {
  1796. struct hdmi_spec *spec = codec->spec;
  1797. int pin_idx;
  1798. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1799. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1800. hda_nid_t pin_nid = per_pin->pin_nid;
  1801. hdmi_init_pin(codec, pin_nid);
  1802. snd_hda_jack_detect_enable_callback(codec, pin_nid, pin_nid,
  1803. codec->jackpoll_interval > 0 ? jack_callback : NULL);
  1804. }
  1805. return 0;
  1806. }
  1807. static void hdmi_array_init(struct hdmi_spec *spec, int nums)
  1808. {
  1809. snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
  1810. snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
  1811. snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
  1812. }
  1813. static void hdmi_array_free(struct hdmi_spec *spec)
  1814. {
  1815. snd_array_free(&spec->pins);
  1816. snd_array_free(&spec->cvts);
  1817. snd_array_free(&spec->pcm_rec);
  1818. }
  1819. static void generic_hdmi_free(struct hda_codec *codec)
  1820. {
  1821. struct hdmi_spec *spec = codec->spec;
  1822. int pin_idx;
  1823. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1824. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1825. cancel_delayed_work(&per_pin->work);
  1826. eld_proc_free(per_pin);
  1827. }
  1828. flush_workqueue(codec->bus->workq);
  1829. hdmi_array_free(spec);
  1830. kfree(spec);
  1831. }
  1832. #ifdef CONFIG_PM
  1833. static int generic_hdmi_resume(struct hda_codec *codec)
  1834. {
  1835. struct hdmi_spec *spec = codec->spec;
  1836. int pin_idx;
  1837. generic_hdmi_init(codec);
  1838. snd_hda_codec_resume_amp(codec);
  1839. snd_hda_codec_resume_cache(codec);
  1840. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1841. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1842. hdmi_present_sense(per_pin, 1);
  1843. }
  1844. return 0;
  1845. }
  1846. #endif
  1847. static const struct hda_codec_ops generic_hdmi_patch_ops = {
  1848. .init = generic_hdmi_init,
  1849. .free = generic_hdmi_free,
  1850. .build_pcms = generic_hdmi_build_pcms,
  1851. .build_controls = generic_hdmi_build_controls,
  1852. .unsol_event = hdmi_unsol_event,
  1853. #ifdef CONFIG_PM
  1854. .resume = generic_hdmi_resume,
  1855. #endif
  1856. };
  1857. static const struct hdmi_ops generic_standard_hdmi_ops = {
  1858. .pin_get_eld = snd_hdmi_get_eld,
  1859. .pin_get_slot_channel = hdmi_pin_get_slot_channel,
  1860. .pin_set_slot_channel = hdmi_pin_set_slot_channel,
  1861. .pin_setup_infoframe = hdmi_pin_setup_infoframe,
  1862. .pin_hbr_setup = hdmi_pin_hbr_setup,
  1863. .setup_stream = hdmi_setup_stream,
  1864. .chmap_cea_alloc_validate_get_type = hdmi_chmap_cea_alloc_validate_get_type,
  1865. .cea_alloc_to_tlv_chmap = hdmi_cea_alloc_to_tlv_chmap,
  1866. };
  1867. static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
  1868. hda_nid_t nid)
  1869. {
  1870. struct hdmi_spec *spec = codec->spec;
  1871. hda_nid_t conns[4];
  1872. int nconns;
  1873. nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
  1874. if (nconns == spec->num_cvts &&
  1875. !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
  1876. return;
  1877. /* override pins connection list */
  1878. snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
  1879. snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
  1880. }
  1881. #define INTEL_VENDOR_NID 0x08
  1882. #define INTEL_GET_VENDOR_VERB 0xf81
  1883. #define INTEL_SET_VENDOR_VERB 0x781
  1884. #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
  1885. #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
  1886. static void intel_haswell_enable_all_pins(struct hda_codec *codec,
  1887. bool update_tree)
  1888. {
  1889. unsigned int vendor_param;
  1890. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1891. INTEL_GET_VENDOR_VERB, 0);
  1892. if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
  1893. return;
  1894. vendor_param |= INTEL_EN_ALL_PIN_CVTS;
  1895. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1896. INTEL_SET_VENDOR_VERB, vendor_param);
  1897. if (vendor_param == -1)
  1898. return;
  1899. if (update_tree)
  1900. snd_hda_codec_update_widgets(codec);
  1901. }
  1902. static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
  1903. {
  1904. unsigned int vendor_param;
  1905. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1906. INTEL_GET_VENDOR_VERB, 0);
  1907. if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
  1908. return;
  1909. /* enable DP1.2 mode */
  1910. vendor_param |= INTEL_EN_DP12;
  1911. snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
  1912. INTEL_SET_VENDOR_VERB, vendor_param);
  1913. }
  1914. /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
  1915. * Otherwise you may get severe h/w communication errors.
  1916. */
  1917. static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
  1918. unsigned int power_state)
  1919. {
  1920. if (power_state == AC_PWRST_D0) {
  1921. intel_haswell_enable_all_pins(codec, false);
  1922. intel_haswell_fixup_enable_dp12(codec);
  1923. }
  1924. snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
  1925. snd_hda_codec_set_power_to_all(codec, fg, power_state);
  1926. }
  1927. static int patch_generic_hdmi(struct hda_codec *codec)
  1928. {
  1929. struct hdmi_spec *spec;
  1930. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1931. if (spec == NULL)
  1932. return -ENOMEM;
  1933. spec->ops = generic_standard_hdmi_ops;
  1934. codec->spec = spec;
  1935. hdmi_array_init(spec, 4);
  1936. if (is_haswell_plus(codec)) {
  1937. intel_haswell_enable_all_pins(codec, true);
  1938. intel_haswell_fixup_enable_dp12(codec);
  1939. }
  1940. if (is_haswell(codec) || is_valleyview(codec)) {
  1941. codec->depop_delay = 0;
  1942. }
  1943. if (hdmi_parse_codec(codec) < 0) {
  1944. codec->spec = NULL;
  1945. kfree(spec);
  1946. return -EINVAL;
  1947. }
  1948. codec->patch_ops = generic_hdmi_patch_ops;
  1949. if (is_haswell_plus(codec)) {
  1950. codec->patch_ops.set_power_state = haswell_set_power_state;
  1951. codec->dp_mst = true;
  1952. }
  1953. generic_hdmi_init_per_pins(codec);
  1954. init_channel_allocations();
  1955. return 0;
  1956. }
  1957. /*
  1958. * Shared non-generic implementations
  1959. */
  1960. static int simple_playback_build_pcms(struct hda_codec *codec)
  1961. {
  1962. struct hdmi_spec *spec = codec->spec;
  1963. struct hda_pcm *info;
  1964. unsigned int chans;
  1965. struct hda_pcm_stream *pstr;
  1966. struct hdmi_spec_per_cvt *per_cvt;
  1967. per_cvt = get_cvt(spec, 0);
  1968. chans = get_wcaps(codec, per_cvt->cvt_nid);
  1969. chans = get_wcaps_channels(chans);
  1970. info = snd_array_new(&spec->pcm_rec);
  1971. if (!info)
  1972. return -ENOMEM;
  1973. info->name = get_pin(spec, 0)->pcm_name;
  1974. sprintf(info->name, "HDMI 0");
  1975. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1976. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1977. *pstr = spec->pcm_playback;
  1978. pstr->nid = per_cvt->cvt_nid;
  1979. if (pstr->channels_max <= 2 && chans && chans <= 16)
  1980. pstr->channels_max = chans;
  1981. codec->num_pcms = 1;
  1982. codec->pcm_info = info;
  1983. return 0;
  1984. }
  1985. /* unsolicited event for jack sensing */
  1986. static void simple_hdmi_unsol_event(struct hda_codec *codec,
  1987. unsigned int res)
  1988. {
  1989. snd_hda_jack_set_dirty_all(codec);
  1990. snd_hda_jack_report_sync(codec);
  1991. }
  1992. /* generic_hdmi_build_jack can be used for simple_hdmi, too,
  1993. * as long as spec->pins[] is set correctly
  1994. */
  1995. #define simple_hdmi_build_jack generic_hdmi_build_jack
  1996. static int simple_playback_build_controls(struct hda_codec *codec)
  1997. {
  1998. struct hdmi_spec *spec = codec->spec;
  1999. struct hdmi_spec_per_cvt *per_cvt;
  2000. int err;
  2001. per_cvt = get_cvt(spec, 0);
  2002. err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
  2003. per_cvt->cvt_nid,
  2004. HDA_PCM_TYPE_HDMI);
  2005. if (err < 0)
  2006. return err;
  2007. return simple_hdmi_build_jack(codec, 0);
  2008. }
  2009. static int simple_playback_init(struct hda_codec *codec)
  2010. {
  2011. struct hdmi_spec *spec = codec->spec;
  2012. struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
  2013. hda_nid_t pin = per_pin->pin_nid;
  2014. snd_hda_codec_write(codec, pin, 0,
  2015. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  2016. /* some codecs require to unmute the pin */
  2017. if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
  2018. snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
  2019. AMP_OUT_UNMUTE);
  2020. snd_hda_jack_detect_enable(codec, pin, pin);
  2021. return 0;
  2022. }
  2023. static void simple_playback_free(struct hda_codec *codec)
  2024. {
  2025. struct hdmi_spec *spec = codec->spec;
  2026. hdmi_array_free(spec);
  2027. kfree(spec);
  2028. }
  2029. /*
  2030. * Nvidia specific implementations
  2031. */
  2032. #define Nv_VERB_SET_Channel_Allocation 0xF79
  2033. #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
  2034. #define Nv_VERB_SET_Audio_Protection_On 0xF98
  2035. #define Nv_VERB_SET_Audio_Protection_Off 0xF99
  2036. #define nvhdmi_master_con_nid_7x 0x04
  2037. #define nvhdmi_master_pin_nid_7x 0x05
  2038. static const hda_nid_t nvhdmi_con_nids_7x[4] = {
  2039. /*front, rear, clfe, rear_surr */
  2040. 0x6, 0x8, 0xa, 0xc,
  2041. };
  2042. static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
  2043. /* set audio protect on */
  2044. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  2045. /* enable digital output on pin widget */
  2046. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  2047. {} /* terminator */
  2048. };
  2049. static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
  2050. /* set audio protect on */
  2051. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  2052. /* enable digital output on pin widget */
  2053. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  2054. { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  2055. { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  2056. { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  2057. { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  2058. {} /* terminator */
  2059. };
  2060. #ifdef LIMITED_RATE_FMT_SUPPORT
  2061. /* support only the safe format and rate */
  2062. #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
  2063. #define SUPPORTED_MAXBPS 16
  2064. #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
  2065. #else
  2066. /* support all rates and formats */
  2067. #define SUPPORTED_RATES \
  2068. (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  2069. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
  2070. SNDRV_PCM_RATE_192000)
  2071. #define SUPPORTED_MAXBPS 24
  2072. #define SUPPORTED_FORMATS \
  2073. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
  2074. #endif
  2075. static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
  2076. {
  2077. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
  2078. return 0;
  2079. }
  2080. static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
  2081. {
  2082. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
  2083. return 0;
  2084. }
  2085. static unsigned int channels_2_6_8[] = {
  2086. 2, 6, 8
  2087. };
  2088. static unsigned int channels_2_8[] = {
  2089. 2, 8
  2090. };
  2091. static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
  2092. .count = ARRAY_SIZE(channels_2_6_8),
  2093. .list = channels_2_6_8,
  2094. .mask = 0,
  2095. };
  2096. static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
  2097. .count = ARRAY_SIZE(channels_2_8),
  2098. .list = channels_2_8,
  2099. .mask = 0,
  2100. };
  2101. static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
  2102. struct hda_codec *codec,
  2103. struct snd_pcm_substream *substream)
  2104. {
  2105. struct hdmi_spec *spec = codec->spec;
  2106. struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
  2107. switch (codec->preset->id) {
  2108. case 0x10de0002:
  2109. case 0x10de0003:
  2110. case 0x10de0005:
  2111. case 0x10de0006:
  2112. hw_constraints_channels = &hw_constraints_2_8_channels;
  2113. break;
  2114. case 0x10de0007:
  2115. hw_constraints_channels = &hw_constraints_2_6_8_channels;
  2116. break;
  2117. default:
  2118. break;
  2119. }
  2120. if (hw_constraints_channels != NULL) {
  2121. snd_pcm_hw_constraint_list(substream->runtime, 0,
  2122. SNDRV_PCM_HW_PARAM_CHANNELS,
  2123. hw_constraints_channels);
  2124. } else {
  2125. snd_pcm_hw_constraint_step(substream->runtime, 0,
  2126. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  2127. }
  2128. return snd_hda_multi_out_dig_open(codec, &spec->multiout);
  2129. }
  2130. static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
  2131. struct hda_codec *codec,
  2132. struct snd_pcm_substream *substream)
  2133. {
  2134. struct hdmi_spec *spec = codec->spec;
  2135. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  2136. }
  2137. static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  2138. struct hda_codec *codec,
  2139. unsigned int stream_tag,
  2140. unsigned int format,
  2141. struct snd_pcm_substream *substream)
  2142. {
  2143. struct hdmi_spec *spec = codec->spec;
  2144. return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
  2145. stream_tag, format, substream);
  2146. }
  2147. static const struct hda_pcm_stream simple_pcm_playback = {
  2148. .substreams = 1,
  2149. .channels_min = 2,
  2150. .channels_max = 2,
  2151. .ops = {
  2152. .open = simple_playback_pcm_open,
  2153. .close = simple_playback_pcm_close,
  2154. .prepare = simple_playback_pcm_prepare
  2155. },
  2156. };
  2157. static const struct hda_codec_ops simple_hdmi_patch_ops = {
  2158. .build_controls = simple_playback_build_controls,
  2159. .build_pcms = simple_playback_build_pcms,
  2160. .init = simple_playback_init,
  2161. .free = simple_playback_free,
  2162. .unsol_event = simple_hdmi_unsol_event,
  2163. };
  2164. static int patch_simple_hdmi(struct hda_codec *codec,
  2165. hda_nid_t cvt_nid, hda_nid_t pin_nid)
  2166. {
  2167. struct hdmi_spec *spec;
  2168. struct hdmi_spec_per_cvt *per_cvt;
  2169. struct hdmi_spec_per_pin *per_pin;
  2170. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2171. if (!spec)
  2172. return -ENOMEM;
  2173. codec->spec = spec;
  2174. hdmi_array_init(spec, 1);
  2175. spec->multiout.num_dacs = 0; /* no analog */
  2176. spec->multiout.max_channels = 2;
  2177. spec->multiout.dig_out_nid = cvt_nid;
  2178. spec->num_cvts = 1;
  2179. spec->num_pins = 1;
  2180. per_pin = snd_array_new(&spec->pins);
  2181. per_cvt = snd_array_new(&spec->cvts);
  2182. if (!per_pin || !per_cvt) {
  2183. simple_playback_free(codec);
  2184. return -ENOMEM;
  2185. }
  2186. per_cvt->cvt_nid = cvt_nid;
  2187. per_pin->pin_nid = pin_nid;
  2188. spec->pcm_playback = simple_pcm_playback;
  2189. codec->patch_ops = simple_hdmi_patch_ops;
  2190. return 0;
  2191. }
  2192. static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
  2193. int channels)
  2194. {
  2195. unsigned int chanmask;
  2196. int chan = channels ? (channels - 1) : 1;
  2197. switch (channels) {
  2198. default:
  2199. case 0:
  2200. case 2:
  2201. chanmask = 0x00;
  2202. break;
  2203. case 4:
  2204. chanmask = 0x08;
  2205. break;
  2206. case 6:
  2207. chanmask = 0x0b;
  2208. break;
  2209. case 8:
  2210. chanmask = 0x13;
  2211. break;
  2212. }
  2213. /* Set the audio infoframe channel allocation and checksum fields. The
  2214. * channel count is computed implicitly by the hardware. */
  2215. snd_hda_codec_write(codec, 0x1, 0,
  2216. Nv_VERB_SET_Channel_Allocation, chanmask);
  2217. snd_hda_codec_write(codec, 0x1, 0,
  2218. Nv_VERB_SET_Info_Frame_Checksum,
  2219. (0x71 - chan - chanmask));
  2220. }
  2221. static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
  2222. struct hda_codec *codec,
  2223. struct snd_pcm_substream *substream)
  2224. {
  2225. struct hdmi_spec *spec = codec->spec;
  2226. int i;
  2227. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
  2228. 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
  2229. for (i = 0; i < 4; i++) {
  2230. /* set the stream id */
  2231. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  2232. AC_VERB_SET_CHANNEL_STREAMID, 0);
  2233. /* set the stream format */
  2234. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  2235. AC_VERB_SET_STREAM_FORMAT, 0);
  2236. }
  2237. /* The audio hardware sends a channel count of 0x7 (8ch) when all the
  2238. * streams are disabled. */
  2239. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  2240. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  2241. }
  2242. static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
  2243. struct hda_codec *codec,
  2244. unsigned int stream_tag,
  2245. unsigned int format,
  2246. struct snd_pcm_substream *substream)
  2247. {
  2248. int chs;
  2249. unsigned int dataDCC2, channel_id;
  2250. int i;
  2251. struct hdmi_spec *spec = codec->spec;
  2252. struct hda_spdif_out *spdif;
  2253. struct hdmi_spec_per_cvt *per_cvt;
  2254. mutex_lock(&codec->spdif_mutex);
  2255. per_cvt = get_cvt(spec, 0);
  2256. spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
  2257. chs = substream->runtime->channels;
  2258. dataDCC2 = 0x2;
  2259. /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
  2260. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
  2261. snd_hda_codec_write(codec,
  2262. nvhdmi_master_con_nid_7x,
  2263. 0,
  2264. AC_VERB_SET_DIGI_CONVERT_1,
  2265. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  2266. /* set the stream id */
  2267. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  2268. AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
  2269. /* set the stream format */
  2270. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  2271. AC_VERB_SET_STREAM_FORMAT, format);
  2272. /* turn on again (if needed) */
  2273. /* enable and set the channel status audio/data flag */
  2274. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
  2275. snd_hda_codec_write(codec,
  2276. nvhdmi_master_con_nid_7x,
  2277. 0,
  2278. AC_VERB_SET_DIGI_CONVERT_1,
  2279. spdif->ctls & 0xff);
  2280. snd_hda_codec_write(codec,
  2281. nvhdmi_master_con_nid_7x,
  2282. 0,
  2283. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  2284. }
  2285. for (i = 0; i < 4; i++) {
  2286. if (chs == 2)
  2287. channel_id = 0;
  2288. else
  2289. channel_id = i * 2;
  2290. /* turn off SPDIF once;
  2291. *otherwise the IEC958 bits won't be updated
  2292. */
  2293. if (codec->spdif_status_reset &&
  2294. (spdif->ctls & AC_DIG1_ENABLE))
  2295. snd_hda_codec_write(codec,
  2296. nvhdmi_con_nids_7x[i],
  2297. 0,
  2298. AC_VERB_SET_DIGI_CONVERT_1,
  2299. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  2300. /* set the stream id */
  2301. snd_hda_codec_write(codec,
  2302. nvhdmi_con_nids_7x[i],
  2303. 0,
  2304. AC_VERB_SET_CHANNEL_STREAMID,
  2305. (stream_tag << 4) | channel_id);
  2306. /* set the stream format */
  2307. snd_hda_codec_write(codec,
  2308. nvhdmi_con_nids_7x[i],
  2309. 0,
  2310. AC_VERB_SET_STREAM_FORMAT,
  2311. format);
  2312. /* turn on again (if needed) */
  2313. /* enable and set the channel status audio/data flag */
  2314. if (codec->spdif_status_reset &&
  2315. (spdif->ctls & AC_DIG1_ENABLE)) {
  2316. snd_hda_codec_write(codec,
  2317. nvhdmi_con_nids_7x[i],
  2318. 0,
  2319. AC_VERB_SET_DIGI_CONVERT_1,
  2320. spdif->ctls & 0xff);
  2321. snd_hda_codec_write(codec,
  2322. nvhdmi_con_nids_7x[i],
  2323. 0,
  2324. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  2325. }
  2326. }
  2327. nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
  2328. mutex_unlock(&codec->spdif_mutex);
  2329. return 0;
  2330. }
  2331. static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
  2332. .substreams = 1,
  2333. .channels_min = 2,
  2334. .channels_max = 8,
  2335. .nid = nvhdmi_master_con_nid_7x,
  2336. .rates = SUPPORTED_RATES,
  2337. .maxbps = SUPPORTED_MAXBPS,
  2338. .formats = SUPPORTED_FORMATS,
  2339. .ops = {
  2340. .open = simple_playback_pcm_open,
  2341. .close = nvhdmi_8ch_7x_pcm_close,
  2342. .prepare = nvhdmi_8ch_7x_pcm_prepare
  2343. },
  2344. };
  2345. static int patch_nvhdmi_2ch(struct hda_codec *codec)
  2346. {
  2347. struct hdmi_spec *spec;
  2348. int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
  2349. nvhdmi_master_pin_nid_7x);
  2350. if (err < 0)
  2351. return err;
  2352. codec->patch_ops.init = nvhdmi_7x_init_2ch;
  2353. /* override the PCM rates, etc, as the codec doesn't give full list */
  2354. spec = codec->spec;
  2355. spec->pcm_playback.rates = SUPPORTED_RATES;
  2356. spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
  2357. spec->pcm_playback.formats = SUPPORTED_FORMATS;
  2358. return 0;
  2359. }
  2360. static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
  2361. {
  2362. struct hdmi_spec *spec = codec->spec;
  2363. int err = simple_playback_build_pcms(codec);
  2364. if (!err) {
  2365. struct hda_pcm *info = get_pcm_rec(spec, 0);
  2366. info->own_chmap = true;
  2367. }
  2368. return err;
  2369. }
  2370. static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
  2371. {
  2372. struct hdmi_spec *spec = codec->spec;
  2373. struct hda_pcm *info;
  2374. struct snd_pcm_chmap *chmap;
  2375. int err;
  2376. err = simple_playback_build_controls(codec);
  2377. if (err < 0)
  2378. return err;
  2379. /* add channel maps */
  2380. info = get_pcm_rec(spec, 0);
  2381. err = snd_pcm_add_chmap_ctls(info->pcm,
  2382. SNDRV_PCM_STREAM_PLAYBACK,
  2383. snd_pcm_alt_chmaps, 8, 0, &chmap);
  2384. if (err < 0)
  2385. return err;
  2386. switch (codec->preset->id) {
  2387. case 0x10de0002:
  2388. case 0x10de0003:
  2389. case 0x10de0005:
  2390. case 0x10de0006:
  2391. chmap->channel_mask = (1U << 2) | (1U << 8);
  2392. break;
  2393. case 0x10de0007:
  2394. chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
  2395. }
  2396. return 0;
  2397. }
  2398. static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
  2399. {
  2400. struct hdmi_spec *spec;
  2401. int err = patch_nvhdmi_2ch(codec);
  2402. if (err < 0)
  2403. return err;
  2404. spec = codec->spec;
  2405. spec->multiout.max_channels = 8;
  2406. spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
  2407. codec->patch_ops.init = nvhdmi_7x_init_8ch;
  2408. codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
  2409. codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
  2410. /* Initialize the audio infoframe channel mask and checksum to something
  2411. * valid */
  2412. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  2413. return 0;
  2414. }
  2415. /*
  2416. * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
  2417. * - 0x10de0015
  2418. * - 0x10de0040
  2419. */
  2420. static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
  2421. int channels)
  2422. {
  2423. if (cap->ca_index == 0x00 && channels == 2)
  2424. return SNDRV_CTL_TLVT_CHMAP_FIXED;
  2425. return hdmi_chmap_cea_alloc_validate_get_type(cap, channels);
  2426. }
  2427. static int nvhdmi_chmap_validate(int ca, int chs, unsigned char *map)
  2428. {
  2429. if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
  2430. return -EINVAL;
  2431. return 0;
  2432. }
  2433. static int patch_nvhdmi(struct hda_codec *codec)
  2434. {
  2435. struct hdmi_spec *spec;
  2436. int err;
  2437. err = patch_generic_hdmi(codec);
  2438. if (err)
  2439. return err;
  2440. spec = codec->spec;
  2441. spec->dyn_pin_out = true;
  2442. spec->ops.chmap_cea_alloc_validate_get_type =
  2443. nvhdmi_chmap_cea_alloc_validate_get_type;
  2444. spec->ops.chmap_validate = nvhdmi_chmap_validate;
  2445. return 0;
  2446. }
  2447. /*
  2448. * ATI/AMD-specific implementations
  2449. */
  2450. #define is_amdhdmi_rev3_or_later(codec) \
  2451. ((codec)->vendor_id == 0x1002aa01 && ((codec)->revision_id & 0xff00) >= 0x0300)
  2452. #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
  2453. /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
  2454. #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
  2455. #define ATI_VERB_SET_DOWNMIX_INFO 0x772
  2456. #define ATI_VERB_SET_MULTICHANNEL_01 0x777
  2457. #define ATI_VERB_SET_MULTICHANNEL_23 0x778
  2458. #define ATI_VERB_SET_MULTICHANNEL_45 0x779
  2459. #define ATI_VERB_SET_MULTICHANNEL_67 0x77a
  2460. #define ATI_VERB_SET_HBR_CONTROL 0x77c
  2461. #define ATI_VERB_SET_MULTICHANNEL_1 0x785
  2462. #define ATI_VERB_SET_MULTICHANNEL_3 0x786
  2463. #define ATI_VERB_SET_MULTICHANNEL_5 0x787
  2464. #define ATI_VERB_SET_MULTICHANNEL_7 0x788
  2465. #define ATI_VERB_SET_MULTICHANNEL_MODE 0x789
  2466. #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
  2467. #define ATI_VERB_GET_DOWNMIX_INFO 0xf72
  2468. #define ATI_VERB_GET_MULTICHANNEL_01 0xf77
  2469. #define ATI_VERB_GET_MULTICHANNEL_23 0xf78
  2470. #define ATI_VERB_GET_MULTICHANNEL_45 0xf79
  2471. #define ATI_VERB_GET_MULTICHANNEL_67 0xf7a
  2472. #define ATI_VERB_GET_HBR_CONTROL 0xf7c
  2473. #define ATI_VERB_GET_MULTICHANNEL_1 0xf85
  2474. #define ATI_VERB_GET_MULTICHANNEL_3 0xf86
  2475. #define ATI_VERB_GET_MULTICHANNEL_5 0xf87
  2476. #define ATI_VERB_GET_MULTICHANNEL_7 0xf88
  2477. #define ATI_VERB_GET_MULTICHANNEL_MODE 0xf89
  2478. /* AMD specific HDA cvt verbs */
  2479. #define ATI_VERB_SET_RAMP_RATE 0x770
  2480. #define ATI_VERB_GET_RAMP_RATE 0xf70
  2481. #define ATI_OUT_ENABLE 0x1
  2482. #define ATI_MULTICHANNEL_MODE_PAIRED 0
  2483. #define ATI_MULTICHANNEL_MODE_SINGLE 1
  2484. #define ATI_HBR_CAPABLE 0x01
  2485. #define ATI_HBR_ENABLE 0x10
  2486. static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
  2487. unsigned char *buf, int *eld_size)
  2488. {
  2489. /* call hda_eld.c ATI/AMD-specific function */
  2490. return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
  2491. is_amdhdmi_rev3_or_later(codec));
  2492. }
  2493. static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
  2494. int active_channels, int conn_type)
  2495. {
  2496. snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
  2497. }
  2498. static int atihdmi_paired_swap_fc_lfe(int pos)
  2499. {
  2500. /*
  2501. * ATI/AMD have automatic FC/LFE swap built-in
  2502. * when in pairwise mapping mode.
  2503. */
  2504. switch (pos) {
  2505. /* see channel_allocations[].speakers[] */
  2506. case 2: return 3;
  2507. case 3: return 2;
  2508. default: break;
  2509. }
  2510. return pos;
  2511. }
  2512. static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map)
  2513. {
  2514. struct cea_channel_speaker_allocation *cap;
  2515. int i, j;
  2516. /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
  2517. cap = &channel_allocations[get_channel_allocation_order(ca)];
  2518. for (i = 0; i < chs; ++i) {
  2519. int mask = to_spk_mask(map[i]);
  2520. bool ok = false;
  2521. bool companion_ok = false;
  2522. if (!mask)
  2523. continue;
  2524. for (j = 0 + i % 2; j < 8; j += 2) {
  2525. int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
  2526. if (cap->speakers[chan_idx] == mask) {
  2527. /* channel is in a supported position */
  2528. ok = true;
  2529. if (i % 2 == 0 && i + 1 < chs) {
  2530. /* even channel, check the odd companion */
  2531. int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
  2532. int comp_mask_req = to_spk_mask(map[i+1]);
  2533. int comp_mask_act = cap->speakers[comp_chan_idx];
  2534. if (comp_mask_req == comp_mask_act)
  2535. companion_ok = true;
  2536. else
  2537. return -EINVAL;
  2538. }
  2539. break;
  2540. }
  2541. }
  2542. if (!ok)
  2543. return -EINVAL;
  2544. if (companion_ok)
  2545. i++; /* companion channel already checked */
  2546. }
  2547. return 0;
  2548. }
  2549. static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
  2550. int hdmi_slot, int stream_channel)
  2551. {
  2552. int verb;
  2553. int ati_channel_setup = 0;
  2554. if (hdmi_slot > 7)
  2555. return -EINVAL;
  2556. if (!has_amd_full_remap_support(codec)) {
  2557. hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
  2558. /* In case this is an odd slot but without stream channel, do not
  2559. * disable the slot since the corresponding even slot could have a
  2560. * channel. In case neither have a channel, the slot pair will be
  2561. * disabled when this function is called for the even slot. */
  2562. if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
  2563. return 0;
  2564. hdmi_slot -= hdmi_slot % 2;
  2565. if (stream_channel != 0xf)
  2566. stream_channel -= stream_channel % 2;
  2567. }
  2568. verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
  2569. /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
  2570. if (stream_channel != 0xf)
  2571. ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
  2572. return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
  2573. }
  2574. static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
  2575. int asp_slot)
  2576. {
  2577. bool was_odd = false;
  2578. int ati_asp_slot = asp_slot;
  2579. int verb;
  2580. int ati_channel_setup;
  2581. if (asp_slot > 7)
  2582. return -EINVAL;
  2583. if (!has_amd_full_remap_support(codec)) {
  2584. ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
  2585. if (ati_asp_slot % 2 != 0) {
  2586. ati_asp_slot -= 1;
  2587. was_odd = true;
  2588. }
  2589. }
  2590. verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
  2591. ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
  2592. if (!(ati_channel_setup & ATI_OUT_ENABLE))
  2593. return 0xf;
  2594. return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
  2595. }
  2596. static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
  2597. int channels)
  2598. {
  2599. int c;
  2600. /*
  2601. * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
  2602. * we need to take that into account (a single channel may take 2
  2603. * channel slots if we need to carry a silent channel next to it).
  2604. * On Rev3+ AMD codecs this function is not used.
  2605. */
  2606. int chanpairs = 0;
  2607. /* We only produce even-numbered channel count TLVs */
  2608. if ((channels % 2) != 0)
  2609. return -1;
  2610. for (c = 0; c < 7; c += 2) {
  2611. if (cap->speakers[c] || cap->speakers[c+1])
  2612. chanpairs++;
  2613. }
  2614. if (chanpairs * 2 != channels)
  2615. return -1;
  2616. return SNDRV_CTL_TLVT_CHMAP_PAIRED;
  2617. }
  2618. static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
  2619. unsigned int *chmap, int channels)
  2620. {
  2621. /* produce paired maps for pre-rev3 ATI/AMD codecs */
  2622. int count = 0;
  2623. int c;
  2624. for (c = 7; c >= 0; c--) {
  2625. int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
  2626. int spk = cap->speakers[chan];
  2627. if (!spk) {
  2628. /* add N/A channel if the companion channel is occupied */
  2629. if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
  2630. chmap[count++] = SNDRV_CHMAP_NA;
  2631. continue;
  2632. }
  2633. chmap[count++] = spk_to_chmap(spk);
  2634. }
  2635. WARN_ON(count != channels);
  2636. }
  2637. static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
  2638. bool hbr)
  2639. {
  2640. int hbr_ctl, hbr_ctl_new;
  2641. hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
  2642. if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
  2643. if (hbr)
  2644. hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
  2645. else
  2646. hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
  2647. snd_printdd("atihdmi_pin_hbr_setup: "
  2648. "NID=0x%x, %shbr-ctl=0x%x\n",
  2649. pin_nid,
  2650. hbr_ctl == hbr_ctl_new ? "" : "new-",
  2651. hbr_ctl_new);
  2652. if (hbr_ctl != hbr_ctl_new)
  2653. snd_hda_codec_write(codec, pin_nid, 0,
  2654. ATI_VERB_SET_HBR_CONTROL,
  2655. hbr_ctl_new);
  2656. } else if (hbr)
  2657. return -EINVAL;
  2658. return 0;
  2659. }
  2660. static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
  2661. hda_nid_t pin_nid, u32 stream_tag, int format)
  2662. {
  2663. if (is_amdhdmi_rev3_or_later(codec)) {
  2664. int ramp_rate = 180; /* default as per AMD spec */
  2665. /* disable ramp-up/down for non-pcm as per AMD spec */
  2666. if (format & AC_FMT_TYPE_NON_PCM)
  2667. ramp_rate = 0;
  2668. snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
  2669. }
  2670. return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
  2671. }
  2672. static int atihdmi_init(struct hda_codec *codec)
  2673. {
  2674. struct hdmi_spec *spec = codec->spec;
  2675. int pin_idx, err;
  2676. err = generic_hdmi_init(codec);
  2677. if (err)
  2678. return err;
  2679. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  2680. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  2681. /* make sure downmix information in infoframe is zero */
  2682. snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
  2683. /* enable channel-wise remap mode if supported */
  2684. if (has_amd_full_remap_support(codec))
  2685. snd_hda_codec_write(codec, per_pin->pin_nid, 0,
  2686. ATI_VERB_SET_MULTICHANNEL_MODE,
  2687. ATI_MULTICHANNEL_MODE_SINGLE);
  2688. }
  2689. return 0;
  2690. }
  2691. static int patch_atihdmi(struct hda_codec *codec)
  2692. {
  2693. struct hdmi_spec *spec;
  2694. struct hdmi_spec_per_cvt *per_cvt;
  2695. int err, cvt_idx;
  2696. err = patch_generic_hdmi(codec);
  2697. if (err)
  2698. return err;
  2699. codec->patch_ops.init = atihdmi_init;
  2700. spec = codec->spec;
  2701. spec->ops.pin_get_eld = atihdmi_pin_get_eld;
  2702. spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
  2703. spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
  2704. spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
  2705. spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
  2706. spec->ops.setup_stream = atihdmi_setup_stream;
  2707. if (!has_amd_full_remap_support(codec)) {
  2708. /* override to ATI/AMD-specific versions with pairwise mapping */
  2709. spec->ops.chmap_cea_alloc_validate_get_type =
  2710. atihdmi_paired_chmap_cea_alloc_validate_get_type;
  2711. spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap;
  2712. spec->ops.chmap_validate = atihdmi_paired_chmap_validate;
  2713. }
  2714. /* ATI/AMD converters do not advertise all of their capabilities */
  2715. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
  2716. per_cvt = get_cvt(spec, cvt_idx);
  2717. per_cvt->channels_max = max(per_cvt->channels_max, 8u);
  2718. per_cvt->rates |= SUPPORTED_RATES;
  2719. per_cvt->formats |= SUPPORTED_FORMATS;
  2720. per_cvt->maxbps = max(per_cvt->maxbps, 24u);
  2721. }
  2722. spec->channels_max = max(spec->channels_max, 8u);
  2723. return 0;
  2724. }
  2725. /* VIA HDMI Implementation */
  2726. #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
  2727. #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
  2728. static int patch_via_hdmi(struct hda_codec *codec)
  2729. {
  2730. return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
  2731. }
  2732. /*
  2733. * called from hda_codec.c for generic HDMI support
  2734. */
  2735. int snd_hda_parse_hdmi_codec(struct hda_codec *codec)
  2736. {
  2737. return patch_generic_hdmi(codec);
  2738. }
  2739. EXPORT_SYMBOL_GPL(snd_hda_parse_hdmi_codec);
  2740. /*
  2741. * patch entries
  2742. */
  2743. static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
  2744. { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
  2745. { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
  2746. { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
  2747. { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_atihdmi },
  2748. { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
  2749. { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
  2750. { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
  2751. { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2752. { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2753. { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2754. { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2755. { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
  2756. { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_nvhdmi },
  2757. { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_nvhdmi },
  2758. { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_nvhdmi },
  2759. { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_nvhdmi },
  2760. { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_nvhdmi },
  2761. { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_nvhdmi },
  2762. { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_nvhdmi },
  2763. { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_nvhdmi },
  2764. { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_nvhdmi },
  2765. { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_nvhdmi },
  2766. { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_nvhdmi },
  2767. /* 17 is known to be absent */
  2768. { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_nvhdmi },
  2769. { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_nvhdmi },
  2770. { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_nvhdmi },
  2771. { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_nvhdmi },
  2772. { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_nvhdmi },
  2773. { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_nvhdmi },
  2774. { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_nvhdmi },
  2775. { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_nvhdmi },
  2776. { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_nvhdmi },
  2777. { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_nvhdmi },
  2778. { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_nvhdmi },
  2779. { .id = 0x10de0060, .name = "GPU 60 HDMI/DP", .patch = patch_nvhdmi },
  2780. { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
  2781. { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
  2782. { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2783. { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2784. { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2785. { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2786. { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2787. { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
  2788. { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
  2789. { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
  2790. { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2791. { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
  2792. { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
  2793. { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
  2794. { .id = 0x80862808, .name = "Broadwell HDMI", .patch = patch_generic_hdmi },
  2795. { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
  2796. { .id = 0x80862882, .name = "Valleyview2 HDMI", .patch = patch_generic_hdmi },
  2797. { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
  2798. {} /* terminator */
  2799. };
  2800. MODULE_ALIAS("snd-hda-codec-id:1002793c");
  2801. MODULE_ALIAS("snd-hda-codec-id:10027919");
  2802. MODULE_ALIAS("snd-hda-codec-id:1002791a");
  2803. MODULE_ALIAS("snd-hda-codec-id:1002aa01");
  2804. MODULE_ALIAS("snd-hda-codec-id:10951390");
  2805. MODULE_ALIAS("snd-hda-codec-id:10951392");
  2806. MODULE_ALIAS("snd-hda-codec-id:10de0002");
  2807. MODULE_ALIAS("snd-hda-codec-id:10de0003");
  2808. MODULE_ALIAS("snd-hda-codec-id:10de0005");
  2809. MODULE_ALIAS("snd-hda-codec-id:10de0006");
  2810. MODULE_ALIAS("snd-hda-codec-id:10de0007");
  2811. MODULE_ALIAS("snd-hda-codec-id:10de000a");
  2812. MODULE_ALIAS("snd-hda-codec-id:10de000b");
  2813. MODULE_ALIAS("snd-hda-codec-id:10de000c");
  2814. MODULE_ALIAS("snd-hda-codec-id:10de000d");
  2815. MODULE_ALIAS("snd-hda-codec-id:10de0010");
  2816. MODULE_ALIAS("snd-hda-codec-id:10de0011");
  2817. MODULE_ALIAS("snd-hda-codec-id:10de0012");
  2818. MODULE_ALIAS("snd-hda-codec-id:10de0013");
  2819. MODULE_ALIAS("snd-hda-codec-id:10de0014");
  2820. MODULE_ALIAS("snd-hda-codec-id:10de0015");
  2821. MODULE_ALIAS("snd-hda-codec-id:10de0016");
  2822. MODULE_ALIAS("snd-hda-codec-id:10de0018");
  2823. MODULE_ALIAS("snd-hda-codec-id:10de0019");
  2824. MODULE_ALIAS("snd-hda-codec-id:10de001a");
  2825. MODULE_ALIAS("snd-hda-codec-id:10de001b");
  2826. MODULE_ALIAS("snd-hda-codec-id:10de001c");
  2827. MODULE_ALIAS("snd-hda-codec-id:10de0040");
  2828. MODULE_ALIAS("snd-hda-codec-id:10de0041");
  2829. MODULE_ALIAS("snd-hda-codec-id:10de0042");
  2830. MODULE_ALIAS("snd-hda-codec-id:10de0043");
  2831. MODULE_ALIAS("snd-hda-codec-id:10de0044");
  2832. MODULE_ALIAS("snd-hda-codec-id:10de0051");
  2833. MODULE_ALIAS("snd-hda-codec-id:10de0060");
  2834. MODULE_ALIAS("snd-hda-codec-id:10de0067");
  2835. MODULE_ALIAS("snd-hda-codec-id:10de8001");
  2836. MODULE_ALIAS("snd-hda-codec-id:11069f80");
  2837. MODULE_ALIAS("snd-hda-codec-id:11069f81");
  2838. MODULE_ALIAS("snd-hda-codec-id:11069f84");
  2839. MODULE_ALIAS("snd-hda-codec-id:11069f85");
  2840. MODULE_ALIAS("snd-hda-codec-id:17e80047");
  2841. MODULE_ALIAS("snd-hda-codec-id:80860054");
  2842. MODULE_ALIAS("snd-hda-codec-id:80862801");
  2843. MODULE_ALIAS("snd-hda-codec-id:80862802");
  2844. MODULE_ALIAS("snd-hda-codec-id:80862803");
  2845. MODULE_ALIAS("snd-hda-codec-id:80862804");
  2846. MODULE_ALIAS("snd-hda-codec-id:80862805");
  2847. MODULE_ALIAS("snd-hda-codec-id:80862806");
  2848. MODULE_ALIAS("snd-hda-codec-id:80862807");
  2849. MODULE_ALIAS("snd-hda-codec-id:80862808");
  2850. MODULE_ALIAS("snd-hda-codec-id:80862880");
  2851. MODULE_ALIAS("snd-hda-codec-id:80862882");
  2852. MODULE_ALIAS("snd-hda-codec-id:808629fb");
  2853. MODULE_LICENSE("GPL");
  2854. MODULE_DESCRIPTION("HDMI HD-audio codec");
  2855. MODULE_ALIAS("snd-hda-codec-intelhdmi");
  2856. MODULE_ALIAS("snd-hda-codec-nvhdmi");
  2857. MODULE_ALIAS("snd-hda-codec-atihdmi");
  2858. static struct hda_codec_preset_list intel_list = {
  2859. .preset = snd_hda_preset_hdmi,
  2860. .owner = THIS_MODULE,
  2861. };
  2862. static int __init patch_hdmi_init(void)
  2863. {
  2864. return snd_hda_add_codec_preset(&intel_list);
  2865. }
  2866. static void __exit patch_hdmi_exit(void)
  2867. {
  2868. snd_hda_delete_codec_preset(&intel_list);
  2869. }
  2870. module_init(patch_hdmi_init)
  2871. module_exit(patch_hdmi_exit)