events_base.c 38 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is received, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt
  24. #include <linux/linkage.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/irq.h>
  27. #include <linux/module.h>
  28. #include <linux/string.h>
  29. #include <linux/bootmem.h>
  30. #include <linux/slab.h>
  31. #include <linux/irqnr.h>
  32. #include <linux/pci.h>
  33. #ifdef CONFIG_X86
  34. #include <asm/desc.h>
  35. #include <asm/ptrace.h>
  36. #include <asm/irq.h>
  37. #include <asm/idle.h>
  38. #include <asm/io_apic.h>
  39. #include <asm/xen/page.h>
  40. #include <asm/xen/pci.h>
  41. #endif
  42. #include <asm/sync_bitops.h>
  43. #include <asm/xen/hypercall.h>
  44. #include <asm/xen/hypervisor.h>
  45. #include <xen/xen.h>
  46. #include <xen/hvm.h>
  47. #include <xen/xen-ops.h>
  48. #include <xen/events.h>
  49. #include <xen/interface/xen.h>
  50. #include <xen/interface/event_channel.h>
  51. #include <xen/interface/hvm/hvm_op.h>
  52. #include <xen/interface/hvm/params.h>
  53. #include <xen/interface/physdev.h>
  54. #include <xen/interface/sched.h>
  55. #include <xen/interface/vcpu.h>
  56. #include <asm/hw_irq.h>
  57. #include "events_internal.h"
  58. const struct evtchn_ops *evtchn_ops;
  59. /*
  60. * This lock protects updates to the following mapping and reference-count
  61. * arrays. The lock does not need to be acquired to read the mapping tables.
  62. */
  63. static DEFINE_MUTEX(irq_mapping_update_lock);
  64. static LIST_HEAD(xen_irq_list_head);
  65. /* IRQ <-> VIRQ mapping. */
  66. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  67. /* IRQ <-> IPI mapping */
  68. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  69. int **evtchn_to_irq;
  70. #ifdef CONFIG_X86
  71. static unsigned long *pirq_eoi_map;
  72. #endif
  73. static bool (*pirq_needs_eoi)(unsigned irq);
  74. #define EVTCHN_ROW(e) (e / (PAGE_SIZE/sizeof(**evtchn_to_irq)))
  75. #define EVTCHN_COL(e) (e % (PAGE_SIZE/sizeof(**evtchn_to_irq)))
  76. #define EVTCHN_PER_ROW (PAGE_SIZE / sizeof(**evtchn_to_irq))
  77. /* Xen will never allocate port zero for any purpose. */
  78. #define VALID_EVTCHN(chn) ((chn) != 0)
  79. static struct irq_chip xen_dynamic_chip;
  80. static struct irq_chip xen_percpu_chip;
  81. static struct irq_chip xen_pirq_chip;
  82. static void enable_dynirq(struct irq_data *data);
  83. static void disable_dynirq(struct irq_data *data);
  84. static void clear_evtchn_to_irq_row(unsigned row)
  85. {
  86. unsigned col;
  87. for (col = 0; col < EVTCHN_PER_ROW; col++)
  88. evtchn_to_irq[row][col] = -1;
  89. }
  90. static void clear_evtchn_to_irq_all(void)
  91. {
  92. unsigned row;
  93. for (row = 0; row < EVTCHN_ROW(xen_evtchn_max_channels()); row++) {
  94. if (evtchn_to_irq[row] == NULL)
  95. continue;
  96. clear_evtchn_to_irq_row(row);
  97. }
  98. }
  99. static int set_evtchn_to_irq(unsigned evtchn, unsigned irq)
  100. {
  101. unsigned row;
  102. unsigned col;
  103. if (evtchn >= xen_evtchn_max_channels())
  104. return -EINVAL;
  105. row = EVTCHN_ROW(evtchn);
  106. col = EVTCHN_COL(evtchn);
  107. if (evtchn_to_irq[row] == NULL) {
  108. /* Unallocated irq entries return -1 anyway */
  109. if (irq == -1)
  110. return 0;
  111. evtchn_to_irq[row] = (int *)get_zeroed_page(GFP_KERNEL);
  112. if (evtchn_to_irq[row] == NULL)
  113. return -ENOMEM;
  114. clear_evtchn_to_irq_row(row);
  115. }
  116. evtchn_to_irq[EVTCHN_ROW(evtchn)][EVTCHN_COL(evtchn)] = irq;
  117. return 0;
  118. }
  119. int get_evtchn_to_irq(unsigned evtchn)
  120. {
  121. if (evtchn >= xen_evtchn_max_channels())
  122. return -1;
  123. if (evtchn_to_irq[EVTCHN_ROW(evtchn)] == NULL)
  124. return -1;
  125. return evtchn_to_irq[EVTCHN_ROW(evtchn)][EVTCHN_COL(evtchn)];
  126. }
  127. /* Get info for IRQ */
  128. struct irq_info *info_for_irq(unsigned irq)
  129. {
  130. return irq_get_handler_data(irq);
  131. }
  132. /* Constructors for packed IRQ information. */
  133. static int xen_irq_info_common_setup(struct irq_info *info,
  134. unsigned irq,
  135. enum xen_irq_type type,
  136. unsigned evtchn,
  137. unsigned short cpu)
  138. {
  139. int ret;
  140. BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
  141. info->type = type;
  142. info->irq = irq;
  143. info->evtchn = evtchn;
  144. info->cpu = cpu;
  145. ret = set_evtchn_to_irq(evtchn, irq);
  146. if (ret < 0)
  147. return ret;
  148. irq_clear_status_flags(irq, IRQ_NOREQUEST|IRQ_NOAUTOEN);
  149. return xen_evtchn_port_setup(info);
  150. }
  151. static int xen_irq_info_evtchn_setup(unsigned irq,
  152. unsigned evtchn)
  153. {
  154. struct irq_info *info = info_for_irq(irq);
  155. return xen_irq_info_common_setup(info, irq, IRQT_EVTCHN, evtchn, 0);
  156. }
  157. static int xen_irq_info_ipi_setup(unsigned cpu,
  158. unsigned irq,
  159. unsigned evtchn,
  160. enum ipi_vector ipi)
  161. {
  162. struct irq_info *info = info_for_irq(irq);
  163. info->u.ipi = ipi;
  164. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  165. return xen_irq_info_common_setup(info, irq, IRQT_IPI, evtchn, 0);
  166. }
  167. static int xen_irq_info_virq_setup(unsigned cpu,
  168. unsigned irq,
  169. unsigned evtchn,
  170. unsigned virq)
  171. {
  172. struct irq_info *info = info_for_irq(irq);
  173. info->u.virq = virq;
  174. per_cpu(virq_to_irq, cpu)[virq] = irq;
  175. return xen_irq_info_common_setup(info, irq, IRQT_VIRQ, evtchn, 0);
  176. }
  177. static int xen_irq_info_pirq_setup(unsigned irq,
  178. unsigned evtchn,
  179. unsigned pirq,
  180. unsigned gsi,
  181. uint16_t domid,
  182. unsigned char flags)
  183. {
  184. struct irq_info *info = info_for_irq(irq);
  185. info->u.pirq.pirq = pirq;
  186. info->u.pirq.gsi = gsi;
  187. info->u.pirq.domid = domid;
  188. info->u.pirq.flags = flags;
  189. return xen_irq_info_common_setup(info, irq, IRQT_PIRQ, evtchn, 0);
  190. }
  191. static void xen_irq_info_cleanup(struct irq_info *info)
  192. {
  193. set_evtchn_to_irq(info->evtchn, -1);
  194. info->evtchn = 0;
  195. }
  196. /*
  197. * Accessors for packed IRQ information.
  198. */
  199. unsigned int evtchn_from_irq(unsigned irq)
  200. {
  201. if (unlikely(WARN(irq < 0 || irq >= nr_irqs, "Invalid irq %d!\n", irq)))
  202. return 0;
  203. return info_for_irq(irq)->evtchn;
  204. }
  205. unsigned irq_from_evtchn(unsigned int evtchn)
  206. {
  207. return get_evtchn_to_irq(evtchn);
  208. }
  209. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  210. int irq_from_virq(unsigned int cpu, unsigned int virq)
  211. {
  212. return per_cpu(virq_to_irq, cpu)[virq];
  213. }
  214. static enum ipi_vector ipi_from_irq(unsigned irq)
  215. {
  216. struct irq_info *info = info_for_irq(irq);
  217. BUG_ON(info == NULL);
  218. BUG_ON(info->type != IRQT_IPI);
  219. return info->u.ipi;
  220. }
  221. static unsigned virq_from_irq(unsigned irq)
  222. {
  223. struct irq_info *info = info_for_irq(irq);
  224. BUG_ON(info == NULL);
  225. BUG_ON(info->type != IRQT_VIRQ);
  226. return info->u.virq;
  227. }
  228. static unsigned pirq_from_irq(unsigned irq)
  229. {
  230. struct irq_info *info = info_for_irq(irq);
  231. BUG_ON(info == NULL);
  232. BUG_ON(info->type != IRQT_PIRQ);
  233. return info->u.pirq.pirq;
  234. }
  235. static enum xen_irq_type type_from_irq(unsigned irq)
  236. {
  237. return info_for_irq(irq)->type;
  238. }
  239. unsigned cpu_from_irq(unsigned irq)
  240. {
  241. return info_for_irq(irq)->cpu;
  242. }
  243. unsigned int cpu_from_evtchn(unsigned int evtchn)
  244. {
  245. int irq = get_evtchn_to_irq(evtchn);
  246. unsigned ret = 0;
  247. if (irq != -1)
  248. ret = cpu_from_irq(irq);
  249. return ret;
  250. }
  251. #ifdef CONFIG_X86
  252. static bool pirq_check_eoi_map(unsigned irq)
  253. {
  254. return test_bit(pirq_from_irq(irq), pirq_eoi_map);
  255. }
  256. #endif
  257. static bool pirq_needs_eoi_flag(unsigned irq)
  258. {
  259. struct irq_info *info = info_for_irq(irq);
  260. BUG_ON(info->type != IRQT_PIRQ);
  261. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  262. }
  263. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  264. {
  265. int irq = get_evtchn_to_irq(chn);
  266. struct irq_info *info = info_for_irq(irq);
  267. BUG_ON(irq == -1);
  268. #ifdef CONFIG_SMP
  269. cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu));
  270. #endif
  271. xen_evtchn_port_bind_to_cpu(info, cpu);
  272. info->cpu = cpu;
  273. }
  274. static void xen_evtchn_mask_all(void)
  275. {
  276. unsigned int evtchn;
  277. for (evtchn = 0; evtchn < xen_evtchn_nr_channels(); evtchn++)
  278. mask_evtchn(evtchn);
  279. }
  280. /**
  281. * notify_remote_via_irq - send event to remote end of event channel via irq
  282. * @irq: irq of event channel to send event to
  283. *
  284. * Unlike notify_remote_via_evtchn(), this is safe to use across
  285. * save/restore. Notifications on a broken connection are silently
  286. * dropped.
  287. */
  288. void notify_remote_via_irq(int irq)
  289. {
  290. int evtchn = evtchn_from_irq(irq);
  291. if (VALID_EVTCHN(evtchn))
  292. notify_remote_via_evtchn(evtchn);
  293. }
  294. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  295. static void xen_irq_init(unsigned irq)
  296. {
  297. struct irq_info *info;
  298. #ifdef CONFIG_SMP
  299. struct irq_desc *desc = irq_to_desc(irq);
  300. /* By default all event channels notify CPU#0. */
  301. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  302. #endif
  303. info = kzalloc(sizeof(*info), GFP_KERNEL);
  304. if (info == NULL)
  305. panic("Unable to allocate metadata for IRQ%d\n", irq);
  306. info->type = IRQT_UNBOUND;
  307. info->refcnt = -1;
  308. irq_set_handler_data(irq, info);
  309. list_add_tail(&info->list, &xen_irq_list_head);
  310. }
  311. static int __must_check xen_allocate_irq_dynamic(void)
  312. {
  313. int first = 0;
  314. int irq;
  315. #ifdef CONFIG_X86_IO_APIC
  316. /*
  317. * For an HVM guest or domain 0 which see "real" (emulated or
  318. * actual respectively) GSIs we allocate dynamic IRQs
  319. * e.g. those corresponding to event channels or MSIs
  320. * etc. from the range above those "real" GSIs to avoid
  321. * collisions.
  322. */
  323. if (xen_initial_domain() || xen_hvm_domain())
  324. first = get_nr_irqs_gsi();
  325. #endif
  326. irq = irq_alloc_desc_from(first, -1);
  327. if (irq >= 0)
  328. xen_irq_init(irq);
  329. return irq;
  330. }
  331. static int __must_check xen_allocate_irq_gsi(unsigned gsi)
  332. {
  333. int irq;
  334. /*
  335. * A PV guest has no concept of a GSI (since it has no ACPI
  336. * nor access to/knowledge of the physical APICs). Therefore
  337. * all IRQs are dynamically allocated from the entire IRQ
  338. * space.
  339. */
  340. if (xen_pv_domain() && !xen_initial_domain())
  341. return xen_allocate_irq_dynamic();
  342. /* Legacy IRQ descriptors are already allocated by the arch. */
  343. if (gsi < NR_IRQS_LEGACY)
  344. irq = gsi;
  345. else
  346. irq = irq_alloc_desc_at(gsi, -1);
  347. xen_irq_init(irq);
  348. return irq;
  349. }
  350. static void xen_free_irq(unsigned irq)
  351. {
  352. struct irq_info *info = irq_get_handler_data(irq);
  353. if (WARN_ON(!info))
  354. return;
  355. list_del(&info->list);
  356. irq_set_handler_data(irq, NULL);
  357. WARN_ON(info->refcnt > 0);
  358. kfree(info);
  359. /* Legacy IRQ descriptors are managed by the arch. */
  360. if (irq < NR_IRQS_LEGACY)
  361. return;
  362. irq_free_desc(irq);
  363. }
  364. static void xen_evtchn_close(unsigned int port)
  365. {
  366. struct evtchn_close close;
  367. close.port = port;
  368. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  369. BUG();
  370. /* Closed ports are implicitly re-bound to VCPU0. */
  371. bind_evtchn_to_cpu(port, 0);
  372. }
  373. static void pirq_query_unmask(int irq)
  374. {
  375. struct physdev_irq_status_query irq_status;
  376. struct irq_info *info = info_for_irq(irq);
  377. BUG_ON(info->type != IRQT_PIRQ);
  378. irq_status.irq = pirq_from_irq(irq);
  379. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  380. irq_status.flags = 0;
  381. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  382. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  383. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  384. }
  385. static bool probing_irq(int irq)
  386. {
  387. struct irq_desc *desc = irq_to_desc(irq);
  388. return desc && desc->action == NULL;
  389. }
  390. static void eoi_pirq(struct irq_data *data)
  391. {
  392. int evtchn = evtchn_from_irq(data->irq);
  393. struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) };
  394. int rc = 0;
  395. irq_move_irq(data);
  396. if (VALID_EVTCHN(evtchn))
  397. clear_evtchn(evtchn);
  398. if (pirq_needs_eoi(data->irq)) {
  399. rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  400. WARN_ON(rc);
  401. }
  402. }
  403. static void mask_ack_pirq(struct irq_data *data)
  404. {
  405. disable_dynirq(data);
  406. eoi_pirq(data);
  407. }
  408. static unsigned int __startup_pirq(unsigned int irq)
  409. {
  410. struct evtchn_bind_pirq bind_pirq;
  411. struct irq_info *info = info_for_irq(irq);
  412. int evtchn = evtchn_from_irq(irq);
  413. int rc;
  414. BUG_ON(info->type != IRQT_PIRQ);
  415. if (VALID_EVTCHN(evtchn))
  416. goto out;
  417. bind_pirq.pirq = pirq_from_irq(irq);
  418. /* NB. We are happy to share unless we are probing. */
  419. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  420. BIND_PIRQ__WILL_SHARE : 0;
  421. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  422. if (rc != 0) {
  423. if (!probing_irq(irq))
  424. pr_info("Failed to obtain physical IRQ %d\n", irq);
  425. return 0;
  426. }
  427. evtchn = bind_pirq.port;
  428. pirq_query_unmask(irq);
  429. rc = set_evtchn_to_irq(evtchn, irq);
  430. if (rc != 0) {
  431. pr_err("irq%d: Failed to set port to irq mapping (%d)\n",
  432. irq, rc);
  433. xen_evtchn_close(evtchn);
  434. return 0;
  435. }
  436. bind_evtchn_to_cpu(evtchn, 0);
  437. info->evtchn = evtchn;
  438. out:
  439. unmask_evtchn(evtchn);
  440. eoi_pirq(irq_get_irq_data(irq));
  441. return 0;
  442. }
  443. static unsigned int startup_pirq(struct irq_data *data)
  444. {
  445. return __startup_pirq(data->irq);
  446. }
  447. static void shutdown_pirq(struct irq_data *data)
  448. {
  449. unsigned int irq = data->irq;
  450. struct irq_info *info = info_for_irq(irq);
  451. unsigned evtchn = evtchn_from_irq(irq);
  452. BUG_ON(info->type != IRQT_PIRQ);
  453. if (!VALID_EVTCHN(evtchn))
  454. return;
  455. mask_evtchn(evtchn);
  456. xen_evtchn_close(evtchn);
  457. xen_irq_info_cleanup(info);
  458. }
  459. static void enable_pirq(struct irq_data *data)
  460. {
  461. startup_pirq(data);
  462. }
  463. static void disable_pirq(struct irq_data *data)
  464. {
  465. disable_dynirq(data);
  466. }
  467. int xen_irq_from_gsi(unsigned gsi)
  468. {
  469. struct irq_info *info;
  470. list_for_each_entry(info, &xen_irq_list_head, list) {
  471. if (info->type != IRQT_PIRQ)
  472. continue;
  473. if (info->u.pirq.gsi == gsi)
  474. return info->irq;
  475. }
  476. return -1;
  477. }
  478. EXPORT_SYMBOL_GPL(xen_irq_from_gsi);
  479. static void __unbind_from_irq(unsigned int irq)
  480. {
  481. int evtchn = evtchn_from_irq(irq);
  482. struct irq_info *info = irq_get_handler_data(irq);
  483. if (info->refcnt > 0) {
  484. info->refcnt--;
  485. if (info->refcnt != 0)
  486. return;
  487. }
  488. if (VALID_EVTCHN(evtchn)) {
  489. unsigned int cpu = cpu_from_irq(irq);
  490. xen_evtchn_close(evtchn);
  491. switch (type_from_irq(irq)) {
  492. case IRQT_VIRQ:
  493. per_cpu(virq_to_irq, cpu)[virq_from_irq(irq)] = -1;
  494. break;
  495. case IRQT_IPI:
  496. per_cpu(ipi_to_irq, cpu)[ipi_from_irq(irq)] = -1;
  497. break;
  498. default:
  499. break;
  500. }
  501. xen_irq_info_cleanup(info);
  502. }
  503. BUG_ON(info_for_irq(irq)->type == IRQT_UNBOUND);
  504. xen_free_irq(irq);
  505. }
  506. /*
  507. * Do not make any assumptions regarding the relationship between the
  508. * IRQ number returned here and the Xen pirq argument.
  509. *
  510. * Note: We don't assign an event channel until the irq actually started
  511. * up. Return an existing irq if we've already got one for the gsi.
  512. *
  513. * Shareable implies level triggered, not shareable implies edge
  514. * triggered here.
  515. */
  516. int xen_bind_pirq_gsi_to_irq(unsigned gsi,
  517. unsigned pirq, int shareable, char *name)
  518. {
  519. int irq = -1;
  520. struct physdev_irq irq_op;
  521. int ret;
  522. mutex_lock(&irq_mapping_update_lock);
  523. irq = xen_irq_from_gsi(gsi);
  524. if (irq != -1) {
  525. pr_info("%s: returning irq %d for gsi %u\n",
  526. __func__, irq, gsi);
  527. goto out;
  528. }
  529. irq = xen_allocate_irq_gsi(gsi);
  530. if (irq < 0)
  531. goto out;
  532. irq_op.irq = irq;
  533. irq_op.vector = 0;
  534. /* Only the privileged domain can do this. For non-priv, the pcifront
  535. * driver provides a PCI bus that does the call to do exactly
  536. * this in the priv domain. */
  537. if (xen_initial_domain() &&
  538. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  539. xen_free_irq(irq);
  540. irq = -ENOSPC;
  541. goto out;
  542. }
  543. ret = xen_irq_info_pirq_setup(irq, 0, pirq, gsi, DOMID_SELF,
  544. shareable ? PIRQ_SHAREABLE : 0);
  545. if (ret < 0) {
  546. __unbind_from_irq(irq);
  547. irq = ret;
  548. goto out;
  549. }
  550. pirq_query_unmask(irq);
  551. /* We try to use the handler with the appropriate semantic for the
  552. * type of interrupt: if the interrupt is an edge triggered
  553. * interrupt we use handle_edge_irq.
  554. *
  555. * On the other hand if the interrupt is level triggered we use
  556. * handle_fasteoi_irq like the native code does for this kind of
  557. * interrupts.
  558. *
  559. * Depending on the Xen version, pirq_needs_eoi might return true
  560. * not only for level triggered interrupts but for edge triggered
  561. * interrupts too. In any case Xen always honors the eoi mechanism,
  562. * not injecting any more pirqs of the same kind if the first one
  563. * hasn't received an eoi yet. Therefore using the fasteoi handler
  564. * is the right choice either way.
  565. */
  566. if (shareable)
  567. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  568. handle_fasteoi_irq, name);
  569. else
  570. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  571. handle_edge_irq, name);
  572. out:
  573. mutex_unlock(&irq_mapping_update_lock);
  574. return irq;
  575. }
  576. #ifdef CONFIG_PCI_MSI
  577. int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
  578. {
  579. int rc;
  580. struct physdev_get_free_pirq op_get_free_pirq;
  581. op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
  582. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
  583. WARN_ONCE(rc == -ENOSYS,
  584. "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
  585. return rc ? -1 : op_get_free_pirq.pirq;
  586. }
  587. int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
  588. int pirq, const char *name, domid_t domid)
  589. {
  590. int irq, ret;
  591. mutex_lock(&irq_mapping_update_lock);
  592. irq = xen_allocate_irq_dynamic();
  593. if (irq < 0)
  594. goto out;
  595. irq_set_chip_and_handler_name(irq, &xen_pirq_chip, handle_edge_irq,
  596. name);
  597. ret = xen_irq_info_pirq_setup(irq, 0, pirq, 0, domid, 0);
  598. if (ret < 0)
  599. goto error_irq;
  600. ret = irq_set_msi_desc(irq, msidesc);
  601. if (ret < 0)
  602. goto error_irq;
  603. out:
  604. mutex_unlock(&irq_mapping_update_lock);
  605. return irq;
  606. error_irq:
  607. __unbind_from_irq(irq);
  608. mutex_unlock(&irq_mapping_update_lock);
  609. return ret;
  610. }
  611. #endif
  612. int xen_destroy_irq(int irq)
  613. {
  614. struct irq_desc *desc;
  615. struct physdev_unmap_pirq unmap_irq;
  616. struct irq_info *info = info_for_irq(irq);
  617. int rc = -ENOENT;
  618. mutex_lock(&irq_mapping_update_lock);
  619. desc = irq_to_desc(irq);
  620. if (!desc)
  621. goto out;
  622. if (xen_initial_domain()) {
  623. unmap_irq.pirq = info->u.pirq.pirq;
  624. unmap_irq.domid = info->u.pirq.domid;
  625. rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
  626. /* If another domain quits without making the pci_disable_msix
  627. * call, the Xen hypervisor takes care of freeing the PIRQs
  628. * (free_domain_pirqs).
  629. */
  630. if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF))
  631. pr_info("domain %d does not have %d anymore\n",
  632. info->u.pirq.domid, info->u.pirq.pirq);
  633. else if (rc) {
  634. pr_warn("unmap irq failed %d\n", rc);
  635. goto out;
  636. }
  637. }
  638. xen_free_irq(irq);
  639. out:
  640. mutex_unlock(&irq_mapping_update_lock);
  641. return rc;
  642. }
  643. int xen_irq_from_pirq(unsigned pirq)
  644. {
  645. int irq;
  646. struct irq_info *info;
  647. mutex_lock(&irq_mapping_update_lock);
  648. list_for_each_entry(info, &xen_irq_list_head, list) {
  649. if (info->type != IRQT_PIRQ)
  650. continue;
  651. irq = info->irq;
  652. if (info->u.pirq.pirq == pirq)
  653. goto out;
  654. }
  655. irq = -1;
  656. out:
  657. mutex_unlock(&irq_mapping_update_lock);
  658. return irq;
  659. }
  660. int xen_pirq_from_irq(unsigned irq)
  661. {
  662. return pirq_from_irq(irq);
  663. }
  664. EXPORT_SYMBOL_GPL(xen_pirq_from_irq);
  665. int bind_evtchn_to_irq(unsigned int evtchn)
  666. {
  667. int irq;
  668. int ret;
  669. if (evtchn >= xen_evtchn_max_channels())
  670. return -ENOMEM;
  671. mutex_lock(&irq_mapping_update_lock);
  672. irq = get_evtchn_to_irq(evtchn);
  673. if (irq == -1) {
  674. irq = xen_allocate_irq_dynamic();
  675. if (irq < 0)
  676. goto out;
  677. irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
  678. handle_edge_irq, "event");
  679. ret = xen_irq_info_evtchn_setup(irq, evtchn);
  680. if (ret < 0) {
  681. __unbind_from_irq(irq);
  682. irq = ret;
  683. goto out;
  684. }
  685. /* New interdomain events are bound to VCPU 0. */
  686. bind_evtchn_to_cpu(evtchn, 0);
  687. } else {
  688. struct irq_info *info = info_for_irq(irq);
  689. WARN_ON(info == NULL || info->type != IRQT_EVTCHN);
  690. }
  691. out:
  692. mutex_unlock(&irq_mapping_update_lock);
  693. return irq;
  694. }
  695. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  696. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  697. {
  698. struct evtchn_bind_ipi bind_ipi;
  699. int evtchn, irq;
  700. int ret;
  701. mutex_lock(&irq_mapping_update_lock);
  702. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  703. if (irq == -1) {
  704. irq = xen_allocate_irq_dynamic();
  705. if (irq < 0)
  706. goto out;
  707. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  708. handle_percpu_irq, "ipi");
  709. bind_ipi.vcpu = cpu;
  710. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  711. &bind_ipi) != 0)
  712. BUG();
  713. evtchn = bind_ipi.port;
  714. ret = xen_irq_info_ipi_setup(cpu, irq, evtchn, ipi);
  715. if (ret < 0) {
  716. __unbind_from_irq(irq);
  717. irq = ret;
  718. goto out;
  719. }
  720. bind_evtchn_to_cpu(evtchn, cpu);
  721. } else {
  722. struct irq_info *info = info_for_irq(irq);
  723. WARN_ON(info == NULL || info->type != IRQT_IPI);
  724. }
  725. out:
  726. mutex_unlock(&irq_mapping_update_lock);
  727. return irq;
  728. }
  729. static int bind_interdomain_evtchn_to_irq(unsigned int remote_domain,
  730. unsigned int remote_port)
  731. {
  732. struct evtchn_bind_interdomain bind_interdomain;
  733. int err;
  734. bind_interdomain.remote_dom = remote_domain;
  735. bind_interdomain.remote_port = remote_port;
  736. err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
  737. &bind_interdomain);
  738. return err ? : bind_evtchn_to_irq(bind_interdomain.local_port);
  739. }
  740. static int find_virq(unsigned int virq, unsigned int cpu)
  741. {
  742. struct evtchn_status status;
  743. int port, rc = -ENOENT;
  744. memset(&status, 0, sizeof(status));
  745. for (port = 0; port < xen_evtchn_max_channels(); port++) {
  746. status.dom = DOMID_SELF;
  747. status.port = port;
  748. rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status);
  749. if (rc < 0)
  750. continue;
  751. if (status.status != EVTCHNSTAT_virq)
  752. continue;
  753. if (status.u.virq == virq && status.vcpu == cpu) {
  754. rc = port;
  755. break;
  756. }
  757. }
  758. return rc;
  759. }
  760. /**
  761. * xen_evtchn_nr_channels - number of usable event channel ports
  762. *
  763. * This may be less than the maximum supported by the current
  764. * hypervisor ABI. Use xen_evtchn_max_channels() for the maximum
  765. * supported.
  766. */
  767. unsigned xen_evtchn_nr_channels(void)
  768. {
  769. return evtchn_ops->nr_channels();
  770. }
  771. EXPORT_SYMBOL_GPL(xen_evtchn_nr_channels);
  772. int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  773. {
  774. struct evtchn_bind_virq bind_virq;
  775. int evtchn, irq, ret;
  776. mutex_lock(&irq_mapping_update_lock);
  777. irq = per_cpu(virq_to_irq, cpu)[virq];
  778. if (irq == -1) {
  779. irq = xen_allocate_irq_dynamic();
  780. if (irq < 0)
  781. goto out;
  782. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  783. handle_percpu_irq, "virq");
  784. bind_virq.virq = virq;
  785. bind_virq.vcpu = cpu;
  786. ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  787. &bind_virq);
  788. if (ret == 0)
  789. evtchn = bind_virq.port;
  790. else {
  791. if (ret == -EEXIST)
  792. ret = find_virq(virq, cpu);
  793. BUG_ON(ret < 0);
  794. evtchn = ret;
  795. }
  796. ret = xen_irq_info_virq_setup(cpu, irq, evtchn, virq);
  797. if (ret < 0) {
  798. __unbind_from_irq(irq);
  799. irq = ret;
  800. goto out;
  801. }
  802. bind_evtchn_to_cpu(evtchn, cpu);
  803. } else {
  804. struct irq_info *info = info_for_irq(irq);
  805. WARN_ON(info == NULL || info->type != IRQT_VIRQ);
  806. }
  807. out:
  808. mutex_unlock(&irq_mapping_update_lock);
  809. return irq;
  810. }
  811. static void unbind_from_irq(unsigned int irq)
  812. {
  813. mutex_lock(&irq_mapping_update_lock);
  814. __unbind_from_irq(irq);
  815. mutex_unlock(&irq_mapping_update_lock);
  816. }
  817. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  818. irq_handler_t handler,
  819. unsigned long irqflags,
  820. const char *devname, void *dev_id)
  821. {
  822. int irq, retval;
  823. irq = bind_evtchn_to_irq(evtchn);
  824. if (irq < 0)
  825. return irq;
  826. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  827. if (retval != 0) {
  828. unbind_from_irq(irq);
  829. return retval;
  830. }
  831. return irq;
  832. }
  833. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  834. int bind_interdomain_evtchn_to_irqhandler(unsigned int remote_domain,
  835. unsigned int remote_port,
  836. irq_handler_t handler,
  837. unsigned long irqflags,
  838. const char *devname,
  839. void *dev_id)
  840. {
  841. int irq, retval;
  842. irq = bind_interdomain_evtchn_to_irq(remote_domain, remote_port);
  843. if (irq < 0)
  844. return irq;
  845. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  846. if (retval != 0) {
  847. unbind_from_irq(irq);
  848. return retval;
  849. }
  850. return irq;
  851. }
  852. EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler);
  853. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  854. irq_handler_t handler,
  855. unsigned long irqflags, const char *devname, void *dev_id)
  856. {
  857. int irq, retval;
  858. irq = bind_virq_to_irq(virq, cpu);
  859. if (irq < 0)
  860. return irq;
  861. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  862. if (retval != 0) {
  863. unbind_from_irq(irq);
  864. return retval;
  865. }
  866. return irq;
  867. }
  868. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  869. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  870. unsigned int cpu,
  871. irq_handler_t handler,
  872. unsigned long irqflags,
  873. const char *devname,
  874. void *dev_id)
  875. {
  876. int irq, retval;
  877. irq = bind_ipi_to_irq(ipi, cpu);
  878. if (irq < 0)
  879. return irq;
  880. irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME;
  881. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  882. if (retval != 0) {
  883. unbind_from_irq(irq);
  884. return retval;
  885. }
  886. return irq;
  887. }
  888. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  889. {
  890. struct irq_info *info = irq_get_handler_data(irq);
  891. if (WARN_ON(!info))
  892. return;
  893. free_irq(irq, dev_id);
  894. unbind_from_irq(irq);
  895. }
  896. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  897. /**
  898. * xen_set_irq_priority() - set an event channel priority.
  899. * @irq:irq bound to an event channel.
  900. * @priority: priority between XEN_IRQ_PRIORITY_MAX and XEN_IRQ_PRIORITY_MIN.
  901. */
  902. int xen_set_irq_priority(unsigned irq, unsigned priority)
  903. {
  904. struct evtchn_set_priority set_priority;
  905. set_priority.port = evtchn_from_irq(irq);
  906. set_priority.priority = priority;
  907. return HYPERVISOR_event_channel_op(EVTCHNOP_set_priority,
  908. &set_priority);
  909. }
  910. EXPORT_SYMBOL_GPL(xen_set_irq_priority);
  911. int evtchn_make_refcounted(unsigned int evtchn)
  912. {
  913. int irq = get_evtchn_to_irq(evtchn);
  914. struct irq_info *info;
  915. if (irq == -1)
  916. return -ENOENT;
  917. info = irq_get_handler_data(irq);
  918. if (!info)
  919. return -ENOENT;
  920. WARN_ON(info->refcnt != -1);
  921. info->refcnt = 1;
  922. return 0;
  923. }
  924. EXPORT_SYMBOL_GPL(evtchn_make_refcounted);
  925. int evtchn_get(unsigned int evtchn)
  926. {
  927. int irq;
  928. struct irq_info *info;
  929. int err = -ENOENT;
  930. if (evtchn >= xen_evtchn_max_channels())
  931. return -EINVAL;
  932. mutex_lock(&irq_mapping_update_lock);
  933. irq = get_evtchn_to_irq(evtchn);
  934. if (irq == -1)
  935. goto done;
  936. info = irq_get_handler_data(irq);
  937. if (!info)
  938. goto done;
  939. err = -EINVAL;
  940. if (info->refcnt <= 0)
  941. goto done;
  942. info->refcnt++;
  943. err = 0;
  944. done:
  945. mutex_unlock(&irq_mapping_update_lock);
  946. return err;
  947. }
  948. EXPORT_SYMBOL_GPL(evtchn_get);
  949. void evtchn_put(unsigned int evtchn)
  950. {
  951. int irq = get_evtchn_to_irq(evtchn);
  952. if (WARN_ON(irq == -1))
  953. return;
  954. unbind_from_irq(irq);
  955. }
  956. EXPORT_SYMBOL_GPL(evtchn_put);
  957. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  958. {
  959. int irq;
  960. #ifdef CONFIG_X86
  961. if (unlikely(vector == XEN_NMI_VECTOR)) {
  962. int rc = HYPERVISOR_vcpu_op(VCPUOP_send_nmi, cpu, NULL);
  963. if (rc < 0)
  964. printk(KERN_WARNING "Sending nmi to CPU%d failed (rc:%d)\n", cpu, rc);
  965. return;
  966. }
  967. #endif
  968. irq = per_cpu(ipi_to_irq, cpu)[vector];
  969. BUG_ON(irq < 0);
  970. notify_remote_via_irq(irq);
  971. }
  972. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  973. static void __xen_evtchn_do_upcall(void)
  974. {
  975. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  976. int cpu = get_cpu();
  977. unsigned count;
  978. do {
  979. vcpu_info->evtchn_upcall_pending = 0;
  980. if (__this_cpu_inc_return(xed_nesting_count) - 1)
  981. goto out;
  982. xen_evtchn_handle_events(cpu);
  983. BUG_ON(!irqs_disabled());
  984. count = __this_cpu_read(xed_nesting_count);
  985. __this_cpu_write(xed_nesting_count, 0);
  986. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  987. out:
  988. put_cpu();
  989. }
  990. void xen_evtchn_do_upcall(struct pt_regs *regs)
  991. {
  992. struct pt_regs *old_regs = set_irq_regs(regs);
  993. irq_enter();
  994. #ifdef CONFIG_X86
  995. exit_idle();
  996. #endif
  997. __xen_evtchn_do_upcall();
  998. irq_exit();
  999. set_irq_regs(old_regs);
  1000. }
  1001. void xen_hvm_evtchn_do_upcall(void)
  1002. {
  1003. __xen_evtchn_do_upcall();
  1004. }
  1005. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  1006. /* Rebind a new event channel to an existing irq. */
  1007. void rebind_evtchn_irq(int evtchn, int irq)
  1008. {
  1009. struct irq_info *info = info_for_irq(irq);
  1010. if (WARN_ON(!info))
  1011. return;
  1012. /* Make sure the irq is masked, since the new event channel
  1013. will also be masked. */
  1014. disable_irq(irq);
  1015. mutex_lock(&irq_mapping_update_lock);
  1016. /* After resume the irq<->evtchn mappings are all cleared out */
  1017. BUG_ON(get_evtchn_to_irq(evtchn) != -1);
  1018. /* Expect irq to have been bound before,
  1019. so there should be a proper type */
  1020. BUG_ON(info->type == IRQT_UNBOUND);
  1021. (void)xen_irq_info_evtchn_setup(irq, evtchn);
  1022. mutex_unlock(&irq_mapping_update_lock);
  1023. /* new event channels are always bound to cpu 0 */
  1024. irq_set_affinity(irq, cpumask_of(0));
  1025. /* Unmask the event channel. */
  1026. enable_irq(irq);
  1027. }
  1028. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  1029. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  1030. {
  1031. struct evtchn_bind_vcpu bind_vcpu;
  1032. int evtchn = evtchn_from_irq(irq);
  1033. int masked;
  1034. if (!VALID_EVTCHN(evtchn))
  1035. return -1;
  1036. /*
  1037. * Events delivered via platform PCI interrupts are always
  1038. * routed to vcpu 0 and hence cannot be rebound.
  1039. */
  1040. if (xen_hvm_domain() && !xen_have_vector_callback)
  1041. return -1;
  1042. /* Send future instances of this interrupt to other vcpu. */
  1043. bind_vcpu.port = evtchn;
  1044. bind_vcpu.vcpu = tcpu;
  1045. /*
  1046. * Mask the event while changing the VCPU binding to prevent
  1047. * it being delivered on an unexpected VCPU.
  1048. */
  1049. masked = test_and_set_mask(evtchn);
  1050. /*
  1051. * If this fails, it usually just indicates that we're dealing with a
  1052. * virq or IPI channel, which don't actually need to be rebound. Ignore
  1053. * it, but don't do the xenlinux-level rebind in that case.
  1054. */
  1055. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  1056. bind_evtchn_to_cpu(evtchn, tcpu);
  1057. if (!masked)
  1058. unmask_evtchn(evtchn);
  1059. return 0;
  1060. }
  1061. static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
  1062. bool force)
  1063. {
  1064. unsigned tcpu = cpumask_first(dest);
  1065. return rebind_irq_to_cpu(data->irq, tcpu);
  1066. }
  1067. static int retrigger_evtchn(int evtchn)
  1068. {
  1069. int masked;
  1070. if (!VALID_EVTCHN(evtchn))
  1071. return 0;
  1072. masked = test_and_set_mask(evtchn);
  1073. set_evtchn(evtchn);
  1074. if (!masked)
  1075. unmask_evtchn(evtchn);
  1076. return 1;
  1077. }
  1078. int resend_irq_on_evtchn(unsigned int irq)
  1079. {
  1080. return retrigger_evtchn(evtchn_from_irq(irq));
  1081. }
  1082. static void enable_dynirq(struct irq_data *data)
  1083. {
  1084. int evtchn = evtchn_from_irq(data->irq);
  1085. if (VALID_EVTCHN(evtchn))
  1086. unmask_evtchn(evtchn);
  1087. }
  1088. static void disable_dynirq(struct irq_data *data)
  1089. {
  1090. int evtchn = evtchn_from_irq(data->irq);
  1091. if (VALID_EVTCHN(evtchn))
  1092. mask_evtchn(evtchn);
  1093. }
  1094. static void ack_dynirq(struct irq_data *data)
  1095. {
  1096. int evtchn = evtchn_from_irq(data->irq);
  1097. irq_move_irq(data);
  1098. if (VALID_EVTCHN(evtchn))
  1099. clear_evtchn(evtchn);
  1100. }
  1101. static void mask_ack_dynirq(struct irq_data *data)
  1102. {
  1103. disable_dynirq(data);
  1104. ack_dynirq(data);
  1105. }
  1106. static int retrigger_dynirq(struct irq_data *data)
  1107. {
  1108. return retrigger_evtchn(evtchn_from_irq(data->irq));
  1109. }
  1110. static void restore_pirqs(void)
  1111. {
  1112. int pirq, rc, irq, gsi;
  1113. struct physdev_map_pirq map_irq;
  1114. struct irq_info *info;
  1115. list_for_each_entry(info, &xen_irq_list_head, list) {
  1116. if (info->type != IRQT_PIRQ)
  1117. continue;
  1118. pirq = info->u.pirq.pirq;
  1119. gsi = info->u.pirq.gsi;
  1120. irq = info->irq;
  1121. /* save/restore of PT devices doesn't work, so at this point the
  1122. * only devices present are GSI based emulated devices */
  1123. if (!gsi)
  1124. continue;
  1125. map_irq.domid = DOMID_SELF;
  1126. map_irq.type = MAP_PIRQ_TYPE_GSI;
  1127. map_irq.index = gsi;
  1128. map_irq.pirq = pirq;
  1129. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  1130. if (rc) {
  1131. pr_warn("xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
  1132. gsi, irq, pirq, rc);
  1133. xen_free_irq(irq);
  1134. continue;
  1135. }
  1136. printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
  1137. __startup_pirq(irq);
  1138. }
  1139. }
  1140. static void restore_cpu_virqs(unsigned int cpu)
  1141. {
  1142. struct evtchn_bind_virq bind_virq;
  1143. int virq, irq, evtchn;
  1144. for (virq = 0; virq < NR_VIRQS; virq++) {
  1145. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  1146. continue;
  1147. BUG_ON(virq_from_irq(irq) != virq);
  1148. /* Get a new binding from Xen. */
  1149. bind_virq.virq = virq;
  1150. bind_virq.vcpu = cpu;
  1151. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  1152. &bind_virq) != 0)
  1153. BUG();
  1154. evtchn = bind_virq.port;
  1155. /* Record the new mapping. */
  1156. (void)xen_irq_info_virq_setup(cpu, irq, evtchn, virq);
  1157. bind_evtchn_to_cpu(evtchn, cpu);
  1158. }
  1159. }
  1160. static void restore_cpu_ipis(unsigned int cpu)
  1161. {
  1162. struct evtchn_bind_ipi bind_ipi;
  1163. int ipi, irq, evtchn;
  1164. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  1165. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  1166. continue;
  1167. BUG_ON(ipi_from_irq(irq) != ipi);
  1168. /* Get a new binding from Xen. */
  1169. bind_ipi.vcpu = cpu;
  1170. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1171. &bind_ipi) != 0)
  1172. BUG();
  1173. evtchn = bind_ipi.port;
  1174. /* Record the new mapping. */
  1175. (void)xen_irq_info_ipi_setup(cpu, irq, evtchn, ipi);
  1176. bind_evtchn_to_cpu(evtchn, cpu);
  1177. }
  1178. }
  1179. /* Clear an irq's pending state, in preparation for polling on it */
  1180. void xen_clear_irq_pending(int irq)
  1181. {
  1182. int evtchn = evtchn_from_irq(irq);
  1183. if (VALID_EVTCHN(evtchn))
  1184. clear_evtchn(evtchn);
  1185. }
  1186. EXPORT_SYMBOL(xen_clear_irq_pending);
  1187. void xen_set_irq_pending(int irq)
  1188. {
  1189. int evtchn = evtchn_from_irq(irq);
  1190. if (VALID_EVTCHN(evtchn))
  1191. set_evtchn(evtchn);
  1192. }
  1193. bool xen_test_irq_pending(int irq)
  1194. {
  1195. int evtchn = evtchn_from_irq(irq);
  1196. bool ret = false;
  1197. if (VALID_EVTCHN(evtchn))
  1198. ret = test_evtchn(evtchn);
  1199. return ret;
  1200. }
  1201. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  1202. * the irq will be disabled so it won't deliver an interrupt. */
  1203. void xen_poll_irq_timeout(int irq, u64 timeout)
  1204. {
  1205. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1206. if (VALID_EVTCHN(evtchn)) {
  1207. struct sched_poll poll;
  1208. poll.nr_ports = 1;
  1209. poll.timeout = timeout;
  1210. set_xen_guest_handle(poll.ports, &evtchn);
  1211. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  1212. BUG();
  1213. }
  1214. }
  1215. EXPORT_SYMBOL(xen_poll_irq_timeout);
  1216. /* Poll waiting for an irq to become pending. In the usual case, the
  1217. * irq will be disabled so it won't deliver an interrupt. */
  1218. void xen_poll_irq(int irq)
  1219. {
  1220. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  1221. }
  1222. /* Check whether the IRQ line is shared with other guests. */
  1223. int xen_test_irq_shared(int irq)
  1224. {
  1225. struct irq_info *info = info_for_irq(irq);
  1226. struct physdev_irq_status_query irq_status;
  1227. if (WARN_ON(!info))
  1228. return -ENOENT;
  1229. irq_status.irq = info->u.pirq.pirq;
  1230. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  1231. return 0;
  1232. return !(irq_status.flags & XENIRQSTAT_shared);
  1233. }
  1234. EXPORT_SYMBOL_GPL(xen_test_irq_shared);
  1235. void xen_irq_resume(void)
  1236. {
  1237. unsigned int cpu;
  1238. struct irq_info *info;
  1239. /* New event-channel space is not 'live' yet. */
  1240. xen_evtchn_mask_all();
  1241. xen_evtchn_resume();
  1242. /* No IRQ <-> event-channel mappings. */
  1243. list_for_each_entry(info, &xen_irq_list_head, list)
  1244. info->evtchn = 0; /* zap event-channel binding */
  1245. clear_evtchn_to_irq_all();
  1246. for_each_possible_cpu(cpu) {
  1247. restore_cpu_virqs(cpu);
  1248. restore_cpu_ipis(cpu);
  1249. }
  1250. restore_pirqs();
  1251. }
  1252. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1253. .name = "xen-dyn",
  1254. .irq_disable = disable_dynirq,
  1255. .irq_mask = disable_dynirq,
  1256. .irq_unmask = enable_dynirq,
  1257. .irq_ack = ack_dynirq,
  1258. .irq_mask_ack = mask_ack_dynirq,
  1259. .irq_set_affinity = set_affinity_irq,
  1260. .irq_retrigger = retrigger_dynirq,
  1261. };
  1262. static struct irq_chip xen_pirq_chip __read_mostly = {
  1263. .name = "xen-pirq",
  1264. .irq_startup = startup_pirq,
  1265. .irq_shutdown = shutdown_pirq,
  1266. .irq_enable = enable_pirq,
  1267. .irq_disable = disable_pirq,
  1268. .irq_mask = disable_dynirq,
  1269. .irq_unmask = enable_dynirq,
  1270. .irq_ack = eoi_pirq,
  1271. .irq_eoi = eoi_pirq,
  1272. .irq_mask_ack = mask_ack_pirq,
  1273. .irq_set_affinity = set_affinity_irq,
  1274. .irq_retrigger = retrigger_dynirq,
  1275. };
  1276. static struct irq_chip xen_percpu_chip __read_mostly = {
  1277. .name = "xen-percpu",
  1278. .irq_disable = disable_dynirq,
  1279. .irq_mask = disable_dynirq,
  1280. .irq_unmask = enable_dynirq,
  1281. .irq_ack = ack_dynirq,
  1282. };
  1283. int xen_set_callback_via(uint64_t via)
  1284. {
  1285. struct xen_hvm_param a;
  1286. a.domid = DOMID_SELF;
  1287. a.index = HVM_PARAM_CALLBACK_IRQ;
  1288. a.value = via;
  1289. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  1290. }
  1291. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  1292. #ifdef CONFIG_XEN_PVHVM
  1293. /* Vector callbacks are better than PCI interrupts to receive event
  1294. * channel notifications because we can receive vector callbacks on any
  1295. * vcpu and we don't need PCI support or APIC interactions. */
  1296. void xen_callback_vector(void)
  1297. {
  1298. int rc;
  1299. uint64_t callback_via;
  1300. if (xen_have_vector_callback) {
  1301. callback_via = HVM_CALLBACK_VECTOR(HYPERVISOR_CALLBACK_VECTOR);
  1302. rc = xen_set_callback_via(callback_via);
  1303. if (rc) {
  1304. pr_err("Request for Xen HVM callback vector failed\n");
  1305. xen_have_vector_callback = 0;
  1306. return;
  1307. }
  1308. pr_info("Xen HVM callback vector for event delivery is enabled\n");
  1309. /* in the restore case the vector has already been allocated */
  1310. if (!test_bit(HYPERVISOR_CALLBACK_VECTOR, used_vectors))
  1311. alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR,
  1312. xen_hvm_callback_vector);
  1313. }
  1314. }
  1315. #else
  1316. void xen_callback_vector(void) {}
  1317. #endif
  1318. #undef MODULE_PARAM_PREFIX
  1319. #define MODULE_PARAM_PREFIX "xen."
  1320. static bool fifo_events = true;
  1321. module_param(fifo_events, bool, 0);
  1322. void __init xen_init_IRQ(void)
  1323. {
  1324. int ret = -EINVAL;
  1325. if (fifo_events)
  1326. ret = xen_evtchn_fifo_init();
  1327. if (ret < 0)
  1328. xen_evtchn_2l_init();
  1329. evtchn_to_irq = kcalloc(EVTCHN_ROW(xen_evtchn_max_channels()),
  1330. sizeof(*evtchn_to_irq), GFP_KERNEL);
  1331. BUG_ON(!evtchn_to_irq);
  1332. /* No event channels are 'live' right now. */
  1333. xen_evtchn_mask_all();
  1334. pirq_needs_eoi = pirq_needs_eoi_flag;
  1335. #ifdef CONFIG_X86
  1336. if (xen_pv_domain()) {
  1337. irq_ctx_init(smp_processor_id());
  1338. if (xen_initial_domain())
  1339. pci_xen_initial_domain();
  1340. }
  1341. if (xen_feature(XENFEAT_hvm_callback_vector))
  1342. xen_callback_vector();
  1343. if (xen_hvm_domain()) {
  1344. native_init_IRQ();
  1345. /* pci_xen_hvm_init must be called after native_init_IRQ so that
  1346. * __acpi_register_gsi can point at the right function */
  1347. pci_xen_hvm_init();
  1348. } else {
  1349. int rc;
  1350. struct physdev_pirq_eoi_gmfn eoi_gmfn;
  1351. pirq_eoi_map = (void *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
  1352. eoi_gmfn.gmfn = virt_to_mfn(pirq_eoi_map);
  1353. rc = HYPERVISOR_physdev_op(PHYSDEVOP_pirq_eoi_gmfn_v2, &eoi_gmfn);
  1354. /* TODO: No PVH support for PIRQ EOI */
  1355. if (rc != 0) {
  1356. free_page((unsigned long) pirq_eoi_map);
  1357. pirq_eoi_map = NULL;
  1358. } else
  1359. pirq_needs_eoi = pirq_check_eoi_map;
  1360. }
  1361. #endif
  1362. }