musb_core.h 15 KB

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  1. /*
  2. * MUSB OTG driver defines
  3. *
  4. * Copyright 2005 Mentor Graphics Corporation
  5. * Copyright (C) 2005-2006 by Texas Instruments
  6. * Copyright (C) 2006-2007 Nokia Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  23. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  25. * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  27. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  28. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  29. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. */
  34. #ifndef __MUSB_CORE_H__
  35. #define __MUSB_CORE_H__
  36. #include <linux/slab.h>
  37. #include <linux/list.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/errno.h>
  40. #include <linux/timer.h>
  41. #include <linux/device.h>
  42. #include <linux/usb/ch9.h>
  43. #include <linux/usb/gadget.h>
  44. #include <linux/usb.h>
  45. #include <linux/usb/otg.h>
  46. #include <linux/usb/musb.h>
  47. #include <linux/phy/phy.h>
  48. #include <linux/workqueue.h>
  49. struct musb;
  50. struct musb_hw_ep;
  51. struct musb_ep;
  52. /* Helper defines for struct musb->hwvers */
  53. #define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
  54. #define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
  55. #define MUSB_HWVERS_RC 0x8000
  56. #define MUSB_HWVERS_1300 0x52C
  57. #define MUSB_HWVERS_1400 0x590
  58. #define MUSB_HWVERS_1800 0x720
  59. #define MUSB_HWVERS_1900 0x784
  60. #define MUSB_HWVERS_2000 0x800
  61. #include "musb_debug.h"
  62. #include "musb_dma.h"
  63. #include "musb_io.h"
  64. #include "musb_regs.h"
  65. #include "musb_gadget.h"
  66. #include <linux/usb/hcd.h>
  67. #include "musb_host.h"
  68. /* NOTE: otg and peripheral-only state machines start at B_IDLE.
  69. * OTG or host-only go to A_IDLE when ID is sensed.
  70. */
  71. #define is_peripheral_active(m) (!(m)->is_host)
  72. #define is_host_active(m) ((m)->is_host)
  73. enum {
  74. MUSB_PORT_MODE_HOST = 1,
  75. MUSB_PORT_MODE_GADGET,
  76. MUSB_PORT_MODE_DUAL_ROLE,
  77. };
  78. /****************************** CONSTANTS ********************************/
  79. #ifndef MUSB_C_NUM_EPS
  80. #define MUSB_C_NUM_EPS ((u8)16)
  81. #endif
  82. #ifndef MUSB_MAX_END0_PACKET
  83. #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
  84. #endif
  85. /* host side ep0 states */
  86. enum musb_h_ep0_state {
  87. MUSB_EP0_IDLE,
  88. MUSB_EP0_START, /* expect ack of setup */
  89. MUSB_EP0_IN, /* expect IN DATA */
  90. MUSB_EP0_OUT, /* expect ack of OUT DATA */
  91. MUSB_EP0_STATUS, /* expect ack of STATUS */
  92. } __attribute__ ((packed));
  93. /* peripheral side ep0 states */
  94. enum musb_g_ep0_state {
  95. MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
  96. MUSB_EP0_STAGE_SETUP, /* received SETUP */
  97. MUSB_EP0_STAGE_TX, /* IN data */
  98. MUSB_EP0_STAGE_RX, /* OUT data */
  99. MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
  100. MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
  101. MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
  102. } __attribute__ ((packed));
  103. /*
  104. * OTG protocol constants. See USB OTG 1.3 spec,
  105. * sections 5.5 "Device Timings" and 6.6.5 "Timers".
  106. */
  107. #define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
  108. #define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */
  109. #define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
  110. #define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
  111. /*************************** REGISTER ACCESS ********************************/
  112. /* Endpoint registers (other than dynfifo setup) can be accessed either
  113. * directly with the "flat" model, or after setting up an index register.
  114. */
  115. #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \
  116. || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \
  117. || defined(CONFIG_ARCH_OMAP4)
  118. /* REVISIT indexed access seemed to
  119. * misbehave (on DaVinci) for at least peripheral IN ...
  120. */
  121. #define MUSB_FLAT_REG
  122. #endif
  123. /* TUSB mapping: "flat" plus ep0 special cases */
  124. #if defined(CONFIG_USB_MUSB_TUSB6010) || \
  125. defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  126. #define musb_ep_select(_mbase, _epnum) \
  127. musb_writeb((_mbase), MUSB_INDEX, (_epnum))
  128. #define MUSB_EP_OFFSET MUSB_TUSB_OFFSET
  129. /* "flat" mapping: each endpoint has its own i/o address */
  130. #elif defined(MUSB_FLAT_REG)
  131. #define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum)))
  132. #define MUSB_EP_OFFSET MUSB_FLAT_OFFSET
  133. /* "indexed" mapping: INDEX register controls register bank select */
  134. #else
  135. #define musb_ep_select(_mbase, _epnum) \
  136. musb_writeb((_mbase), MUSB_INDEX, (_epnum))
  137. #define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET
  138. #endif
  139. /****************************** FUNCTIONS ********************************/
  140. #define MUSB_HST_MODE(_musb)\
  141. { (_musb)->is_host = true; }
  142. #define MUSB_DEV_MODE(_musb) \
  143. { (_musb)->is_host = false; }
  144. #define test_devctl_hst_mode(_x) \
  145. (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
  146. #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
  147. /******************************** TYPES *************************************/
  148. /**
  149. * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
  150. * @init: turns on clocks, sets up platform-specific registers, etc
  151. * @exit: undoes @init
  152. * @set_mode: forcefully changes operating mode
  153. * @try_ilde: tries to idle the IP
  154. * @vbus_status: returns vbus status if possible
  155. * @set_vbus: forces vbus status
  156. * @adjust_channel_params: pre check for standard dma channel_program func
  157. */
  158. struct musb_platform_ops {
  159. int (*init)(struct musb *musb);
  160. int (*exit)(struct musb *musb);
  161. void (*enable)(struct musb *musb);
  162. void (*disable)(struct musb *musb);
  163. int (*set_mode)(struct musb *musb, u8 mode);
  164. void (*try_idle)(struct musb *musb, unsigned long timeout);
  165. int (*vbus_status)(struct musb *musb);
  166. void (*set_vbus)(struct musb *musb, int on);
  167. int (*adjust_channel_params)(struct dma_channel *channel,
  168. u16 packet_sz, u8 *mode,
  169. dma_addr_t *dma_addr, u32 *len);
  170. };
  171. /*
  172. * struct musb_hw_ep - endpoint hardware (bidirectional)
  173. *
  174. * Ordered slightly for better cacheline locality.
  175. */
  176. struct musb_hw_ep {
  177. struct musb *musb;
  178. void __iomem *fifo;
  179. void __iomem *regs;
  180. #if defined(CONFIG_USB_MUSB_TUSB6010) || \
  181. defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  182. void __iomem *conf;
  183. #endif
  184. /* index in musb->endpoints[] */
  185. u8 epnum;
  186. /* hardware configuration, possibly dynamic */
  187. bool is_shared_fifo;
  188. bool tx_double_buffered;
  189. bool rx_double_buffered;
  190. u16 max_packet_sz_tx;
  191. u16 max_packet_sz_rx;
  192. struct dma_channel *tx_channel;
  193. struct dma_channel *rx_channel;
  194. #if defined(CONFIG_USB_MUSB_TUSB6010) || \
  195. defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  196. /* TUSB has "asynchronous" and "synchronous" dma modes */
  197. dma_addr_t fifo_async;
  198. dma_addr_t fifo_sync;
  199. void __iomem *fifo_sync_va;
  200. #endif
  201. void __iomem *target_regs;
  202. /* currently scheduled peripheral endpoint */
  203. struct musb_qh *in_qh;
  204. struct musb_qh *out_qh;
  205. u8 rx_reinit;
  206. u8 tx_reinit;
  207. /* peripheral side */
  208. struct musb_ep ep_in; /* TX */
  209. struct musb_ep ep_out; /* RX */
  210. };
  211. static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
  212. {
  213. return next_request(&hw_ep->ep_in);
  214. }
  215. static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
  216. {
  217. return next_request(&hw_ep->ep_out);
  218. }
  219. struct musb_csr_regs {
  220. /* FIFO registers */
  221. u16 txmaxp, txcsr, rxmaxp, rxcsr;
  222. u16 rxfifoadd, txfifoadd;
  223. u8 txtype, txinterval, rxtype, rxinterval;
  224. u8 rxfifosz, txfifosz;
  225. u8 txfunaddr, txhubaddr, txhubport;
  226. u8 rxfunaddr, rxhubaddr, rxhubport;
  227. };
  228. struct musb_context_registers {
  229. u8 power;
  230. u8 intrusbe;
  231. u16 frame;
  232. u8 index, testmode;
  233. u8 devctl, busctl, misc;
  234. u32 otg_interfsel;
  235. struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
  236. };
  237. /*
  238. * struct musb - Driver instance data.
  239. */
  240. struct musb {
  241. /* device lock */
  242. spinlock_t lock;
  243. const struct musb_platform_ops *ops;
  244. struct musb_context_registers context;
  245. irqreturn_t (*isr)(int, void *);
  246. struct work_struct irq_work;
  247. struct delayed_work deassert_reset_work;
  248. struct delayed_work finish_resume_work;
  249. u16 hwvers;
  250. u16 intrrxe;
  251. u16 intrtxe;
  252. /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
  253. #define MUSB_PORT_STAT_RESUME (1 << 31)
  254. u32 port1_status;
  255. unsigned long rh_timer;
  256. enum musb_h_ep0_state ep0_stage;
  257. /* bulk traffic normally dedicates endpoint hardware, and each
  258. * direction has its own ring of host side endpoints.
  259. * we try to progress the transfer at the head of each endpoint's
  260. * queue until it completes or NAKs too much; then we try the next
  261. * endpoint.
  262. */
  263. struct musb_hw_ep *bulk_ep;
  264. struct list_head control; /* of musb_qh */
  265. struct list_head in_bulk; /* of musb_qh */
  266. struct list_head out_bulk; /* of musb_qh */
  267. struct timer_list otg_timer;
  268. struct notifier_block nb;
  269. struct dma_controller *dma_controller;
  270. struct device *controller;
  271. void __iomem *ctrl_base;
  272. void __iomem *mregs;
  273. #if defined(CONFIG_USB_MUSB_TUSB6010) || \
  274. defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  275. dma_addr_t async;
  276. dma_addr_t sync;
  277. void __iomem *sync_va;
  278. #endif
  279. /* passed down from chip/board specific irq handlers */
  280. u8 int_usb;
  281. u16 int_rx;
  282. u16 int_tx;
  283. struct usb_phy *xceiv;
  284. struct phy *phy;
  285. int nIrq;
  286. unsigned irq_wake:1;
  287. struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
  288. #define control_ep endpoints
  289. #define VBUSERR_RETRY_COUNT 3
  290. u16 vbuserr_retry;
  291. u16 epmask;
  292. u8 nr_endpoints;
  293. int (*board_set_power)(int state);
  294. u8 min_power; /* vbus for periph, in mA/2 */
  295. int port_mode; /* MUSB_PORT_MODE_* */
  296. bool is_host;
  297. int a_wait_bcon; /* VBUS timeout in msecs */
  298. unsigned long idle_timeout; /* Next timeout in jiffies */
  299. /* active means connected and not suspended */
  300. unsigned is_active:1;
  301. unsigned is_multipoint:1;
  302. unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
  303. unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
  304. unsigned dyn_fifo:1; /* dynamic FIFO supported? */
  305. unsigned bulk_split:1;
  306. #define can_bulk_split(musb,type) \
  307. (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
  308. unsigned bulk_combine:1;
  309. #define can_bulk_combine(musb,type) \
  310. (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
  311. /* is_suspended means USB B_PERIPHERAL suspend */
  312. unsigned is_suspended:1;
  313. /* may_wakeup means remote wakeup is enabled */
  314. unsigned may_wakeup:1;
  315. /* is_self_powered is reported in device status and the
  316. * config descriptor. is_bus_powered means B_PERIPHERAL
  317. * draws some VBUS current; both can be true.
  318. */
  319. unsigned is_self_powered:1;
  320. unsigned is_bus_powered:1;
  321. unsigned set_address:1;
  322. unsigned test_mode:1;
  323. unsigned softconnect:1;
  324. u8 address;
  325. u8 test_mode_nr;
  326. u16 ackpend; /* ep0 */
  327. enum musb_g_ep0_state ep0_state;
  328. struct usb_gadget g; /* the gadget */
  329. struct usb_gadget_driver *gadget_driver; /* its driver */
  330. struct usb_hcd *hcd; /* the usb hcd */
  331. /*
  332. * FIXME: Remove this flag.
  333. *
  334. * This is only added to allow Blackfin to work
  335. * with current driver. For some unknown reason
  336. * Blackfin doesn't work with double buffering
  337. * and that's enabled by default.
  338. *
  339. * We added this flag to forcefully disable double
  340. * buffering until we get it working.
  341. */
  342. unsigned double_buffer_not_ok:1;
  343. struct musb_hdrc_config *config;
  344. int xceiv_old_state;
  345. #ifdef CONFIG_DEBUG_FS
  346. struct dentry *debugfs_root;
  347. #endif
  348. };
  349. static inline struct musb *gadget_to_musb(struct usb_gadget *g)
  350. {
  351. return container_of(g, struct musb, g);
  352. }
  353. #ifdef CONFIG_BLACKFIN
  354. static inline int musb_read_fifosize(struct musb *musb,
  355. struct musb_hw_ep *hw_ep, u8 epnum)
  356. {
  357. musb->nr_endpoints++;
  358. musb->epmask |= (1 << epnum);
  359. if (epnum < 5) {
  360. hw_ep->max_packet_sz_tx = 128;
  361. hw_ep->max_packet_sz_rx = 128;
  362. } else {
  363. hw_ep->max_packet_sz_tx = 1024;
  364. hw_ep->max_packet_sz_rx = 1024;
  365. }
  366. hw_ep->is_shared_fifo = false;
  367. return 0;
  368. }
  369. static inline void musb_configure_ep0(struct musb *musb)
  370. {
  371. musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
  372. musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
  373. musb->endpoints[0].is_shared_fifo = true;
  374. }
  375. #else
  376. static inline int musb_read_fifosize(struct musb *musb,
  377. struct musb_hw_ep *hw_ep, u8 epnum)
  378. {
  379. void __iomem *mbase = musb->mregs;
  380. u8 reg = 0;
  381. /* read from core using indexed model */
  382. reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
  383. /* 0's returned when no more endpoints */
  384. if (!reg)
  385. return -ENODEV;
  386. musb->nr_endpoints++;
  387. musb->epmask |= (1 << epnum);
  388. hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
  389. /* shared TX/RX FIFO? */
  390. if ((reg & 0xf0) == 0xf0) {
  391. hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
  392. hw_ep->is_shared_fifo = true;
  393. return 0;
  394. } else {
  395. hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
  396. hw_ep->is_shared_fifo = false;
  397. }
  398. return 0;
  399. }
  400. static inline void musb_configure_ep0(struct musb *musb)
  401. {
  402. musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
  403. musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
  404. musb->endpoints[0].is_shared_fifo = true;
  405. }
  406. #endif /* CONFIG_BLACKFIN */
  407. /***************************** Glue it together *****************************/
  408. extern const char musb_driver_name[];
  409. extern void musb_stop(struct musb *musb);
  410. extern void musb_start(struct musb *musb);
  411. extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
  412. extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
  413. extern void musb_load_testpacket(struct musb *);
  414. extern irqreturn_t musb_interrupt(struct musb *);
  415. extern void musb_hnp_stop(struct musb *musb);
  416. static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
  417. {
  418. if (musb->ops->set_vbus)
  419. musb->ops->set_vbus(musb, is_on);
  420. }
  421. static inline void musb_platform_enable(struct musb *musb)
  422. {
  423. if (musb->ops->enable)
  424. musb->ops->enable(musb);
  425. }
  426. static inline void musb_platform_disable(struct musb *musb)
  427. {
  428. if (musb->ops->disable)
  429. musb->ops->disable(musb);
  430. }
  431. static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
  432. {
  433. if (!musb->ops->set_mode)
  434. return 0;
  435. return musb->ops->set_mode(musb, mode);
  436. }
  437. static inline void musb_platform_try_idle(struct musb *musb,
  438. unsigned long timeout)
  439. {
  440. if (musb->ops->try_idle)
  441. musb->ops->try_idle(musb, timeout);
  442. }
  443. static inline int musb_platform_get_vbus_status(struct musb *musb)
  444. {
  445. if (!musb->ops->vbus_status)
  446. return 0;
  447. return musb->ops->vbus_status(musb);
  448. }
  449. static inline int musb_platform_init(struct musb *musb)
  450. {
  451. if (!musb->ops->init)
  452. return -EINVAL;
  453. return musb->ops->init(musb);
  454. }
  455. static inline int musb_platform_exit(struct musb *musb)
  456. {
  457. if (!musb->ops->exit)
  458. return -EINVAL;
  459. return musb->ops->exit(musb);
  460. }
  461. #endif /* __MUSB_CORE_H__ */