rtc-s5m.c 16 KB

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  1. /*
  2. * Copyright (c) 2013 Samsung Electronics Co., Ltd
  3. * http://www.samsung.com
  4. *
  5. * Copyright (C) 2013 Google, Inc
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/i2c.h>
  19. #include <linux/slab.h>
  20. #include <linux/bcd.h>
  21. #include <linux/bitops.h>
  22. #include <linux/regmap.h>
  23. #include <linux/rtc.h>
  24. #include <linux/delay.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/mfd/samsung/core.h>
  27. #include <linux/mfd/samsung/irq.h>
  28. #include <linux/mfd/samsung/rtc.h>
  29. /*
  30. * Maximum number of retries for checking changes in UDR field
  31. * of SEC_RTC_UDR_CON register (to limit possible endless loop).
  32. *
  33. * After writing to RTC registers (setting time or alarm) read the UDR field
  34. * in SEC_RTC_UDR_CON register. UDR is auto-cleared when data have
  35. * been transferred.
  36. */
  37. #define UDR_READ_RETRY_CNT 5
  38. struct s5m_rtc_info {
  39. struct device *dev;
  40. struct sec_pmic_dev *s5m87xx;
  41. struct regmap *regmap;
  42. struct rtc_device *rtc_dev;
  43. int irq;
  44. int device_type;
  45. int rtc_24hr_mode;
  46. bool wtsr_smpl;
  47. };
  48. static void s5m8767_data_to_tm(u8 *data, struct rtc_time *tm,
  49. int rtc_24hr_mode)
  50. {
  51. tm->tm_sec = data[RTC_SEC] & 0x7f;
  52. tm->tm_min = data[RTC_MIN] & 0x7f;
  53. if (rtc_24hr_mode) {
  54. tm->tm_hour = data[RTC_HOUR] & 0x1f;
  55. } else {
  56. tm->tm_hour = data[RTC_HOUR] & 0x0f;
  57. if (data[RTC_HOUR] & HOUR_PM_MASK)
  58. tm->tm_hour += 12;
  59. }
  60. tm->tm_wday = ffs(data[RTC_WEEKDAY] & 0x7f);
  61. tm->tm_mday = data[RTC_DATE] & 0x1f;
  62. tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1;
  63. tm->tm_year = (data[RTC_YEAR1] & 0x7f) + 100;
  64. tm->tm_yday = 0;
  65. tm->tm_isdst = 0;
  66. }
  67. static int s5m8767_tm_to_data(struct rtc_time *tm, u8 *data)
  68. {
  69. data[RTC_SEC] = tm->tm_sec;
  70. data[RTC_MIN] = tm->tm_min;
  71. if (tm->tm_hour >= 12)
  72. data[RTC_HOUR] = tm->tm_hour | HOUR_PM_MASK;
  73. else
  74. data[RTC_HOUR] = tm->tm_hour & ~HOUR_PM_MASK;
  75. data[RTC_WEEKDAY] = 1 << tm->tm_wday;
  76. data[RTC_DATE] = tm->tm_mday;
  77. data[RTC_MONTH] = tm->tm_mon + 1;
  78. data[RTC_YEAR1] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0;
  79. if (tm->tm_year < 100) {
  80. pr_err("s5m8767 RTC cannot handle the year %d.\n",
  81. 1900 + tm->tm_year);
  82. return -EINVAL;
  83. } else {
  84. return 0;
  85. }
  86. }
  87. /*
  88. * Read RTC_UDR_CON register and wait till UDR field is cleared.
  89. * This indicates that time/alarm update ended.
  90. */
  91. static inline int s5m8767_wait_for_udr_update(struct s5m_rtc_info *info)
  92. {
  93. int ret, retry = UDR_READ_RETRY_CNT;
  94. unsigned int data;
  95. do {
  96. ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &data);
  97. } while (--retry && (data & RTC_UDR_MASK) && !ret);
  98. if (!retry)
  99. dev_err(info->dev, "waiting for UDR update, reached max number of retries\n");
  100. return ret;
  101. }
  102. static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info)
  103. {
  104. int ret;
  105. unsigned int data;
  106. ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &data);
  107. if (ret < 0) {
  108. dev_err(info->dev, "failed to read update reg(%d)\n", ret);
  109. return ret;
  110. }
  111. data |= RTC_TIME_EN_MASK;
  112. data |= RTC_UDR_MASK;
  113. ret = regmap_write(info->regmap, SEC_RTC_UDR_CON, data);
  114. if (ret < 0) {
  115. dev_err(info->dev, "failed to write update reg(%d)\n", ret);
  116. return ret;
  117. }
  118. ret = s5m8767_wait_for_udr_update(info);
  119. return ret;
  120. }
  121. static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info)
  122. {
  123. int ret;
  124. unsigned int data;
  125. ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &data);
  126. if (ret < 0) {
  127. dev_err(info->dev, "%s: fail to read update reg(%d)\n",
  128. __func__, ret);
  129. return ret;
  130. }
  131. data &= ~RTC_TIME_EN_MASK;
  132. data |= RTC_UDR_MASK;
  133. ret = regmap_write(info->regmap, SEC_RTC_UDR_CON, data);
  134. if (ret < 0) {
  135. dev_err(info->dev, "%s: fail to write update reg(%d)\n",
  136. __func__, ret);
  137. return ret;
  138. }
  139. ret = s5m8767_wait_for_udr_update(info);
  140. return ret;
  141. }
  142. static void s5m8763_data_to_tm(u8 *data, struct rtc_time *tm)
  143. {
  144. tm->tm_sec = bcd2bin(data[RTC_SEC]);
  145. tm->tm_min = bcd2bin(data[RTC_MIN]);
  146. if (data[RTC_HOUR] & HOUR_12) {
  147. tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x1f);
  148. if (data[RTC_HOUR] & HOUR_PM)
  149. tm->tm_hour += 12;
  150. } else {
  151. tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x3f);
  152. }
  153. tm->tm_wday = data[RTC_WEEKDAY] & 0x07;
  154. tm->tm_mday = bcd2bin(data[RTC_DATE]);
  155. tm->tm_mon = bcd2bin(data[RTC_MONTH]);
  156. tm->tm_year = bcd2bin(data[RTC_YEAR1]) + bcd2bin(data[RTC_YEAR2]) * 100;
  157. tm->tm_year -= 1900;
  158. }
  159. static void s5m8763_tm_to_data(struct rtc_time *tm, u8 *data)
  160. {
  161. data[RTC_SEC] = bin2bcd(tm->tm_sec);
  162. data[RTC_MIN] = bin2bcd(tm->tm_min);
  163. data[RTC_HOUR] = bin2bcd(tm->tm_hour);
  164. data[RTC_WEEKDAY] = tm->tm_wday;
  165. data[RTC_DATE] = bin2bcd(tm->tm_mday);
  166. data[RTC_MONTH] = bin2bcd(tm->tm_mon);
  167. data[RTC_YEAR1] = bin2bcd(tm->tm_year % 100);
  168. data[RTC_YEAR2] = bin2bcd((tm->tm_year + 1900) / 100);
  169. }
  170. static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm)
  171. {
  172. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  173. u8 data[8];
  174. int ret;
  175. ret = regmap_bulk_read(info->regmap, SEC_RTC_SEC, data, 8);
  176. if (ret < 0)
  177. return ret;
  178. switch (info->device_type) {
  179. case S5M8763X:
  180. s5m8763_data_to_tm(data, tm);
  181. break;
  182. case S5M8767X:
  183. s5m8767_data_to_tm(data, tm, info->rtc_24hr_mode);
  184. break;
  185. default:
  186. return -EINVAL;
  187. }
  188. dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
  189. 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday,
  190. tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday);
  191. return rtc_valid_tm(tm);
  192. }
  193. static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm)
  194. {
  195. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  196. u8 data[8];
  197. int ret = 0;
  198. switch (info->device_type) {
  199. case S5M8763X:
  200. s5m8763_tm_to_data(tm, data);
  201. break;
  202. case S5M8767X:
  203. ret = s5m8767_tm_to_data(tm, data);
  204. break;
  205. default:
  206. return -EINVAL;
  207. }
  208. if (ret < 0)
  209. return ret;
  210. dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
  211. 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday,
  212. tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday);
  213. ret = regmap_raw_write(info->regmap, SEC_RTC_SEC, data, 8);
  214. if (ret < 0)
  215. return ret;
  216. ret = s5m8767_rtc_set_time_reg(info);
  217. return ret;
  218. }
  219. static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  220. {
  221. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  222. u8 data[8];
  223. unsigned int val;
  224. int ret, i;
  225. ret = regmap_bulk_read(info->regmap, SEC_ALARM0_SEC, data, 8);
  226. if (ret < 0)
  227. return ret;
  228. switch (info->device_type) {
  229. case S5M8763X:
  230. s5m8763_data_to_tm(data, &alrm->time);
  231. ret = regmap_read(info->regmap, SEC_ALARM0_CONF, &val);
  232. if (ret < 0)
  233. return ret;
  234. alrm->enabled = !!val;
  235. ret = regmap_read(info->regmap, SEC_RTC_STATUS, &val);
  236. if (ret < 0)
  237. return ret;
  238. break;
  239. case S5M8767X:
  240. s5m8767_data_to_tm(data, &alrm->time, info->rtc_24hr_mode);
  241. dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
  242. 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon,
  243. alrm->time.tm_mday, alrm->time.tm_hour,
  244. alrm->time.tm_min, alrm->time.tm_sec,
  245. alrm->time.tm_wday);
  246. alrm->enabled = 0;
  247. for (i = 0; i < 7; i++) {
  248. if (data[i] & ALARM_ENABLE_MASK) {
  249. alrm->enabled = 1;
  250. break;
  251. }
  252. }
  253. alrm->pending = 0;
  254. ret = regmap_read(info->regmap, SEC_RTC_STATUS, &val);
  255. if (ret < 0)
  256. return ret;
  257. break;
  258. default:
  259. return -EINVAL;
  260. }
  261. if (val & ALARM0_STATUS)
  262. alrm->pending = 1;
  263. else
  264. alrm->pending = 0;
  265. return 0;
  266. }
  267. static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info)
  268. {
  269. u8 data[8];
  270. int ret, i;
  271. struct rtc_time tm;
  272. ret = regmap_bulk_read(info->regmap, SEC_ALARM0_SEC, data, 8);
  273. if (ret < 0)
  274. return ret;
  275. s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode);
  276. dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
  277. 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday,
  278. tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday);
  279. switch (info->device_type) {
  280. case S5M8763X:
  281. ret = regmap_write(info->regmap, SEC_ALARM0_CONF, 0);
  282. break;
  283. case S5M8767X:
  284. for (i = 0; i < 7; i++)
  285. data[i] &= ~ALARM_ENABLE_MASK;
  286. ret = regmap_raw_write(info->regmap, SEC_ALARM0_SEC, data, 8);
  287. if (ret < 0)
  288. return ret;
  289. ret = s5m8767_rtc_set_alarm_reg(info);
  290. break;
  291. default:
  292. return -EINVAL;
  293. }
  294. return ret;
  295. }
  296. static int s5m_rtc_start_alarm(struct s5m_rtc_info *info)
  297. {
  298. int ret;
  299. u8 data[8];
  300. u8 alarm0_conf;
  301. struct rtc_time tm;
  302. ret = regmap_bulk_read(info->regmap, SEC_ALARM0_SEC, data, 8);
  303. if (ret < 0)
  304. return ret;
  305. s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode);
  306. dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
  307. 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday,
  308. tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday);
  309. switch (info->device_type) {
  310. case S5M8763X:
  311. alarm0_conf = 0x77;
  312. ret = regmap_write(info->regmap, SEC_ALARM0_CONF, alarm0_conf);
  313. break;
  314. case S5M8767X:
  315. data[RTC_SEC] |= ALARM_ENABLE_MASK;
  316. data[RTC_MIN] |= ALARM_ENABLE_MASK;
  317. data[RTC_HOUR] |= ALARM_ENABLE_MASK;
  318. data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK;
  319. if (data[RTC_DATE] & 0x1f)
  320. data[RTC_DATE] |= ALARM_ENABLE_MASK;
  321. if (data[RTC_MONTH] & 0xf)
  322. data[RTC_MONTH] |= ALARM_ENABLE_MASK;
  323. if (data[RTC_YEAR1] & 0x7f)
  324. data[RTC_YEAR1] |= ALARM_ENABLE_MASK;
  325. ret = regmap_raw_write(info->regmap, SEC_ALARM0_SEC, data, 8);
  326. if (ret < 0)
  327. return ret;
  328. ret = s5m8767_rtc_set_alarm_reg(info);
  329. break;
  330. default:
  331. return -EINVAL;
  332. }
  333. return ret;
  334. }
  335. static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  336. {
  337. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  338. u8 data[8];
  339. int ret;
  340. switch (info->device_type) {
  341. case S5M8763X:
  342. s5m8763_tm_to_data(&alrm->time, data);
  343. break;
  344. case S5M8767X:
  345. s5m8767_tm_to_data(&alrm->time, data);
  346. break;
  347. default:
  348. return -EINVAL;
  349. }
  350. dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
  351. 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon,
  352. alrm->time.tm_mday, alrm->time.tm_hour, alrm->time.tm_min,
  353. alrm->time.tm_sec, alrm->time.tm_wday);
  354. ret = s5m_rtc_stop_alarm(info);
  355. if (ret < 0)
  356. return ret;
  357. ret = regmap_raw_write(info->regmap, SEC_ALARM0_SEC, data, 8);
  358. if (ret < 0)
  359. return ret;
  360. ret = s5m8767_rtc_set_alarm_reg(info);
  361. if (ret < 0)
  362. return ret;
  363. if (alrm->enabled)
  364. ret = s5m_rtc_start_alarm(info);
  365. return ret;
  366. }
  367. static int s5m_rtc_alarm_irq_enable(struct device *dev,
  368. unsigned int enabled)
  369. {
  370. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  371. if (enabled)
  372. return s5m_rtc_start_alarm(info);
  373. else
  374. return s5m_rtc_stop_alarm(info);
  375. }
  376. static irqreturn_t s5m_rtc_alarm_irq(int irq, void *data)
  377. {
  378. struct s5m_rtc_info *info = data;
  379. rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF);
  380. return IRQ_HANDLED;
  381. }
  382. static const struct rtc_class_ops s5m_rtc_ops = {
  383. .read_time = s5m_rtc_read_time,
  384. .set_time = s5m_rtc_set_time,
  385. .read_alarm = s5m_rtc_read_alarm,
  386. .set_alarm = s5m_rtc_set_alarm,
  387. .alarm_irq_enable = s5m_rtc_alarm_irq_enable,
  388. };
  389. static void s5m_rtc_enable_wtsr(struct s5m_rtc_info *info, bool enable)
  390. {
  391. int ret;
  392. ret = regmap_update_bits(info->regmap, SEC_WTSR_SMPL_CNTL,
  393. WTSR_ENABLE_MASK,
  394. enable ? WTSR_ENABLE_MASK : 0);
  395. if (ret < 0)
  396. dev_err(info->dev, "%s: fail to update WTSR reg(%d)\n",
  397. __func__, ret);
  398. }
  399. static void s5m_rtc_enable_smpl(struct s5m_rtc_info *info, bool enable)
  400. {
  401. int ret;
  402. ret = regmap_update_bits(info->regmap, SEC_WTSR_SMPL_CNTL,
  403. SMPL_ENABLE_MASK,
  404. enable ? SMPL_ENABLE_MASK : 0);
  405. if (ret < 0)
  406. dev_err(info->dev, "%s: fail to update SMPL reg(%d)\n",
  407. __func__, ret);
  408. }
  409. static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info)
  410. {
  411. u8 data[2];
  412. unsigned int tp_read;
  413. int ret;
  414. struct rtc_time tm;
  415. ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &tp_read);
  416. if (ret < 0) {
  417. dev_err(info->dev, "%s: fail to read control reg(%d)\n",
  418. __func__, ret);
  419. return ret;
  420. }
  421. /* Set RTC control register : Binary mode, 24hour mode */
  422. data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
  423. data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
  424. info->rtc_24hr_mode = 1;
  425. ret = regmap_raw_write(info->regmap, SEC_ALARM0_CONF, data, 2);
  426. if (ret < 0) {
  427. dev_err(info->dev, "%s: fail to write controlm reg(%d)\n",
  428. __func__, ret);
  429. return ret;
  430. }
  431. /* In first boot time, Set rtc time to 1/1/2012 00:00:00(SUN) */
  432. if ((tp_read & RTC_TCON_MASK) == 0) {
  433. dev_dbg(info->dev, "rtc init\n");
  434. tm.tm_sec = 0;
  435. tm.tm_min = 0;
  436. tm.tm_hour = 0;
  437. tm.tm_wday = 0;
  438. tm.tm_mday = 1;
  439. tm.tm_mon = 0;
  440. tm.tm_year = 112;
  441. tm.tm_yday = 0;
  442. tm.tm_isdst = 0;
  443. ret = s5m_rtc_set_time(info->dev, &tm);
  444. }
  445. ret = regmap_update_bits(info->regmap, SEC_RTC_UDR_CON,
  446. RTC_TCON_MASK, tp_read | RTC_TCON_MASK);
  447. if (ret < 0)
  448. dev_err(info->dev, "%s: fail to update TCON reg(%d)\n",
  449. __func__, ret);
  450. return ret;
  451. }
  452. static int s5m_rtc_probe(struct platform_device *pdev)
  453. {
  454. struct sec_pmic_dev *s5m87xx = dev_get_drvdata(pdev->dev.parent);
  455. struct sec_platform_data *pdata = s5m87xx->pdata;
  456. struct s5m_rtc_info *info;
  457. int ret;
  458. if (!pdata) {
  459. dev_err(pdev->dev.parent, "Platform data not supplied\n");
  460. return -ENODEV;
  461. }
  462. info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
  463. if (!info)
  464. return -ENOMEM;
  465. info->dev = &pdev->dev;
  466. info->s5m87xx = s5m87xx;
  467. info->regmap = s5m87xx->regmap_rtc;
  468. info->device_type = s5m87xx->device_type;
  469. info->wtsr_smpl = s5m87xx->wtsr_smpl;
  470. switch (pdata->device_type) {
  471. case S5M8763X:
  472. info->irq = regmap_irq_get_virq(s5m87xx->irq_data,
  473. S5M8763_IRQ_ALARM0);
  474. break;
  475. case S5M8767X:
  476. info->irq = regmap_irq_get_virq(s5m87xx->irq_data,
  477. S5M8767_IRQ_RTCA1);
  478. break;
  479. default:
  480. ret = -EINVAL;
  481. dev_err(&pdev->dev, "Unsupported device type: %d\n", ret);
  482. return ret;
  483. }
  484. platform_set_drvdata(pdev, info);
  485. ret = s5m8767_rtc_init_reg(info);
  486. if (info->wtsr_smpl) {
  487. s5m_rtc_enable_wtsr(info, true);
  488. s5m_rtc_enable_smpl(info, true);
  489. }
  490. device_init_wakeup(&pdev->dev, 1);
  491. info->rtc_dev = devm_rtc_device_register(&pdev->dev, "s5m-rtc",
  492. &s5m_rtc_ops, THIS_MODULE);
  493. if (IS_ERR(info->rtc_dev))
  494. return PTR_ERR(info->rtc_dev);
  495. ret = devm_request_threaded_irq(&pdev->dev, info->irq, NULL,
  496. s5m_rtc_alarm_irq, 0, "rtc-alarm0",
  497. info);
  498. if (ret < 0)
  499. dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
  500. info->irq, ret);
  501. return ret;
  502. }
  503. static void s5m_rtc_shutdown(struct platform_device *pdev)
  504. {
  505. struct s5m_rtc_info *info = platform_get_drvdata(pdev);
  506. int i;
  507. unsigned int val = 0;
  508. if (info->wtsr_smpl) {
  509. for (i = 0; i < 3; i++) {
  510. s5m_rtc_enable_wtsr(info, false);
  511. regmap_read(info->regmap, SEC_WTSR_SMPL_CNTL, &val);
  512. pr_debug("%s: WTSR_SMPL reg(0x%02x)\n", __func__, val);
  513. if (val & WTSR_ENABLE_MASK)
  514. pr_emerg("%s: fail to disable WTSR\n",
  515. __func__);
  516. else {
  517. pr_info("%s: success to disable WTSR\n",
  518. __func__);
  519. break;
  520. }
  521. }
  522. }
  523. /* Disable SMPL when power off */
  524. s5m_rtc_enable_smpl(info, false);
  525. }
  526. #ifdef CONFIG_PM_SLEEP
  527. static int s5m_rtc_resume(struct device *dev)
  528. {
  529. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  530. int ret = 0;
  531. if (device_may_wakeup(dev))
  532. ret = disable_irq_wake(info->irq);
  533. return ret;
  534. }
  535. static int s5m_rtc_suspend(struct device *dev)
  536. {
  537. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  538. int ret = 0;
  539. if (device_may_wakeup(dev))
  540. ret = enable_irq_wake(info->irq);
  541. return ret;
  542. }
  543. #endif /* CONFIG_PM_SLEEP */
  544. static SIMPLE_DEV_PM_OPS(s5m_rtc_pm_ops, s5m_rtc_suspend, s5m_rtc_resume);
  545. static const struct platform_device_id s5m_rtc_id[] = {
  546. { "s5m-rtc", 0 },
  547. };
  548. static struct platform_driver s5m_rtc_driver = {
  549. .driver = {
  550. .name = "s5m-rtc",
  551. .owner = THIS_MODULE,
  552. .pm = &s5m_rtc_pm_ops,
  553. },
  554. .probe = s5m_rtc_probe,
  555. .shutdown = s5m_rtc_shutdown,
  556. .id_table = s5m_rtc_id,
  557. };
  558. module_platform_driver(s5m_rtc_driver);
  559. /* Module information */
  560. MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
  561. MODULE_DESCRIPTION("Samsung S5M RTC driver");
  562. MODULE_LICENSE("GPL");
  563. MODULE_ALIAS("platform:s5m-rtc");