pci-sysfs.c 38 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/export.h>
  21. #include <linux/topology.h>
  22. #include <linux/mm.h>
  23. #include <linux/fs.h>
  24. #include <linux/capability.h>
  25. #include <linux/security.h>
  26. #include <linux/pci-aspm.h>
  27. #include <linux/slab.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/pm_runtime.h>
  30. #include "pci.h"
  31. static int sysfs_initialized; /* = 0 */
  32. /* show configuration fields */
  33. #define pci_config_attr(field, format_string) \
  34. static ssize_t \
  35. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  36. { \
  37. struct pci_dev *pdev; \
  38. \
  39. pdev = to_pci_dev (dev); \
  40. return sprintf (buf, format_string, pdev->field); \
  41. } \
  42. static DEVICE_ATTR_RO(field)
  43. pci_config_attr(vendor, "0x%04x\n");
  44. pci_config_attr(device, "0x%04x\n");
  45. pci_config_attr(subsystem_vendor, "0x%04x\n");
  46. pci_config_attr(subsystem_device, "0x%04x\n");
  47. pci_config_attr(class, "0x%06x\n");
  48. pci_config_attr(irq, "%u\n");
  49. static ssize_t broken_parity_status_show(struct device *dev,
  50. struct device_attribute *attr,
  51. char *buf)
  52. {
  53. struct pci_dev *pdev = to_pci_dev(dev);
  54. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  55. }
  56. static ssize_t broken_parity_status_store(struct device *dev,
  57. struct device_attribute *attr,
  58. const char *buf, size_t count)
  59. {
  60. struct pci_dev *pdev = to_pci_dev(dev);
  61. unsigned long val;
  62. if (kstrtoul(buf, 0, &val) < 0)
  63. return -EINVAL;
  64. pdev->broken_parity_status = !!val;
  65. return count;
  66. }
  67. static DEVICE_ATTR_RW(broken_parity_status);
  68. static ssize_t pci_dev_show_local_cpu(struct device *dev,
  69. int type,
  70. struct device_attribute *attr,
  71. char *buf)
  72. {
  73. const struct cpumask *mask;
  74. int len;
  75. #ifdef CONFIG_NUMA
  76. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  77. cpumask_of_node(dev_to_node(dev));
  78. #else
  79. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  80. #endif
  81. len = type ?
  82. cpumask_scnprintf(buf, PAGE_SIZE-2, mask) :
  83. cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  84. buf[len++] = '\n';
  85. buf[len] = '\0';
  86. return len;
  87. }
  88. static ssize_t local_cpus_show(struct device *dev,
  89. struct device_attribute *attr, char *buf)
  90. {
  91. return pci_dev_show_local_cpu(dev, 1, attr, buf);
  92. }
  93. static DEVICE_ATTR_RO(local_cpus);
  94. static ssize_t local_cpulist_show(struct device *dev,
  95. struct device_attribute *attr, char *buf)
  96. {
  97. return pci_dev_show_local_cpu(dev, 0, attr, buf);
  98. }
  99. static DEVICE_ATTR_RO(local_cpulist);
  100. /*
  101. * PCI Bus Class Devices
  102. */
  103. static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
  104. int type,
  105. struct device_attribute *attr,
  106. char *buf)
  107. {
  108. int ret;
  109. const struct cpumask *cpumask;
  110. cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  111. ret = type ?
  112. cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
  113. cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
  114. buf[ret++] = '\n';
  115. buf[ret] = '\0';
  116. return ret;
  117. }
  118. static ssize_t cpuaffinity_show(struct device *dev,
  119. struct device_attribute *attr, char *buf)
  120. {
  121. return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
  122. }
  123. static DEVICE_ATTR_RO(cpuaffinity);
  124. static ssize_t cpulistaffinity_show(struct device *dev,
  125. struct device_attribute *attr, char *buf)
  126. {
  127. return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
  128. }
  129. static DEVICE_ATTR_RO(cpulistaffinity);
  130. /* show resources */
  131. static ssize_t
  132. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  133. {
  134. struct pci_dev * pci_dev = to_pci_dev(dev);
  135. char * str = buf;
  136. int i;
  137. int max;
  138. resource_size_t start, end;
  139. if (pci_dev->subordinate)
  140. max = DEVICE_COUNT_RESOURCE;
  141. else
  142. max = PCI_BRIDGE_RESOURCES;
  143. for (i = 0; i < max; i++) {
  144. struct resource *res = &pci_dev->resource[i];
  145. pci_resource_to_user(pci_dev, i, res, &start, &end);
  146. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  147. (unsigned long long)start,
  148. (unsigned long long)end,
  149. (unsigned long long)res->flags);
  150. }
  151. return (str - buf);
  152. }
  153. static DEVICE_ATTR_RO(resource);
  154. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  155. {
  156. struct pci_dev *pci_dev = to_pci_dev(dev);
  157. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  158. pci_dev->vendor, pci_dev->device,
  159. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  160. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  161. (u8)(pci_dev->class));
  162. }
  163. static DEVICE_ATTR_RO(modalias);
  164. static ssize_t enabled_store(struct device *dev,
  165. struct device_attribute *attr, const char *buf,
  166. size_t count)
  167. {
  168. struct pci_dev *pdev = to_pci_dev(dev);
  169. unsigned long val;
  170. ssize_t result = kstrtoul(buf, 0, &val);
  171. if (result < 0)
  172. return result;
  173. /* this can crash the machine when done on the "wrong" device */
  174. if (!capable(CAP_SYS_ADMIN))
  175. return -EPERM;
  176. if (!val) {
  177. if (pci_is_enabled(pdev))
  178. pci_disable_device(pdev);
  179. else
  180. result = -EIO;
  181. } else
  182. result = pci_enable_device(pdev);
  183. return result < 0 ? result : count;
  184. }
  185. static ssize_t enabled_show(struct device *dev,
  186. struct device_attribute *attr, char *buf)
  187. {
  188. struct pci_dev *pdev;
  189. pdev = to_pci_dev (dev);
  190. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  191. }
  192. static DEVICE_ATTR_RW(enabled);
  193. #ifdef CONFIG_NUMA
  194. static ssize_t
  195. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  196. {
  197. return sprintf (buf, "%d\n", dev->numa_node);
  198. }
  199. static DEVICE_ATTR_RO(numa_node);
  200. #endif
  201. static ssize_t
  202. dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
  203. {
  204. struct pci_dev *pdev = to_pci_dev(dev);
  205. return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
  206. }
  207. static DEVICE_ATTR_RO(dma_mask_bits);
  208. static ssize_t
  209. consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
  210. char *buf)
  211. {
  212. return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
  213. }
  214. static DEVICE_ATTR_RO(consistent_dma_mask_bits);
  215. static ssize_t
  216. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  217. {
  218. struct pci_dev *pdev = to_pci_dev(dev);
  219. if (!pdev->subordinate)
  220. return 0;
  221. return sprintf (buf, "%u\n",
  222. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  223. }
  224. static ssize_t
  225. msi_bus_store(struct device *dev, struct device_attribute *attr,
  226. const char *buf, size_t count)
  227. {
  228. struct pci_dev *pdev = to_pci_dev(dev);
  229. unsigned long val;
  230. if (kstrtoul(buf, 0, &val) < 0)
  231. return -EINVAL;
  232. /*
  233. * Bad things may happen if the no_msi flag is changed
  234. * while drivers are loaded.
  235. */
  236. if (!capable(CAP_SYS_ADMIN))
  237. return -EPERM;
  238. /*
  239. * Maybe devices without subordinate buses shouldn't have this
  240. * attribute in the first place?
  241. */
  242. if (!pdev->subordinate)
  243. return count;
  244. /* Is the flag going to change, or keep the value it already had? */
  245. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  246. !!val) {
  247. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  248. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
  249. " bad things could happen\n", val ? "" : " not");
  250. }
  251. return count;
  252. }
  253. static DEVICE_ATTR_RW(msi_bus);
  254. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  255. size_t count)
  256. {
  257. unsigned long val;
  258. struct pci_bus *b = NULL;
  259. if (kstrtoul(buf, 0, &val) < 0)
  260. return -EINVAL;
  261. if (val) {
  262. pci_lock_rescan_remove();
  263. while ((b = pci_find_next_bus(b)) != NULL)
  264. pci_rescan_bus(b);
  265. pci_unlock_rescan_remove();
  266. }
  267. return count;
  268. }
  269. static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store);
  270. static struct attribute *pci_bus_attrs[] = {
  271. &bus_attr_rescan.attr,
  272. NULL,
  273. };
  274. static const struct attribute_group pci_bus_group = {
  275. .attrs = pci_bus_attrs,
  276. };
  277. const struct attribute_group *pci_bus_groups[] = {
  278. &pci_bus_group,
  279. NULL,
  280. };
  281. static ssize_t
  282. dev_rescan_store(struct device *dev, struct device_attribute *attr,
  283. const char *buf, size_t count)
  284. {
  285. unsigned long val;
  286. struct pci_dev *pdev = to_pci_dev(dev);
  287. if (kstrtoul(buf, 0, &val) < 0)
  288. return -EINVAL;
  289. if (val) {
  290. pci_lock_rescan_remove();
  291. pci_rescan_bus(pdev->bus);
  292. pci_unlock_rescan_remove();
  293. }
  294. return count;
  295. }
  296. static struct device_attribute dev_rescan_attr = __ATTR(rescan,
  297. (S_IWUSR|S_IWGRP),
  298. NULL, dev_rescan_store);
  299. static void remove_callback(struct device *dev)
  300. {
  301. pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
  302. }
  303. static ssize_t
  304. remove_store(struct device *dev, struct device_attribute *dummy,
  305. const char *buf, size_t count)
  306. {
  307. int ret = 0;
  308. unsigned long val;
  309. if (kstrtoul(buf, 0, &val) < 0)
  310. return -EINVAL;
  311. /* An attribute cannot be unregistered by one of its own methods,
  312. * so we have to use this roundabout approach.
  313. */
  314. if (val)
  315. ret = device_schedule_callback(dev, remove_callback);
  316. if (ret)
  317. count = ret;
  318. return count;
  319. }
  320. static struct device_attribute dev_remove_attr = __ATTR(remove,
  321. (S_IWUSR|S_IWGRP),
  322. NULL, remove_store);
  323. static ssize_t
  324. dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
  325. const char *buf, size_t count)
  326. {
  327. unsigned long val;
  328. struct pci_bus *bus = to_pci_bus(dev);
  329. if (kstrtoul(buf, 0, &val) < 0)
  330. return -EINVAL;
  331. if (val) {
  332. pci_lock_rescan_remove();
  333. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  334. pci_rescan_bus_bridge_resize(bus->self);
  335. else
  336. pci_rescan_bus(bus);
  337. pci_unlock_rescan_remove();
  338. }
  339. return count;
  340. }
  341. static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
  342. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  343. static ssize_t d3cold_allowed_store(struct device *dev,
  344. struct device_attribute *attr,
  345. const char *buf, size_t count)
  346. {
  347. struct pci_dev *pdev = to_pci_dev(dev);
  348. unsigned long val;
  349. if (kstrtoul(buf, 0, &val) < 0)
  350. return -EINVAL;
  351. pdev->d3cold_allowed = !!val;
  352. pm_runtime_resume(dev);
  353. return count;
  354. }
  355. static ssize_t d3cold_allowed_show(struct device *dev,
  356. struct device_attribute *attr, char *buf)
  357. {
  358. struct pci_dev *pdev = to_pci_dev(dev);
  359. return sprintf (buf, "%u\n", pdev->d3cold_allowed);
  360. }
  361. static DEVICE_ATTR_RW(d3cold_allowed);
  362. #endif
  363. #ifdef CONFIG_PCI_IOV
  364. static ssize_t sriov_totalvfs_show(struct device *dev,
  365. struct device_attribute *attr,
  366. char *buf)
  367. {
  368. struct pci_dev *pdev = to_pci_dev(dev);
  369. return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
  370. }
  371. static ssize_t sriov_numvfs_show(struct device *dev,
  372. struct device_attribute *attr,
  373. char *buf)
  374. {
  375. struct pci_dev *pdev = to_pci_dev(dev);
  376. return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
  377. }
  378. /*
  379. * num_vfs > 0; number of VFs to enable
  380. * num_vfs = 0; disable all VFs
  381. *
  382. * Note: SRIOV spec doesn't allow partial VF
  383. * disable, so it's all or none.
  384. */
  385. static ssize_t sriov_numvfs_store(struct device *dev,
  386. struct device_attribute *attr,
  387. const char *buf, size_t count)
  388. {
  389. struct pci_dev *pdev = to_pci_dev(dev);
  390. int ret;
  391. u16 num_vfs;
  392. ret = kstrtou16(buf, 0, &num_vfs);
  393. if (ret < 0)
  394. return ret;
  395. if (num_vfs > pci_sriov_get_totalvfs(pdev))
  396. return -ERANGE;
  397. if (num_vfs == pdev->sriov->num_VFs)
  398. return count; /* no change */
  399. /* is PF driver loaded w/callback */
  400. if (!pdev->driver || !pdev->driver->sriov_configure) {
  401. dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
  402. return -ENOSYS;
  403. }
  404. if (num_vfs == 0) {
  405. /* disable VFs */
  406. ret = pdev->driver->sriov_configure(pdev, 0);
  407. if (ret < 0)
  408. return ret;
  409. return count;
  410. }
  411. /* enable VFs */
  412. if (pdev->sriov->num_VFs) {
  413. dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
  414. pdev->sriov->num_VFs, num_vfs);
  415. return -EBUSY;
  416. }
  417. ret = pdev->driver->sriov_configure(pdev, num_vfs);
  418. if (ret < 0)
  419. return ret;
  420. if (ret != num_vfs)
  421. dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
  422. num_vfs, ret);
  423. return count;
  424. }
  425. static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
  426. static struct device_attribute sriov_numvfs_attr =
  427. __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
  428. sriov_numvfs_show, sriov_numvfs_store);
  429. #endif /* CONFIG_PCI_IOV */
  430. static struct attribute *pci_dev_attrs[] = {
  431. &dev_attr_resource.attr,
  432. &dev_attr_vendor.attr,
  433. &dev_attr_device.attr,
  434. &dev_attr_subsystem_vendor.attr,
  435. &dev_attr_subsystem_device.attr,
  436. &dev_attr_class.attr,
  437. &dev_attr_irq.attr,
  438. &dev_attr_local_cpus.attr,
  439. &dev_attr_local_cpulist.attr,
  440. &dev_attr_modalias.attr,
  441. #ifdef CONFIG_NUMA
  442. &dev_attr_numa_node.attr,
  443. #endif
  444. &dev_attr_dma_mask_bits.attr,
  445. &dev_attr_consistent_dma_mask_bits.attr,
  446. &dev_attr_enabled.attr,
  447. &dev_attr_broken_parity_status.attr,
  448. &dev_attr_msi_bus.attr,
  449. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  450. &dev_attr_d3cold_allowed.attr,
  451. #endif
  452. NULL,
  453. };
  454. static const struct attribute_group pci_dev_group = {
  455. .attrs = pci_dev_attrs,
  456. };
  457. const struct attribute_group *pci_dev_groups[] = {
  458. &pci_dev_group,
  459. NULL,
  460. };
  461. static struct attribute *pcibus_attrs[] = {
  462. &dev_attr_rescan.attr,
  463. &dev_attr_cpuaffinity.attr,
  464. &dev_attr_cpulistaffinity.attr,
  465. NULL,
  466. };
  467. static const struct attribute_group pcibus_group = {
  468. .attrs = pcibus_attrs,
  469. };
  470. const struct attribute_group *pcibus_groups[] = {
  471. &pcibus_group,
  472. NULL,
  473. };
  474. static ssize_t
  475. boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
  476. {
  477. struct pci_dev *pdev = to_pci_dev(dev);
  478. struct pci_dev *vga_dev = vga_default_device();
  479. if (vga_dev)
  480. return sprintf(buf, "%u\n", (pdev == vga_dev));
  481. return sprintf(buf, "%u\n",
  482. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  483. IORESOURCE_ROM_SHADOW));
  484. }
  485. static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  486. static ssize_t
  487. pci_read_config(struct file *filp, struct kobject *kobj,
  488. struct bin_attribute *bin_attr,
  489. char *buf, loff_t off, size_t count)
  490. {
  491. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  492. unsigned int size = 64;
  493. loff_t init_off = off;
  494. u8 *data = (u8*) buf;
  495. /* Several chips lock up trying to read undefined config space */
  496. if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) {
  497. size = dev->cfg_size;
  498. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  499. size = 128;
  500. }
  501. if (off > size)
  502. return 0;
  503. if (off + count > size) {
  504. size -= off;
  505. count = size;
  506. } else {
  507. size = count;
  508. }
  509. pci_config_pm_runtime_get(dev);
  510. if ((off & 1) && size) {
  511. u8 val;
  512. pci_user_read_config_byte(dev, off, &val);
  513. data[off - init_off] = val;
  514. off++;
  515. size--;
  516. }
  517. if ((off & 3) && size > 2) {
  518. u16 val;
  519. pci_user_read_config_word(dev, off, &val);
  520. data[off - init_off] = val & 0xff;
  521. data[off - init_off + 1] = (val >> 8) & 0xff;
  522. off += 2;
  523. size -= 2;
  524. }
  525. while (size > 3) {
  526. u32 val;
  527. pci_user_read_config_dword(dev, off, &val);
  528. data[off - init_off] = val & 0xff;
  529. data[off - init_off + 1] = (val >> 8) & 0xff;
  530. data[off - init_off + 2] = (val >> 16) & 0xff;
  531. data[off - init_off + 3] = (val >> 24) & 0xff;
  532. off += 4;
  533. size -= 4;
  534. }
  535. if (size >= 2) {
  536. u16 val;
  537. pci_user_read_config_word(dev, off, &val);
  538. data[off - init_off] = val & 0xff;
  539. data[off - init_off + 1] = (val >> 8) & 0xff;
  540. off += 2;
  541. size -= 2;
  542. }
  543. if (size > 0) {
  544. u8 val;
  545. pci_user_read_config_byte(dev, off, &val);
  546. data[off - init_off] = val;
  547. off++;
  548. --size;
  549. }
  550. pci_config_pm_runtime_put(dev);
  551. return count;
  552. }
  553. static ssize_t
  554. pci_write_config(struct file* filp, struct kobject *kobj,
  555. struct bin_attribute *bin_attr,
  556. char *buf, loff_t off, size_t count)
  557. {
  558. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  559. unsigned int size = count;
  560. loff_t init_off = off;
  561. u8 *data = (u8*) buf;
  562. if (off > dev->cfg_size)
  563. return 0;
  564. if (off + count > dev->cfg_size) {
  565. size = dev->cfg_size - off;
  566. count = size;
  567. }
  568. pci_config_pm_runtime_get(dev);
  569. if ((off & 1) && size) {
  570. pci_user_write_config_byte(dev, off, data[off - init_off]);
  571. off++;
  572. size--;
  573. }
  574. if ((off & 3) && size > 2) {
  575. u16 val = data[off - init_off];
  576. val |= (u16) data[off - init_off + 1] << 8;
  577. pci_user_write_config_word(dev, off, val);
  578. off += 2;
  579. size -= 2;
  580. }
  581. while (size > 3) {
  582. u32 val = data[off - init_off];
  583. val |= (u32) data[off - init_off + 1] << 8;
  584. val |= (u32) data[off - init_off + 2] << 16;
  585. val |= (u32) data[off - init_off + 3] << 24;
  586. pci_user_write_config_dword(dev, off, val);
  587. off += 4;
  588. size -= 4;
  589. }
  590. if (size >= 2) {
  591. u16 val = data[off - init_off];
  592. val |= (u16) data[off - init_off + 1] << 8;
  593. pci_user_write_config_word(dev, off, val);
  594. off += 2;
  595. size -= 2;
  596. }
  597. if (size) {
  598. pci_user_write_config_byte(dev, off, data[off - init_off]);
  599. off++;
  600. --size;
  601. }
  602. pci_config_pm_runtime_put(dev);
  603. return count;
  604. }
  605. static ssize_t
  606. read_vpd_attr(struct file *filp, struct kobject *kobj,
  607. struct bin_attribute *bin_attr,
  608. char *buf, loff_t off, size_t count)
  609. {
  610. struct pci_dev *dev =
  611. to_pci_dev(container_of(kobj, struct device, kobj));
  612. if (off > bin_attr->size)
  613. count = 0;
  614. else if (count > bin_attr->size - off)
  615. count = bin_attr->size - off;
  616. return pci_read_vpd(dev, off, count, buf);
  617. }
  618. static ssize_t
  619. write_vpd_attr(struct file *filp, struct kobject *kobj,
  620. struct bin_attribute *bin_attr,
  621. char *buf, loff_t off, size_t count)
  622. {
  623. struct pci_dev *dev =
  624. to_pci_dev(container_of(kobj, struct device, kobj));
  625. if (off > bin_attr->size)
  626. count = 0;
  627. else if (count > bin_attr->size - off)
  628. count = bin_attr->size - off;
  629. return pci_write_vpd(dev, off, count, buf);
  630. }
  631. #ifdef HAVE_PCI_LEGACY
  632. /**
  633. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  634. * @filp: open sysfs file
  635. * @kobj: kobject corresponding to file to read from
  636. * @bin_attr: struct bin_attribute for this file
  637. * @buf: buffer to store results
  638. * @off: offset into legacy I/O port space
  639. * @count: number of bytes to read
  640. *
  641. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  642. * callback routine (pci_legacy_read).
  643. */
  644. static ssize_t
  645. pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  646. struct bin_attribute *bin_attr,
  647. char *buf, loff_t off, size_t count)
  648. {
  649. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  650. struct device,
  651. kobj));
  652. /* Only support 1, 2 or 4 byte accesses */
  653. if (count != 1 && count != 2 && count != 4)
  654. return -EINVAL;
  655. return pci_legacy_read(bus, off, (u32 *)buf, count);
  656. }
  657. /**
  658. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  659. * @filp: open sysfs file
  660. * @kobj: kobject corresponding to file to read from
  661. * @bin_attr: struct bin_attribute for this file
  662. * @buf: buffer containing value to be written
  663. * @off: offset into legacy I/O port space
  664. * @count: number of bytes to write
  665. *
  666. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  667. * callback routine (pci_legacy_write).
  668. */
  669. static ssize_t
  670. pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  671. struct bin_attribute *bin_attr,
  672. char *buf, loff_t off, size_t count)
  673. {
  674. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  675. struct device,
  676. kobj));
  677. /* Only support 1, 2 or 4 byte accesses */
  678. if (count != 1 && count != 2 && count != 4)
  679. return -EINVAL;
  680. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  681. }
  682. /**
  683. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  684. * @filp: open sysfs file
  685. * @kobj: kobject corresponding to device to be mapped
  686. * @attr: struct bin_attribute for this file
  687. * @vma: struct vm_area_struct passed to mmap
  688. *
  689. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  690. * legacy memory space (first meg of bus space) into application virtual
  691. * memory space.
  692. */
  693. static int
  694. pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  695. struct bin_attribute *attr,
  696. struct vm_area_struct *vma)
  697. {
  698. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  699. struct device,
  700. kobj));
  701. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  702. }
  703. /**
  704. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  705. * @filp: open sysfs file
  706. * @kobj: kobject corresponding to device to be mapped
  707. * @attr: struct bin_attribute for this file
  708. * @vma: struct vm_area_struct passed to mmap
  709. *
  710. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  711. * legacy IO space (first meg of bus space) into application virtual
  712. * memory space. Returns -ENOSYS if the operation isn't supported
  713. */
  714. static int
  715. pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  716. struct bin_attribute *attr,
  717. struct vm_area_struct *vma)
  718. {
  719. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  720. struct device,
  721. kobj));
  722. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  723. }
  724. /**
  725. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  726. * @b: bus to create files under
  727. * @mmap_type: I/O port or memory
  728. *
  729. * Stub implementation. Can be overridden by arch if necessary.
  730. */
  731. void __weak
  732. pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
  733. {
  734. return;
  735. }
  736. /**
  737. * pci_create_legacy_files - create legacy I/O port and memory files
  738. * @b: bus to create files under
  739. *
  740. * Some platforms allow access to legacy I/O port and ISA memory space on
  741. * a per-bus basis. This routine creates the files and ties them into
  742. * their associated read, write and mmap files from pci-sysfs.c
  743. *
  744. * On error unwind, but don't propagate the error to the caller
  745. * as it is ok to set up the PCI bus without these files.
  746. */
  747. void pci_create_legacy_files(struct pci_bus *b)
  748. {
  749. int error;
  750. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  751. GFP_ATOMIC);
  752. if (!b->legacy_io)
  753. goto kzalloc_err;
  754. sysfs_bin_attr_init(b->legacy_io);
  755. b->legacy_io->attr.name = "legacy_io";
  756. b->legacy_io->size = 0xffff;
  757. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  758. b->legacy_io->read = pci_read_legacy_io;
  759. b->legacy_io->write = pci_write_legacy_io;
  760. b->legacy_io->mmap = pci_mmap_legacy_io;
  761. pci_adjust_legacy_attr(b, pci_mmap_io);
  762. error = device_create_bin_file(&b->dev, b->legacy_io);
  763. if (error)
  764. goto legacy_io_err;
  765. /* Allocated above after the legacy_io struct */
  766. b->legacy_mem = b->legacy_io + 1;
  767. sysfs_bin_attr_init(b->legacy_mem);
  768. b->legacy_mem->attr.name = "legacy_mem";
  769. b->legacy_mem->size = 1024*1024;
  770. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  771. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  772. pci_adjust_legacy_attr(b, pci_mmap_mem);
  773. error = device_create_bin_file(&b->dev, b->legacy_mem);
  774. if (error)
  775. goto legacy_mem_err;
  776. return;
  777. legacy_mem_err:
  778. device_remove_bin_file(&b->dev, b->legacy_io);
  779. legacy_io_err:
  780. kfree(b->legacy_io);
  781. b->legacy_io = NULL;
  782. kzalloc_err:
  783. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  784. "and ISA memory resources to sysfs\n");
  785. return;
  786. }
  787. void pci_remove_legacy_files(struct pci_bus *b)
  788. {
  789. if (b->legacy_io) {
  790. device_remove_bin_file(&b->dev, b->legacy_io);
  791. device_remove_bin_file(&b->dev, b->legacy_mem);
  792. kfree(b->legacy_io); /* both are allocated here */
  793. }
  794. }
  795. #endif /* HAVE_PCI_LEGACY */
  796. #ifdef HAVE_PCI_MMAP
  797. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  798. enum pci_mmap_api mmap_api)
  799. {
  800. unsigned long nr, start, size, pci_start;
  801. if (pci_resource_len(pdev, resno) == 0)
  802. return 0;
  803. nr = vma_pages(vma);
  804. start = vma->vm_pgoff;
  805. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  806. pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
  807. pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
  808. if (start >= pci_start && start < pci_start + size &&
  809. start + nr <= pci_start + size)
  810. return 1;
  811. return 0;
  812. }
  813. /**
  814. * pci_mmap_resource - map a PCI resource into user memory space
  815. * @kobj: kobject for mapping
  816. * @attr: struct bin_attribute for the file being mapped
  817. * @vma: struct vm_area_struct passed into the mmap
  818. * @write_combine: 1 for write_combine mapping
  819. *
  820. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  821. */
  822. static int
  823. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  824. struct vm_area_struct *vma, int write_combine)
  825. {
  826. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  827. struct device, kobj));
  828. struct resource *res = attr->private;
  829. enum pci_mmap_state mmap_type;
  830. resource_size_t start, end;
  831. int i;
  832. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  833. if (res == &pdev->resource[i])
  834. break;
  835. if (i >= PCI_ROM_RESOURCE)
  836. return -ENODEV;
  837. if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
  838. WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
  839. "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
  840. current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
  841. pci_name(pdev), i,
  842. (u64)pci_resource_start(pdev, i),
  843. (u64)pci_resource_len(pdev, i));
  844. return -EINVAL;
  845. }
  846. /* pci_mmap_page_range() expects the same kind of entry as coming
  847. * from /proc/bus/pci/ which is a "user visible" value. If this is
  848. * different from the resource itself, arch will do necessary fixup.
  849. */
  850. pci_resource_to_user(pdev, i, res, &start, &end);
  851. vma->vm_pgoff += start >> PAGE_SHIFT;
  852. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  853. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  854. return -EINVAL;
  855. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  856. }
  857. static int
  858. pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  859. struct bin_attribute *attr,
  860. struct vm_area_struct *vma)
  861. {
  862. return pci_mmap_resource(kobj, attr, vma, 0);
  863. }
  864. static int
  865. pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  866. struct bin_attribute *attr,
  867. struct vm_area_struct *vma)
  868. {
  869. return pci_mmap_resource(kobj, attr, vma, 1);
  870. }
  871. static ssize_t
  872. pci_resource_io(struct file *filp, struct kobject *kobj,
  873. struct bin_attribute *attr, char *buf,
  874. loff_t off, size_t count, bool write)
  875. {
  876. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  877. struct device, kobj));
  878. struct resource *res = attr->private;
  879. unsigned long port = off;
  880. int i;
  881. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  882. if (res == &pdev->resource[i])
  883. break;
  884. if (i >= PCI_ROM_RESOURCE)
  885. return -ENODEV;
  886. port += pci_resource_start(pdev, i);
  887. if (port > pci_resource_end(pdev, i))
  888. return 0;
  889. if (port + count - 1 > pci_resource_end(pdev, i))
  890. return -EINVAL;
  891. switch (count) {
  892. case 1:
  893. if (write)
  894. outb(*(u8 *)buf, port);
  895. else
  896. *(u8 *)buf = inb(port);
  897. return 1;
  898. case 2:
  899. if (write)
  900. outw(*(u16 *)buf, port);
  901. else
  902. *(u16 *)buf = inw(port);
  903. return 2;
  904. case 4:
  905. if (write)
  906. outl(*(u32 *)buf, port);
  907. else
  908. *(u32 *)buf = inl(port);
  909. return 4;
  910. }
  911. return -EINVAL;
  912. }
  913. static ssize_t
  914. pci_read_resource_io(struct file *filp, struct kobject *kobj,
  915. struct bin_attribute *attr, char *buf,
  916. loff_t off, size_t count)
  917. {
  918. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  919. }
  920. static ssize_t
  921. pci_write_resource_io(struct file *filp, struct kobject *kobj,
  922. struct bin_attribute *attr, char *buf,
  923. loff_t off, size_t count)
  924. {
  925. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  926. }
  927. /**
  928. * pci_remove_resource_files - cleanup resource files
  929. * @pdev: dev to cleanup
  930. *
  931. * If we created resource files for @pdev, remove them from sysfs and
  932. * free their resources.
  933. */
  934. static void
  935. pci_remove_resource_files(struct pci_dev *pdev)
  936. {
  937. int i;
  938. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  939. struct bin_attribute *res_attr;
  940. res_attr = pdev->res_attr[i];
  941. if (res_attr) {
  942. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  943. kfree(res_attr);
  944. }
  945. res_attr = pdev->res_attr_wc[i];
  946. if (res_attr) {
  947. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  948. kfree(res_attr);
  949. }
  950. }
  951. }
  952. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  953. {
  954. /* allocate attribute structure, piggyback attribute name */
  955. int name_len = write_combine ? 13 : 10;
  956. struct bin_attribute *res_attr;
  957. int retval;
  958. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  959. if (res_attr) {
  960. char *res_attr_name = (char *)(res_attr + 1);
  961. sysfs_bin_attr_init(res_attr);
  962. if (write_combine) {
  963. pdev->res_attr_wc[num] = res_attr;
  964. sprintf(res_attr_name, "resource%d_wc", num);
  965. res_attr->mmap = pci_mmap_resource_wc;
  966. } else {
  967. pdev->res_attr[num] = res_attr;
  968. sprintf(res_attr_name, "resource%d", num);
  969. res_attr->mmap = pci_mmap_resource_uc;
  970. }
  971. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  972. res_attr->read = pci_read_resource_io;
  973. res_attr->write = pci_write_resource_io;
  974. }
  975. res_attr->attr.name = res_attr_name;
  976. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  977. res_attr->size = pci_resource_len(pdev, num);
  978. res_attr->private = &pdev->resource[num];
  979. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  980. } else
  981. retval = -ENOMEM;
  982. return retval;
  983. }
  984. /**
  985. * pci_create_resource_files - create resource files in sysfs for @dev
  986. * @pdev: dev in question
  987. *
  988. * Walk the resources in @pdev creating files for each resource available.
  989. */
  990. static int pci_create_resource_files(struct pci_dev *pdev)
  991. {
  992. int i;
  993. int retval;
  994. /* Expose the PCI resources from this device as files */
  995. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  996. /* skip empty resources */
  997. if (!pci_resource_len(pdev, i))
  998. continue;
  999. retval = pci_create_attr(pdev, i, 0);
  1000. /* for prefetchable resources, create a WC mappable file */
  1001. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  1002. retval = pci_create_attr(pdev, i, 1);
  1003. if (retval) {
  1004. pci_remove_resource_files(pdev);
  1005. return retval;
  1006. }
  1007. }
  1008. return 0;
  1009. }
  1010. #else /* !HAVE_PCI_MMAP */
  1011. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  1012. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  1013. #endif /* HAVE_PCI_MMAP */
  1014. /**
  1015. * pci_write_rom - used to enable access to the PCI ROM display
  1016. * @filp: sysfs file
  1017. * @kobj: kernel object handle
  1018. * @bin_attr: struct bin_attribute for this file
  1019. * @buf: user input
  1020. * @off: file offset
  1021. * @count: number of byte in input
  1022. *
  1023. * writing anything except 0 enables it
  1024. */
  1025. static ssize_t
  1026. pci_write_rom(struct file *filp, struct kobject *kobj,
  1027. struct bin_attribute *bin_attr,
  1028. char *buf, loff_t off, size_t count)
  1029. {
  1030. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  1031. if ((off == 0) && (*buf == '0') && (count == 2))
  1032. pdev->rom_attr_enabled = 0;
  1033. else
  1034. pdev->rom_attr_enabled = 1;
  1035. return count;
  1036. }
  1037. /**
  1038. * pci_read_rom - read a PCI ROM
  1039. * @filp: sysfs file
  1040. * @kobj: kernel object handle
  1041. * @bin_attr: struct bin_attribute for this file
  1042. * @buf: where to put the data we read from the ROM
  1043. * @off: file offset
  1044. * @count: number of bytes to read
  1045. *
  1046. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  1047. * device corresponding to @kobj.
  1048. */
  1049. static ssize_t
  1050. pci_read_rom(struct file *filp, struct kobject *kobj,
  1051. struct bin_attribute *bin_attr,
  1052. char *buf, loff_t off, size_t count)
  1053. {
  1054. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  1055. void __iomem *rom;
  1056. size_t size;
  1057. if (!pdev->rom_attr_enabled)
  1058. return -EINVAL;
  1059. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  1060. if (!rom || !size)
  1061. return -EIO;
  1062. if (off >= size)
  1063. count = 0;
  1064. else {
  1065. if (off + count > size)
  1066. count = size - off;
  1067. memcpy_fromio(buf, rom + off, count);
  1068. }
  1069. pci_unmap_rom(pdev, rom);
  1070. return count;
  1071. }
  1072. static struct bin_attribute pci_config_attr = {
  1073. .attr = {
  1074. .name = "config",
  1075. .mode = S_IRUGO | S_IWUSR,
  1076. },
  1077. .size = PCI_CFG_SPACE_SIZE,
  1078. .read = pci_read_config,
  1079. .write = pci_write_config,
  1080. };
  1081. static struct bin_attribute pcie_config_attr = {
  1082. .attr = {
  1083. .name = "config",
  1084. .mode = S_IRUGO | S_IWUSR,
  1085. },
  1086. .size = PCI_CFG_SPACE_EXP_SIZE,
  1087. .read = pci_read_config,
  1088. .write = pci_write_config,
  1089. };
  1090. int __weak pcibios_add_platform_entries(struct pci_dev *dev)
  1091. {
  1092. return 0;
  1093. }
  1094. static ssize_t reset_store(struct device *dev,
  1095. struct device_attribute *attr, const char *buf,
  1096. size_t count)
  1097. {
  1098. struct pci_dev *pdev = to_pci_dev(dev);
  1099. unsigned long val;
  1100. ssize_t result = kstrtoul(buf, 0, &val);
  1101. if (result < 0)
  1102. return result;
  1103. if (val != 1)
  1104. return -EINVAL;
  1105. result = pci_reset_function(pdev);
  1106. if (result < 0)
  1107. return result;
  1108. return count;
  1109. }
  1110. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  1111. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1112. {
  1113. int retval;
  1114. struct bin_attribute *attr;
  1115. /* If the device has VPD, try to expose it in sysfs. */
  1116. if (dev->vpd) {
  1117. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1118. if (!attr)
  1119. return -ENOMEM;
  1120. sysfs_bin_attr_init(attr);
  1121. attr->size = dev->vpd->len;
  1122. attr->attr.name = "vpd";
  1123. attr->attr.mode = S_IRUSR | S_IWUSR;
  1124. attr->read = read_vpd_attr;
  1125. attr->write = write_vpd_attr;
  1126. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  1127. if (retval) {
  1128. kfree(attr);
  1129. return retval;
  1130. }
  1131. dev->vpd->attr = attr;
  1132. }
  1133. /* Active State Power Management */
  1134. pcie_aspm_create_sysfs_dev_files(dev);
  1135. if (!pci_probe_reset_function(dev)) {
  1136. retval = device_create_file(&dev->dev, &reset_attr);
  1137. if (retval)
  1138. goto error;
  1139. dev->reset_fn = 1;
  1140. }
  1141. return 0;
  1142. error:
  1143. pcie_aspm_remove_sysfs_dev_files(dev);
  1144. if (dev->vpd && dev->vpd->attr) {
  1145. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1146. kfree(dev->vpd->attr);
  1147. }
  1148. return retval;
  1149. }
  1150. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  1151. {
  1152. int retval;
  1153. int rom_size = 0;
  1154. struct bin_attribute *attr;
  1155. if (!sysfs_initialized)
  1156. return -EACCES;
  1157. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1158. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1159. else
  1160. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1161. if (retval)
  1162. goto err;
  1163. retval = pci_create_resource_files(pdev);
  1164. if (retval)
  1165. goto err_config_file;
  1166. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1167. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1168. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1169. rom_size = 0x20000;
  1170. /* If the device has a ROM, try to expose it in sysfs. */
  1171. if (rom_size) {
  1172. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1173. if (!attr) {
  1174. retval = -ENOMEM;
  1175. goto err_resource_files;
  1176. }
  1177. sysfs_bin_attr_init(attr);
  1178. attr->size = rom_size;
  1179. attr->attr.name = "rom";
  1180. attr->attr.mode = S_IRUSR | S_IWUSR;
  1181. attr->read = pci_read_rom;
  1182. attr->write = pci_write_rom;
  1183. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1184. if (retval) {
  1185. kfree(attr);
  1186. goto err_resource_files;
  1187. }
  1188. pdev->rom_attr = attr;
  1189. }
  1190. /* add platform-specific attributes */
  1191. retval = pcibios_add_platform_entries(pdev);
  1192. if (retval)
  1193. goto err_rom_file;
  1194. /* add sysfs entries for various capabilities */
  1195. retval = pci_create_capabilities_sysfs(pdev);
  1196. if (retval)
  1197. goto err_rom_file;
  1198. pci_create_firmware_label_files(pdev);
  1199. return 0;
  1200. err_rom_file:
  1201. if (rom_size) {
  1202. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1203. kfree(pdev->rom_attr);
  1204. pdev->rom_attr = NULL;
  1205. }
  1206. err_resource_files:
  1207. pci_remove_resource_files(pdev);
  1208. err_config_file:
  1209. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1210. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1211. else
  1212. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1213. err:
  1214. return retval;
  1215. }
  1216. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1217. {
  1218. if (dev->vpd && dev->vpd->attr) {
  1219. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1220. kfree(dev->vpd->attr);
  1221. }
  1222. pcie_aspm_remove_sysfs_dev_files(dev);
  1223. if (dev->reset_fn) {
  1224. device_remove_file(&dev->dev, &reset_attr);
  1225. dev->reset_fn = 0;
  1226. }
  1227. }
  1228. /**
  1229. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1230. * @pdev: device whose entries we should free
  1231. *
  1232. * Cleanup when @pdev is removed from sysfs.
  1233. */
  1234. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1235. {
  1236. int rom_size = 0;
  1237. if (!sysfs_initialized)
  1238. return;
  1239. pci_remove_capabilities_sysfs(pdev);
  1240. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1241. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1242. else
  1243. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1244. pci_remove_resource_files(pdev);
  1245. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1246. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1247. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1248. rom_size = 0x20000;
  1249. if (rom_size && pdev->rom_attr) {
  1250. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1251. kfree(pdev->rom_attr);
  1252. }
  1253. pci_remove_firmware_label_files(pdev);
  1254. }
  1255. static int __init pci_sysfs_init(void)
  1256. {
  1257. struct pci_dev *pdev = NULL;
  1258. int retval;
  1259. sysfs_initialized = 1;
  1260. for_each_pci_dev(pdev) {
  1261. retval = pci_create_sysfs_dev_files(pdev);
  1262. if (retval) {
  1263. pci_dev_put(pdev);
  1264. return retval;
  1265. }
  1266. }
  1267. return 0;
  1268. }
  1269. late_initcall(pci_sysfs_init);
  1270. static struct attribute *pci_dev_dev_attrs[] = {
  1271. &vga_attr.attr,
  1272. NULL,
  1273. };
  1274. static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
  1275. struct attribute *a, int n)
  1276. {
  1277. struct device *dev = container_of(kobj, struct device, kobj);
  1278. struct pci_dev *pdev = to_pci_dev(dev);
  1279. if (a == &vga_attr.attr)
  1280. if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
  1281. return 0;
  1282. return a->mode;
  1283. }
  1284. static struct attribute *pci_dev_hp_attrs[] = {
  1285. &dev_remove_attr.attr,
  1286. &dev_rescan_attr.attr,
  1287. NULL,
  1288. };
  1289. static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
  1290. struct attribute *a, int n)
  1291. {
  1292. struct device *dev = container_of(kobj, struct device, kobj);
  1293. struct pci_dev *pdev = to_pci_dev(dev);
  1294. if (pdev->is_virtfn)
  1295. return 0;
  1296. return a->mode;
  1297. }
  1298. static struct attribute_group pci_dev_hp_attr_group = {
  1299. .attrs = pci_dev_hp_attrs,
  1300. .is_visible = pci_dev_hp_attrs_are_visible,
  1301. };
  1302. #ifdef CONFIG_PCI_IOV
  1303. static struct attribute *sriov_dev_attrs[] = {
  1304. &sriov_totalvfs_attr.attr,
  1305. &sriov_numvfs_attr.attr,
  1306. NULL,
  1307. };
  1308. static umode_t sriov_attrs_are_visible(struct kobject *kobj,
  1309. struct attribute *a, int n)
  1310. {
  1311. struct device *dev = container_of(kobj, struct device, kobj);
  1312. if (!dev_is_pf(dev))
  1313. return 0;
  1314. return a->mode;
  1315. }
  1316. static struct attribute_group sriov_dev_attr_group = {
  1317. .attrs = sriov_dev_attrs,
  1318. .is_visible = sriov_attrs_are_visible,
  1319. };
  1320. #endif /* CONFIG_PCI_IOV */
  1321. static struct attribute_group pci_dev_attr_group = {
  1322. .attrs = pci_dev_dev_attrs,
  1323. .is_visible = pci_dev_attrs_are_visible,
  1324. };
  1325. static const struct attribute_group *pci_dev_attr_groups[] = {
  1326. &pci_dev_attr_group,
  1327. &pci_dev_hp_attr_group,
  1328. #ifdef CONFIG_PCI_IOV
  1329. &sriov_dev_attr_group,
  1330. #endif
  1331. NULL,
  1332. };
  1333. struct device_type pci_dev_type = {
  1334. .groups = pci_dev_attr_groups,
  1335. };