wil6210.h 13 KB

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  1. /*
  2. * Copyright (c) 2012 Qualcomm Atheros, Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef __WIL6210_H__
  17. #define __WIL6210_H__
  18. #include <linux/netdevice.h>
  19. #include <linux/wireless.h>
  20. #include <net/cfg80211.h>
  21. #define WIL_NAME "wil6210"
  22. /**
  23. * extract bits [@b0:@b1] (inclusive) from the value @x
  24. * it should be @b0 <= @b1, or result is incorrect
  25. */
  26. static inline u32 WIL_GET_BITS(u32 x, int b0, int b1)
  27. {
  28. return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1);
  29. }
  30. #define WIL6210_MEM_SIZE (2*1024*1024UL)
  31. #define WIL6210_RX_RING_SIZE (128)
  32. #define WIL6210_TX_RING_SIZE (128)
  33. #define WIL6210_MAX_TX_RINGS (24) /* HW limit */
  34. #define WIL6210_MAX_CID (8) /* HW limit */
  35. #define WIL6210_NAPI_BUDGET (16) /* arbitrary */
  36. #define WIL6210_ITR_TRSH (10000) /* arbitrary - about 15 IRQs/msec */
  37. /* Hardware definitions begin */
  38. /*
  39. * Mapping
  40. * RGF File | Host addr | FW addr
  41. * | |
  42. * user_rgf | 0x000000 | 0x880000
  43. * dma_rgf | 0x001000 | 0x881000
  44. * pcie_rgf | 0x002000 | 0x882000
  45. * | |
  46. */
  47. /* Where various structures placed in host address space */
  48. #define WIL6210_FW_HOST_OFF (0x880000UL)
  49. #define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF)
  50. /*
  51. * Interrupt control registers block
  52. *
  53. * each interrupt controlled by the same bit in all registers
  54. */
  55. struct RGF_ICR {
  56. u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */
  57. u32 ICR; /* Cause, W1C/COR depending on ICC */
  58. u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */
  59. u32 ICS; /* Cause Set, WO */
  60. u32 IMV; /* Mask, RW+S/C */
  61. u32 IMS; /* Mask Set, write 1 to set */
  62. u32 IMC; /* Mask Clear, write 1 to clear */
  63. } __packed;
  64. /* registers - FW addresses */
  65. #define RGF_USER_USER_SCRATCH_PAD (0x8802bc)
  66. #define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */
  67. #define BIT_USER_USER_ICR_SW_INT_2 BIT(18)
  68. #define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14)
  69. #define RGF_USER_MAC_CPU_0 (0x8801fc)
  70. #define RGF_USER_USER_CPU_0 (0x8801e0)
  71. #define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04)
  72. #define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08)
  73. #define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c)
  74. #define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10)
  75. #define RGF_DMA_PSEUDO_CAUSE (0x881c68)
  76. #define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c)
  77. #define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70)
  78. #define BIT_DMA_PSEUDO_CAUSE_RX BIT(0)
  79. #define BIT_DMA_PSEUDO_CAUSE_TX BIT(1)
  80. #define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2)
  81. #define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */
  82. #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0)
  83. #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */
  84. #define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */
  85. #define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0)
  86. #define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */
  87. #define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0)
  88. #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1)
  89. #define BIT_DMA_EP_MISC_ICR_FW_INT(n) BIT(28+n) /* n = [0..3] */
  90. /* Interrupt moderation control */
  91. #define RGF_DMA_ITR_CNT_TRSH (0x881c5c)
  92. #define RGF_DMA_ITR_CNT_DATA (0x881c60)
  93. #define RGF_DMA_ITR_CNT_CRL (0x881C64)
  94. #define BIT_DMA_ITR_CNT_CRL_EN BIT(0)
  95. #define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1)
  96. #define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2)
  97. #define BIT_DMA_ITR_CNT_CRL_CLR BIT(3)
  98. #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4)
  99. /* popular locations */
  100. #define HOST_MBOX HOSTADDR(RGF_USER_USER_SCRATCH_PAD)
  101. #define HOST_SW_INT (HOSTADDR(RGF_USER_USER_ICR) + \
  102. offsetof(struct RGF_ICR, ICS))
  103. #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2
  104. /* ISR register bits */
  105. #define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT(0)
  106. #define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT(1)
  107. #define ISR_MISC_FW_ERROR BIT_DMA_EP_MISC_ICR_FW_INT(3)
  108. /* Hardware definitions end */
  109. struct wil6210_mbox_ring {
  110. u32 base;
  111. u16 entry_size; /* max. size of mbox entry, incl. all headers */
  112. u16 size;
  113. u32 tail;
  114. u32 head;
  115. } __packed;
  116. struct wil6210_mbox_ring_desc {
  117. __le32 sync;
  118. __le32 addr;
  119. } __packed;
  120. /* at HOST_OFF_WIL6210_MBOX_CTL */
  121. struct wil6210_mbox_ctl {
  122. struct wil6210_mbox_ring tx;
  123. struct wil6210_mbox_ring rx;
  124. } __packed;
  125. struct wil6210_mbox_hdr {
  126. __le16 seq;
  127. __le16 len; /* payload, bytes after this header */
  128. __le16 type;
  129. u8 flags;
  130. u8 reserved;
  131. } __packed;
  132. #define WIL_MBOX_HDR_TYPE_WMI (0)
  133. /* max. value for wil6210_mbox_hdr.len */
  134. #define MAX_MBOXITEM_SIZE (240)
  135. /**
  136. * struct wil6210_mbox_hdr_wmi - WMI header
  137. *
  138. * @mid: MAC ID
  139. * 00 - default, created by FW
  140. * 01..0f - WiFi ports, driver to create
  141. * 10..fe - debug
  142. * ff - broadcast
  143. * @id: command/event ID
  144. * @timestamp: FW fills for events, free-running msec timer
  145. */
  146. struct wil6210_mbox_hdr_wmi {
  147. u8 mid;
  148. u8 reserved;
  149. __le16 id;
  150. __le32 timestamp;
  151. } __packed;
  152. struct pending_wmi_event {
  153. struct list_head list;
  154. struct {
  155. struct wil6210_mbox_hdr hdr;
  156. struct wil6210_mbox_hdr_wmi wmi;
  157. u8 data[0];
  158. } __packed event;
  159. };
  160. /**
  161. * struct wil_ctx - software context for Vring descriptor
  162. */
  163. struct wil_ctx {
  164. struct sk_buff *skb;
  165. u8 mapped_as_page:1;
  166. };
  167. union vring_desc;
  168. struct vring {
  169. dma_addr_t pa;
  170. volatile union vring_desc *va; /* vring_desc[size], WriteBack by DMA */
  171. u16 size; /* number of vring_desc elements */
  172. u32 swtail;
  173. u32 swhead;
  174. u32 hwtail; /* write here to inform hw */
  175. struct wil_ctx *ctx; /* ctx[size] - software context */
  176. };
  177. enum { /* for wil6210_priv.status */
  178. wil_status_fwready = 0,
  179. wil_status_fwconnecting,
  180. wil_status_fwconnected,
  181. wil_status_dontscan,
  182. wil_status_reset_done,
  183. wil_status_irqen, /* FIXME: interrupts enabled - for debug */
  184. };
  185. struct pci_dev;
  186. struct wil6210_stats {
  187. u64 tsf;
  188. u32 snr;
  189. u16 last_mcs_rx;
  190. u16 bf_mcs; /* last BF, used for Tx */
  191. u16 my_rx_sector;
  192. u16 my_tx_sector;
  193. u16 peer_rx_sector;
  194. u16 peer_tx_sector;
  195. };
  196. struct wil6210_priv {
  197. struct pci_dev *pdev;
  198. int n_msi;
  199. struct wireless_dev *wdev;
  200. void __iomem *csr;
  201. ulong status;
  202. u32 fw_version;
  203. u8 n_mids; /* number of additional MIDs as reported by FW */
  204. /* profile */
  205. u32 monitor_flags;
  206. u32 secure_pcp; /* create secure PCP? */
  207. int sinfo_gen;
  208. /* cached ISR registers */
  209. u32 isr_misc;
  210. /* mailbox related */
  211. struct mutex wmi_mutex;
  212. struct wil6210_mbox_ctl mbox_ctl;
  213. struct completion wmi_ready;
  214. u16 wmi_seq;
  215. u16 reply_id; /**< wait for this WMI event */
  216. void *reply_buf;
  217. u16 reply_size;
  218. struct workqueue_struct *wmi_wq; /* for deferred calls */
  219. struct work_struct wmi_event_worker;
  220. struct workqueue_struct *wmi_wq_conn; /* for connect worker */
  221. struct work_struct connect_worker;
  222. struct work_struct disconnect_worker;
  223. struct timer_list connect_timer;
  224. int pending_connect_cid;
  225. struct list_head pending_wmi_ev;
  226. /*
  227. * protect pending_wmi_ev
  228. * - fill in IRQ from wil6210_irq_misc,
  229. * - consumed in thread by wmi_event_worker
  230. */
  231. spinlock_t wmi_ev_lock;
  232. struct napi_struct napi_rx;
  233. struct napi_struct napi_tx;
  234. /* DMA related */
  235. struct vring vring_rx;
  236. struct vring vring_tx[WIL6210_MAX_TX_RINGS];
  237. u8 dst_addr[WIL6210_MAX_TX_RINGS][ETH_ALEN];
  238. /* scan */
  239. struct cfg80211_scan_request *scan_request;
  240. struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */
  241. /* statistics */
  242. struct wil6210_stats stats;
  243. /* debugfs */
  244. struct dentry *debug;
  245. struct debugfs_blob_wrapper fw_code_blob;
  246. struct debugfs_blob_wrapper fw_data_blob;
  247. struct debugfs_blob_wrapper fw_peri_blob;
  248. struct debugfs_blob_wrapper uc_code_blob;
  249. struct debugfs_blob_wrapper uc_data_blob;
  250. struct debugfs_blob_wrapper rgf_blob;
  251. };
  252. #define wil_to_wiphy(i) (i->wdev->wiphy)
  253. #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i)))
  254. #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w))
  255. #define wil_to_wdev(i) (i->wdev)
  256. #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w))
  257. #define wil_to_ndev(i) (wil_to_wdev(i)->netdev)
  258. #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr))
  259. int wil_dbg_trace(struct wil6210_priv *wil, const char *fmt, ...);
  260. int wil_err(struct wil6210_priv *wil, const char *fmt, ...);
  261. int wil_info(struct wil6210_priv *wil, const char *fmt, ...);
  262. #define wil_dbg(wil, fmt, arg...) do { \
  263. netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \
  264. wil_dbg_trace(wil, fmt, ##arg); \
  265. } while (0)
  266. #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
  267. #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
  268. #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
  269. #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg)
  270. #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \
  271. groupsize, buf, len, ascii) \
  272. print_hex_dump_debug("DBG[TXRX]" prefix_str,\
  273. prefix_type, rowsize, \
  274. groupsize, buf, len, ascii)
  275. #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \
  276. groupsize, buf, len, ascii) \
  277. print_hex_dump_debug("DBG[ WMI]" prefix_str,\
  278. prefix_type, rowsize, \
  279. groupsize, buf, len, ascii)
  280. void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
  281. size_t count);
  282. void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
  283. size_t count);
  284. void *wil_if_alloc(struct device *dev, void __iomem *csr);
  285. void wil_if_free(struct wil6210_priv *wil);
  286. int wil_if_add(struct wil6210_priv *wil);
  287. void wil_if_remove(struct wil6210_priv *wil);
  288. int wil_priv_init(struct wil6210_priv *wil);
  289. void wil_priv_deinit(struct wil6210_priv *wil);
  290. int wil_reset(struct wil6210_priv *wil);
  291. void wil_link_on(struct wil6210_priv *wil);
  292. void wil_link_off(struct wil6210_priv *wil);
  293. int wil_up(struct wil6210_priv *wil);
  294. int wil_down(struct wil6210_priv *wil);
  295. void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r);
  296. void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr);
  297. void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr);
  298. int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr,
  299. struct wil6210_mbox_hdr *hdr);
  300. int wmi_send(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len);
  301. void wmi_recv_cmd(struct wil6210_priv *wil);
  302. int wmi_call(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len,
  303. u16 reply_id, void *reply, u8 reply_size, int to_msec);
  304. void wmi_event_worker(struct work_struct *work);
  305. void wmi_event_flush(struct wil6210_priv *wil);
  306. int wmi_set_ssid(struct wil6210_priv *wil, u8 ssid_len, const void *ssid);
  307. int wmi_get_ssid(struct wil6210_priv *wil, u8 *ssid_len, void *ssid);
  308. int wmi_set_channel(struct wil6210_priv *wil, int channel);
  309. int wmi_get_channel(struct wil6210_priv *wil, int *channel);
  310. int wmi_del_cipher_key(struct wil6210_priv *wil, u8 key_index,
  311. const void *mac_addr);
  312. int wmi_add_cipher_key(struct wil6210_priv *wil, u8 key_index,
  313. const void *mac_addr, int key_len, const void *key);
  314. int wmi_echo(struct wil6210_priv *wil);
  315. int wmi_set_ie(struct wil6210_priv *wil, u8 type, u16 ie_len, const void *ie);
  316. int wmi_rx_chain_add(struct wil6210_priv *wil, struct vring *vring);
  317. int wmi_p2p_cfg(struct wil6210_priv *wil, int channel);
  318. int wmi_get_temperature(struct wil6210_priv *wil, u32 *t_m, u32 *t_r);
  319. int wil6210_init_irq(struct wil6210_priv *wil, int irq);
  320. void wil6210_fini_irq(struct wil6210_priv *wil, int irq);
  321. void wil6210_disable_irq(struct wil6210_priv *wil);
  322. void wil6210_enable_irq(struct wil6210_priv *wil);
  323. int wil6210_debugfs_init(struct wil6210_priv *wil);
  324. void wil6210_debugfs_remove(struct wil6210_priv *wil);
  325. struct wireless_dev *wil_cfg80211_init(struct device *dev);
  326. void wil_wdev_free(struct wil6210_priv *wil);
  327. int wmi_set_mac_address(struct wil6210_priv *wil, void *addr);
  328. int wmi_pcp_start(struct wil6210_priv *wil, int bi, u8 wmi_nettype, u8 chan);
  329. int wmi_pcp_stop(struct wil6210_priv *wil);
  330. void wil6210_disconnect(struct wil6210_priv *wil, void *bssid);
  331. int wil_rx_init(struct wil6210_priv *wil);
  332. void wil_rx_fini(struct wil6210_priv *wil);
  333. /* TX API */
  334. int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size,
  335. int cid, int tid);
  336. void wil_vring_fini_tx(struct wil6210_priv *wil, int id);
  337. netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev);
  338. int wil_tx_complete(struct wil6210_priv *wil, int ringid);
  339. void wil6210_unmask_irq_tx(struct wil6210_priv *wil);
  340. /* RX API */
  341. void wil_rx_handle(struct wil6210_priv *wil, int *quota);
  342. void wil6210_unmask_irq_rx(struct wil6210_priv *wil);
  343. int wil_iftype_nl2wmi(enum nl80211_iftype type);
  344. #endif /* __WIL6210_H__ */