txrx.c 24 KB

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  1. /*
  2. * Copyright (c) 2012 Qualcomm Atheros, Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/etherdevice.h>
  17. #include <net/ieee80211_radiotap.h>
  18. #include <linux/if_arp.h>
  19. #include <linux/moduleparam.h>
  20. #include <linux/ip.h>
  21. #include <linux/ipv6.h>
  22. #include <net/ipv6.h>
  23. #include <linux/prefetch.h>
  24. #include "wil6210.h"
  25. #include "wmi.h"
  26. #include "txrx.h"
  27. #include "trace.h"
  28. static bool rtap_include_phy_info;
  29. module_param(rtap_include_phy_info, bool, S_IRUGO);
  30. MODULE_PARM_DESC(rtap_include_phy_info,
  31. " Include PHY info in the radiotap header, default - no");
  32. static inline int wil_vring_is_empty(struct vring *vring)
  33. {
  34. return vring->swhead == vring->swtail;
  35. }
  36. static inline u32 wil_vring_next_tail(struct vring *vring)
  37. {
  38. return (vring->swtail + 1) % vring->size;
  39. }
  40. static inline void wil_vring_advance_head(struct vring *vring, int n)
  41. {
  42. vring->swhead = (vring->swhead + n) % vring->size;
  43. }
  44. static inline int wil_vring_is_full(struct vring *vring)
  45. {
  46. return wil_vring_next_tail(vring) == vring->swhead;
  47. }
  48. /*
  49. * Available space in Tx Vring
  50. */
  51. static inline int wil_vring_avail_tx(struct vring *vring)
  52. {
  53. u32 swhead = vring->swhead;
  54. u32 swtail = vring->swtail;
  55. int used = (vring->size + swhead - swtail) % vring->size;
  56. return vring->size - used - 1;
  57. }
  58. static int wil_vring_alloc(struct wil6210_priv *wil, struct vring *vring)
  59. {
  60. struct device *dev = wil_to_dev(wil);
  61. size_t sz = vring->size * sizeof(vring->va[0]);
  62. uint i;
  63. BUILD_BUG_ON(sizeof(vring->va[0]) != 32);
  64. vring->swhead = 0;
  65. vring->swtail = 0;
  66. vring->ctx = kcalloc(vring->size, sizeof(vring->ctx[0]), GFP_KERNEL);
  67. if (!vring->ctx) {
  68. vring->va = NULL;
  69. return -ENOMEM;
  70. }
  71. /*
  72. * vring->va should be aligned on its size rounded up to power of 2
  73. * This is granted by the dma_alloc_coherent
  74. */
  75. vring->va = dma_alloc_coherent(dev, sz, &vring->pa, GFP_KERNEL);
  76. if (!vring->va) {
  77. kfree(vring->ctx);
  78. vring->ctx = NULL;
  79. return -ENOMEM;
  80. }
  81. /* initially, all descriptors are SW owned
  82. * For Tx and Rx, ownership bit is at the same location, thus
  83. * we can use any
  84. */
  85. for (i = 0; i < vring->size; i++) {
  86. volatile struct vring_tx_desc *_d = &(vring->va[i].tx);
  87. _d->dma.status = TX_DMA_STATUS_DU;
  88. }
  89. wil_dbg_misc(wil, "vring[%d] 0x%p:0x%016llx 0x%p\n", vring->size,
  90. vring->va, (unsigned long long)vring->pa, vring->ctx);
  91. return 0;
  92. }
  93. static void wil_vring_free(struct wil6210_priv *wil, struct vring *vring,
  94. int tx)
  95. {
  96. struct device *dev = wil_to_dev(wil);
  97. size_t sz = vring->size * sizeof(vring->va[0]);
  98. while (!wil_vring_is_empty(vring)) {
  99. dma_addr_t pa;
  100. u16 dmalen;
  101. struct wil_ctx *ctx;
  102. if (tx) {
  103. struct vring_tx_desc dd, *d = &dd;
  104. volatile struct vring_tx_desc *_d =
  105. &vring->va[vring->swtail].tx;
  106. ctx = &vring->ctx[vring->swtail];
  107. *d = *_d;
  108. pa = wil_desc_addr(&d->dma.addr);
  109. dmalen = le16_to_cpu(d->dma.length);
  110. if (vring->ctx[vring->swtail].mapped_as_page) {
  111. dma_unmap_page(dev, pa, dmalen,
  112. DMA_TO_DEVICE);
  113. } else {
  114. dma_unmap_single(dev, pa, dmalen,
  115. DMA_TO_DEVICE);
  116. }
  117. if (ctx->skb)
  118. dev_kfree_skb_any(ctx->skb);
  119. vring->swtail = wil_vring_next_tail(vring);
  120. } else { /* rx */
  121. struct vring_rx_desc dd, *d = &dd;
  122. volatile struct vring_rx_desc *_d =
  123. &vring->va[vring->swhead].rx;
  124. ctx = &vring->ctx[vring->swhead];
  125. *d = *_d;
  126. pa = wil_desc_addr(&d->dma.addr);
  127. dmalen = le16_to_cpu(d->dma.length);
  128. dma_unmap_single(dev, pa, dmalen, DMA_FROM_DEVICE);
  129. kfree_skb(ctx->skb);
  130. wil_vring_advance_head(vring, 1);
  131. }
  132. }
  133. dma_free_coherent(dev, sz, (void *)vring->va, vring->pa);
  134. kfree(vring->ctx);
  135. vring->pa = 0;
  136. vring->va = NULL;
  137. vring->ctx = NULL;
  138. }
  139. /**
  140. * Allocate one skb for Rx VRING
  141. *
  142. * Safe to call from IRQ
  143. */
  144. static int wil_vring_alloc_skb(struct wil6210_priv *wil, struct vring *vring,
  145. u32 i, int headroom)
  146. {
  147. struct device *dev = wil_to_dev(wil);
  148. unsigned int sz = RX_BUF_LEN;
  149. struct vring_rx_desc dd, *d = &dd;
  150. volatile struct vring_rx_desc *_d = &(vring->va[i].rx);
  151. dma_addr_t pa;
  152. /* TODO align */
  153. struct sk_buff *skb = dev_alloc_skb(sz + headroom);
  154. if (unlikely(!skb))
  155. return -ENOMEM;
  156. skb_reserve(skb, headroom);
  157. skb_put(skb, sz);
  158. pa = dma_map_single(dev, skb->data, skb->len, DMA_FROM_DEVICE);
  159. if (unlikely(dma_mapping_error(dev, pa))) {
  160. kfree_skb(skb);
  161. return -ENOMEM;
  162. }
  163. d->dma.d0 = BIT(9) | RX_DMA_D0_CMD_DMA_IT;
  164. wil_desc_addr_set(&d->dma.addr, pa);
  165. /* ip_length don't care */
  166. /* b11 don't care */
  167. /* error don't care */
  168. d->dma.status = 0; /* BIT(0) should be 0 for HW_OWNED */
  169. d->dma.length = cpu_to_le16(sz);
  170. *_d = *d;
  171. vring->ctx[i].skb = skb;
  172. return 0;
  173. }
  174. /**
  175. * Adds radiotap header
  176. *
  177. * Any error indicated as "Bad FCS"
  178. *
  179. * Vendor data for 04:ce:14-1 (Wilocity-1) consists of:
  180. * - Rx descriptor: 32 bytes
  181. * - Phy info
  182. */
  183. static void wil_rx_add_radiotap_header(struct wil6210_priv *wil,
  184. struct sk_buff *skb)
  185. {
  186. struct wireless_dev *wdev = wil->wdev;
  187. struct wil6210_rtap {
  188. struct ieee80211_radiotap_header rthdr;
  189. /* fields should be in the order of bits in rthdr.it_present */
  190. /* flags */
  191. u8 flags;
  192. /* channel */
  193. __le16 chnl_freq __aligned(2);
  194. __le16 chnl_flags;
  195. /* MCS */
  196. u8 mcs_present;
  197. u8 mcs_flags;
  198. u8 mcs_index;
  199. } __packed;
  200. struct wil6210_rtap_vendor {
  201. struct wil6210_rtap rtap;
  202. /* vendor */
  203. u8 vendor_oui[3] __aligned(2);
  204. u8 vendor_ns;
  205. __le16 vendor_skip;
  206. u8 vendor_data[0];
  207. } __packed;
  208. struct vring_rx_desc *d = wil_skb_rxdesc(skb);
  209. struct wil6210_rtap_vendor *rtap_vendor;
  210. int rtap_len = sizeof(struct wil6210_rtap);
  211. int phy_length = 0; /* phy info header size, bytes */
  212. static char phy_data[128];
  213. struct ieee80211_channel *ch = wdev->preset_chandef.chan;
  214. if (rtap_include_phy_info) {
  215. rtap_len = sizeof(*rtap_vendor) + sizeof(*d);
  216. /* calculate additional length */
  217. if (d->dma.status & RX_DMA_STATUS_PHY_INFO) {
  218. /**
  219. * PHY info starts from 8-byte boundary
  220. * there are 8-byte lines, last line may be partially
  221. * written (HW bug), thus FW configures for last line
  222. * to be excessive. Driver skips this last line.
  223. */
  224. int len = min_t(int, 8 + sizeof(phy_data),
  225. wil_rxdesc_phy_length(d));
  226. if (len > 8) {
  227. void *p = skb_tail_pointer(skb);
  228. void *pa = PTR_ALIGN(p, 8);
  229. if (skb_tailroom(skb) >= len + (pa - p)) {
  230. phy_length = len - 8;
  231. memcpy(phy_data, pa, phy_length);
  232. }
  233. }
  234. }
  235. rtap_len += phy_length;
  236. }
  237. if (skb_headroom(skb) < rtap_len &&
  238. pskb_expand_head(skb, rtap_len, 0, GFP_ATOMIC)) {
  239. wil_err(wil, "Unable to expand headrom to %d\n", rtap_len);
  240. return;
  241. }
  242. rtap_vendor = (void *)skb_push(skb, rtap_len);
  243. memset(rtap_vendor, 0, rtap_len);
  244. rtap_vendor->rtap.rthdr.it_version = PKTHDR_RADIOTAP_VERSION;
  245. rtap_vendor->rtap.rthdr.it_len = cpu_to_le16(rtap_len);
  246. rtap_vendor->rtap.rthdr.it_present = cpu_to_le32(
  247. (1 << IEEE80211_RADIOTAP_FLAGS) |
  248. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  249. (1 << IEEE80211_RADIOTAP_MCS));
  250. if (d->dma.status & RX_DMA_STATUS_ERROR)
  251. rtap_vendor->rtap.flags |= IEEE80211_RADIOTAP_F_BADFCS;
  252. rtap_vendor->rtap.chnl_freq = cpu_to_le16(ch ? ch->center_freq : 58320);
  253. rtap_vendor->rtap.chnl_flags = cpu_to_le16(0);
  254. rtap_vendor->rtap.mcs_present = IEEE80211_RADIOTAP_MCS_HAVE_MCS;
  255. rtap_vendor->rtap.mcs_flags = 0;
  256. rtap_vendor->rtap.mcs_index = wil_rxdesc_mcs(d);
  257. if (rtap_include_phy_info) {
  258. rtap_vendor->rtap.rthdr.it_present |= cpu_to_le32(1 <<
  259. IEEE80211_RADIOTAP_VENDOR_NAMESPACE);
  260. /* OUI for Wilocity 04:ce:14 */
  261. rtap_vendor->vendor_oui[0] = 0x04;
  262. rtap_vendor->vendor_oui[1] = 0xce;
  263. rtap_vendor->vendor_oui[2] = 0x14;
  264. rtap_vendor->vendor_ns = 1;
  265. /* Rx descriptor + PHY data */
  266. rtap_vendor->vendor_skip = cpu_to_le16(sizeof(*d) +
  267. phy_length);
  268. memcpy(rtap_vendor->vendor_data, (void *)d, sizeof(*d));
  269. memcpy(rtap_vendor->vendor_data + sizeof(*d), phy_data,
  270. phy_length);
  271. }
  272. }
  273. /*
  274. * Fast swap in place between 2 registers
  275. */
  276. static void wil_swap_u16(u16 *a, u16 *b)
  277. {
  278. *a ^= *b;
  279. *b ^= *a;
  280. *a ^= *b;
  281. }
  282. static void wil_swap_ethaddr(void *data)
  283. {
  284. struct ethhdr *eth = data;
  285. u16 *s = (u16 *)eth->h_source;
  286. u16 *d = (u16 *)eth->h_dest;
  287. wil_swap_u16(s++, d++);
  288. wil_swap_u16(s++, d++);
  289. wil_swap_u16(s, d);
  290. }
  291. /**
  292. * reap 1 frame from @swhead
  293. *
  294. * Rx descriptor copied to skb->cb
  295. *
  296. * Safe to call from IRQ
  297. */
  298. static struct sk_buff *wil_vring_reap_rx(struct wil6210_priv *wil,
  299. struct vring *vring)
  300. {
  301. struct device *dev = wil_to_dev(wil);
  302. struct net_device *ndev = wil_to_ndev(wil);
  303. volatile struct vring_rx_desc *_d;
  304. struct vring_rx_desc *d;
  305. struct sk_buff *skb;
  306. dma_addr_t pa;
  307. unsigned int sz = RX_BUF_LEN;
  308. u16 dmalen;
  309. u8 ftype;
  310. u8 ds_bits;
  311. BUILD_BUG_ON(sizeof(struct vring_rx_desc) > sizeof(skb->cb));
  312. if (wil_vring_is_empty(vring))
  313. return NULL;
  314. _d = &(vring->va[vring->swhead].rx);
  315. if (!(_d->dma.status & RX_DMA_STATUS_DU)) {
  316. /* it is not error, we just reached end of Rx done area */
  317. return NULL;
  318. }
  319. skb = vring->ctx[vring->swhead].skb;
  320. d = wil_skb_rxdesc(skb);
  321. *d = *_d;
  322. pa = wil_desc_addr(&d->dma.addr);
  323. vring->ctx[vring->swhead].skb = NULL;
  324. wil_vring_advance_head(vring, 1);
  325. dma_unmap_single(dev, pa, sz, DMA_FROM_DEVICE);
  326. dmalen = le16_to_cpu(d->dma.length);
  327. trace_wil6210_rx(vring->swhead, d);
  328. wil_dbg_txrx(wil, "Rx[%3d] : %d bytes\n", vring->swhead, dmalen);
  329. wil_hex_dump_txrx("Rx ", DUMP_PREFIX_NONE, 32, 4,
  330. (const void *)d, sizeof(*d), false);
  331. if (dmalen > sz) {
  332. wil_err(wil, "Rx size too large: %d bytes!\n", dmalen);
  333. kfree_skb(skb);
  334. return NULL;
  335. }
  336. skb_trim(skb, dmalen);
  337. prefetch(skb->data);
  338. wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1,
  339. skb->data, skb_headlen(skb), false);
  340. wil->stats.last_mcs_rx = wil_rxdesc_mcs(d);
  341. /* use radiotap header only if required */
  342. if (ndev->type == ARPHRD_IEEE80211_RADIOTAP)
  343. wil_rx_add_radiotap_header(wil, skb);
  344. /* no extra checks if in sniffer mode */
  345. if (ndev->type != ARPHRD_ETHER)
  346. return skb;
  347. /*
  348. * Non-data frames may be delivered through Rx DMA channel (ex: BAR)
  349. * Driver should recognize it by frame type, that is found
  350. * in Rx descriptor. If type is not data, it is 802.11 frame as is
  351. */
  352. ftype = wil_rxdesc_ftype(d) << 2;
  353. if (ftype != IEEE80211_FTYPE_DATA) {
  354. wil_dbg_txrx(wil, "Non-data frame ftype 0x%08x\n", ftype);
  355. /* TODO: process it */
  356. kfree_skb(skb);
  357. return NULL;
  358. }
  359. if (skb->len < ETH_HLEN) {
  360. wil_err(wil, "Short frame, len = %d\n", skb->len);
  361. /* TODO: process it (i.e. BAR) */
  362. kfree_skb(skb);
  363. return NULL;
  364. }
  365. /* L4 IDENT is on when HW calculated checksum, check status
  366. * and in case of error drop the packet
  367. * higher stack layers will handle retransmission (if required)
  368. */
  369. if (d->dma.status & RX_DMA_STATUS_L4_IDENT) {
  370. /* L4 protocol identified, csum calculated */
  371. if ((d->dma.error & RX_DMA_ERROR_L4_ERR) == 0)
  372. skb->ip_summed = CHECKSUM_UNNECESSARY;
  373. /* If HW reports bad checksum, let IP stack re-check it
  374. * For example, HW don't understand Microsoft IP stack that
  375. * mis-calculates TCP checksum - if it should be 0x0,
  376. * it writes 0xffff in violation of RFC 1624
  377. */
  378. }
  379. ds_bits = wil_rxdesc_ds_bits(d);
  380. if (ds_bits == 1) {
  381. /*
  382. * HW bug - in ToDS mode, i.e. Rx on AP side,
  383. * addresses get swapped
  384. */
  385. wil_swap_ethaddr(skb->data);
  386. }
  387. return skb;
  388. }
  389. /**
  390. * allocate and fill up to @count buffers in rx ring
  391. * buffers posted at @swtail
  392. */
  393. static int wil_rx_refill(struct wil6210_priv *wil, int count)
  394. {
  395. struct net_device *ndev = wil_to_ndev(wil);
  396. struct vring *v = &wil->vring_rx;
  397. u32 next_tail;
  398. int rc = 0;
  399. int headroom = ndev->type == ARPHRD_IEEE80211_RADIOTAP ?
  400. WIL6210_RTAP_SIZE : 0;
  401. for (; next_tail = wil_vring_next_tail(v),
  402. (next_tail != v->swhead) && (count-- > 0);
  403. v->swtail = next_tail) {
  404. rc = wil_vring_alloc_skb(wil, v, v->swtail, headroom);
  405. if (rc) {
  406. wil_err(wil, "Error %d in wil_rx_refill[%d]\n",
  407. rc, v->swtail);
  408. break;
  409. }
  410. }
  411. iowrite32(v->swtail, wil->csr + HOSTADDR(v->hwtail));
  412. return rc;
  413. }
  414. /*
  415. * Pass Rx packet to the netif. Update statistics.
  416. * Called in softirq context (NAPI poll).
  417. */
  418. static void wil_netif_rx_any(struct sk_buff *skb, struct net_device *ndev)
  419. {
  420. int rc;
  421. unsigned int len = skb->len;
  422. skb_orphan(skb);
  423. rc = netif_receive_skb(skb);
  424. if (likely(rc == NET_RX_SUCCESS)) {
  425. ndev->stats.rx_packets++;
  426. ndev->stats.rx_bytes += len;
  427. } else {
  428. ndev->stats.rx_dropped++;
  429. }
  430. }
  431. /**
  432. * Proceed all completed skb's from Rx VRING
  433. *
  434. * Safe to call from NAPI poll, i.e. softirq with interrupts enabled
  435. */
  436. void wil_rx_handle(struct wil6210_priv *wil, int *quota)
  437. {
  438. struct net_device *ndev = wil_to_ndev(wil);
  439. struct vring *v = &wil->vring_rx;
  440. struct sk_buff *skb;
  441. if (!v->va) {
  442. wil_err(wil, "Rx IRQ while Rx not yet initialized\n");
  443. return;
  444. }
  445. wil_dbg_txrx(wil, "%s()\n", __func__);
  446. while ((*quota > 0) && (NULL != (skb = wil_vring_reap_rx(wil, v)))) {
  447. (*quota)--;
  448. if (wil->wdev->iftype == NL80211_IFTYPE_MONITOR) {
  449. skb->dev = ndev;
  450. skb_reset_mac_header(skb);
  451. skb->ip_summed = CHECKSUM_UNNECESSARY;
  452. skb->pkt_type = PACKET_OTHERHOST;
  453. skb->protocol = htons(ETH_P_802_2);
  454. } else {
  455. skb->protocol = eth_type_trans(skb, ndev);
  456. }
  457. wil_netif_rx_any(skb, ndev);
  458. }
  459. wil_rx_refill(wil, v->size);
  460. }
  461. int wil_rx_init(struct wil6210_priv *wil)
  462. {
  463. struct vring *vring = &wil->vring_rx;
  464. int rc;
  465. vring->size = WIL6210_RX_RING_SIZE;
  466. rc = wil_vring_alloc(wil, vring);
  467. if (rc)
  468. return rc;
  469. rc = wmi_rx_chain_add(wil, vring);
  470. if (rc)
  471. goto err_free;
  472. rc = wil_rx_refill(wil, vring->size);
  473. if (rc)
  474. goto err_free;
  475. return 0;
  476. err_free:
  477. wil_vring_free(wil, vring, 0);
  478. return rc;
  479. }
  480. void wil_rx_fini(struct wil6210_priv *wil)
  481. {
  482. struct vring *vring = &wil->vring_rx;
  483. if (vring->va)
  484. wil_vring_free(wil, vring, 0);
  485. }
  486. int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size,
  487. int cid, int tid)
  488. {
  489. int rc;
  490. struct wmi_vring_cfg_cmd cmd = {
  491. .action = cpu_to_le32(WMI_VRING_CMD_ADD),
  492. .vring_cfg = {
  493. .tx_sw_ring = {
  494. .max_mpdu_size = cpu_to_le16(TX_BUF_LEN),
  495. .ring_size = cpu_to_le16(size),
  496. },
  497. .ringid = id,
  498. .cidxtid = (cid & 0xf) | ((tid & 0xf) << 4),
  499. .encap_trans_type = WMI_VRING_ENC_TYPE_802_3,
  500. .mac_ctrl = 0,
  501. .to_resolution = 0,
  502. .agg_max_wsize = 16,
  503. .schd_params = {
  504. .priority = cpu_to_le16(0),
  505. .timeslot_us = cpu_to_le16(0xfff),
  506. },
  507. },
  508. };
  509. struct {
  510. struct wil6210_mbox_hdr_wmi wmi;
  511. struct wmi_vring_cfg_done_event cmd;
  512. } __packed reply;
  513. struct vring *vring = &wil->vring_tx[id];
  514. if (vring->va) {
  515. wil_err(wil, "Tx ring [%d] already allocated\n", id);
  516. rc = -EINVAL;
  517. goto out;
  518. }
  519. vring->size = size;
  520. rc = wil_vring_alloc(wil, vring);
  521. if (rc)
  522. goto out;
  523. cmd.vring_cfg.tx_sw_ring.ring_mem_base = cpu_to_le64(vring->pa);
  524. rc = wmi_call(wil, WMI_VRING_CFG_CMDID, &cmd, sizeof(cmd),
  525. WMI_VRING_CFG_DONE_EVENTID, &reply, sizeof(reply), 100);
  526. if (rc)
  527. goto out_free;
  528. if (reply.cmd.status != WMI_FW_STATUS_SUCCESS) {
  529. wil_err(wil, "Tx config failed, status 0x%02x\n",
  530. reply.cmd.status);
  531. rc = -EINVAL;
  532. goto out_free;
  533. }
  534. vring->hwtail = le32_to_cpu(reply.cmd.tx_vring_tail_ptr);
  535. return 0;
  536. out_free:
  537. wil_vring_free(wil, vring, 1);
  538. out:
  539. return rc;
  540. }
  541. void wil_vring_fini_tx(struct wil6210_priv *wil, int id)
  542. {
  543. struct vring *vring = &wil->vring_tx[id];
  544. if (!vring->va)
  545. return;
  546. wil_vring_free(wil, vring, 1);
  547. }
  548. static struct vring *wil_find_tx_vring(struct wil6210_priv *wil,
  549. struct sk_buff *skb)
  550. {
  551. struct vring *v = &wil->vring_tx[0];
  552. if (v->va)
  553. return v;
  554. return NULL;
  555. }
  556. static int wil_tx_desc_map(struct vring_tx_desc *d, dma_addr_t pa, u32 len,
  557. int vring_index)
  558. {
  559. wil_desc_addr_set(&d->dma.addr, pa);
  560. d->dma.ip_length = 0;
  561. /* 0..6: mac_length; 7:ip_version 0-IP6 1-IP4*/
  562. d->dma.b11 = 0/*14 | BIT(7)*/;
  563. d->dma.error = 0;
  564. d->dma.status = 0; /* BIT(0) should be 0 for HW_OWNED */
  565. d->dma.length = cpu_to_le16((u16)len);
  566. d->dma.d0 = (vring_index << DMA_CFG_DESC_TX_0_QID_POS);
  567. d->mac.d[0] = 0;
  568. d->mac.d[1] = 0;
  569. d->mac.d[2] = 0;
  570. d->mac.ucode_cmd = 0;
  571. /* use dst index 0 */
  572. d->mac.d[1] |= BIT(MAC_CFG_DESC_TX_1_DST_INDEX_EN_POS) |
  573. (0 << MAC_CFG_DESC_TX_1_DST_INDEX_POS);
  574. /* translation type: 0 - bypass; 1 - 802.3; 2 - native wifi */
  575. d->mac.d[2] = BIT(MAC_CFG_DESC_TX_2_SNAP_HDR_INSERTION_EN_POS) |
  576. (1 << MAC_CFG_DESC_TX_2_L2_TRANSLATION_TYPE_POS);
  577. return 0;
  578. }
  579. static int wil_tx_desc_offload_cksum_set(struct wil6210_priv *wil,
  580. struct vring_tx_desc *d,
  581. struct sk_buff *skb)
  582. {
  583. int protocol;
  584. if (skb->ip_summed != CHECKSUM_PARTIAL)
  585. return 0;
  586. d->dma.b11 = ETH_HLEN; /* MAC header length */
  587. switch (skb->protocol) {
  588. case cpu_to_be16(ETH_P_IP):
  589. protocol = ip_hdr(skb)->protocol;
  590. d->dma.b11 |= BIT(DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS);
  591. break;
  592. case cpu_to_be16(ETH_P_IPV6):
  593. protocol = ipv6_hdr(skb)->nexthdr;
  594. break;
  595. default:
  596. return -EINVAL;
  597. }
  598. switch (protocol) {
  599. case IPPROTO_TCP:
  600. d->dma.d0 |= (2 << DMA_CFG_DESC_TX_0_L4_TYPE_POS);
  601. /* L4 header len: TCP header length */
  602. d->dma.d0 |=
  603. (tcp_hdrlen(skb) & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK);
  604. break;
  605. case IPPROTO_UDP:
  606. /* L4 header len: UDP header length */
  607. d->dma.d0 |=
  608. (sizeof(struct udphdr) & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK);
  609. break;
  610. default:
  611. return -EINVAL;
  612. }
  613. d->dma.ip_length = skb_network_header_len(skb);
  614. /* Enable TCP/UDP checksum */
  615. d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS);
  616. /* Calculate pseudo-header */
  617. d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS);
  618. return 0;
  619. }
  620. static int wil_tx_vring(struct wil6210_priv *wil, struct vring *vring,
  621. struct sk_buff *skb)
  622. {
  623. struct device *dev = wil_to_dev(wil);
  624. struct vring_tx_desc dd, *d = &dd;
  625. volatile struct vring_tx_desc *_d;
  626. u32 swhead = vring->swhead;
  627. int avail = wil_vring_avail_tx(vring);
  628. int nr_frags = skb_shinfo(skb)->nr_frags;
  629. uint f = 0;
  630. int vring_index = vring - wil->vring_tx;
  631. uint i = swhead;
  632. dma_addr_t pa;
  633. wil_dbg_txrx(wil, "%s()\n", __func__);
  634. if (avail < vring->size/8)
  635. netif_tx_stop_all_queues(wil_to_ndev(wil));
  636. if (avail < 1 + nr_frags) {
  637. wil_err(wil, "Tx ring full. No space for %d fragments\n",
  638. 1 + nr_frags);
  639. return -ENOMEM;
  640. }
  641. _d = &(vring->va[i].tx);
  642. /* FIXME FW can accept only unicast frames for the peer */
  643. memcpy(skb->data, wil->dst_addr[vring_index], ETH_ALEN);
  644. pa = dma_map_single(dev, skb->data,
  645. skb_headlen(skb), DMA_TO_DEVICE);
  646. wil_dbg_txrx(wil, "Tx skb %d bytes %p -> %#08llx\n", skb_headlen(skb),
  647. skb->data, (unsigned long long)pa);
  648. wil_hex_dump_txrx("Tx ", DUMP_PREFIX_OFFSET, 16, 1,
  649. skb->data, skb_headlen(skb), false);
  650. if (unlikely(dma_mapping_error(dev, pa)))
  651. return -EINVAL;
  652. /* 1-st segment */
  653. wil_tx_desc_map(d, pa, skb_headlen(skb), vring_index);
  654. /* Process TCP/UDP checksum offloading */
  655. if (wil_tx_desc_offload_cksum_set(wil, d, skb)) {
  656. wil_err(wil, "VRING #%d Failed to set cksum, drop packet\n",
  657. vring_index);
  658. goto dma_error;
  659. }
  660. d->mac.d[2] |= ((nr_frags + 1) <<
  661. MAC_CFG_DESC_TX_2_NUM_OF_DESCRIPTORS_POS);
  662. if (nr_frags)
  663. *_d = *d;
  664. /* middle segments */
  665. for (; f < nr_frags; f++) {
  666. const struct skb_frag_struct *frag =
  667. &skb_shinfo(skb)->frags[f];
  668. int len = skb_frag_size(frag);
  669. i = (swhead + f + 1) % vring->size;
  670. _d = &(vring->va[i].tx);
  671. pa = skb_frag_dma_map(dev, frag, 0, skb_frag_size(frag),
  672. DMA_TO_DEVICE);
  673. if (unlikely(dma_mapping_error(dev, pa)))
  674. goto dma_error;
  675. wil_tx_desc_map(d, pa, len, vring_index);
  676. vring->ctx[i].mapped_as_page = 1;
  677. *_d = *d;
  678. }
  679. /* for the last seg only */
  680. d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_EOP_POS);
  681. d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_MARK_WB_POS);
  682. d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS);
  683. *_d = *d;
  684. /* hold reference to skb
  685. * to prevent skb release before accounting
  686. * in case of immediate "tx done"
  687. */
  688. vring->ctx[i].skb = skb_get(skb);
  689. wil_hex_dump_txrx("Tx ", DUMP_PREFIX_NONE, 32, 4,
  690. (const void *)d, sizeof(*d), false);
  691. /* advance swhead */
  692. wil_vring_advance_head(vring, nr_frags + 1);
  693. wil_dbg_txrx(wil, "Tx swhead %d -> %d\n", swhead, vring->swhead);
  694. trace_wil6210_tx(vring_index, swhead, skb->len, nr_frags);
  695. iowrite32(vring->swhead, wil->csr + HOSTADDR(vring->hwtail));
  696. return 0;
  697. dma_error:
  698. /* unmap what we have mapped */
  699. nr_frags = f + 1; /* frags mapped + one for skb head */
  700. for (f = 0; f < nr_frags; f++) {
  701. u16 dmalen;
  702. struct wil_ctx *ctx;
  703. i = (swhead + f) % vring->size;
  704. ctx = &vring->ctx[i];
  705. _d = &(vring->va[i].tx);
  706. *d = *_d;
  707. _d->dma.status = TX_DMA_STATUS_DU;
  708. pa = wil_desc_addr(&d->dma.addr);
  709. dmalen = le16_to_cpu(d->dma.length);
  710. if (ctx->mapped_as_page)
  711. dma_unmap_page(dev, pa, dmalen, DMA_TO_DEVICE);
  712. else
  713. dma_unmap_single(dev, pa, dmalen, DMA_TO_DEVICE);
  714. if (ctx->skb)
  715. dev_kfree_skb_any(ctx->skb);
  716. memset(ctx, 0, sizeof(*ctx));
  717. }
  718. return -EINVAL;
  719. }
  720. netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev)
  721. {
  722. struct wil6210_priv *wil = ndev_to_wil(ndev);
  723. struct vring *vring;
  724. int rc;
  725. wil_dbg_txrx(wil, "%s()\n", __func__);
  726. if (!test_bit(wil_status_fwready, &wil->status)) {
  727. wil_err(wil, "FW not ready\n");
  728. goto drop;
  729. }
  730. if (!test_bit(wil_status_fwconnected, &wil->status)) {
  731. wil_err(wil, "FW not connected\n");
  732. goto drop;
  733. }
  734. if (wil->wdev->iftype == NL80211_IFTYPE_MONITOR) {
  735. wil_err(wil, "Xmit in monitor mode not supported\n");
  736. goto drop;
  737. }
  738. /* find vring */
  739. vring = wil_find_tx_vring(wil, skb);
  740. if (!vring) {
  741. wil_err(wil, "No Tx VRING available\n");
  742. goto drop;
  743. }
  744. /* set up vring entry */
  745. rc = wil_tx_vring(wil, vring, skb);
  746. switch (rc) {
  747. case 0:
  748. /* statistics will be updated on the tx_complete */
  749. dev_kfree_skb_any(skb);
  750. return NETDEV_TX_OK;
  751. case -ENOMEM:
  752. return NETDEV_TX_BUSY;
  753. default:
  754. break; /* goto drop; */
  755. }
  756. drop:
  757. ndev->stats.tx_dropped++;
  758. dev_kfree_skb_any(skb);
  759. return NET_XMIT_DROP;
  760. }
  761. /**
  762. * Clean up transmitted skb's from the Tx VRING
  763. *
  764. * Return number of descriptors cleared
  765. *
  766. * Safe to call from IRQ
  767. */
  768. int wil_tx_complete(struct wil6210_priv *wil, int ringid)
  769. {
  770. struct net_device *ndev = wil_to_ndev(wil);
  771. struct device *dev = wil_to_dev(wil);
  772. struct vring *vring = &wil->vring_tx[ringid];
  773. int done = 0;
  774. if (!vring->va) {
  775. wil_err(wil, "Tx irq[%d]: vring not initialized\n", ringid);
  776. return 0;
  777. }
  778. wil_dbg_txrx(wil, "%s(%d)\n", __func__, ringid);
  779. while (!wil_vring_is_empty(vring)) {
  780. volatile struct vring_tx_desc *_d =
  781. &vring->va[vring->swtail].tx;
  782. struct vring_tx_desc dd, *d = &dd;
  783. dma_addr_t pa;
  784. u16 dmalen;
  785. struct wil_ctx *ctx = &vring->ctx[vring->swtail];
  786. struct sk_buff *skb = ctx->skb;
  787. *d = *_d;
  788. if (!(d->dma.status & TX_DMA_STATUS_DU))
  789. break;
  790. dmalen = le16_to_cpu(d->dma.length);
  791. trace_wil6210_tx_done(ringid, vring->swtail, dmalen,
  792. d->dma.error);
  793. wil_dbg_txrx(wil,
  794. "Tx[%3d] : %d bytes, status 0x%02x err 0x%02x\n",
  795. vring->swtail, dmalen, d->dma.status,
  796. d->dma.error);
  797. wil_hex_dump_txrx("TxC ", DUMP_PREFIX_NONE, 32, 4,
  798. (const void *)d, sizeof(*d), false);
  799. pa = wil_desc_addr(&d->dma.addr);
  800. if (ctx->mapped_as_page)
  801. dma_unmap_page(dev, pa, dmalen, DMA_TO_DEVICE);
  802. else
  803. dma_unmap_single(dev, pa, dmalen, DMA_TO_DEVICE);
  804. if (skb) {
  805. if (d->dma.error == 0) {
  806. ndev->stats.tx_packets++;
  807. ndev->stats.tx_bytes += skb->len;
  808. } else {
  809. ndev->stats.tx_errors++;
  810. }
  811. dev_kfree_skb_any(skb);
  812. }
  813. memset(ctx, 0, sizeof(*ctx));
  814. /*
  815. * There is no need to touch HW descriptor:
  816. * - ststus bit TX_DMA_STATUS_DU is set by design,
  817. * so hardware will not try to process this desc.,
  818. * - rest of descriptor will be initialized on Tx.
  819. */
  820. vring->swtail = wil_vring_next_tail(vring);
  821. done++;
  822. }
  823. if (wil_vring_avail_tx(vring) > vring->size/4)
  824. netif_tx_wake_all_queues(wil_to_ndev(wil));
  825. return done;
  826. }