en_netdev.c 67 KB

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  1. /*
  2. * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/etherdevice.h>
  34. #include <linux/tcp.h>
  35. #include <linux/if_vlan.h>
  36. #include <linux/delay.h>
  37. #include <linux/slab.h>
  38. #include <linux/hash.h>
  39. #include <net/ip.h>
  40. #include <net/busy_poll.h>
  41. #include <linux/mlx4/driver.h>
  42. #include <linux/mlx4/device.h>
  43. #include <linux/mlx4/cmd.h>
  44. #include <linux/mlx4/cq.h>
  45. #include "mlx4_en.h"
  46. #include "en_port.h"
  47. int mlx4_en_setup_tc(struct net_device *dev, u8 up)
  48. {
  49. struct mlx4_en_priv *priv = netdev_priv(dev);
  50. int i;
  51. unsigned int offset = 0;
  52. if (up && up != MLX4_EN_NUM_UP)
  53. return -EINVAL;
  54. netdev_set_num_tc(dev, up);
  55. /* Partition Tx queues evenly amongst UP's */
  56. for (i = 0; i < up; i++) {
  57. netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
  58. offset += priv->num_tx_rings_p_up;
  59. }
  60. return 0;
  61. }
  62. #ifdef CONFIG_NET_RX_BUSY_POLL
  63. /* must be called with local_bh_disable()d */
  64. static int mlx4_en_low_latency_recv(struct napi_struct *napi)
  65. {
  66. struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi);
  67. struct net_device *dev = cq->dev;
  68. struct mlx4_en_priv *priv = netdev_priv(dev);
  69. struct mlx4_en_rx_ring *rx_ring = priv->rx_ring[cq->ring];
  70. int done;
  71. if (!priv->port_up)
  72. return LL_FLUSH_FAILED;
  73. if (!mlx4_en_cq_lock_poll(cq))
  74. return LL_FLUSH_BUSY;
  75. done = mlx4_en_process_rx_cq(dev, cq, 4);
  76. if (likely(done))
  77. rx_ring->cleaned += done;
  78. else
  79. rx_ring->misses++;
  80. mlx4_en_cq_unlock_poll(cq);
  81. return done;
  82. }
  83. #endif /* CONFIG_NET_RX_BUSY_POLL */
  84. #ifdef CONFIG_RFS_ACCEL
  85. struct mlx4_en_filter {
  86. struct list_head next;
  87. struct work_struct work;
  88. u8 ip_proto;
  89. __be32 src_ip;
  90. __be32 dst_ip;
  91. __be16 src_port;
  92. __be16 dst_port;
  93. int rxq_index;
  94. struct mlx4_en_priv *priv;
  95. u32 flow_id; /* RFS infrastructure id */
  96. int id; /* mlx4_en driver id */
  97. u64 reg_id; /* Flow steering API id */
  98. u8 activated; /* Used to prevent expiry before filter
  99. * is attached
  100. */
  101. struct hlist_node filter_chain;
  102. };
  103. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
  104. static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)
  105. {
  106. switch (ip_proto) {
  107. case IPPROTO_UDP:
  108. return MLX4_NET_TRANS_RULE_ID_UDP;
  109. case IPPROTO_TCP:
  110. return MLX4_NET_TRANS_RULE_ID_TCP;
  111. default:
  112. return -EPROTONOSUPPORT;
  113. }
  114. };
  115. static void mlx4_en_filter_work(struct work_struct *work)
  116. {
  117. struct mlx4_en_filter *filter = container_of(work,
  118. struct mlx4_en_filter,
  119. work);
  120. struct mlx4_en_priv *priv = filter->priv;
  121. struct mlx4_spec_list spec_tcp_udp = {
  122. .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto),
  123. {
  124. .tcp_udp = {
  125. .dst_port = filter->dst_port,
  126. .dst_port_msk = (__force __be16)-1,
  127. .src_port = filter->src_port,
  128. .src_port_msk = (__force __be16)-1,
  129. },
  130. },
  131. };
  132. struct mlx4_spec_list spec_ip = {
  133. .id = MLX4_NET_TRANS_RULE_ID_IPV4,
  134. {
  135. .ipv4 = {
  136. .dst_ip = filter->dst_ip,
  137. .dst_ip_msk = (__force __be32)-1,
  138. .src_ip = filter->src_ip,
  139. .src_ip_msk = (__force __be32)-1,
  140. },
  141. },
  142. };
  143. struct mlx4_spec_list spec_eth = {
  144. .id = MLX4_NET_TRANS_RULE_ID_ETH,
  145. };
  146. struct mlx4_net_trans_rule rule = {
  147. .list = LIST_HEAD_INIT(rule.list),
  148. .queue_mode = MLX4_NET_TRANS_Q_LIFO,
  149. .exclusive = 1,
  150. .allow_loopback = 1,
  151. .promisc_mode = MLX4_FS_REGULAR,
  152. .port = priv->port,
  153. .priority = MLX4_DOMAIN_RFS,
  154. };
  155. int rc;
  156. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  157. if (spec_tcp_udp.id < 0) {
  158. en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n",
  159. filter->ip_proto);
  160. goto ignore;
  161. }
  162. list_add_tail(&spec_eth.list, &rule.list);
  163. list_add_tail(&spec_ip.list, &rule.list);
  164. list_add_tail(&spec_tcp_udp.list, &rule.list);
  165. rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
  166. memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
  167. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  168. filter->activated = 0;
  169. if (filter->reg_id) {
  170. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  171. if (rc && rc != -ENOENT)
  172. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  173. }
  174. rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
  175. if (rc)
  176. en_err(priv, "Error attaching flow. err = %d\n", rc);
  177. ignore:
  178. mlx4_en_filter_rfs_expire(priv);
  179. filter->activated = 1;
  180. }
  181. static inline struct hlist_head *
  182. filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  183. __be16 src_port, __be16 dst_port)
  184. {
  185. unsigned long l;
  186. int bucket_idx;
  187. l = (__force unsigned long)src_port |
  188. ((__force unsigned long)dst_port << 2);
  189. l ^= (__force unsigned long)(src_ip ^ dst_ip);
  190. bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
  191. return &priv->filter_hash[bucket_idx];
  192. }
  193. static struct mlx4_en_filter *
  194. mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
  195. __be32 dst_ip, u8 ip_proto, __be16 src_port,
  196. __be16 dst_port, u32 flow_id)
  197. {
  198. struct mlx4_en_filter *filter = NULL;
  199. filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
  200. if (!filter)
  201. return NULL;
  202. filter->priv = priv;
  203. filter->rxq_index = rxq_index;
  204. INIT_WORK(&filter->work, mlx4_en_filter_work);
  205. filter->src_ip = src_ip;
  206. filter->dst_ip = dst_ip;
  207. filter->ip_proto = ip_proto;
  208. filter->src_port = src_port;
  209. filter->dst_port = dst_port;
  210. filter->flow_id = flow_id;
  211. filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
  212. list_add_tail(&filter->next, &priv->filters);
  213. hlist_add_head(&filter->filter_chain,
  214. filter_hash_bucket(priv, src_ip, dst_ip, src_port,
  215. dst_port));
  216. return filter;
  217. }
  218. static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
  219. {
  220. struct mlx4_en_priv *priv = filter->priv;
  221. int rc;
  222. list_del(&filter->next);
  223. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  224. if (rc && rc != -ENOENT)
  225. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  226. kfree(filter);
  227. }
  228. static inline struct mlx4_en_filter *
  229. mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  230. u8 ip_proto, __be16 src_port, __be16 dst_port)
  231. {
  232. struct mlx4_en_filter *filter;
  233. struct mlx4_en_filter *ret = NULL;
  234. hlist_for_each_entry(filter,
  235. filter_hash_bucket(priv, src_ip, dst_ip,
  236. src_port, dst_port),
  237. filter_chain) {
  238. if (filter->src_ip == src_ip &&
  239. filter->dst_ip == dst_ip &&
  240. filter->ip_proto == ip_proto &&
  241. filter->src_port == src_port &&
  242. filter->dst_port == dst_port) {
  243. ret = filter;
  244. break;
  245. }
  246. }
  247. return ret;
  248. }
  249. static int
  250. mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
  251. u16 rxq_index, u32 flow_id)
  252. {
  253. struct mlx4_en_priv *priv = netdev_priv(net_dev);
  254. struct mlx4_en_filter *filter;
  255. const struct iphdr *ip;
  256. const __be16 *ports;
  257. u8 ip_proto;
  258. __be32 src_ip;
  259. __be32 dst_ip;
  260. __be16 src_port;
  261. __be16 dst_port;
  262. int nhoff = skb_network_offset(skb);
  263. int ret = 0;
  264. if (skb->protocol != htons(ETH_P_IP))
  265. return -EPROTONOSUPPORT;
  266. ip = (const struct iphdr *)(skb->data + nhoff);
  267. if (ip_is_fragment(ip))
  268. return -EPROTONOSUPPORT;
  269. if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP))
  270. return -EPROTONOSUPPORT;
  271. ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
  272. ip_proto = ip->protocol;
  273. src_ip = ip->saddr;
  274. dst_ip = ip->daddr;
  275. src_port = ports[0];
  276. dst_port = ports[1];
  277. spin_lock_bh(&priv->filters_lock);
  278. filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto,
  279. src_port, dst_port);
  280. if (filter) {
  281. if (filter->rxq_index == rxq_index)
  282. goto out;
  283. filter->rxq_index = rxq_index;
  284. } else {
  285. filter = mlx4_en_filter_alloc(priv, rxq_index,
  286. src_ip, dst_ip, ip_proto,
  287. src_port, dst_port, flow_id);
  288. if (!filter) {
  289. ret = -ENOMEM;
  290. goto err;
  291. }
  292. }
  293. queue_work(priv->mdev->workqueue, &filter->work);
  294. out:
  295. ret = filter->id;
  296. err:
  297. spin_unlock_bh(&priv->filters_lock);
  298. return ret;
  299. }
  300. void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv)
  301. {
  302. struct mlx4_en_filter *filter, *tmp;
  303. LIST_HEAD(del_list);
  304. spin_lock_bh(&priv->filters_lock);
  305. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  306. list_move(&filter->next, &del_list);
  307. hlist_del(&filter->filter_chain);
  308. }
  309. spin_unlock_bh(&priv->filters_lock);
  310. list_for_each_entry_safe(filter, tmp, &del_list, next) {
  311. cancel_work_sync(&filter->work);
  312. mlx4_en_filter_free(filter);
  313. }
  314. }
  315. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
  316. {
  317. struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
  318. LIST_HEAD(del_list);
  319. int i = 0;
  320. spin_lock_bh(&priv->filters_lock);
  321. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  322. if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
  323. break;
  324. if (filter->activated &&
  325. !work_pending(&filter->work) &&
  326. rps_may_expire_flow(priv->dev,
  327. filter->rxq_index, filter->flow_id,
  328. filter->id)) {
  329. list_move(&filter->next, &del_list);
  330. hlist_del(&filter->filter_chain);
  331. } else
  332. last_filter = filter;
  333. i++;
  334. }
  335. if (last_filter && (&last_filter->next != priv->filters.next))
  336. list_move(&priv->filters, &last_filter->next);
  337. spin_unlock_bh(&priv->filters_lock);
  338. list_for_each_entry_safe(filter, tmp, &del_list, next)
  339. mlx4_en_filter_free(filter);
  340. }
  341. #endif
  342. static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,
  343. __be16 proto, u16 vid)
  344. {
  345. struct mlx4_en_priv *priv = netdev_priv(dev);
  346. struct mlx4_en_dev *mdev = priv->mdev;
  347. int err;
  348. int idx;
  349. en_dbg(HW, priv, "adding VLAN:%d\n", vid);
  350. set_bit(vid, priv->active_vlans);
  351. /* Add VID to port VLAN filter */
  352. mutex_lock(&mdev->state_lock);
  353. if (mdev->device_up && priv->port_up) {
  354. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  355. if (err)
  356. en_err(priv, "Failed configuring VLAN filter\n");
  357. }
  358. if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx))
  359. en_dbg(HW, priv, "failed adding vlan %d\n", vid);
  360. mutex_unlock(&mdev->state_lock);
  361. return 0;
  362. }
  363. static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,
  364. __be16 proto, u16 vid)
  365. {
  366. struct mlx4_en_priv *priv = netdev_priv(dev);
  367. struct mlx4_en_dev *mdev = priv->mdev;
  368. int err;
  369. en_dbg(HW, priv, "Killing VID:%d\n", vid);
  370. clear_bit(vid, priv->active_vlans);
  371. /* Remove VID from port VLAN filter */
  372. mutex_lock(&mdev->state_lock);
  373. mlx4_unregister_vlan(mdev->dev, priv->port, vid);
  374. if (mdev->device_up && priv->port_up) {
  375. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  376. if (err)
  377. en_err(priv, "Failed configuring VLAN filter\n");
  378. }
  379. mutex_unlock(&mdev->state_lock);
  380. return 0;
  381. }
  382. static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
  383. {
  384. int i;
  385. for (i = ETH_ALEN - 1; i >= 0; --i) {
  386. dst_mac[i] = src_mac & 0xff;
  387. src_mac >>= 8;
  388. }
  389. memset(&dst_mac[ETH_ALEN], 0, 2);
  390. }
  391. static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr,
  392. int qpn, u64 *reg_id)
  393. {
  394. int err;
  395. struct mlx4_spec_list spec_eth_outer = { {NULL} };
  396. struct mlx4_spec_list spec_vxlan = { {NULL} };
  397. struct mlx4_spec_list spec_eth_inner = { {NULL} };
  398. struct mlx4_net_trans_rule rule = {
  399. .queue_mode = MLX4_NET_TRANS_Q_FIFO,
  400. .exclusive = 0,
  401. .allow_loopback = 1,
  402. .promisc_mode = MLX4_FS_REGULAR,
  403. .priority = MLX4_DOMAIN_NIC,
  404. };
  405. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  406. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  407. return 0; /* do nothing */
  408. rule.port = priv->port;
  409. rule.qpn = qpn;
  410. INIT_LIST_HEAD(&rule.list);
  411. spec_eth_outer.id = MLX4_NET_TRANS_RULE_ID_ETH;
  412. memcpy(spec_eth_outer.eth.dst_mac, addr, ETH_ALEN);
  413. memcpy(spec_eth_outer.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  414. spec_vxlan.id = MLX4_NET_TRANS_RULE_ID_VXLAN; /* any vxlan header */
  415. spec_eth_inner.id = MLX4_NET_TRANS_RULE_ID_ETH; /* any inner eth header */
  416. list_add_tail(&spec_eth_outer.list, &rule.list);
  417. list_add_tail(&spec_vxlan.list, &rule.list);
  418. list_add_tail(&spec_eth_inner.list, &rule.list);
  419. err = mlx4_flow_attach(priv->mdev->dev, &rule, reg_id);
  420. if (err) {
  421. en_err(priv, "failed to add vxlan steering rule, err %d\n", err);
  422. return err;
  423. }
  424. en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id);
  425. return 0;
  426. }
  427. static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
  428. unsigned char *mac, int *qpn, u64 *reg_id)
  429. {
  430. struct mlx4_en_dev *mdev = priv->mdev;
  431. struct mlx4_dev *dev = mdev->dev;
  432. int err;
  433. switch (dev->caps.steering_mode) {
  434. case MLX4_STEERING_MODE_B0: {
  435. struct mlx4_qp qp;
  436. u8 gid[16] = {0};
  437. qp.qpn = *qpn;
  438. memcpy(&gid[10], mac, ETH_ALEN);
  439. gid[5] = priv->port;
  440. err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
  441. break;
  442. }
  443. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  444. struct mlx4_spec_list spec_eth = { {NULL} };
  445. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  446. struct mlx4_net_trans_rule rule = {
  447. .queue_mode = MLX4_NET_TRANS_Q_FIFO,
  448. .exclusive = 0,
  449. .allow_loopback = 1,
  450. .promisc_mode = MLX4_FS_REGULAR,
  451. .priority = MLX4_DOMAIN_NIC,
  452. };
  453. rule.port = priv->port;
  454. rule.qpn = *qpn;
  455. INIT_LIST_HEAD(&rule.list);
  456. spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
  457. memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
  458. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  459. list_add_tail(&spec_eth.list, &rule.list);
  460. err = mlx4_flow_attach(dev, &rule, reg_id);
  461. break;
  462. }
  463. default:
  464. return -EINVAL;
  465. }
  466. if (err)
  467. en_warn(priv, "Failed Attaching Unicast\n");
  468. return err;
  469. }
  470. static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
  471. unsigned char *mac, int qpn, u64 reg_id)
  472. {
  473. struct mlx4_en_dev *mdev = priv->mdev;
  474. struct mlx4_dev *dev = mdev->dev;
  475. switch (dev->caps.steering_mode) {
  476. case MLX4_STEERING_MODE_B0: {
  477. struct mlx4_qp qp;
  478. u8 gid[16] = {0};
  479. qp.qpn = qpn;
  480. memcpy(&gid[10], mac, ETH_ALEN);
  481. gid[5] = priv->port;
  482. mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
  483. break;
  484. }
  485. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  486. mlx4_flow_detach(dev, reg_id);
  487. break;
  488. }
  489. default:
  490. en_err(priv, "Invalid steering mode.\n");
  491. }
  492. }
  493. static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
  494. {
  495. struct mlx4_en_dev *mdev = priv->mdev;
  496. struct mlx4_dev *dev = mdev->dev;
  497. struct mlx4_mac_entry *entry;
  498. int index = 0;
  499. int err = 0;
  500. u64 reg_id;
  501. int *qpn = &priv->base_qpn;
  502. u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
  503. en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
  504. priv->dev->dev_addr);
  505. index = mlx4_register_mac(dev, priv->port, mac);
  506. if (index < 0) {
  507. err = index;
  508. en_err(priv, "Failed adding MAC: %pM\n",
  509. priv->dev->dev_addr);
  510. return err;
  511. }
  512. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  513. int base_qpn = mlx4_get_base_qpn(dev, priv->port);
  514. *qpn = base_qpn + index;
  515. return 0;
  516. }
  517. err = mlx4_qp_reserve_range(dev, 1, 1, qpn);
  518. en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
  519. if (err) {
  520. en_err(priv, "Failed to reserve qp for mac registration\n");
  521. goto qp_err;
  522. }
  523. err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, &reg_id);
  524. if (err)
  525. goto steer_err;
  526. err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn,
  527. &priv->tunnel_reg_id);
  528. if (err)
  529. goto tunnel_err;
  530. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  531. if (!entry) {
  532. err = -ENOMEM;
  533. goto alloc_err;
  534. }
  535. memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
  536. entry->reg_id = reg_id;
  537. hlist_add_head_rcu(&entry->hlist,
  538. &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
  539. return 0;
  540. alloc_err:
  541. if (priv->tunnel_reg_id)
  542. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  543. tunnel_err:
  544. mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
  545. steer_err:
  546. mlx4_qp_release_range(dev, *qpn, 1);
  547. qp_err:
  548. mlx4_unregister_mac(dev, priv->port, mac);
  549. return err;
  550. }
  551. static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
  552. {
  553. struct mlx4_en_dev *mdev = priv->mdev;
  554. struct mlx4_dev *dev = mdev->dev;
  555. int qpn = priv->base_qpn;
  556. u64 mac;
  557. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  558. mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
  559. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  560. priv->dev->dev_addr);
  561. mlx4_unregister_mac(dev, priv->port, mac);
  562. } else {
  563. struct mlx4_mac_entry *entry;
  564. struct hlist_node *tmp;
  565. struct hlist_head *bucket;
  566. unsigned int i;
  567. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  568. bucket = &priv->mac_hash[i];
  569. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  570. mac = mlx4_en_mac_to_u64(entry->mac);
  571. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  572. entry->mac);
  573. mlx4_en_uc_steer_release(priv, entry->mac,
  574. qpn, entry->reg_id);
  575. mlx4_unregister_mac(dev, priv->port, mac);
  576. hlist_del_rcu(&entry->hlist);
  577. kfree_rcu(entry, rcu);
  578. }
  579. }
  580. if (priv->tunnel_reg_id) {
  581. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  582. priv->tunnel_reg_id = 0;
  583. }
  584. en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
  585. priv->port, qpn);
  586. mlx4_qp_release_range(dev, qpn, 1);
  587. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  588. }
  589. }
  590. static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
  591. unsigned char *new_mac, unsigned char *prev_mac)
  592. {
  593. struct mlx4_en_dev *mdev = priv->mdev;
  594. struct mlx4_dev *dev = mdev->dev;
  595. int err = 0;
  596. u64 new_mac_u64 = mlx4_en_mac_to_u64(new_mac);
  597. if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
  598. struct hlist_head *bucket;
  599. unsigned int mac_hash;
  600. struct mlx4_mac_entry *entry;
  601. struct hlist_node *tmp;
  602. u64 prev_mac_u64 = mlx4_en_mac_to_u64(prev_mac);
  603. bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
  604. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  605. if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
  606. mlx4_en_uc_steer_release(priv, entry->mac,
  607. qpn, entry->reg_id);
  608. mlx4_unregister_mac(dev, priv->port,
  609. prev_mac_u64);
  610. hlist_del_rcu(&entry->hlist);
  611. synchronize_rcu();
  612. memcpy(entry->mac, new_mac, ETH_ALEN);
  613. entry->reg_id = 0;
  614. mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
  615. hlist_add_head_rcu(&entry->hlist,
  616. &priv->mac_hash[mac_hash]);
  617. mlx4_register_mac(dev, priv->port, new_mac_u64);
  618. err = mlx4_en_uc_steer_add(priv, new_mac,
  619. &qpn,
  620. &entry->reg_id);
  621. if (err)
  622. return err;
  623. if (priv->tunnel_reg_id) {
  624. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  625. priv->tunnel_reg_id = 0;
  626. }
  627. err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn,
  628. &priv->tunnel_reg_id);
  629. return err;
  630. }
  631. }
  632. return -EINVAL;
  633. }
  634. return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
  635. }
  636. u64 mlx4_en_mac_to_u64(u8 *addr)
  637. {
  638. u64 mac = 0;
  639. int i;
  640. for (i = 0; i < ETH_ALEN; i++) {
  641. mac <<= 8;
  642. mac |= addr[i];
  643. }
  644. return mac;
  645. }
  646. static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv)
  647. {
  648. int err = 0;
  649. if (priv->port_up) {
  650. /* Remove old MAC and insert the new one */
  651. err = mlx4_en_replace_mac(priv, priv->base_qpn,
  652. priv->dev->dev_addr, priv->prev_mac);
  653. if (err)
  654. en_err(priv, "Failed changing HW MAC address\n");
  655. memcpy(priv->prev_mac, priv->dev->dev_addr,
  656. sizeof(priv->prev_mac));
  657. } else
  658. en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
  659. return err;
  660. }
  661. static int mlx4_en_set_mac(struct net_device *dev, void *addr)
  662. {
  663. struct mlx4_en_priv *priv = netdev_priv(dev);
  664. struct mlx4_en_dev *mdev = priv->mdev;
  665. struct sockaddr *saddr = addr;
  666. int err;
  667. if (!is_valid_ether_addr(saddr->sa_data))
  668. return -EADDRNOTAVAIL;
  669. memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
  670. mutex_lock(&mdev->state_lock);
  671. err = mlx4_en_do_set_mac(priv);
  672. mutex_unlock(&mdev->state_lock);
  673. return err;
  674. }
  675. static void mlx4_en_clear_list(struct net_device *dev)
  676. {
  677. struct mlx4_en_priv *priv = netdev_priv(dev);
  678. struct mlx4_en_mc_list *tmp, *mc_to_del;
  679. list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
  680. list_del(&mc_to_del->list);
  681. kfree(mc_to_del);
  682. }
  683. }
  684. static void mlx4_en_cache_mclist(struct net_device *dev)
  685. {
  686. struct mlx4_en_priv *priv = netdev_priv(dev);
  687. struct netdev_hw_addr *ha;
  688. struct mlx4_en_mc_list *tmp;
  689. mlx4_en_clear_list(dev);
  690. netdev_for_each_mc_addr(ha, dev) {
  691. tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
  692. if (!tmp) {
  693. mlx4_en_clear_list(dev);
  694. return;
  695. }
  696. memcpy(tmp->addr, ha->addr, ETH_ALEN);
  697. list_add_tail(&tmp->list, &priv->mc_list);
  698. }
  699. }
  700. static void update_mclist_flags(struct mlx4_en_priv *priv,
  701. struct list_head *dst,
  702. struct list_head *src)
  703. {
  704. struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
  705. bool found;
  706. /* Find all the entries that should be removed from dst,
  707. * These are the entries that are not found in src
  708. */
  709. list_for_each_entry(dst_tmp, dst, list) {
  710. found = false;
  711. list_for_each_entry(src_tmp, src, list) {
  712. if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
  713. found = true;
  714. break;
  715. }
  716. }
  717. if (!found)
  718. dst_tmp->action = MCLIST_REM;
  719. }
  720. /* Add entries that exist in src but not in dst
  721. * mark them as need to add
  722. */
  723. list_for_each_entry(src_tmp, src, list) {
  724. found = false;
  725. list_for_each_entry(dst_tmp, dst, list) {
  726. if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
  727. dst_tmp->action = MCLIST_NONE;
  728. found = true;
  729. break;
  730. }
  731. }
  732. if (!found) {
  733. new_mc = kmemdup(src_tmp,
  734. sizeof(struct mlx4_en_mc_list),
  735. GFP_KERNEL);
  736. if (!new_mc)
  737. return;
  738. new_mc->action = MCLIST_ADD;
  739. list_add_tail(&new_mc->list, dst);
  740. }
  741. }
  742. }
  743. static void mlx4_en_set_rx_mode(struct net_device *dev)
  744. {
  745. struct mlx4_en_priv *priv = netdev_priv(dev);
  746. if (!priv->port_up)
  747. return;
  748. queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
  749. }
  750. static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
  751. struct mlx4_en_dev *mdev)
  752. {
  753. int err = 0;
  754. if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
  755. if (netif_msg_rx_status(priv))
  756. en_warn(priv, "Entering promiscuous mode\n");
  757. priv->flags |= MLX4_EN_FLAG_PROMISC;
  758. /* Enable promiscouos mode */
  759. switch (mdev->dev->caps.steering_mode) {
  760. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  761. err = mlx4_flow_steer_promisc_add(mdev->dev,
  762. priv->port,
  763. priv->base_qpn,
  764. MLX4_FS_ALL_DEFAULT);
  765. if (err)
  766. en_err(priv, "Failed enabling promiscuous mode\n");
  767. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  768. break;
  769. case MLX4_STEERING_MODE_B0:
  770. err = mlx4_unicast_promisc_add(mdev->dev,
  771. priv->base_qpn,
  772. priv->port);
  773. if (err)
  774. en_err(priv, "Failed enabling unicast promiscuous mode\n");
  775. /* Add the default qp number as multicast
  776. * promisc
  777. */
  778. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  779. err = mlx4_multicast_promisc_add(mdev->dev,
  780. priv->base_qpn,
  781. priv->port);
  782. if (err)
  783. en_err(priv, "Failed enabling multicast promiscuous mode\n");
  784. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  785. }
  786. break;
  787. case MLX4_STEERING_MODE_A0:
  788. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  789. priv->port,
  790. priv->base_qpn,
  791. 1);
  792. if (err)
  793. en_err(priv, "Failed enabling promiscuous mode\n");
  794. break;
  795. }
  796. /* Disable port multicast filter (unconditionally) */
  797. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  798. 0, MLX4_MCAST_DISABLE);
  799. if (err)
  800. en_err(priv, "Failed disabling multicast filter\n");
  801. /* Disable port VLAN filter */
  802. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  803. if (err)
  804. en_err(priv, "Failed disabling VLAN filter\n");
  805. }
  806. }
  807. static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
  808. struct mlx4_en_dev *mdev)
  809. {
  810. int err = 0;
  811. if (netif_msg_rx_status(priv))
  812. en_warn(priv, "Leaving promiscuous mode\n");
  813. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  814. /* Disable promiscouos mode */
  815. switch (mdev->dev->caps.steering_mode) {
  816. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  817. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  818. priv->port,
  819. MLX4_FS_ALL_DEFAULT);
  820. if (err)
  821. en_err(priv, "Failed disabling promiscuous mode\n");
  822. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  823. break;
  824. case MLX4_STEERING_MODE_B0:
  825. err = mlx4_unicast_promisc_remove(mdev->dev,
  826. priv->base_qpn,
  827. priv->port);
  828. if (err)
  829. en_err(priv, "Failed disabling unicast promiscuous mode\n");
  830. /* Disable Multicast promisc */
  831. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  832. err = mlx4_multicast_promisc_remove(mdev->dev,
  833. priv->base_qpn,
  834. priv->port);
  835. if (err)
  836. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  837. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  838. }
  839. break;
  840. case MLX4_STEERING_MODE_A0:
  841. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  842. priv->port,
  843. priv->base_qpn, 0);
  844. if (err)
  845. en_err(priv, "Failed disabling promiscuous mode\n");
  846. break;
  847. }
  848. /* Enable port VLAN filter */
  849. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  850. if (err)
  851. en_err(priv, "Failed enabling VLAN filter\n");
  852. }
  853. static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
  854. struct net_device *dev,
  855. struct mlx4_en_dev *mdev)
  856. {
  857. struct mlx4_en_mc_list *mclist, *tmp;
  858. u64 mcast_addr = 0;
  859. u8 mc_list[16] = {0};
  860. int err = 0;
  861. /* Enable/disable the multicast filter according to IFF_ALLMULTI */
  862. if (dev->flags & IFF_ALLMULTI) {
  863. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  864. 0, MLX4_MCAST_DISABLE);
  865. if (err)
  866. en_err(priv, "Failed disabling multicast filter\n");
  867. /* Add the default qp number as multicast promisc */
  868. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  869. switch (mdev->dev->caps.steering_mode) {
  870. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  871. err = mlx4_flow_steer_promisc_add(mdev->dev,
  872. priv->port,
  873. priv->base_qpn,
  874. MLX4_FS_MC_DEFAULT);
  875. break;
  876. case MLX4_STEERING_MODE_B0:
  877. err = mlx4_multicast_promisc_add(mdev->dev,
  878. priv->base_qpn,
  879. priv->port);
  880. break;
  881. case MLX4_STEERING_MODE_A0:
  882. break;
  883. }
  884. if (err)
  885. en_err(priv, "Failed entering multicast promisc mode\n");
  886. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  887. }
  888. } else {
  889. /* Disable Multicast promisc */
  890. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  891. switch (mdev->dev->caps.steering_mode) {
  892. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  893. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  894. priv->port,
  895. MLX4_FS_MC_DEFAULT);
  896. break;
  897. case MLX4_STEERING_MODE_B0:
  898. err = mlx4_multicast_promisc_remove(mdev->dev,
  899. priv->base_qpn,
  900. priv->port);
  901. break;
  902. case MLX4_STEERING_MODE_A0:
  903. break;
  904. }
  905. if (err)
  906. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  907. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  908. }
  909. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  910. 0, MLX4_MCAST_DISABLE);
  911. if (err)
  912. en_err(priv, "Failed disabling multicast filter\n");
  913. /* Flush mcast filter and init it with broadcast address */
  914. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
  915. 1, MLX4_MCAST_CONFIG);
  916. /* Update multicast list - we cache all addresses so they won't
  917. * change while HW is updated holding the command semaphor */
  918. netif_addr_lock_bh(dev);
  919. mlx4_en_cache_mclist(dev);
  920. netif_addr_unlock_bh(dev);
  921. list_for_each_entry(mclist, &priv->mc_list, list) {
  922. mcast_addr = mlx4_en_mac_to_u64(mclist->addr);
  923. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
  924. mcast_addr, 0, MLX4_MCAST_CONFIG);
  925. }
  926. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  927. 0, MLX4_MCAST_ENABLE);
  928. if (err)
  929. en_err(priv, "Failed enabling multicast filter\n");
  930. update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
  931. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  932. if (mclist->action == MCLIST_REM) {
  933. /* detach this address and delete from list */
  934. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  935. mc_list[5] = priv->port;
  936. err = mlx4_multicast_detach(mdev->dev,
  937. &priv->rss_map.indir_qp,
  938. mc_list,
  939. MLX4_PROT_ETH,
  940. mclist->reg_id);
  941. if (err)
  942. en_err(priv, "Fail to detach multicast address\n");
  943. if (mclist->tunnel_reg_id) {
  944. err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id);
  945. if (err)
  946. en_err(priv, "Failed to detach multicast address\n");
  947. }
  948. /* remove from list */
  949. list_del(&mclist->list);
  950. kfree(mclist);
  951. } else if (mclist->action == MCLIST_ADD) {
  952. /* attach the address */
  953. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  954. /* needed for B0 steering support */
  955. mc_list[5] = priv->port;
  956. err = mlx4_multicast_attach(mdev->dev,
  957. &priv->rss_map.indir_qp,
  958. mc_list,
  959. priv->port, 0,
  960. MLX4_PROT_ETH,
  961. &mclist->reg_id);
  962. if (err)
  963. en_err(priv, "Fail to attach multicast address\n");
  964. err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn,
  965. &mclist->tunnel_reg_id);
  966. if (err)
  967. en_err(priv, "Failed to attach multicast address\n");
  968. }
  969. }
  970. }
  971. }
  972. static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
  973. struct net_device *dev,
  974. struct mlx4_en_dev *mdev)
  975. {
  976. struct netdev_hw_addr *ha;
  977. struct mlx4_mac_entry *entry;
  978. struct hlist_node *tmp;
  979. bool found;
  980. u64 mac;
  981. int err = 0;
  982. struct hlist_head *bucket;
  983. unsigned int i;
  984. int removed = 0;
  985. u32 prev_flags;
  986. /* Note that we do not need to protect our mac_hash traversal with rcu,
  987. * since all modification code is protected by mdev->state_lock
  988. */
  989. /* find what to remove */
  990. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  991. bucket = &priv->mac_hash[i];
  992. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  993. found = false;
  994. netdev_for_each_uc_addr(ha, dev) {
  995. if (ether_addr_equal_64bits(entry->mac,
  996. ha->addr)) {
  997. found = true;
  998. break;
  999. }
  1000. }
  1001. /* MAC address of the port is not in uc list */
  1002. if (ether_addr_equal_64bits(entry->mac, dev->dev_addr))
  1003. found = true;
  1004. if (!found) {
  1005. mac = mlx4_en_mac_to_u64(entry->mac);
  1006. mlx4_en_uc_steer_release(priv, entry->mac,
  1007. priv->base_qpn,
  1008. entry->reg_id);
  1009. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  1010. hlist_del_rcu(&entry->hlist);
  1011. kfree_rcu(entry, rcu);
  1012. en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
  1013. entry->mac, priv->port);
  1014. ++removed;
  1015. }
  1016. }
  1017. }
  1018. /* if we didn't remove anything, there is no use in trying to add
  1019. * again once we are in a forced promisc mode state
  1020. */
  1021. if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
  1022. return;
  1023. prev_flags = priv->flags;
  1024. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  1025. /* find what to add */
  1026. netdev_for_each_uc_addr(ha, dev) {
  1027. found = false;
  1028. bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
  1029. hlist_for_each_entry(entry, bucket, hlist) {
  1030. if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
  1031. found = true;
  1032. break;
  1033. }
  1034. }
  1035. if (!found) {
  1036. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  1037. if (!entry) {
  1038. en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
  1039. ha->addr, priv->port);
  1040. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  1041. break;
  1042. }
  1043. mac = mlx4_en_mac_to_u64(ha->addr);
  1044. memcpy(entry->mac, ha->addr, ETH_ALEN);
  1045. err = mlx4_register_mac(mdev->dev, priv->port, mac);
  1046. if (err < 0) {
  1047. en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
  1048. ha->addr, priv->port, err);
  1049. kfree(entry);
  1050. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  1051. break;
  1052. }
  1053. err = mlx4_en_uc_steer_add(priv, ha->addr,
  1054. &priv->base_qpn,
  1055. &entry->reg_id);
  1056. if (err) {
  1057. en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
  1058. ha->addr, priv->port, err);
  1059. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  1060. kfree(entry);
  1061. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  1062. break;
  1063. } else {
  1064. unsigned int mac_hash;
  1065. en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
  1066. ha->addr, priv->port);
  1067. mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
  1068. bucket = &priv->mac_hash[mac_hash];
  1069. hlist_add_head_rcu(&entry->hlist, bucket);
  1070. }
  1071. }
  1072. }
  1073. if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  1074. en_warn(priv, "Forcing promiscuous mode on port:%d\n",
  1075. priv->port);
  1076. } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  1077. en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
  1078. priv->port);
  1079. }
  1080. }
  1081. static void mlx4_en_do_set_rx_mode(struct work_struct *work)
  1082. {
  1083. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1084. rx_mode_task);
  1085. struct mlx4_en_dev *mdev = priv->mdev;
  1086. struct net_device *dev = priv->dev;
  1087. mutex_lock(&mdev->state_lock);
  1088. if (!mdev->device_up) {
  1089. en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
  1090. goto out;
  1091. }
  1092. if (!priv->port_up) {
  1093. en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
  1094. goto out;
  1095. }
  1096. if (!netif_carrier_ok(dev)) {
  1097. if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
  1098. if (priv->port_state.link_state) {
  1099. priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
  1100. netif_carrier_on(dev);
  1101. en_dbg(LINK, priv, "Link Up\n");
  1102. }
  1103. }
  1104. }
  1105. if (dev->priv_flags & IFF_UNICAST_FLT)
  1106. mlx4_en_do_uc_filter(priv, dev, mdev);
  1107. /* Promsicuous mode: disable all filters */
  1108. if ((dev->flags & IFF_PROMISC) ||
  1109. (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
  1110. mlx4_en_set_promisc_mode(priv, mdev);
  1111. goto out;
  1112. }
  1113. /* Not in promiscuous mode */
  1114. if (priv->flags & MLX4_EN_FLAG_PROMISC)
  1115. mlx4_en_clear_promisc_mode(priv, mdev);
  1116. mlx4_en_do_multicast(priv, dev, mdev);
  1117. out:
  1118. mutex_unlock(&mdev->state_lock);
  1119. }
  1120. #ifdef CONFIG_NET_POLL_CONTROLLER
  1121. static void mlx4_en_netpoll(struct net_device *dev)
  1122. {
  1123. struct mlx4_en_priv *priv = netdev_priv(dev);
  1124. struct mlx4_en_cq *cq;
  1125. unsigned long flags;
  1126. int i;
  1127. for (i = 0; i < priv->rx_ring_num; i++) {
  1128. cq = priv->rx_cq[i];
  1129. spin_lock_irqsave(&cq->lock, flags);
  1130. napi_synchronize(&cq->napi);
  1131. mlx4_en_process_rx_cq(dev, cq, 0);
  1132. spin_unlock_irqrestore(&cq->lock, flags);
  1133. }
  1134. }
  1135. #endif
  1136. static void mlx4_en_tx_timeout(struct net_device *dev)
  1137. {
  1138. struct mlx4_en_priv *priv = netdev_priv(dev);
  1139. struct mlx4_en_dev *mdev = priv->mdev;
  1140. int i;
  1141. if (netif_msg_timer(priv))
  1142. en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
  1143. for (i = 0; i < priv->tx_ring_num; i++) {
  1144. if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i)))
  1145. continue;
  1146. en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n",
  1147. i, priv->tx_ring[i]->qpn, priv->tx_ring[i]->cqn,
  1148. priv->tx_ring[i]->cons, priv->tx_ring[i]->prod);
  1149. }
  1150. priv->port_stats.tx_timeout++;
  1151. en_dbg(DRV, priv, "Scheduling watchdog\n");
  1152. queue_work(mdev->workqueue, &priv->watchdog_task);
  1153. }
  1154. static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev)
  1155. {
  1156. struct mlx4_en_priv *priv = netdev_priv(dev);
  1157. spin_lock_bh(&priv->stats_lock);
  1158. memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats));
  1159. spin_unlock_bh(&priv->stats_lock);
  1160. return &priv->ret_stats;
  1161. }
  1162. static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
  1163. {
  1164. struct mlx4_en_cq *cq;
  1165. int i;
  1166. /* If we haven't received a specific coalescing setting
  1167. * (module param), we set the moderation parameters as follows:
  1168. * - moder_cnt is set to the number of mtu sized packets to
  1169. * satisfy our coalescing target.
  1170. * - moder_time is set to a fixed value.
  1171. */
  1172. priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
  1173. priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
  1174. priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
  1175. priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
  1176. en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
  1177. priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
  1178. /* Setup cq moderation params */
  1179. for (i = 0; i < priv->rx_ring_num; i++) {
  1180. cq = priv->rx_cq[i];
  1181. cq->moder_cnt = priv->rx_frames;
  1182. cq->moder_time = priv->rx_usecs;
  1183. priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
  1184. priv->last_moder_packets[i] = 0;
  1185. priv->last_moder_bytes[i] = 0;
  1186. }
  1187. for (i = 0; i < priv->tx_ring_num; i++) {
  1188. cq = priv->tx_cq[i];
  1189. cq->moder_cnt = priv->tx_frames;
  1190. cq->moder_time = priv->tx_usecs;
  1191. }
  1192. /* Reset auto-moderation params */
  1193. priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
  1194. priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
  1195. priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
  1196. priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
  1197. priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
  1198. priv->adaptive_rx_coal = 1;
  1199. priv->last_moder_jiffies = 0;
  1200. priv->last_moder_tx_packets = 0;
  1201. }
  1202. static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
  1203. {
  1204. unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
  1205. struct mlx4_en_cq *cq;
  1206. unsigned long packets;
  1207. unsigned long rate;
  1208. unsigned long avg_pkt_size;
  1209. unsigned long rx_packets;
  1210. unsigned long rx_bytes;
  1211. unsigned long rx_pkt_diff;
  1212. int moder_time;
  1213. int ring, err;
  1214. if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
  1215. return;
  1216. for (ring = 0; ring < priv->rx_ring_num; ring++) {
  1217. spin_lock_bh(&priv->stats_lock);
  1218. rx_packets = priv->rx_ring[ring]->packets;
  1219. rx_bytes = priv->rx_ring[ring]->bytes;
  1220. spin_unlock_bh(&priv->stats_lock);
  1221. rx_pkt_diff = ((unsigned long) (rx_packets -
  1222. priv->last_moder_packets[ring]));
  1223. packets = rx_pkt_diff;
  1224. rate = packets * HZ / period;
  1225. avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
  1226. priv->last_moder_bytes[ring])) / packets : 0;
  1227. /* Apply auto-moderation only when packet rate
  1228. * exceeds a rate that it matters */
  1229. if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
  1230. avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
  1231. if (rate < priv->pkt_rate_low)
  1232. moder_time = priv->rx_usecs_low;
  1233. else if (rate > priv->pkt_rate_high)
  1234. moder_time = priv->rx_usecs_high;
  1235. else
  1236. moder_time = (rate - priv->pkt_rate_low) *
  1237. (priv->rx_usecs_high - priv->rx_usecs_low) /
  1238. (priv->pkt_rate_high - priv->pkt_rate_low) +
  1239. priv->rx_usecs_low;
  1240. } else {
  1241. moder_time = priv->rx_usecs_low;
  1242. }
  1243. if (moder_time != priv->last_moder_time[ring]) {
  1244. priv->last_moder_time[ring] = moder_time;
  1245. cq = priv->rx_cq[ring];
  1246. cq->moder_time = moder_time;
  1247. cq->moder_cnt = priv->rx_frames;
  1248. err = mlx4_en_set_cq_moder(priv, cq);
  1249. if (err)
  1250. en_err(priv, "Failed modifying moderation for cq:%d\n",
  1251. ring);
  1252. }
  1253. priv->last_moder_packets[ring] = rx_packets;
  1254. priv->last_moder_bytes[ring] = rx_bytes;
  1255. }
  1256. priv->last_moder_jiffies = jiffies;
  1257. }
  1258. static void mlx4_en_do_get_stats(struct work_struct *work)
  1259. {
  1260. struct delayed_work *delay = to_delayed_work(work);
  1261. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1262. stats_task);
  1263. struct mlx4_en_dev *mdev = priv->mdev;
  1264. int err;
  1265. mutex_lock(&mdev->state_lock);
  1266. if (mdev->device_up) {
  1267. if (priv->port_up) {
  1268. err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
  1269. if (err)
  1270. en_dbg(HW, priv, "Could not update stats\n");
  1271. mlx4_en_auto_moderation(priv);
  1272. }
  1273. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1274. }
  1275. if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
  1276. mlx4_en_do_set_mac(priv);
  1277. mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
  1278. }
  1279. mutex_unlock(&mdev->state_lock);
  1280. }
  1281. /* mlx4_en_service_task - Run service task for tasks that needed to be done
  1282. * periodically
  1283. */
  1284. static void mlx4_en_service_task(struct work_struct *work)
  1285. {
  1286. struct delayed_work *delay = to_delayed_work(work);
  1287. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1288. service_task);
  1289. struct mlx4_en_dev *mdev = priv->mdev;
  1290. mutex_lock(&mdev->state_lock);
  1291. if (mdev->device_up) {
  1292. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  1293. mlx4_en_ptp_overflow_check(mdev);
  1294. queue_delayed_work(mdev->workqueue, &priv->service_task,
  1295. SERVICE_TASK_DELAY);
  1296. }
  1297. mutex_unlock(&mdev->state_lock);
  1298. }
  1299. static void mlx4_en_linkstate(struct work_struct *work)
  1300. {
  1301. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1302. linkstate_task);
  1303. struct mlx4_en_dev *mdev = priv->mdev;
  1304. int linkstate = priv->link_state;
  1305. mutex_lock(&mdev->state_lock);
  1306. /* If observable port state changed set carrier state and
  1307. * report to system log */
  1308. if (priv->last_link_state != linkstate) {
  1309. if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
  1310. en_info(priv, "Link Down\n");
  1311. netif_carrier_off(priv->dev);
  1312. } else {
  1313. en_info(priv, "Link Up\n");
  1314. netif_carrier_on(priv->dev);
  1315. }
  1316. }
  1317. priv->last_link_state = linkstate;
  1318. mutex_unlock(&mdev->state_lock);
  1319. }
  1320. int mlx4_en_start_port(struct net_device *dev)
  1321. {
  1322. struct mlx4_en_priv *priv = netdev_priv(dev);
  1323. struct mlx4_en_dev *mdev = priv->mdev;
  1324. struct mlx4_en_cq *cq;
  1325. struct mlx4_en_tx_ring *tx_ring;
  1326. int rx_index = 0;
  1327. int tx_index = 0;
  1328. int err = 0;
  1329. int i;
  1330. int j;
  1331. u8 mc_list[16] = {0};
  1332. if (priv->port_up) {
  1333. en_dbg(DRV, priv, "start port called while port already up\n");
  1334. return 0;
  1335. }
  1336. INIT_LIST_HEAD(&priv->mc_list);
  1337. INIT_LIST_HEAD(&priv->curr_list);
  1338. INIT_LIST_HEAD(&priv->ethtool_list);
  1339. memset(&priv->ethtool_rules[0], 0,
  1340. sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
  1341. /* Calculate Rx buf size */
  1342. dev->mtu = min(dev->mtu, priv->max_mtu);
  1343. mlx4_en_calc_rx_buf(dev);
  1344. en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
  1345. /* Configure rx cq's and rings */
  1346. err = mlx4_en_activate_rx_rings(priv);
  1347. if (err) {
  1348. en_err(priv, "Failed to activate RX rings\n");
  1349. return err;
  1350. }
  1351. for (i = 0; i < priv->rx_ring_num; i++) {
  1352. cq = priv->rx_cq[i];
  1353. mlx4_en_cq_init_lock(cq);
  1354. err = mlx4_en_activate_cq(priv, cq, i);
  1355. if (err) {
  1356. en_err(priv, "Failed activating Rx CQ\n");
  1357. goto cq_err;
  1358. }
  1359. for (j = 0; j < cq->size; j++)
  1360. cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK;
  1361. err = mlx4_en_set_cq_moder(priv, cq);
  1362. if (err) {
  1363. en_err(priv, "Failed setting cq moderation parameters");
  1364. mlx4_en_deactivate_cq(priv, cq);
  1365. goto cq_err;
  1366. }
  1367. mlx4_en_arm_cq(priv, cq);
  1368. priv->rx_ring[i]->cqn = cq->mcq.cqn;
  1369. ++rx_index;
  1370. }
  1371. /* Set qp number */
  1372. en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
  1373. err = mlx4_en_get_qp(priv);
  1374. if (err) {
  1375. en_err(priv, "Failed getting eth qp\n");
  1376. goto cq_err;
  1377. }
  1378. mdev->mac_removed[priv->port] = 0;
  1379. err = mlx4_en_config_rss_steer(priv);
  1380. if (err) {
  1381. en_err(priv, "Failed configuring rss steering\n");
  1382. goto mac_err;
  1383. }
  1384. err = mlx4_en_create_drop_qp(priv);
  1385. if (err)
  1386. goto rss_err;
  1387. /* Configure tx cq's and rings */
  1388. for (i = 0; i < priv->tx_ring_num; i++) {
  1389. /* Configure cq */
  1390. cq = priv->tx_cq[i];
  1391. err = mlx4_en_activate_cq(priv, cq, i);
  1392. if (err) {
  1393. en_err(priv, "Failed allocating Tx CQ\n");
  1394. goto tx_err;
  1395. }
  1396. err = mlx4_en_set_cq_moder(priv, cq);
  1397. if (err) {
  1398. en_err(priv, "Failed setting cq moderation parameters");
  1399. mlx4_en_deactivate_cq(priv, cq);
  1400. goto tx_err;
  1401. }
  1402. en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
  1403. cq->buf->wqe_index = cpu_to_be16(0xffff);
  1404. /* Configure ring */
  1405. tx_ring = priv->tx_ring[i];
  1406. err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
  1407. i / priv->num_tx_rings_p_up);
  1408. if (err) {
  1409. en_err(priv, "Failed allocating Tx ring\n");
  1410. mlx4_en_deactivate_cq(priv, cq);
  1411. goto tx_err;
  1412. }
  1413. tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
  1414. /* Arm CQ for TX completions */
  1415. mlx4_en_arm_cq(priv, cq);
  1416. /* Set initial ownership of all Tx TXBBs to SW (1) */
  1417. for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
  1418. *((u32 *) (tx_ring->buf + j)) = 0xffffffff;
  1419. ++tx_index;
  1420. }
  1421. /* Configure port */
  1422. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1423. priv->rx_skb_size + ETH_FCS_LEN,
  1424. priv->prof->tx_pause,
  1425. priv->prof->tx_ppp,
  1426. priv->prof->rx_pause,
  1427. priv->prof->rx_ppp);
  1428. if (err) {
  1429. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  1430. priv->port, err);
  1431. goto tx_err;
  1432. }
  1433. /* Set default qp number */
  1434. err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
  1435. if (err) {
  1436. en_err(priv, "Failed setting default qp numbers\n");
  1437. goto tx_err;
  1438. }
  1439. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  1440. err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC);
  1441. if (err) {
  1442. en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
  1443. err);
  1444. goto tx_err;
  1445. }
  1446. }
  1447. /* Init port */
  1448. en_dbg(HW, priv, "Initializing port\n");
  1449. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1450. if (err) {
  1451. en_err(priv, "Failed Initializing port\n");
  1452. goto tx_err;
  1453. }
  1454. /* Attach rx QP to bradcast address */
  1455. memset(&mc_list[10], 0xff, ETH_ALEN);
  1456. mc_list[5] = priv->port; /* needed for B0 steering support */
  1457. if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1458. priv->port, 0, MLX4_PROT_ETH,
  1459. &priv->broadcast_id))
  1460. mlx4_warn(mdev, "Failed Attaching Broadcast\n");
  1461. /* Must redo promiscuous mode setup. */
  1462. priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
  1463. /* Schedule multicast task to populate multicast list */
  1464. queue_work(mdev->workqueue, &priv->rx_mode_task);
  1465. mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap);
  1466. priv->port_up = true;
  1467. netif_tx_start_all_queues(dev);
  1468. netif_device_attach(dev);
  1469. return 0;
  1470. tx_err:
  1471. while (tx_index--) {
  1472. mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[tx_index]);
  1473. mlx4_en_deactivate_cq(priv, priv->tx_cq[tx_index]);
  1474. }
  1475. mlx4_en_destroy_drop_qp(priv);
  1476. rss_err:
  1477. mlx4_en_release_rss_steer(priv);
  1478. mac_err:
  1479. mlx4_en_put_qp(priv);
  1480. cq_err:
  1481. while (rx_index--)
  1482. mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]);
  1483. for (i = 0; i < priv->rx_ring_num; i++)
  1484. mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
  1485. return err; /* need to close devices */
  1486. }
  1487. void mlx4_en_stop_port(struct net_device *dev, int detach)
  1488. {
  1489. struct mlx4_en_priv *priv = netdev_priv(dev);
  1490. struct mlx4_en_dev *mdev = priv->mdev;
  1491. struct mlx4_en_mc_list *mclist, *tmp;
  1492. struct ethtool_flow_id *flow, *tmp_flow;
  1493. int i;
  1494. u8 mc_list[16] = {0};
  1495. if (!priv->port_up) {
  1496. en_dbg(DRV, priv, "stop port called while port already down\n");
  1497. return;
  1498. }
  1499. /* close port*/
  1500. mlx4_CLOSE_PORT(mdev->dev, priv->port);
  1501. /* Synchronize with tx routine */
  1502. netif_tx_lock_bh(dev);
  1503. if (detach)
  1504. netif_device_detach(dev);
  1505. netif_tx_stop_all_queues(dev);
  1506. netif_tx_unlock_bh(dev);
  1507. netif_tx_disable(dev);
  1508. /* Set port as not active */
  1509. priv->port_up = false;
  1510. /* Promsicuous mode */
  1511. if (mdev->dev->caps.steering_mode ==
  1512. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1513. priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
  1514. MLX4_EN_FLAG_MC_PROMISC);
  1515. mlx4_flow_steer_promisc_remove(mdev->dev,
  1516. priv->port,
  1517. MLX4_FS_ALL_DEFAULT);
  1518. mlx4_flow_steer_promisc_remove(mdev->dev,
  1519. priv->port,
  1520. MLX4_FS_MC_DEFAULT);
  1521. } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
  1522. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  1523. /* Disable promiscouos mode */
  1524. mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
  1525. priv->port);
  1526. /* Disable Multicast promisc */
  1527. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  1528. mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
  1529. priv->port);
  1530. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  1531. }
  1532. }
  1533. /* Detach All multicasts */
  1534. memset(&mc_list[10], 0xff, ETH_ALEN);
  1535. mc_list[5] = priv->port; /* needed for B0 steering support */
  1536. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1537. MLX4_PROT_ETH, priv->broadcast_id);
  1538. list_for_each_entry(mclist, &priv->curr_list, list) {
  1539. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  1540. mc_list[5] = priv->port;
  1541. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
  1542. mc_list, MLX4_PROT_ETH, mclist->reg_id);
  1543. if (mclist->tunnel_reg_id)
  1544. mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id);
  1545. }
  1546. mlx4_en_clear_list(dev);
  1547. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  1548. list_del(&mclist->list);
  1549. kfree(mclist);
  1550. }
  1551. /* Flush multicast filter */
  1552. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
  1553. /* Remove flow steering rules for the port*/
  1554. if (mdev->dev->caps.steering_mode ==
  1555. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1556. ASSERT_RTNL();
  1557. list_for_each_entry_safe(flow, tmp_flow,
  1558. &priv->ethtool_list, list) {
  1559. mlx4_flow_detach(mdev->dev, flow->id);
  1560. list_del(&flow->list);
  1561. }
  1562. }
  1563. mlx4_en_destroy_drop_qp(priv);
  1564. /* Free TX Rings */
  1565. for (i = 0; i < priv->tx_ring_num; i++) {
  1566. mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[i]);
  1567. mlx4_en_deactivate_cq(priv, priv->tx_cq[i]);
  1568. }
  1569. msleep(10);
  1570. for (i = 0; i < priv->tx_ring_num; i++)
  1571. mlx4_en_free_tx_buf(dev, priv->tx_ring[i]);
  1572. /* Free RSS qps */
  1573. mlx4_en_release_rss_steer(priv);
  1574. /* Unregister Mac address for the port */
  1575. mlx4_en_put_qp(priv);
  1576. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN))
  1577. mdev->mac_removed[priv->port] = 1;
  1578. /* Free RX Rings */
  1579. for (i = 0; i < priv->rx_ring_num; i++) {
  1580. struct mlx4_en_cq *cq = priv->rx_cq[i];
  1581. local_bh_disable();
  1582. while (!mlx4_en_cq_lock_napi(cq)) {
  1583. pr_info("CQ %d locked\n", i);
  1584. mdelay(1);
  1585. }
  1586. local_bh_enable();
  1587. while (test_bit(NAPI_STATE_SCHED, &cq->napi.state))
  1588. msleep(1);
  1589. mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
  1590. mlx4_en_deactivate_cq(priv, cq);
  1591. }
  1592. }
  1593. static void mlx4_en_restart(struct work_struct *work)
  1594. {
  1595. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1596. watchdog_task);
  1597. struct mlx4_en_dev *mdev = priv->mdev;
  1598. struct net_device *dev = priv->dev;
  1599. en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
  1600. mutex_lock(&mdev->state_lock);
  1601. if (priv->port_up) {
  1602. mlx4_en_stop_port(dev, 1);
  1603. if (mlx4_en_start_port(dev))
  1604. en_err(priv, "Failed restarting port %d\n", priv->port);
  1605. }
  1606. mutex_unlock(&mdev->state_lock);
  1607. }
  1608. static void mlx4_en_clear_stats(struct net_device *dev)
  1609. {
  1610. struct mlx4_en_priv *priv = netdev_priv(dev);
  1611. struct mlx4_en_dev *mdev = priv->mdev;
  1612. int i;
  1613. if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
  1614. en_dbg(HW, priv, "Failed dumping statistics\n");
  1615. memset(&priv->stats, 0, sizeof(priv->stats));
  1616. memset(&priv->pstats, 0, sizeof(priv->pstats));
  1617. memset(&priv->pkstats, 0, sizeof(priv->pkstats));
  1618. memset(&priv->port_stats, 0, sizeof(priv->port_stats));
  1619. for (i = 0; i < priv->tx_ring_num; i++) {
  1620. priv->tx_ring[i]->bytes = 0;
  1621. priv->tx_ring[i]->packets = 0;
  1622. priv->tx_ring[i]->tx_csum = 0;
  1623. }
  1624. for (i = 0; i < priv->rx_ring_num; i++) {
  1625. priv->rx_ring[i]->bytes = 0;
  1626. priv->rx_ring[i]->packets = 0;
  1627. priv->rx_ring[i]->csum_ok = 0;
  1628. priv->rx_ring[i]->csum_none = 0;
  1629. }
  1630. }
  1631. static int mlx4_en_open(struct net_device *dev)
  1632. {
  1633. struct mlx4_en_priv *priv = netdev_priv(dev);
  1634. struct mlx4_en_dev *mdev = priv->mdev;
  1635. int err = 0;
  1636. mutex_lock(&mdev->state_lock);
  1637. if (!mdev->device_up) {
  1638. en_err(priv, "Cannot open - device down/disabled\n");
  1639. err = -EBUSY;
  1640. goto out;
  1641. }
  1642. /* Reset HW statistics and SW counters */
  1643. mlx4_en_clear_stats(dev);
  1644. err = mlx4_en_start_port(dev);
  1645. if (err)
  1646. en_err(priv, "Failed starting port:%d\n", priv->port);
  1647. out:
  1648. mutex_unlock(&mdev->state_lock);
  1649. return err;
  1650. }
  1651. static int mlx4_en_close(struct net_device *dev)
  1652. {
  1653. struct mlx4_en_priv *priv = netdev_priv(dev);
  1654. struct mlx4_en_dev *mdev = priv->mdev;
  1655. en_dbg(IFDOWN, priv, "Close port called\n");
  1656. mutex_lock(&mdev->state_lock);
  1657. mlx4_en_stop_port(dev, 0);
  1658. netif_carrier_off(dev);
  1659. mutex_unlock(&mdev->state_lock);
  1660. return 0;
  1661. }
  1662. void mlx4_en_free_resources(struct mlx4_en_priv *priv)
  1663. {
  1664. int i;
  1665. #ifdef CONFIG_RFS_ACCEL
  1666. free_irq_cpu_rmap(priv->dev->rx_cpu_rmap);
  1667. priv->dev->rx_cpu_rmap = NULL;
  1668. #endif
  1669. for (i = 0; i < priv->tx_ring_num; i++) {
  1670. if (priv->tx_ring && priv->tx_ring[i])
  1671. mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
  1672. if (priv->tx_cq && priv->tx_cq[i])
  1673. mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
  1674. }
  1675. for (i = 0; i < priv->rx_ring_num; i++) {
  1676. if (priv->rx_ring[i])
  1677. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1678. priv->prof->rx_ring_size, priv->stride);
  1679. if (priv->rx_cq[i])
  1680. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1681. }
  1682. if (priv->base_tx_qpn) {
  1683. mlx4_qp_release_range(priv->mdev->dev, priv->base_tx_qpn, priv->tx_ring_num);
  1684. priv->base_tx_qpn = 0;
  1685. }
  1686. }
  1687. int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
  1688. {
  1689. struct mlx4_en_port_profile *prof = priv->prof;
  1690. int i;
  1691. int err;
  1692. int node;
  1693. err = mlx4_qp_reserve_range(priv->mdev->dev, priv->tx_ring_num, 256, &priv->base_tx_qpn);
  1694. if (err) {
  1695. en_err(priv, "failed reserving range for TX rings\n");
  1696. return err;
  1697. }
  1698. /* Create tx Rings */
  1699. for (i = 0; i < priv->tx_ring_num; i++) {
  1700. node = cpu_to_node(i % num_online_cpus());
  1701. if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
  1702. prof->tx_ring_size, i, TX, node))
  1703. goto err;
  1704. if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i],
  1705. priv->base_tx_qpn + i,
  1706. prof->tx_ring_size, TXBB_SIZE,
  1707. node, i))
  1708. goto err;
  1709. }
  1710. /* Create rx Rings */
  1711. for (i = 0; i < priv->rx_ring_num; i++) {
  1712. node = cpu_to_node(i % num_online_cpus());
  1713. if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
  1714. prof->rx_ring_size, i, RX, node))
  1715. goto err;
  1716. if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
  1717. prof->rx_ring_size, priv->stride,
  1718. node))
  1719. goto err;
  1720. }
  1721. #ifdef CONFIG_RFS_ACCEL
  1722. if (priv->mdev->dev->caps.comp_pool) {
  1723. priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->mdev->dev->caps.comp_pool);
  1724. if (!priv->dev->rx_cpu_rmap)
  1725. goto err;
  1726. }
  1727. #endif
  1728. return 0;
  1729. err:
  1730. en_err(priv, "Failed to allocate NIC resources\n");
  1731. for (i = 0; i < priv->rx_ring_num; i++) {
  1732. if (priv->rx_ring[i])
  1733. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1734. prof->rx_ring_size,
  1735. priv->stride);
  1736. if (priv->rx_cq[i])
  1737. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1738. }
  1739. for (i = 0; i < priv->tx_ring_num; i++) {
  1740. if (priv->tx_ring[i])
  1741. mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
  1742. if (priv->tx_cq[i])
  1743. mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
  1744. }
  1745. return -ENOMEM;
  1746. }
  1747. void mlx4_en_destroy_netdev(struct net_device *dev)
  1748. {
  1749. struct mlx4_en_priv *priv = netdev_priv(dev);
  1750. struct mlx4_en_dev *mdev = priv->mdev;
  1751. en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
  1752. /* Unregister device - this will close the port if it was up */
  1753. if (priv->registered)
  1754. unregister_netdev(dev);
  1755. if (priv->allocated)
  1756. mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
  1757. cancel_delayed_work(&priv->stats_task);
  1758. cancel_delayed_work(&priv->service_task);
  1759. /* flush any pending task for this netdev */
  1760. flush_workqueue(mdev->workqueue);
  1761. /* Detach the netdev so tasks would not attempt to access it */
  1762. mutex_lock(&mdev->state_lock);
  1763. mdev->pndev[priv->port] = NULL;
  1764. mutex_unlock(&mdev->state_lock);
  1765. mlx4_en_free_resources(priv);
  1766. kfree(priv->tx_ring);
  1767. kfree(priv->tx_cq);
  1768. free_netdev(dev);
  1769. }
  1770. static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
  1771. {
  1772. struct mlx4_en_priv *priv = netdev_priv(dev);
  1773. struct mlx4_en_dev *mdev = priv->mdev;
  1774. int err = 0;
  1775. en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
  1776. dev->mtu, new_mtu);
  1777. if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
  1778. en_err(priv, "Bad MTU size:%d.\n", new_mtu);
  1779. return -EPERM;
  1780. }
  1781. dev->mtu = new_mtu;
  1782. if (netif_running(dev)) {
  1783. mutex_lock(&mdev->state_lock);
  1784. if (!mdev->device_up) {
  1785. /* NIC is probably restarting - let watchdog task reset
  1786. * the port */
  1787. en_dbg(DRV, priv, "Change MTU called with card down!?\n");
  1788. } else {
  1789. mlx4_en_stop_port(dev, 1);
  1790. err = mlx4_en_start_port(dev);
  1791. if (err) {
  1792. en_err(priv, "Failed restarting port:%d\n",
  1793. priv->port);
  1794. queue_work(mdev->workqueue, &priv->watchdog_task);
  1795. }
  1796. }
  1797. mutex_unlock(&mdev->state_lock);
  1798. }
  1799. return 0;
  1800. }
  1801. static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
  1802. {
  1803. struct mlx4_en_priv *priv = netdev_priv(dev);
  1804. struct mlx4_en_dev *mdev = priv->mdev;
  1805. struct hwtstamp_config config;
  1806. if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
  1807. return -EFAULT;
  1808. /* reserved for future extensions */
  1809. if (config.flags)
  1810. return -EINVAL;
  1811. /* device doesn't support time stamping */
  1812. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
  1813. return -EINVAL;
  1814. /* TX HW timestamp */
  1815. switch (config.tx_type) {
  1816. case HWTSTAMP_TX_OFF:
  1817. case HWTSTAMP_TX_ON:
  1818. break;
  1819. default:
  1820. return -ERANGE;
  1821. }
  1822. /* RX HW timestamp */
  1823. switch (config.rx_filter) {
  1824. case HWTSTAMP_FILTER_NONE:
  1825. break;
  1826. case HWTSTAMP_FILTER_ALL:
  1827. case HWTSTAMP_FILTER_SOME:
  1828. case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
  1829. case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
  1830. case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
  1831. case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
  1832. case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
  1833. case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
  1834. case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
  1835. case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
  1836. case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
  1837. case HWTSTAMP_FILTER_PTP_V2_EVENT:
  1838. case HWTSTAMP_FILTER_PTP_V2_SYNC:
  1839. case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
  1840. config.rx_filter = HWTSTAMP_FILTER_ALL;
  1841. break;
  1842. default:
  1843. return -ERANGE;
  1844. }
  1845. if (mlx4_en_timestamp_config(dev, config.tx_type, config.rx_filter)) {
  1846. config.tx_type = HWTSTAMP_TX_OFF;
  1847. config.rx_filter = HWTSTAMP_FILTER_NONE;
  1848. }
  1849. return copy_to_user(ifr->ifr_data, &config,
  1850. sizeof(config)) ? -EFAULT : 0;
  1851. }
  1852. static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
  1853. {
  1854. struct mlx4_en_priv *priv = netdev_priv(dev);
  1855. return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config,
  1856. sizeof(priv->hwtstamp_config)) ? -EFAULT : 0;
  1857. }
  1858. static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  1859. {
  1860. switch (cmd) {
  1861. case SIOCSHWTSTAMP:
  1862. return mlx4_en_hwtstamp_set(dev, ifr);
  1863. case SIOCGHWTSTAMP:
  1864. return mlx4_en_hwtstamp_get(dev, ifr);
  1865. default:
  1866. return -EOPNOTSUPP;
  1867. }
  1868. }
  1869. static int mlx4_en_set_features(struct net_device *netdev,
  1870. netdev_features_t features)
  1871. {
  1872. struct mlx4_en_priv *priv = netdev_priv(netdev);
  1873. if (features & NETIF_F_LOOPBACK)
  1874. priv->ctrl_flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK);
  1875. else
  1876. priv->ctrl_flags &=
  1877. cpu_to_be32(~MLX4_WQE_CTRL_FORCE_LOOPBACK);
  1878. mlx4_en_update_loopback_state(netdev, features);
  1879. return 0;
  1880. }
  1881. static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
  1882. {
  1883. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1884. struct mlx4_en_dev *mdev = en_priv->mdev;
  1885. u64 mac_u64 = mlx4_en_mac_to_u64(mac);
  1886. if (!is_valid_ether_addr(mac))
  1887. return -EINVAL;
  1888. return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac_u64);
  1889. }
  1890. static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos)
  1891. {
  1892. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1893. struct mlx4_en_dev *mdev = en_priv->mdev;
  1894. return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos);
  1895. }
  1896. static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting)
  1897. {
  1898. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1899. struct mlx4_en_dev *mdev = en_priv->mdev;
  1900. return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);
  1901. }
  1902. static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf)
  1903. {
  1904. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1905. struct mlx4_en_dev *mdev = en_priv->mdev;
  1906. return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);
  1907. }
  1908. static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state)
  1909. {
  1910. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1911. struct mlx4_en_dev *mdev = en_priv->mdev;
  1912. return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state);
  1913. }
  1914. #define PORT_ID_BYTE_LEN 8
  1915. static int mlx4_en_get_phys_port_id(struct net_device *dev,
  1916. struct netdev_phys_port_id *ppid)
  1917. {
  1918. struct mlx4_en_priv *priv = netdev_priv(dev);
  1919. struct mlx4_dev *mdev = priv->mdev->dev;
  1920. int i;
  1921. u64 phys_port_id = mdev->caps.phys_port_id[priv->port];
  1922. if (!phys_port_id)
  1923. return -EOPNOTSUPP;
  1924. ppid->id_len = sizeof(phys_port_id);
  1925. for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) {
  1926. ppid->id[i] = phys_port_id & 0xff;
  1927. phys_port_id >>= 8;
  1928. }
  1929. return 0;
  1930. }
  1931. static const struct net_device_ops mlx4_netdev_ops = {
  1932. .ndo_open = mlx4_en_open,
  1933. .ndo_stop = mlx4_en_close,
  1934. .ndo_start_xmit = mlx4_en_xmit,
  1935. .ndo_select_queue = mlx4_en_select_queue,
  1936. .ndo_get_stats = mlx4_en_get_stats,
  1937. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  1938. .ndo_set_mac_address = mlx4_en_set_mac,
  1939. .ndo_validate_addr = eth_validate_addr,
  1940. .ndo_change_mtu = mlx4_en_change_mtu,
  1941. .ndo_do_ioctl = mlx4_en_ioctl,
  1942. .ndo_tx_timeout = mlx4_en_tx_timeout,
  1943. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  1944. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  1945. #ifdef CONFIG_NET_POLL_CONTROLLER
  1946. .ndo_poll_controller = mlx4_en_netpoll,
  1947. #endif
  1948. .ndo_set_features = mlx4_en_set_features,
  1949. .ndo_setup_tc = mlx4_en_setup_tc,
  1950. #ifdef CONFIG_RFS_ACCEL
  1951. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  1952. #endif
  1953. #ifdef CONFIG_NET_RX_BUSY_POLL
  1954. .ndo_busy_poll = mlx4_en_low_latency_recv,
  1955. #endif
  1956. .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
  1957. };
  1958. static const struct net_device_ops mlx4_netdev_ops_master = {
  1959. .ndo_open = mlx4_en_open,
  1960. .ndo_stop = mlx4_en_close,
  1961. .ndo_start_xmit = mlx4_en_xmit,
  1962. .ndo_select_queue = mlx4_en_select_queue,
  1963. .ndo_get_stats = mlx4_en_get_stats,
  1964. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  1965. .ndo_set_mac_address = mlx4_en_set_mac,
  1966. .ndo_validate_addr = eth_validate_addr,
  1967. .ndo_change_mtu = mlx4_en_change_mtu,
  1968. .ndo_tx_timeout = mlx4_en_tx_timeout,
  1969. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  1970. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  1971. .ndo_set_vf_mac = mlx4_en_set_vf_mac,
  1972. .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,
  1973. .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk,
  1974. .ndo_set_vf_link_state = mlx4_en_set_vf_link_state,
  1975. .ndo_get_vf_config = mlx4_en_get_vf_config,
  1976. #ifdef CONFIG_NET_POLL_CONTROLLER
  1977. .ndo_poll_controller = mlx4_en_netpoll,
  1978. #endif
  1979. .ndo_set_features = mlx4_en_set_features,
  1980. .ndo_setup_tc = mlx4_en_setup_tc,
  1981. #ifdef CONFIG_RFS_ACCEL
  1982. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  1983. #endif
  1984. .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
  1985. };
  1986. int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
  1987. struct mlx4_en_port_profile *prof)
  1988. {
  1989. struct net_device *dev;
  1990. struct mlx4_en_priv *priv;
  1991. int i;
  1992. int err;
  1993. u64 mac_u64;
  1994. dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
  1995. MAX_TX_RINGS, MAX_RX_RINGS);
  1996. if (dev == NULL)
  1997. return -ENOMEM;
  1998. netif_set_real_num_tx_queues(dev, prof->tx_ring_num);
  1999. netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
  2000. SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev);
  2001. dev->dev_id = port - 1;
  2002. /*
  2003. * Initialize driver private data
  2004. */
  2005. priv = netdev_priv(dev);
  2006. memset(priv, 0, sizeof(struct mlx4_en_priv));
  2007. priv->dev = dev;
  2008. priv->mdev = mdev;
  2009. priv->ddev = &mdev->pdev->dev;
  2010. priv->prof = prof;
  2011. priv->port = port;
  2012. priv->port_up = false;
  2013. priv->flags = prof->flags;
  2014. priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
  2015. MLX4_WQE_CTRL_SOLICITED);
  2016. priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
  2017. priv->tx_ring_num = prof->tx_ring_num;
  2018. priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring *) * MAX_TX_RINGS,
  2019. GFP_KERNEL);
  2020. if (!priv->tx_ring) {
  2021. err = -ENOMEM;
  2022. goto out;
  2023. }
  2024. priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq *) * MAX_TX_RINGS,
  2025. GFP_KERNEL);
  2026. if (!priv->tx_cq) {
  2027. err = -ENOMEM;
  2028. goto out;
  2029. }
  2030. priv->rx_ring_num = prof->rx_ring_num;
  2031. priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
  2032. priv->mac_index = -1;
  2033. priv->msg_enable = MLX4_EN_MSG_LEVEL;
  2034. spin_lock_init(&priv->stats_lock);
  2035. INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
  2036. INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
  2037. INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
  2038. INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
  2039. INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
  2040. #ifdef CONFIG_MLX4_EN_DCB
  2041. if (!mlx4_is_slave(priv->mdev->dev)) {
  2042. if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_SET_ETH_SCHED) {
  2043. dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
  2044. } else {
  2045. en_info(priv, "enabling only PFC DCB ops\n");
  2046. dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
  2047. }
  2048. }
  2049. #endif
  2050. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
  2051. INIT_HLIST_HEAD(&priv->mac_hash[i]);
  2052. /* Query for default mac and max mtu */
  2053. priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
  2054. /* Set default MAC */
  2055. dev->addr_len = ETH_ALEN;
  2056. mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
  2057. if (!is_valid_ether_addr(dev->dev_addr)) {
  2058. if (mlx4_is_slave(priv->mdev->dev)) {
  2059. eth_hw_addr_random(dev);
  2060. en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr);
  2061. mac_u64 = mlx4_en_mac_to_u64(dev->dev_addr);
  2062. mdev->dev->caps.def_mac[priv->port] = mac_u64;
  2063. } else {
  2064. en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
  2065. priv->port, dev->dev_addr);
  2066. err = -EINVAL;
  2067. goto out;
  2068. }
  2069. }
  2070. memcpy(priv->prev_mac, dev->dev_addr, sizeof(priv->prev_mac));
  2071. priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
  2072. DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
  2073. err = mlx4_en_alloc_resources(priv);
  2074. if (err)
  2075. goto out;
  2076. #ifdef CONFIG_RFS_ACCEL
  2077. INIT_LIST_HEAD(&priv->filters);
  2078. spin_lock_init(&priv->filters_lock);
  2079. #endif
  2080. /* Initialize time stamping config */
  2081. priv->hwtstamp_config.flags = 0;
  2082. priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
  2083. priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
  2084. /* Allocate page for receive rings */
  2085. err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
  2086. MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
  2087. if (err) {
  2088. en_err(priv, "Failed to allocate page for rx qps\n");
  2089. goto out;
  2090. }
  2091. priv->allocated = 1;
  2092. /*
  2093. * Initialize netdev entry points
  2094. */
  2095. if (mlx4_is_master(priv->mdev->dev))
  2096. dev->netdev_ops = &mlx4_netdev_ops_master;
  2097. else
  2098. dev->netdev_ops = &mlx4_netdev_ops;
  2099. dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
  2100. netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
  2101. netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
  2102. SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops);
  2103. /*
  2104. * Set driver features
  2105. */
  2106. dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
  2107. if (mdev->LSO_support)
  2108. dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
  2109. dev->vlan_features = dev->hw_features;
  2110. dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
  2111. dev->features = dev->hw_features | NETIF_F_HIGHDMA |
  2112. NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
  2113. NETIF_F_HW_VLAN_CTAG_FILTER;
  2114. dev->hw_features |= NETIF_F_LOOPBACK;
  2115. if (mdev->dev->caps.steering_mode ==
  2116. MLX4_STEERING_MODE_DEVICE_MANAGED)
  2117. dev->hw_features |= NETIF_F_NTUPLE;
  2118. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
  2119. dev->priv_flags |= IFF_UNICAST_FLT;
  2120. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  2121. dev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
  2122. NETIF_F_TSO | NETIF_F_GSO_UDP_TUNNEL;
  2123. dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL;
  2124. dev->features |= NETIF_F_GSO_UDP_TUNNEL;
  2125. }
  2126. mdev->pndev[port] = dev;
  2127. netif_carrier_off(dev);
  2128. mlx4_en_set_default_moderation(priv);
  2129. err = register_netdev(dev);
  2130. if (err) {
  2131. en_err(priv, "Netdev registration failed for port %d\n", port);
  2132. goto out;
  2133. }
  2134. priv->registered = 1;
  2135. en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
  2136. en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
  2137. mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
  2138. /* Configure port */
  2139. mlx4_en_calc_rx_buf(dev);
  2140. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  2141. priv->rx_skb_size + ETH_FCS_LEN,
  2142. prof->tx_pause, prof->tx_ppp,
  2143. prof->rx_pause, prof->rx_ppp);
  2144. if (err) {
  2145. en_err(priv, "Failed setting port general configurations "
  2146. "for port %d, with error %d\n", priv->port, err);
  2147. goto out;
  2148. }
  2149. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  2150. err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC);
  2151. if (err) {
  2152. en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
  2153. err);
  2154. goto out;
  2155. }
  2156. }
  2157. /* Init port */
  2158. en_warn(priv, "Initializing port\n");
  2159. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  2160. if (err) {
  2161. en_err(priv, "Failed Initializing port\n");
  2162. goto out;
  2163. }
  2164. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  2165. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  2166. queue_delayed_work(mdev->workqueue, &priv->service_task,
  2167. SERVICE_TASK_DELAY);
  2168. return 0;
  2169. out:
  2170. mlx4_en_destroy_netdev(dev);
  2171. return err;
  2172. }