ixgbe_mbx.c 12 KB

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  1. /*******************************************************************************
  2. Intel 10 Gigabit PCI Express Linux driver
  3. Copyright(c) 1999 - 2013 Intel Corporation.
  4. This program is free software; you can redistribute it and/or modify it
  5. under the terms and conditions of the GNU General Public License,
  6. version 2, as published by the Free Software Foundation.
  7. This program is distributed in the hope it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc.,
  13. 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  14. The full GNU General Public License is included in this distribution in
  15. the file called "COPYING".
  16. Contact Information:
  17. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include <linux/pci.h>
  21. #include <linux/delay.h>
  22. #include "ixgbe.h"
  23. #include "ixgbe_mbx.h"
  24. /**
  25. * ixgbe_read_mbx - Reads a message from the mailbox
  26. * @hw: pointer to the HW structure
  27. * @msg: The message buffer
  28. * @size: Length of buffer
  29. * @mbx_id: id of mailbox to read
  30. *
  31. * returns SUCCESS if it successfully read message from buffer
  32. **/
  33. s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
  34. {
  35. struct ixgbe_mbx_info *mbx = &hw->mbx;
  36. s32 ret_val = IXGBE_ERR_MBX;
  37. /* limit read to size of mailbox */
  38. if (size > mbx->size)
  39. size = mbx->size;
  40. if (mbx->ops.read)
  41. ret_val = mbx->ops.read(hw, msg, size, mbx_id);
  42. return ret_val;
  43. }
  44. /**
  45. * ixgbe_write_mbx - Write a message to the mailbox
  46. * @hw: pointer to the HW structure
  47. * @msg: The message buffer
  48. * @size: Length of buffer
  49. * @mbx_id: id of mailbox to write
  50. *
  51. * returns SUCCESS if it successfully copied message into the buffer
  52. **/
  53. s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
  54. {
  55. struct ixgbe_mbx_info *mbx = &hw->mbx;
  56. s32 ret_val = 0;
  57. if (size > mbx->size)
  58. ret_val = IXGBE_ERR_MBX;
  59. else if (mbx->ops.write)
  60. ret_val = mbx->ops.write(hw, msg, size, mbx_id);
  61. return ret_val;
  62. }
  63. /**
  64. * ixgbe_check_for_msg - checks to see if someone sent us mail
  65. * @hw: pointer to the HW structure
  66. * @mbx_id: id of mailbox to check
  67. *
  68. * returns SUCCESS if the Status bit was found or else ERR_MBX
  69. **/
  70. s32 ixgbe_check_for_msg(struct ixgbe_hw *hw, u16 mbx_id)
  71. {
  72. struct ixgbe_mbx_info *mbx = &hw->mbx;
  73. s32 ret_val = IXGBE_ERR_MBX;
  74. if (mbx->ops.check_for_msg)
  75. ret_val = mbx->ops.check_for_msg(hw, mbx_id);
  76. return ret_val;
  77. }
  78. /**
  79. * ixgbe_check_for_ack - checks to see if someone sent us ACK
  80. * @hw: pointer to the HW structure
  81. * @mbx_id: id of mailbox to check
  82. *
  83. * returns SUCCESS if the Status bit was found or else ERR_MBX
  84. **/
  85. s32 ixgbe_check_for_ack(struct ixgbe_hw *hw, u16 mbx_id)
  86. {
  87. struct ixgbe_mbx_info *mbx = &hw->mbx;
  88. s32 ret_val = IXGBE_ERR_MBX;
  89. if (mbx->ops.check_for_ack)
  90. ret_val = mbx->ops.check_for_ack(hw, mbx_id);
  91. return ret_val;
  92. }
  93. /**
  94. * ixgbe_check_for_rst - checks to see if other side has reset
  95. * @hw: pointer to the HW structure
  96. * @mbx_id: id of mailbox to check
  97. *
  98. * returns SUCCESS if the Status bit was found or else ERR_MBX
  99. **/
  100. s32 ixgbe_check_for_rst(struct ixgbe_hw *hw, u16 mbx_id)
  101. {
  102. struct ixgbe_mbx_info *mbx = &hw->mbx;
  103. s32 ret_val = IXGBE_ERR_MBX;
  104. if (mbx->ops.check_for_rst)
  105. ret_val = mbx->ops.check_for_rst(hw, mbx_id);
  106. return ret_val;
  107. }
  108. /**
  109. * ixgbe_poll_for_msg - Wait for message notification
  110. * @hw: pointer to the HW structure
  111. * @mbx_id: id of mailbox to write
  112. *
  113. * returns SUCCESS if it successfully received a message notification
  114. **/
  115. static s32 ixgbe_poll_for_msg(struct ixgbe_hw *hw, u16 mbx_id)
  116. {
  117. struct ixgbe_mbx_info *mbx = &hw->mbx;
  118. int countdown = mbx->timeout;
  119. if (!countdown || !mbx->ops.check_for_msg)
  120. goto out;
  121. while (countdown && mbx->ops.check_for_msg(hw, mbx_id)) {
  122. countdown--;
  123. if (!countdown)
  124. break;
  125. udelay(mbx->usec_delay);
  126. }
  127. out:
  128. return countdown ? 0 : IXGBE_ERR_MBX;
  129. }
  130. /**
  131. * ixgbe_poll_for_ack - Wait for message acknowledgement
  132. * @hw: pointer to the HW structure
  133. * @mbx_id: id of mailbox to write
  134. *
  135. * returns SUCCESS if it successfully received a message acknowledgement
  136. **/
  137. static s32 ixgbe_poll_for_ack(struct ixgbe_hw *hw, u16 mbx_id)
  138. {
  139. struct ixgbe_mbx_info *mbx = &hw->mbx;
  140. int countdown = mbx->timeout;
  141. if (!countdown || !mbx->ops.check_for_ack)
  142. goto out;
  143. while (countdown && mbx->ops.check_for_ack(hw, mbx_id)) {
  144. countdown--;
  145. if (!countdown)
  146. break;
  147. udelay(mbx->usec_delay);
  148. }
  149. out:
  150. return countdown ? 0 : IXGBE_ERR_MBX;
  151. }
  152. /**
  153. * ixgbe_read_posted_mbx - Wait for message notification and receive message
  154. * @hw: pointer to the HW structure
  155. * @msg: The message buffer
  156. * @size: Length of buffer
  157. * @mbx_id: id of mailbox to write
  158. *
  159. * returns SUCCESS if it successfully received a message notification and
  160. * copied it into the receive buffer.
  161. **/
  162. static s32 ixgbe_read_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size,
  163. u16 mbx_id)
  164. {
  165. struct ixgbe_mbx_info *mbx = &hw->mbx;
  166. s32 ret_val = IXGBE_ERR_MBX;
  167. if (!mbx->ops.read)
  168. goto out;
  169. ret_val = ixgbe_poll_for_msg(hw, mbx_id);
  170. /* if ack received read message, otherwise we timed out */
  171. if (!ret_val)
  172. ret_val = mbx->ops.read(hw, msg, size, mbx_id);
  173. out:
  174. return ret_val;
  175. }
  176. /**
  177. * ixgbe_write_posted_mbx - Write a message to the mailbox, wait for ack
  178. * @hw: pointer to the HW structure
  179. * @msg: The message buffer
  180. * @size: Length of buffer
  181. * @mbx_id: id of mailbox to write
  182. *
  183. * returns SUCCESS if it successfully copied message into the buffer and
  184. * received an ack to that message within delay * timeout period
  185. **/
  186. static s32 ixgbe_write_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size,
  187. u16 mbx_id)
  188. {
  189. struct ixgbe_mbx_info *mbx = &hw->mbx;
  190. s32 ret_val = IXGBE_ERR_MBX;
  191. /* exit if either we can't write or there isn't a defined timeout */
  192. if (!mbx->ops.write || !mbx->timeout)
  193. goto out;
  194. /* send msg */
  195. ret_val = mbx->ops.write(hw, msg, size, mbx_id);
  196. /* if msg sent wait until we receive an ack */
  197. if (!ret_val)
  198. ret_val = ixgbe_poll_for_ack(hw, mbx_id);
  199. out:
  200. return ret_val;
  201. }
  202. static s32 ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, u32 mask, s32 index)
  203. {
  204. u32 mbvficr = IXGBE_READ_REG(hw, IXGBE_MBVFICR(index));
  205. s32 ret_val = IXGBE_ERR_MBX;
  206. if (mbvficr & mask) {
  207. ret_val = 0;
  208. IXGBE_WRITE_REG(hw, IXGBE_MBVFICR(index), mask);
  209. }
  210. return ret_val;
  211. }
  212. /**
  213. * ixgbe_check_for_msg_pf - checks to see if the VF has sent mail
  214. * @hw: pointer to the HW structure
  215. * @vf_number: the VF index
  216. *
  217. * returns SUCCESS if the VF has set the Status bit or else ERR_MBX
  218. **/
  219. static s32 ixgbe_check_for_msg_pf(struct ixgbe_hw *hw, u16 vf_number)
  220. {
  221. s32 ret_val = IXGBE_ERR_MBX;
  222. s32 index = IXGBE_MBVFICR_INDEX(vf_number);
  223. u32 vf_bit = vf_number % 16;
  224. if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFREQ_VF1 << vf_bit,
  225. index)) {
  226. ret_val = 0;
  227. hw->mbx.stats.reqs++;
  228. }
  229. return ret_val;
  230. }
  231. /**
  232. * ixgbe_check_for_ack_pf - checks to see if the VF has ACKed
  233. * @hw: pointer to the HW structure
  234. * @vf_number: the VF index
  235. *
  236. * returns SUCCESS if the VF has set the Status bit or else ERR_MBX
  237. **/
  238. static s32 ixgbe_check_for_ack_pf(struct ixgbe_hw *hw, u16 vf_number)
  239. {
  240. s32 ret_val = IXGBE_ERR_MBX;
  241. s32 index = IXGBE_MBVFICR_INDEX(vf_number);
  242. u32 vf_bit = vf_number % 16;
  243. if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFACK_VF1 << vf_bit,
  244. index)) {
  245. ret_val = 0;
  246. hw->mbx.stats.acks++;
  247. }
  248. return ret_val;
  249. }
  250. /**
  251. * ixgbe_check_for_rst_pf - checks to see if the VF has reset
  252. * @hw: pointer to the HW structure
  253. * @vf_number: the VF index
  254. *
  255. * returns SUCCESS if the VF has set the Status bit or else ERR_MBX
  256. **/
  257. static s32 ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_number)
  258. {
  259. u32 reg_offset = (vf_number < 32) ? 0 : 1;
  260. u32 vf_shift = vf_number % 32;
  261. u32 vflre = 0;
  262. s32 ret_val = IXGBE_ERR_MBX;
  263. switch (hw->mac.type) {
  264. case ixgbe_mac_82599EB:
  265. vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset));
  266. break;
  267. case ixgbe_mac_X540:
  268. vflre = IXGBE_READ_REG(hw, IXGBE_VFLREC(reg_offset));
  269. break;
  270. default:
  271. break;
  272. }
  273. if (vflre & (1 << vf_shift)) {
  274. ret_val = 0;
  275. IXGBE_WRITE_REG(hw, IXGBE_VFLREC(reg_offset), (1 << vf_shift));
  276. hw->mbx.stats.rsts++;
  277. }
  278. return ret_val;
  279. }
  280. /**
  281. * ixgbe_obtain_mbx_lock_pf - obtain mailbox lock
  282. * @hw: pointer to the HW structure
  283. * @vf_number: the VF index
  284. *
  285. * return SUCCESS if we obtained the mailbox lock
  286. **/
  287. static s32 ixgbe_obtain_mbx_lock_pf(struct ixgbe_hw *hw, u16 vf_number)
  288. {
  289. s32 ret_val = IXGBE_ERR_MBX;
  290. u32 p2v_mailbox;
  291. /* Take ownership of the buffer */
  292. IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_PFU);
  293. /* reserve mailbox for vf use */
  294. p2v_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_number));
  295. if (p2v_mailbox & IXGBE_PFMAILBOX_PFU)
  296. ret_val = 0;
  297. return ret_val;
  298. }
  299. /**
  300. * ixgbe_write_mbx_pf - Places a message in the mailbox
  301. * @hw: pointer to the HW structure
  302. * @msg: The message buffer
  303. * @size: Length of buffer
  304. * @vf_number: the VF index
  305. *
  306. * returns SUCCESS if it successfully copied message into the buffer
  307. **/
  308. static s32 ixgbe_write_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,
  309. u16 vf_number)
  310. {
  311. s32 ret_val;
  312. u16 i;
  313. /* lock the mailbox to prevent pf/vf race condition */
  314. ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_number);
  315. if (ret_val)
  316. goto out_no_write;
  317. /* flush msg and acks as we are overwriting the message buffer */
  318. ixgbe_check_for_msg_pf(hw, vf_number);
  319. ixgbe_check_for_ack_pf(hw, vf_number);
  320. /* copy the caller specified message to the mailbox memory buffer */
  321. for (i = 0; i < size; i++)
  322. IXGBE_WRITE_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_number), i, msg[i]);
  323. /* Interrupt VF to tell it a message has been sent and release buffer*/
  324. IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_STS);
  325. /* update stats */
  326. hw->mbx.stats.msgs_tx++;
  327. out_no_write:
  328. return ret_val;
  329. }
  330. /**
  331. * ixgbe_read_mbx_pf - Read a message from the mailbox
  332. * @hw: pointer to the HW structure
  333. * @msg: The message buffer
  334. * @size: Length of buffer
  335. * @vf_number: the VF index
  336. *
  337. * This function copies a message from the mailbox buffer to the caller's
  338. * memory buffer. The presumption is that the caller knows that there was
  339. * a message due to a VF request so no polling for message is needed.
  340. **/
  341. static s32 ixgbe_read_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,
  342. u16 vf_number)
  343. {
  344. s32 ret_val;
  345. u16 i;
  346. /* lock the mailbox to prevent pf/vf race condition */
  347. ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_number);
  348. if (ret_val)
  349. goto out_no_read;
  350. /* copy the message to the mailbox memory buffer */
  351. for (i = 0; i < size; i++)
  352. msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_number), i);
  353. /* Acknowledge the message and release buffer */
  354. IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_ACK);
  355. /* update stats */
  356. hw->mbx.stats.msgs_rx++;
  357. out_no_read:
  358. return ret_val;
  359. }
  360. #ifdef CONFIG_PCI_IOV
  361. /**
  362. * ixgbe_init_mbx_params_pf - set initial values for pf mailbox
  363. * @hw: pointer to the HW structure
  364. *
  365. * Initializes the hw->mbx struct to correct values for pf mailbox
  366. */
  367. void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw)
  368. {
  369. struct ixgbe_mbx_info *mbx = &hw->mbx;
  370. if (hw->mac.type != ixgbe_mac_82599EB &&
  371. hw->mac.type != ixgbe_mac_X540)
  372. return;
  373. mbx->timeout = 0;
  374. mbx->usec_delay = 0;
  375. mbx->stats.msgs_tx = 0;
  376. mbx->stats.msgs_rx = 0;
  377. mbx->stats.reqs = 0;
  378. mbx->stats.acks = 0;
  379. mbx->stats.rsts = 0;
  380. mbx->size = IXGBE_VFMAILBOX_SIZE;
  381. }
  382. #endif /* CONFIG_PCI_IOV */
  383. struct ixgbe_mbx_operations mbx_ops_generic = {
  384. .read = ixgbe_read_mbx_pf,
  385. .write = ixgbe_write_mbx_pf,
  386. .read_posted = ixgbe_read_posted_mbx,
  387. .write_posted = ixgbe_write_posted_mbx,
  388. .check_for_msg = ixgbe_check_for_msg_pf,
  389. .check_for_ack = ixgbe_check_for_ack_pf,
  390. .check_for_rst = ixgbe_check_for_rst_pf,
  391. };