i40e_lan_hmc.c 30 KB

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  1. /*******************************************************************************
  2. *
  3. * Intel Ethernet Controller XL710 Family Linux Driver
  4. * Copyright(c) 2013 - 2014 Intel Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along
  16. * with this program. If not, see <http://www.gnu.org/licenses/>.
  17. *
  18. * The full GNU General Public License is included in this distribution in
  19. * the file called "COPYING".
  20. *
  21. * Contact Information:
  22. * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  23. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24. *
  25. ******************************************************************************/
  26. #include "i40e_osdep.h"
  27. #include "i40e_register.h"
  28. #include "i40e_type.h"
  29. #include "i40e_hmc.h"
  30. #include "i40e_lan_hmc.h"
  31. #include "i40e_prototype.h"
  32. /* lan specific interface functions */
  33. /**
  34. * i40e_align_l2obj_base - aligns base object pointer to 512 bytes
  35. * @offset: base address offset needing alignment
  36. *
  37. * Aligns the layer 2 function private memory so it's 512-byte aligned.
  38. **/
  39. static u64 i40e_align_l2obj_base(u64 offset)
  40. {
  41. u64 aligned_offset = offset;
  42. if ((offset % I40E_HMC_L2OBJ_BASE_ALIGNMENT) > 0)
  43. aligned_offset += (I40E_HMC_L2OBJ_BASE_ALIGNMENT -
  44. (offset % I40E_HMC_L2OBJ_BASE_ALIGNMENT));
  45. return aligned_offset;
  46. }
  47. /**
  48. * i40e_calculate_l2fpm_size - calculates layer 2 FPM memory size
  49. * @txq_num: number of Tx queues needing backing context
  50. * @rxq_num: number of Rx queues needing backing context
  51. * @fcoe_cntx_num: amount of FCoE statefull contexts needing backing context
  52. * @fcoe_filt_num: number of FCoE filters needing backing context
  53. *
  54. * Calculates the maximum amount of memory for the function required, based
  55. * on the number of resources it must provide context for.
  56. **/
  57. static u64 i40e_calculate_l2fpm_size(u32 txq_num, u32 rxq_num,
  58. u32 fcoe_cntx_num, u32 fcoe_filt_num)
  59. {
  60. u64 fpm_size = 0;
  61. fpm_size = txq_num * I40E_HMC_OBJ_SIZE_TXQ;
  62. fpm_size = i40e_align_l2obj_base(fpm_size);
  63. fpm_size += (rxq_num * I40E_HMC_OBJ_SIZE_RXQ);
  64. fpm_size = i40e_align_l2obj_base(fpm_size);
  65. fpm_size += (fcoe_cntx_num * I40E_HMC_OBJ_SIZE_FCOE_CNTX);
  66. fpm_size = i40e_align_l2obj_base(fpm_size);
  67. fpm_size += (fcoe_filt_num * I40E_HMC_OBJ_SIZE_FCOE_FILT);
  68. fpm_size = i40e_align_l2obj_base(fpm_size);
  69. return fpm_size;
  70. }
  71. /**
  72. * i40e_init_lan_hmc - initialize i40e_hmc_info struct
  73. * @hw: pointer to the HW structure
  74. * @txq_num: number of Tx queues needing backing context
  75. * @rxq_num: number of Rx queues needing backing context
  76. * @fcoe_cntx_num: amount of FCoE statefull contexts needing backing context
  77. * @fcoe_filt_num: number of FCoE filters needing backing context
  78. *
  79. * This function will be called once per physical function initialization.
  80. * It will fill out the i40e_hmc_obj_info structure for LAN objects based on
  81. * the driver's provided input, as well as information from the HMC itself
  82. * loaded from NVRAM.
  83. *
  84. * Assumptions:
  85. * - HMC Resource Profile has been selected before calling this function.
  86. **/
  87. i40e_status i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num,
  88. u32 rxq_num, u32 fcoe_cntx_num,
  89. u32 fcoe_filt_num)
  90. {
  91. struct i40e_hmc_obj_info *obj, *full_obj;
  92. i40e_status ret_code = 0;
  93. u64 l2fpm_size;
  94. u32 size_exp;
  95. hw->hmc.signature = I40E_HMC_INFO_SIGNATURE;
  96. hw->hmc.hmc_fn_id = hw->pf_id;
  97. /* allocate memory for hmc_obj */
  98. ret_code = i40e_allocate_virt_mem(hw, &hw->hmc.hmc_obj_virt_mem,
  99. sizeof(struct i40e_hmc_obj_info) * I40E_HMC_LAN_MAX);
  100. if (ret_code)
  101. goto init_lan_hmc_out;
  102. hw->hmc.hmc_obj = (struct i40e_hmc_obj_info *)
  103. hw->hmc.hmc_obj_virt_mem.va;
  104. /* The full object will be used to create the LAN HMC SD */
  105. full_obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_FULL];
  106. full_obj->max_cnt = 0;
  107. full_obj->cnt = 0;
  108. full_obj->base = 0;
  109. full_obj->size = 0;
  110. /* Tx queue context information */
  111. obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_TX];
  112. obj->max_cnt = rd32(hw, I40E_GLHMC_LANQMAX);
  113. obj->cnt = txq_num;
  114. obj->base = 0;
  115. size_exp = rd32(hw, I40E_GLHMC_LANTXOBJSZ);
  116. obj->size = (u64)1 << size_exp;
  117. /* validate values requested by driver don't exceed HMC capacity */
  118. if (txq_num > obj->max_cnt) {
  119. ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
  120. hw_dbg(hw, "i40e_init_lan_hmc: Tx context: asks for 0x%x but max allowed is 0x%x, returns error %d\n",
  121. txq_num, obj->max_cnt, ret_code);
  122. goto init_lan_hmc_out;
  123. }
  124. /* aggregate values into the full LAN object for later */
  125. full_obj->max_cnt += obj->max_cnt;
  126. full_obj->cnt += obj->cnt;
  127. /* Rx queue context information */
  128. obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_RX];
  129. obj->max_cnt = rd32(hw, I40E_GLHMC_LANQMAX);
  130. obj->cnt = rxq_num;
  131. obj->base = hw->hmc.hmc_obj[I40E_HMC_LAN_TX].base +
  132. (hw->hmc.hmc_obj[I40E_HMC_LAN_TX].cnt *
  133. hw->hmc.hmc_obj[I40E_HMC_LAN_TX].size);
  134. obj->base = i40e_align_l2obj_base(obj->base);
  135. size_exp = rd32(hw, I40E_GLHMC_LANRXOBJSZ);
  136. obj->size = (u64)1 << size_exp;
  137. /* validate values requested by driver don't exceed HMC capacity */
  138. if (rxq_num > obj->max_cnt) {
  139. ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
  140. hw_dbg(hw, "i40e_init_lan_hmc: Rx context: asks for 0x%x but max allowed is 0x%x, returns error %d\n",
  141. rxq_num, obj->max_cnt, ret_code);
  142. goto init_lan_hmc_out;
  143. }
  144. /* aggregate values into the full LAN object for later */
  145. full_obj->max_cnt += obj->max_cnt;
  146. full_obj->cnt += obj->cnt;
  147. /* FCoE context information */
  148. obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX];
  149. obj->max_cnt = rd32(hw, I40E_GLHMC_FCOEMAX);
  150. obj->cnt = fcoe_cntx_num;
  151. obj->base = hw->hmc.hmc_obj[I40E_HMC_LAN_RX].base +
  152. (hw->hmc.hmc_obj[I40E_HMC_LAN_RX].cnt *
  153. hw->hmc.hmc_obj[I40E_HMC_LAN_RX].size);
  154. obj->base = i40e_align_l2obj_base(obj->base);
  155. size_exp = rd32(hw, I40E_GLHMC_FCOEDDPOBJSZ);
  156. obj->size = (u64)1 << size_exp;
  157. /* validate values requested by driver don't exceed HMC capacity */
  158. if (fcoe_cntx_num > obj->max_cnt) {
  159. ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
  160. hw_dbg(hw, "i40e_init_lan_hmc: FCoE context: asks for 0x%x but max allowed is 0x%x, returns error %d\n",
  161. fcoe_cntx_num, obj->max_cnt, ret_code);
  162. goto init_lan_hmc_out;
  163. }
  164. /* aggregate values into the full LAN object for later */
  165. full_obj->max_cnt += obj->max_cnt;
  166. full_obj->cnt += obj->cnt;
  167. /* FCoE filter information */
  168. obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_FILT];
  169. obj->max_cnt = rd32(hw, I40E_GLHMC_FCOEFMAX);
  170. obj->cnt = fcoe_filt_num;
  171. obj->base = hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].base +
  172. (hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].cnt *
  173. hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].size);
  174. obj->base = i40e_align_l2obj_base(obj->base);
  175. size_exp = rd32(hw, I40E_GLHMC_FCOEFOBJSZ);
  176. obj->size = (u64)1 << size_exp;
  177. /* validate values requested by driver don't exceed HMC capacity */
  178. if (fcoe_filt_num > obj->max_cnt) {
  179. ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
  180. hw_dbg(hw, "i40e_init_lan_hmc: FCoE filter: asks for 0x%x but max allowed is 0x%x, returns error %d\n",
  181. fcoe_filt_num, obj->max_cnt, ret_code);
  182. goto init_lan_hmc_out;
  183. }
  184. /* aggregate values into the full LAN object for later */
  185. full_obj->max_cnt += obj->max_cnt;
  186. full_obj->cnt += obj->cnt;
  187. hw->hmc.first_sd_index = 0;
  188. hw->hmc.sd_table.ref_cnt = 0;
  189. l2fpm_size = i40e_calculate_l2fpm_size(txq_num, rxq_num, fcoe_cntx_num,
  190. fcoe_filt_num);
  191. if (NULL == hw->hmc.sd_table.sd_entry) {
  192. hw->hmc.sd_table.sd_cnt = (u32)
  193. (l2fpm_size + I40E_HMC_DIRECT_BP_SIZE - 1) /
  194. I40E_HMC_DIRECT_BP_SIZE;
  195. /* allocate the sd_entry members in the sd_table */
  196. ret_code = i40e_allocate_virt_mem(hw, &hw->hmc.sd_table.addr,
  197. (sizeof(struct i40e_hmc_sd_entry) *
  198. hw->hmc.sd_table.sd_cnt));
  199. if (ret_code)
  200. goto init_lan_hmc_out;
  201. hw->hmc.sd_table.sd_entry =
  202. (struct i40e_hmc_sd_entry *)hw->hmc.sd_table.addr.va;
  203. }
  204. /* store in the LAN full object for later */
  205. full_obj->size = l2fpm_size;
  206. init_lan_hmc_out:
  207. return ret_code;
  208. }
  209. /**
  210. * i40e_remove_pd_page - Remove a page from the page descriptor table
  211. * @hw: pointer to the HW structure
  212. * @hmc_info: pointer to the HMC configuration information structure
  213. * @idx: segment descriptor index to find the relevant page descriptor
  214. *
  215. * This function:
  216. * 1. Marks the entry in pd table (for paged address mode) invalid
  217. * 2. write to register PMPDINV to invalidate the backing page in FV cache
  218. * 3. Decrement the ref count for pd_entry
  219. * assumptions:
  220. * 1. caller can deallocate the memory used by pd after this function
  221. * returns.
  222. **/
  223. static i40e_status i40e_remove_pd_page(struct i40e_hw *hw,
  224. struct i40e_hmc_info *hmc_info,
  225. u32 idx)
  226. {
  227. i40e_status ret_code = 0;
  228. if (!i40e_prep_remove_pd_page(hmc_info, idx))
  229. ret_code = i40e_remove_pd_page_new(hw, hmc_info, idx, true);
  230. return ret_code;
  231. }
  232. /**
  233. * i40e_remove_sd_bp - remove a backing page from a segment descriptor
  234. * @hw: pointer to our HW structure
  235. * @hmc_info: pointer to the HMC configuration information structure
  236. * @idx: the page index
  237. *
  238. * This function:
  239. * 1. Marks the entry in sd table (for direct address mode) invalid
  240. * 2. write to register PMSDCMD, PMSDDATALOW(PMSDDATALOW.PMSDVALID set
  241. * to 0) and PMSDDATAHIGH to invalidate the sd page
  242. * 3. Decrement the ref count for the sd_entry
  243. * assumptions:
  244. * 1. caller can deallocate the memory used by backing storage after this
  245. * function returns.
  246. **/
  247. static i40e_status i40e_remove_sd_bp(struct i40e_hw *hw,
  248. struct i40e_hmc_info *hmc_info,
  249. u32 idx)
  250. {
  251. i40e_status ret_code = 0;
  252. if (!i40e_prep_remove_sd_bp(hmc_info, idx))
  253. ret_code = i40e_remove_sd_bp_new(hw, hmc_info, idx, true);
  254. return ret_code;
  255. }
  256. /**
  257. * i40e_create_lan_hmc_object - allocate backing store for hmc objects
  258. * @hw: pointer to the HW structure
  259. * @info: pointer to i40e_hmc_create_obj_info struct
  260. *
  261. * This will allocate memory for PDs and backing pages and populate
  262. * the sd and pd entries.
  263. **/
  264. static i40e_status i40e_create_lan_hmc_object(struct i40e_hw *hw,
  265. struct i40e_hmc_lan_create_obj_info *info)
  266. {
  267. i40e_status ret_code = 0;
  268. struct i40e_hmc_sd_entry *sd_entry;
  269. u32 pd_idx1 = 0, pd_lmt1 = 0;
  270. u32 pd_idx = 0, pd_lmt = 0;
  271. bool pd_error = false;
  272. u32 sd_idx, sd_lmt;
  273. u64 sd_size;
  274. u32 i, j;
  275. if (NULL == info) {
  276. ret_code = I40E_ERR_BAD_PTR;
  277. hw_dbg(hw, "i40e_create_lan_hmc_object: bad info ptr\n");
  278. goto exit;
  279. }
  280. if (NULL == info->hmc_info) {
  281. ret_code = I40E_ERR_BAD_PTR;
  282. hw_dbg(hw, "i40e_create_lan_hmc_object: bad hmc_info ptr\n");
  283. goto exit;
  284. }
  285. if (I40E_HMC_INFO_SIGNATURE != info->hmc_info->signature) {
  286. ret_code = I40E_ERR_BAD_PTR;
  287. hw_dbg(hw, "i40e_create_lan_hmc_object: bad signature\n");
  288. goto exit;
  289. }
  290. if (info->start_idx >= info->hmc_info->hmc_obj[info->rsrc_type].cnt) {
  291. ret_code = I40E_ERR_INVALID_HMC_OBJ_INDEX;
  292. hw_dbg(hw, "i40e_create_lan_hmc_object: returns error %d\n",
  293. ret_code);
  294. goto exit;
  295. }
  296. if ((info->start_idx + info->count) >
  297. info->hmc_info->hmc_obj[info->rsrc_type].cnt) {
  298. ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
  299. hw_dbg(hw, "i40e_create_lan_hmc_object: returns error %d\n",
  300. ret_code);
  301. goto exit;
  302. }
  303. /* find sd index and limit */
  304. I40E_FIND_SD_INDEX_LIMIT(info->hmc_info, info->rsrc_type,
  305. info->start_idx, info->count,
  306. &sd_idx, &sd_lmt);
  307. if (sd_idx >= info->hmc_info->sd_table.sd_cnt ||
  308. sd_lmt > info->hmc_info->sd_table.sd_cnt) {
  309. ret_code = I40E_ERR_INVALID_SD_INDEX;
  310. goto exit;
  311. }
  312. /* find pd index */
  313. I40E_FIND_PD_INDEX_LIMIT(info->hmc_info, info->rsrc_type,
  314. info->start_idx, info->count, &pd_idx,
  315. &pd_lmt);
  316. /* This is to cover for cases where you may not want to have an SD with
  317. * the full 2M memory but something smaller. By not filling out any
  318. * size, the function will default the SD size to be 2M.
  319. */
  320. if (info->direct_mode_sz == 0)
  321. sd_size = I40E_HMC_DIRECT_BP_SIZE;
  322. else
  323. sd_size = info->direct_mode_sz;
  324. /* check if all the sds are valid. If not, allocate a page and
  325. * initialize it.
  326. */
  327. for (j = sd_idx; j < sd_lmt; j++) {
  328. /* update the sd table entry */
  329. ret_code = i40e_add_sd_table_entry(hw, info->hmc_info, j,
  330. info->entry_type,
  331. sd_size);
  332. if (ret_code)
  333. goto exit_sd_error;
  334. sd_entry = &info->hmc_info->sd_table.sd_entry[j];
  335. if (I40E_SD_TYPE_PAGED == sd_entry->entry_type) {
  336. /* check if all the pds in this sd are valid. If not,
  337. * allocate a page and initialize it.
  338. */
  339. /* find pd_idx and pd_lmt in this sd */
  340. pd_idx1 = max(pd_idx, (j * I40E_HMC_MAX_BP_COUNT));
  341. pd_lmt1 = min(pd_lmt,
  342. ((j + 1) * I40E_HMC_MAX_BP_COUNT));
  343. for (i = pd_idx1; i < pd_lmt1; i++) {
  344. /* update the pd table entry */
  345. ret_code = i40e_add_pd_table_entry(hw,
  346. info->hmc_info,
  347. i);
  348. if (ret_code) {
  349. pd_error = true;
  350. break;
  351. }
  352. }
  353. if (pd_error) {
  354. /* remove the backing pages from pd_idx1 to i */
  355. while (i && (i > pd_idx1)) {
  356. i40e_remove_pd_bp(hw, info->hmc_info,
  357. (i - 1), true);
  358. i--;
  359. }
  360. }
  361. }
  362. if (!sd_entry->valid) {
  363. sd_entry->valid = true;
  364. switch (sd_entry->entry_type) {
  365. case I40E_SD_TYPE_PAGED:
  366. I40E_SET_PF_SD_ENTRY(hw,
  367. sd_entry->u.pd_table.pd_page_addr.pa,
  368. j, sd_entry->entry_type);
  369. break;
  370. case I40E_SD_TYPE_DIRECT:
  371. I40E_SET_PF_SD_ENTRY(hw, sd_entry->u.bp.addr.pa,
  372. j, sd_entry->entry_type);
  373. break;
  374. default:
  375. ret_code = I40E_ERR_INVALID_SD_TYPE;
  376. goto exit;
  377. break;
  378. }
  379. }
  380. }
  381. goto exit;
  382. exit_sd_error:
  383. /* cleanup for sd entries from j to sd_idx */
  384. while (j && (j > sd_idx)) {
  385. sd_entry = &info->hmc_info->sd_table.sd_entry[j - 1];
  386. switch (sd_entry->entry_type) {
  387. case I40E_SD_TYPE_PAGED:
  388. pd_idx1 = max(pd_idx,
  389. ((j - 1) * I40E_HMC_MAX_BP_COUNT));
  390. pd_lmt1 = min(pd_lmt, (j * I40E_HMC_MAX_BP_COUNT));
  391. for (i = pd_idx1; i < pd_lmt1; i++) {
  392. i40e_remove_pd_bp(
  393. hw,
  394. info->hmc_info,
  395. i,
  396. true);
  397. }
  398. i40e_remove_pd_page(hw, info->hmc_info, (j - 1));
  399. break;
  400. case I40E_SD_TYPE_DIRECT:
  401. i40e_remove_sd_bp(hw, info->hmc_info, (j - 1));
  402. break;
  403. default:
  404. ret_code = I40E_ERR_INVALID_SD_TYPE;
  405. break;
  406. }
  407. j--;
  408. }
  409. exit:
  410. return ret_code;
  411. }
  412. /**
  413. * i40e_configure_lan_hmc - prepare the HMC backing store
  414. * @hw: pointer to the hw structure
  415. * @model: the model for the layout of the SD/PD tables
  416. *
  417. * - This function will be called once per physical function initialization.
  418. * - This function will be called after i40e_init_lan_hmc() and before
  419. * any LAN/FCoE HMC objects can be created.
  420. **/
  421. i40e_status i40e_configure_lan_hmc(struct i40e_hw *hw,
  422. enum i40e_hmc_model model)
  423. {
  424. struct i40e_hmc_lan_create_obj_info info;
  425. i40e_status ret_code = 0;
  426. u8 hmc_fn_id = hw->hmc.hmc_fn_id;
  427. struct i40e_hmc_obj_info *obj;
  428. /* Initialize part of the create object info struct */
  429. info.hmc_info = &hw->hmc;
  430. info.rsrc_type = I40E_HMC_LAN_FULL;
  431. info.start_idx = 0;
  432. info.direct_mode_sz = hw->hmc.hmc_obj[I40E_HMC_LAN_FULL].size;
  433. /* Build the SD entry for the LAN objects */
  434. switch (model) {
  435. case I40E_HMC_MODEL_DIRECT_PREFERRED:
  436. case I40E_HMC_MODEL_DIRECT_ONLY:
  437. info.entry_type = I40E_SD_TYPE_DIRECT;
  438. /* Make one big object, a single SD */
  439. info.count = 1;
  440. ret_code = i40e_create_lan_hmc_object(hw, &info);
  441. if (ret_code && (model == I40E_HMC_MODEL_DIRECT_PREFERRED))
  442. goto try_type_paged;
  443. else if (ret_code)
  444. goto configure_lan_hmc_out;
  445. /* else clause falls through the break */
  446. break;
  447. case I40E_HMC_MODEL_PAGED_ONLY:
  448. try_type_paged:
  449. info.entry_type = I40E_SD_TYPE_PAGED;
  450. /* Make one big object in the PD table */
  451. info.count = 1;
  452. ret_code = i40e_create_lan_hmc_object(hw, &info);
  453. if (ret_code)
  454. goto configure_lan_hmc_out;
  455. break;
  456. default:
  457. /* unsupported type */
  458. ret_code = I40E_ERR_INVALID_SD_TYPE;
  459. hw_dbg(hw, "i40e_configure_lan_hmc: Unknown SD type: %d\n",
  460. ret_code);
  461. goto configure_lan_hmc_out;
  462. break;
  463. }
  464. /* Configure and program the FPM registers so objects can be created */
  465. /* Tx contexts */
  466. obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_TX];
  467. wr32(hw, I40E_GLHMC_LANTXBASE(hmc_fn_id),
  468. (u32)((obj->base & I40E_GLHMC_LANTXBASE_FPMLANTXBASE_MASK) / 512));
  469. wr32(hw, I40E_GLHMC_LANTXCNT(hmc_fn_id), obj->cnt);
  470. /* Rx contexts */
  471. obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_RX];
  472. wr32(hw, I40E_GLHMC_LANRXBASE(hmc_fn_id),
  473. (u32)((obj->base & I40E_GLHMC_LANRXBASE_FPMLANRXBASE_MASK) / 512));
  474. wr32(hw, I40E_GLHMC_LANRXCNT(hmc_fn_id), obj->cnt);
  475. /* FCoE contexts */
  476. obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX];
  477. wr32(hw, I40E_GLHMC_FCOEDDPBASE(hmc_fn_id),
  478. (u32)((obj->base & I40E_GLHMC_FCOEDDPBASE_FPMFCOEDDPBASE_MASK) / 512));
  479. wr32(hw, I40E_GLHMC_FCOEDDPCNT(hmc_fn_id), obj->cnt);
  480. /* FCoE filters */
  481. obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_FILT];
  482. wr32(hw, I40E_GLHMC_FCOEFBASE(hmc_fn_id),
  483. (u32)((obj->base & I40E_GLHMC_FCOEFBASE_FPMFCOEFBASE_MASK) / 512));
  484. wr32(hw, I40E_GLHMC_FCOEFCNT(hmc_fn_id), obj->cnt);
  485. configure_lan_hmc_out:
  486. return ret_code;
  487. }
  488. /**
  489. * i40e_delete_hmc_object - remove hmc objects
  490. * @hw: pointer to the HW structure
  491. * @info: pointer to i40e_hmc_delete_obj_info struct
  492. *
  493. * This will de-populate the SDs and PDs. It frees
  494. * the memory for PDS and backing storage. After this function is returned,
  495. * caller should deallocate memory allocated previously for
  496. * book-keeping information about PDs and backing storage.
  497. **/
  498. static i40e_status i40e_delete_lan_hmc_object(struct i40e_hw *hw,
  499. struct i40e_hmc_lan_delete_obj_info *info)
  500. {
  501. i40e_status ret_code = 0;
  502. struct i40e_hmc_pd_table *pd_table;
  503. u32 pd_idx, pd_lmt, rel_pd_idx;
  504. u32 sd_idx, sd_lmt;
  505. u32 i, j;
  506. if (NULL == info) {
  507. ret_code = I40E_ERR_BAD_PTR;
  508. hw_dbg(hw, "i40e_delete_hmc_object: bad info ptr\n");
  509. goto exit;
  510. }
  511. if (NULL == info->hmc_info) {
  512. ret_code = I40E_ERR_BAD_PTR;
  513. hw_dbg(hw, "i40e_delete_hmc_object: bad info->hmc_info ptr\n");
  514. goto exit;
  515. }
  516. if (I40E_HMC_INFO_SIGNATURE != info->hmc_info->signature) {
  517. ret_code = I40E_ERR_BAD_PTR;
  518. hw_dbg(hw, "i40e_delete_hmc_object: bad hmc_info->signature\n");
  519. goto exit;
  520. }
  521. if (NULL == info->hmc_info->sd_table.sd_entry) {
  522. ret_code = I40E_ERR_BAD_PTR;
  523. hw_dbg(hw, "i40e_delete_hmc_object: bad sd_entry\n");
  524. goto exit;
  525. }
  526. if (NULL == info->hmc_info->hmc_obj) {
  527. ret_code = I40E_ERR_BAD_PTR;
  528. hw_dbg(hw, "i40e_delete_hmc_object: bad hmc_info->hmc_obj\n");
  529. goto exit;
  530. }
  531. if (info->start_idx >= info->hmc_info->hmc_obj[info->rsrc_type].cnt) {
  532. ret_code = I40E_ERR_INVALID_HMC_OBJ_INDEX;
  533. hw_dbg(hw, "i40e_delete_hmc_object: returns error %d\n",
  534. ret_code);
  535. goto exit;
  536. }
  537. if ((info->start_idx + info->count) >
  538. info->hmc_info->hmc_obj[info->rsrc_type].cnt) {
  539. ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
  540. hw_dbg(hw, "i40e_delete_hmc_object: returns error %d\n",
  541. ret_code);
  542. goto exit;
  543. }
  544. I40E_FIND_PD_INDEX_LIMIT(info->hmc_info, info->rsrc_type,
  545. info->start_idx, info->count, &pd_idx,
  546. &pd_lmt);
  547. for (j = pd_idx; j < pd_lmt; j++) {
  548. sd_idx = j / I40E_HMC_PD_CNT_IN_SD;
  549. if (I40E_SD_TYPE_PAGED !=
  550. info->hmc_info->sd_table.sd_entry[sd_idx].entry_type)
  551. continue;
  552. rel_pd_idx = j % I40E_HMC_PD_CNT_IN_SD;
  553. pd_table =
  554. &info->hmc_info->sd_table.sd_entry[sd_idx].u.pd_table;
  555. if (pd_table->pd_entry[rel_pd_idx].valid) {
  556. ret_code = i40e_remove_pd_bp(hw, info->hmc_info,
  557. j, true);
  558. if (ret_code)
  559. goto exit;
  560. }
  561. }
  562. /* find sd index and limit */
  563. I40E_FIND_SD_INDEX_LIMIT(info->hmc_info, info->rsrc_type,
  564. info->start_idx, info->count,
  565. &sd_idx, &sd_lmt);
  566. if (sd_idx >= info->hmc_info->sd_table.sd_cnt ||
  567. sd_lmt > info->hmc_info->sd_table.sd_cnt) {
  568. ret_code = I40E_ERR_INVALID_SD_INDEX;
  569. goto exit;
  570. }
  571. for (i = sd_idx; i < sd_lmt; i++) {
  572. if (!info->hmc_info->sd_table.sd_entry[i].valid)
  573. continue;
  574. switch (info->hmc_info->sd_table.sd_entry[i].entry_type) {
  575. case I40E_SD_TYPE_DIRECT:
  576. ret_code = i40e_remove_sd_bp(hw, info->hmc_info, i);
  577. if (ret_code)
  578. goto exit;
  579. break;
  580. case I40E_SD_TYPE_PAGED:
  581. ret_code = i40e_remove_pd_page(hw, info->hmc_info, i);
  582. if (ret_code)
  583. goto exit;
  584. break;
  585. default:
  586. break;
  587. }
  588. }
  589. exit:
  590. return ret_code;
  591. }
  592. /**
  593. * i40e_shutdown_lan_hmc - Remove HMC backing store, free allocated memory
  594. * @hw: pointer to the hw structure
  595. *
  596. * This must be called by drivers as they are shutting down and being
  597. * removed from the OS.
  598. **/
  599. i40e_status i40e_shutdown_lan_hmc(struct i40e_hw *hw)
  600. {
  601. struct i40e_hmc_lan_delete_obj_info info;
  602. i40e_status ret_code;
  603. info.hmc_info = &hw->hmc;
  604. info.rsrc_type = I40E_HMC_LAN_FULL;
  605. info.start_idx = 0;
  606. info.count = 1;
  607. /* delete the object */
  608. ret_code = i40e_delete_lan_hmc_object(hw, &info);
  609. /* free the SD table entry for LAN */
  610. i40e_free_virt_mem(hw, &hw->hmc.sd_table.addr);
  611. hw->hmc.sd_table.sd_cnt = 0;
  612. hw->hmc.sd_table.sd_entry = NULL;
  613. /* free memory used for hmc_obj */
  614. i40e_free_virt_mem(hw, &hw->hmc.hmc_obj_virt_mem);
  615. hw->hmc.hmc_obj = NULL;
  616. return ret_code;
  617. }
  618. #define I40E_HMC_STORE(_struct, _ele) \
  619. offsetof(struct _struct, _ele), \
  620. FIELD_SIZEOF(struct _struct, _ele)
  621. struct i40e_context_ele {
  622. u16 offset;
  623. u16 size_of;
  624. u16 width;
  625. u16 lsb;
  626. };
  627. /* LAN Tx Queue Context */
  628. static struct i40e_context_ele i40e_hmc_txq_ce_info[] = {
  629. /* Field Width LSB */
  630. {I40E_HMC_STORE(i40e_hmc_obj_txq, head), 13, 0 },
  631. {I40E_HMC_STORE(i40e_hmc_obj_txq, new_context), 1, 30 },
  632. {I40E_HMC_STORE(i40e_hmc_obj_txq, base), 57, 32 },
  633. {I40E_HMC_STORE(i40e_hmc_obj_txq, fc_ena), 1, 89 },
  634. {I40E_HMC_STORE(i40e_hmc_obj_txq, timesync_ena), 1, 90 },
  635. {I40E_HMC_STORE(i40e_hmc_obj_txq, fd_ena), 1, 91 },
  636. {I40E_HMC_STORE(i40e_hmc_obj_txq, alt_vlan_ena), 1, 92 },
  637. {I40E_HMC_STORE(i40e_hmc_obj_txq, cpuid), 8, 96 },
  638. /* line 1 */
  639. {I40E_HMC_STORE(i40e_hmc_obj_txq, thead_wb), 13, 0 + 128 },
  640. {I40E_HMC_STORE(i40e_hmc_obj_txq, head_wb_ena), 1, 32 + 128 },
  641. {I40E_HMC_STORE(i40e_hmc_obj_txq, qlen), 13, 33 + 128 },
  642. {I40E_HMC_STORE(i40e_hmc_obj_txq, tphrdesc_ena), 1, 46 + 128 },
  643. {I40E_HMC_STORE(i40e_hmc_obj_txq, tphrpacket_ena), 1, 47 + 128 },
  644. {I40E_HMC_STORE(i40e_hmc_obj_txq, tphwdesc_ena), 1, 48 + 128 },
  645. {I40E_HMC_STORE(i40e_hmc_obj_txq, head_wb_addr), 64, 64 + 128 },
  646. /* line 7 */
  647. {I40E_HMC_STORE(i40e_hmc_obj_txq, crc), 32, 0 + (7 * 128) },
  648. {I40E_HMC_STORE(i40e_hmc_obj_txq, rdylist), 10, 84 + (7 * 128) },
  649. {I40E_HMC_STORE(i40e_hmc_obj_txq, rdylist_act), 1, 94 + (7 * 128) },
  650. { 0 }
  651. };
  652. /* LAN Rx Queue Context */
  653. static struct i40e_context_ele i40e_hmc_rxq_ce_info[] = {
  654. /* Field Width LSB */
  655. { I40E_HMC_STORE(i40e_hmc_obj_rxq, head), 13, 0 },
  656. { I40E_HMC_STORE(i40e_hmc_obj_rxq, cpuid), 8, 13 },
  657. { I40E_HMC_STORE(i40e_hmc_obj_rxq, base), 57, 32 },
  658. { I40E_HMC_STORE(i40e_hmc_obj_rxq, qlen), 13, 89 },
  659. { I40E_HMC_STORE(i40e_hmc_obj_rxq, dbuff), 7, 102 },
  660. { I40E_HMC_STORE(i40e_hmc_obj_rxq, hbuff), 5, 109 },
  661. { I40E_HMC_STORE(i40e_hmc_obj_rxq, dtype), 2, 114 },
  662. { I40E_HMC_STORE(i40e_hmc_obj_rxq, dsize), 1, 116 },
  663. { I40E_HMC_STORE(i40e_hmc_obj_rxq, crcstrip), 1, 117 },
  664. { I40E_HMC_STORE(i40e_hmc_obj_rxq, fc_ena), 1, 118 },
  665. { I40E_HMC_STORE(i40e_hmc_obj_rxq, l2tsel), 1, 119 },
  666. { I40E_HMC_STORE(i40e_hmc_obj_rxq, hsplit_0), 4, 120 },
  667. { I40E_HMC_STORE(i40e_hmc_obj_rxq, hsplit_1), 2, 124 },
  668. { I40E_HMC_STORE(i40e_hmc_obj_rxq, showiv), 1, 127 },
  669. { I40E_HMC_STORE(i40e_hmc_obj_rxq, rxmax), 14, 174 },
  670. { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphrdesc_ena), 1, 193 },
  671. { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphwdesc_ena), 1, 194 },
  672. { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphdata_ena), 1, 195 },
  673. { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphhead_ena), 1, 196 },
  674. { I40E_HMC_STORE(i40e_hmc_obj_rxq, lrxqthresh), 3, 198 },
  675. { 0 }
  676. };
  677. /**
  678. * i40e_clear_hmc_context - zero out the HMC context bits
  679. * @hw: the hardware struct
  680. * @context_bytes: pointer to the context bit array (DMA memory)
  681. * @hmc_type: the type of HMC resource
  682. **/
  683. static i40e_status i40e_clear_hmc_context(struct i40e_hw *hw,
  684. u8 *context_bytes,
  685. enum i40e_hmc_lan_rsrc_type hmc_type)
  686. {
  687. /* clean the bit array */
  688. memset(context_bytes, 0, (u32)hw->hmc.hmc_obj[hmc_type].size);
  689. return 0;
  690. }
  691. /**
  692. * i40e_set_hmc_context - replace HMC context bits
  693. * @context_bytes: pointer to the context bit array
  694. * @ce_info: a description of the struct to be filled
  695. * @dest: the struct to be filled
  696. **/
  697. static i40e_status i40e_set_hmc_context(u8 *context_bytes,
  698. struct i40e_context_ele *ce_info,
  699. u8 *dest)
  700. {
  701. u16 shift_width;
  702. u64 bitfield;
  703. u8 hi_byte;
  704. u8 hi_mask;
  705. u64 t_bits;
  706. u64 mask;
  707. u8 *p;
  708. int f;
  709. for (f = 0; ce_info[f].width != 0; f++) {
  710. /* clear out the field */
  711. bitfield = 0;
  712. /* copy from the next struct field */
  713. p = dest + ce_info[f].offset;
  714. switch (ce_info[f].size_of) {
  715. case 1:
  716. bitfield = *p;
  717. break;
  718. case 2:
  719. bitfield = cpu_to_le16(*(u16 *)p);
  720. break;
  721. case 4:
  722. bitfield = cpu_to_le32(*(u32 *)p);
  723. break;
  724. case 8:
  725. bitfield = cpu_to_le64(*(u64 *)p);
  726. break;
  727. }
  728. /* prepare the bits and mask */
  729. shift_width = ce_info[f].lsb % 8;
  730. mask = ((u64)1 << ce_info[f].width) - 1;
  731. /* save upper bytes for special case */
  732. hi_mask = (u8)((mask >> 56) & 0xff);
  733. hi_byte = (u8)((bitfield >> 56) & 0xff);
  734. /* shift to correct alignment */
  735. mask <<= shift_width;
  736. bitfield <<= shift_width;
  737. /* get the current bits from the target bit string */
  738. p = context_bytes + (ce_info[f].lsb / 8);
  739. memcpy(&t_bits, p, sizeof(u64));
  740. t_bits &= ~mask; /* get the bits not changing */
  741. t_bits |= bitfield; /* add in the new bits */
  742. /* put it all back */
  743. memcpy(p, &t_bits, sizeof(u64));
  744. /* deal with the special case if needed
  745. * example: 62 bit field that starts in bit 5 of first byte
  746. * will overlap 3 bits into byte 9
  747. */
  748. if ((shift_width + ce_info[f].width) > 64) {
  749. u8 byte;
  750. hi_mask >>= (8 - shift_width);
  751. hi_byte >>= (8 - shift_width);
  752. byte = p[8] & ~hi_mask; /* get the bits not changing */
  753. byte |= hi_byte; /* add in the new bits */
  754. p[8] = byte; /* put it back */
  755. }
  756. }
  757. return 0;
  758. }
  759. /**
  760. * i40e_hmc_get_object_va - retrieves an object's virtual address
  761. * @hmc_info: pointer to i40e_hmc_info struct
  762. * @object_base: pointer to u64 to get the va
  763. * @rsrc_type: the hmc resource type
  764. * @obj_idx: hmc object index
  765. *
  766. * This function retrieves the object's virtual address from the object
  767. * base pointer. This function is used for LAN Queue contexts.
  768. **/
  769. static
  770. i40e_status i40e_hmc_get_object_va(struct i40e_hmc_info *hmc_info,
  771. u8 **object_base,
  772. enum i40e_hmc_lan_rsrc_type rsrc_type,
  773. u32 obj_idx)
  774. {
  775. u32 obj_offset_in_sd, obj_offset_in_pd;
  776. i40e_status ret_code = 0;
  777. struct i40e_hmc_sd_entry *sd_entry;
  778. struct i40e_hmc_pd_entry *pd_entry;
  779. u32 pd_idx, pd_lmt, rel_pd_idx;
  780. u64 obj_offset_in_fpm;
  781. u32 sd_idx, sd_lmt;
  782. if (NULL == hmc_info) {
  783. ret_code = I40E_ERR_BAD_PTR;
  784. hw_dbg(hw, "i40e_hmc_get_object_va: bad hmc_info ptr\n");
  785. goto exit;
  786. }
  787. if (NULL == hmc_info->hmc_obj) {
  788. ret_code = I40E_ERR_BAD_PTR;
  789. hw_dbg(hw, "i40e_hmc_get_object_va: bad hmc_info->hmc_obj ptr\n");
  790. goto exit;
  791. }
  792. if (NULL == object_base) {
  793. ret_code = I40E_ERR_BAD_PTR;
  794. hw_dbg(hw, "i40e_hmc_get_object_va: bad object_base ptr\n");
  795. goto exit;
  796. }
  797. if (I40E_HMC_INFO_SIGNATURE != hmc_info->signature) {
  798. ret_code = I40E_ERR_BAD_PTR;
  799. hw_dbg(hw, "i40e_hmc_get_object_va: bad hmc_info->signature\n");
  800. goto exit;
  801. }
  802. if (obj_idx >= hmc_info->hmc_obj[rsrc_type].cnt) {
  803. hw_dbg(hw, "i40e_hmc_get_object_va: returns error %d\n",
  804. ret_code);
  805. ret_code = I40E_ERR_INVALID_HMC_OBJ_INDEX;
  806. goto exit;
  807. }
  808. /* find sd index and limit */
  809. I40E_FIND_SD_INDEX_LIMIT(hmc_info, rsrc_type, obj_idx, 1,
  810. &sd_idx, &sd_lmt);
  811. sd_entry = &hmc_info->sd_table.sd_entry[sd_idx];
  812. obj_offset_in_fpm = hmc_info->hmc_obj[rsrc_type].base +
  813. hmc_info->hmc_obj[rsrc_type].size * obj_idx;
  814. if (I40E_SD_TYPE_PAGED == sd_entry->entry_type) {
  815. I40E_FIND_PD_INDEX_LIMIT(hmc_info, rsrc_type, obj_idx, 1,
  816. &pd_idx, &pd_lmt);
  817. rel_pd_idx = pd_idx % I40E_HMC_PD_CNT_IN_SD;
  818. pd_entry = &sd_entry->u.pd_table.pd_entry[rel_pd_idx];
  819. obj_offset_in_pd = (u32)(obj_offset_in_fpm %
  820. I40E_HMC_PAGED_BP_SIZE);
  821. *object_base = (u8 *)pd_entry->bp.addr.va + obj_offset_in_pd;
  822. } else {
  823. obj_offset_in_sd = (u32)(obj_offset_in_fpm %
  824. I40E_HMC_DIRECT_BP_SIZE);
  825. *object_base = (u8 *)sd_entry->u.bp.addr.va + obj_offset_in_sd;
  826. }
  827. exit:
  828. return ret_code;
  829. }
  830. /**
  831. * i40e_clear_lan_tx_queue_context - clear the HMC context for the queue
  832. * @hw: the hardware struct
  833. * @queue: the queue we care about
  834. **/
  835. i40e_status i40e_clear_lan_tx_queue_context(struct i40e_hw *hw,
  836. u16 queue)
  837. {
  838. i40e_status err;
  839. u8 *context_bytes;
  840. err = i40e_hmc_get_object_va(&hw->hmc, &context_bytes,
  841. I40E_HMC_LAN_TX, queue);
  842. if (err < 0)
  843. return err;
  844. return i40e_clear_hmc_context(hw, context_bytes, I40E_HMC_LAN_TX);
  845. }
  846. /**
  847. * i40e_set_lan_tx_queue_context - set the HMC context for the queue
  848. * @hw: the hardware struct
  849. * @queue: the queue we care about
  850. * @s: the struct to be filled
  851. **/
  852. i40e_status i40e_set_lan_tx_queue_context(struct i40e_hw *hw,
  853. u16 queue,
  854. struct i40e_hmc_obj_txq *s)
  855. {
  856. i40e_status err;
  857. u8 *context_bytes;
  858. err = i40e_hmc_get_object_va(&hw->hmc, &context_bytes,
  859. I40E_HMC_LAN_TX, queue);
  860. if (err < 0)
  861. return err;
  862. return i40e_set_hmc_context(context_bytes,
  863. i40e_hmc_txq_ce_info, (u8 *)s);
  864. }
  865. /**
  866. * i40e_clear_lan_rx_queue_context - clear the HMC context for the queue
  867. * @hw: the hardware struct
  868. * @queue: the queue we care about
  869. **/
  870. i40e_status i40e_clear_lan_rx_queue_context(struct i40e_hw *hw,
  871. u16 queue)
  872. {
  873. i40e_status err;
  874. u8 *context_bytes;
  875. err = i40e_hmc_get_object_va(&hw->hmc, &context_bytes,
  876. I40E_HMC_LAN_RX, queue);
  877. if (err < 0)
  878. return err;
  879. return i40e_clear_hmc_context(hw, context_bytes, I40E_HMC_LAN_RX);
  880. }
  881. /**
  882. * i40e_set_lan_rx_queue_context - set the HMC context for the queue
  883. * @hw: the hardware struct
  884. * @queue: the queue we care about
  885. * @s: the struct to be filled
  886. **/
  887. i40e_status i40e_set_lan_rx_queue_context(struct i40e_hw *hw,
  888. u16 queue,
  889. struct i40e_hmc_obj_rxq *s)
  890. {
  891. i40e_status err;
  892. u8 *context_bytes;
  893. err = i40e_hmc_get_object_va(&hw->hmc, &context_bytes,
  894. I40E_HMC_LAN_RX, queue);
  895. if (err < 0)
  896. return err;
  897. return i40e_set_hmc_context(context_bytes,
  898. i40e_hmc_rxq_ce_info, (u8 *)s);
  899. }