i40e_common.c 67 KB

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  1. /*******************************************************************************
  2. *
  3. * Intel Ethernet Controller XL710 Family Linux Driver
  4. * Copyright(c) 2013 - 2014 Intel Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along
  16. * with this program. If not, see <http://www.gnu.org/licenses/>.
  17. *
  18. * The full GNU General Public License is included in this distribution in
  19. * the file called "COPYING".
  20. *
  21. * Contact Information:
  22. * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  23. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24. *
  25. ******************************************************************************/
  26. #include "i40e_type.h"
  27. #include "i40e_adminq.h"
  28. #include "i40e_prototype.h"
  29. #include "i40e_virtchnl.h"
  30. /**
  31. * i40e_set_mac_type - Sets MAC type
  32. * @hw: pointer to the HW structure
  33. *
  34. * This function sets the mac type of the adapter based on the
  35. * vendor ID and device ID stored in the hw structure.
  36. **/
  37. static i40e_status i40e_set_mac_type(struct i40e_hw *hw)
  38. {
  39. i40e_status status = 0;
  40. if (hw->vendor_id == PCI_VENDOR_ID_INTEL) {
  41. switch (hw->device_id) {
  42. case I40E_DEV_ID_SFP_XL710:
  43. case I40E_DEV_ID_SFP_X710:
  44. case I40E_DEV_ID_QEMU:
  45. case I40E_DEV_ID_KX_A:
  46. case I40E_DEV_ID_KX_B:
  47. case I40E_DEV_ID_KX_C:
  48. case I40E_DEV_ID_KX_D:
  49. case I40E_DEV_ID_QSFP_A:
  50. case I40E_DEV_ID_QSFP_B:
  51. case I40E_DEV_ID_QSFP_C:
  52. hw->mac.type = I40E_MAC_XL710;
  53. break;
  54. case I40E_DEV_ID_VF:
  55. case I40E_DEV_ID_VF_HV:
  56. hw->mac.type = I40E_MAC_VF;
  57. break;
  58. default:
  59. hw->mac.type = I40E_MAC_GENERIC;
  60. break;
  61. }
  62. } else {
  63. status = I40E_ERR_DEVICE_NOT_SUPPORTED;
  64. }
  65. hw_dbg(hw, "i40e_set_mac_type found mac: %d, returns: %d\n",
  66. hw->mac.type, status);
  67. return status;
  68. }
  69. /**
  70. * i40e_debug_aq
  71. * @hw: debug mask related to admin queue
  72. * @mask: debug mask
  73. * @desc: pointer to admin queue descriptor
  74. * @buffer: pointer to command buffer
  75. *
  76. * Dumps debug log about adminq command with descriptor contents.
  77. **/
  78. void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,
  79. void *buffer)
  80. {
  81. struct i40e_aq_desc *aq_desc = (struct i40e_aq_desc *)desc;
  82. u8 *aq_buffer = (u8 *)buffer;
  83. u32 data[4];
  84. u32 i = 0;
  85. if ((!(mask & hw->debug_mask)) || (desc == NULL))
  86. return;
  87. i40e_debug(hw, mask,
  88. "AQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
  89. aq_desc->opcode, aq_desc->flags, aq_desc->datalen,
  90. aq_desc->retval);
  91. i40e_debug(hw, mask, "\tcookie (h,l) 0x%08X 0x%08X\n",
  92. aq_desc->cookie_high, aq_desc->cookie_low);
  93. i40e_debug(hw, mask, "\tparam (0,1) 0x%08X 0x%08X\n",
  94. aq_desc->params.internal.param0,
  95. aq_desc->params.internal.param1);
  96. i40e_debug(hw, mask, "\taddr (h,l) 0x%08X 0x%08X\n",
  97. aq_desc->params.external.addr_high,
  98. aq_desc->params.external.addr_low);
  99. if ((buffer != NULL) && (aq_desc->datalen != 0)) {
  100. memset(data, 0, sizeof(data));
  101. i40e_debug(hw, mask, "AQ CMD Buffer:\n");
  102. for (i = 0; i < le16_to_cpu(aq_desc->datalen); i++) {
  103. data[((i % 16) / 4)] |=
  104. ((u32)aq_buffer[i]) << (8 * (i % 4));
  105. if ((i % 16) == 15) {
  106. i40e_debug(hw, mask,
  107. "\t0x%04X %08X %08X %08X %08X\n",
  108. i - 15, data[0], data[1], data[2],
  109. data[3]);
  110. memset(data, 0, sizeof(data));
  111. }
  112. }
  113. if ((i % 16) != 0)
  114. i40e_debug(hw, mask, "\t0x%04X %08X %08X %08X %08X\n",
  115. i - (i % 16), data[0], data[1], data[2],
  116. data[3]);
  117. }
  118. }
  119. /**
  120. * i40e_check_asq_alive
  121. * @hw: pointer to the hw struct
  122. *
  123. * Returns true if Queue is enabled else false.
  124. **/
  125. bool i40e_check_asq_alive(struct i40e_hw *hw)
  126. {
  127. return !!(rd32(hw, hw->aq.asq.len) & I40E_PF_ATQLEN_ATQENABLE_MASK);
  128. }
  129. /**
  130. * i40e_aq_queue_shutdown
  131. * @hw: pointer to the hw struct
  132. * @unloading: is the driver unloading itself
  133. *
  134. * Tell the Firmware that we're shutting down the AdminQ and whether
  135. * or not the driver is unloading as well.
  136. **/
  137. i40e_status i40e_aq_queue_shutdown(struct i40e_hw *hw,
  138. bool unloading)
  139. {
  140. struct i40e_aq_desc desc;
  141. struct i40e_aqc_queue_shutdown *cmd =
  142. (struct i40e_aqc_queue_shutdown *)&desc.params.raw;
  143. i40e_status status;
  144. i40e_fill_default_direct_cmd_desc(&desc,
  145. i40e_aqc_opc_queue_shutdown);
  146. if (unloading)
  147. cmd->driver_unloading = cpu_to_le32(I40E_AQ_DRIVER_UNLOADING);
  148. status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);
  149. return status;
  150. }
  151. /**
  152. * i40e_init_shared_code - Initialize the shared code
  153. * @hw: pointer to hardware structure
  154. *
  155. * This assigns the MAC type and PHY code and inits the NVM.
  156. * Does not touch the hardware. This function must be called prior to any
  157. * other function in the shared code. The i40e_hw structure should be
  158. * memset to 0 prior to calling this function. The following fields in
  159. * hw structure should be filled in prior to calling this function:
  160. * hw_addr, back, device_id, vendor_id, subsystem_device_id,
  161. * subsystem_vendor_id, and revision_id
  162. **/
  163. i40e_status i40e_init_shared_code(struct i40e_hw *hw)
  164. {
  165. i40e_status status = 0;
  166. u32 reg;
  167. i40e_set_mac_type(hw);
  168. switch (hw->mac.type) {
  169. case I40E_MAC_XL710:
  170. break;
  171. default:
  172. return I40E_ERR_DEVICE_NOT_SUPPORTED;
  173. break;
  174. }
  175. hw->phy.get_link_info = true;
  176. /* Determine port number */
  177. reg = rd32(hw, I40E_PFGEN_PORTNUM);
  178. reg = ((reg & I40E_PFGEN_PORTNUM_PORT_NUM_MASK) >>
  179. I40E_PFGEN_PORTNUM_PORT_NUM_SHIFT);
  180. hw->port = (u8)reg;
  181. /* Determine the PF number based on the PCI fn */
  182. reg = rd32(hw, I40E_GLPCI_CAPSUP);
  183. if (reg & I40E_GLPCI_CAPSUP_ARI_EN_MASK)
  184. hw->pf_id = (u8)((hw->bus.device << 3) | hw->bus.func);
  185. else
  186. hw->pf_id = (u8)hw->bus.func;
  187. status = i40e_init_nvm(hw);
  188. return status;
  189. }
  190. /**
  191. * i40e_aq_mac_address_read - Retrieve the MAC addresses
  192. * @hw: pointer to the hw struct
  193. * @flags: a return indicator of what addresses were added to the addr store
  194. * @addrs: the requestor's mac addr store
  195. * @cmd_details: pointer to command details structure or NULL
  196. **/
  197. static i40e_status i40e_aq_mac_address_read(struct i40e_hw *hw,
  198. u16 *flags,
  199. struct i40e_aqc_mac_address_read_data *addrs,
  200. struct i40e_asq_cmd_details *cmd_details)
  201. {
  202. struct i40e_aq_desc desc;
  203. struct i40e_aqc_mac_address_read *cmd_data =
  204. (struct i40e_aqc_mac_address_read *)&desc.params.raw;
  205. i40e_status status;
  206. i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_mac_address_read);
  207. desc.flags |= cpu_to_le16(I40E_AQ_FLAG_BUF);
  208. status = i40e_asq_send_command(hw, &desc, addrs,
  209. sizeof(*addrs), cmd_details);
  210. *flags = le16_to_cpu(cmd_data->command_flags);
  211. return status;
  212. }
  213. /**
  214. * i40e_aq_mac_address_write - Change the MAC addresses
  215. * @hw: pointer to the hw struct
  216. * @flags: indicates which MAC to be written
  217. * @mac_addr: address to write
  218. * @cmd_details: pointer to command details structure or NULL
  219. **/
  220. i40e_status i40e_aq_mac_address_write(struct i40e_hw *hw,
  221. u16 flags, u8 *mac_addr,
  222. struct i40e_asq_cmd_details *cmd_details)
  223. {
  224. struct i40e_aq_desc desc;
  225. struct i40e_aqc_mac_address_write *cmd_data =
  226. (struct i40e_aqc_mac_address_write *)&desc.params.raw;
  227. i40e_status status;
  228. i40e_fill_default_direct_cmd_desc(&desc,
  229. i40e_aqc_opc_mac_address_write);
  230. cmd_data->command_flags = cpu_to_le16(flags);
  231. cmd_data->mac_sah = cpu_to_le16((u16)mac_addr[0] << 8 | mac_addr[1]);
  232. cmd_data->mac_sal = cpu_to_le32(((u32)mac_addr[2] << 24) |
  233. ((u32)mac_addr[3] << 16) |
  234. ((u32)mac_addr[4] << 8) |
  235. mac_addr[5]);
  236. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  237. return status;
  238. }
  239. /**
  240. * i40e_get_mac_addr - get MAC address
  241. * @hw: pointer to the HW structure
  242. * @mac_addr: pointer to MAC address
  243. *
  244. * Reads the adapter's MAC address from register
  245. **/
  246. i40e_status i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr)
  247. {
  248. struct i40e_aqc_mac_address_read_data addrs;
  249. i40e_status status;
  250. u16 flags = 0;
  251. status = i40e_aq_mac_address_read(hw, &flags, &addrs, NULL);
  252. if (flags & I40E_AQC_LAN_ADDR_VALID)
  253. memcpy(mac_addr, &addrs.pf_lan_mac, sizeof(addrs.pf_lan_mac));
  254. return status;
  255. }
  256. /**
  257. * i40e_get_media_type - Gets media type
  258. * @hw: pointer to the hardware structure
  259. **/
  260. static enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw)
  261. {
  262. enum i40e_media_type media;
  263. switch (hw->phy.link_info.phy_type) {
  264. case I40E_PHY_TYPE_10GBASE_SR:
  265. case I40E_PHY_TYPE_10GBASE_LR:
  266. case I40E_PHY_TYPE_40GBASE_SR4:
  267. case I40E_PHY_TYPE_40GBASE_LR4:
  268. media = I40E_MEDIA_TYPE_FIBER;
  269. break;
  270. case I40E_PHY_TYPE_100BASE_TX:
  271. case I40E_PHY_TYPE_1000BASE_T:
  272. case I40E_PHY_TYPE_10GBASE_T:
  273. media = I40E_MEDIA_TYPE_BASET;
  274. break;
  275. case I40E_PHY_TYPE_10GBASE_CR1_CU:
  276. case I40E_PHY_TYPE_40GBASE_CR4_CU:
  277. case I40E_PHY_TYPE_10GBASE_CR1:
  278. case I40E_PHY_TYPE_40GBASE_CR4:
  279. case I40E_PHY_TYPE_10GBASE_SFPP_CU:
  280. media = I40E_MEDIA_TYPE_DA;
  281. break;
  282. case I40E_PHY_TYPE_1000BASE_KX:
  283. case I40E_PHY_TYPE_10GBASE_KX4:
  284. case I40E_PHY_TYPE_10GBASE_KR:
  285. case I40E_PHY_TYPE_40GBASE_KR4:
  286. media = I40E_MEDIA_TYPE_BACKPLANE;
  287. break;
  288. case I40E_PHY_TYPE_SGMII:
  289. case I40E_PHY_TYPE_XAUI:
  290. case I40E_PHY_TYPE_XFI:
  291. case I40E_PHY_TYPE_XLAUI:
  292. case I40E_PHY_TYPE_XLPPI:
  293. default:
  294. media = I40E_MEDIA_TYPE_UNKNOWN;
  295. break;
  296. }
  297. return media;
  298. }
  299. #define I40E_PF_RESET_WAIT_COUNT_A0 200
  300. #define I40E_PF_RESET_WAIT_COUNT 10
  301. /**
  302. * i40e_pf_reset - Reset the PF
  303. * @hw: pointer to the hardware structure
  304. *
  305. * Assuming someone else has triggered a global reset,
  306. * assure the global reset is complete and then reset the PF
  307. **/
  308. i40e_status i40e_pf_reset(struct i40e_hw *hw)
  309. {
  310. u32 cnt = 0;
  311. u32 cnt1 = 0;
  312. u32 reg = 0;
  313. u32 grst_del;
  314. /* Poll for Global Reset steady state in case of recent GRST.
  315. * The grst delay value is in 100ms units, and we'll wait a
  316. * couple counts longer to be sure we don't just miss the end.
  317. */
  318. grst_del = rd32(hw, I40E_GLGEN_RSTCTL) & I40E_GLGEN_RSTCTL_GRSTDEL_MASK
  319. >> I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT;
  320. for (cnt = 0; cnt < grst_del + 2; cnt++) {
  321. reg = rd32(hw, I40E_GLGEN_RSTAT);
  322. if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK))
  323. break;
  324. msleep(100);
  325. }
  326. if (reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK) {
  327. hw_dbg(hw, "Global reset polling failed to complete.\n");
  328. return I40E_ERR_RESET_FAILED;
  329. }
  330. /* Now Wait for the FW to be ready */
  331. for (cnt1 = 0; cnt1 < I40E_PF_RESET_WAIT_COUNT; cnt1++) {
  332. reg = rd32(hw, I40E_GLNVM_ULD);
  333. reg &= (I40E_GLNVM_ULD_CONF_CORE_DONE_MASK |
  334. I40E_GLNVM_ULD_CONF_GLOBAL_DONE_MASK);
  335. if (reg == (I40E_GLNVM_ULD_CONF_CORE_DONE_MASK |
  336. I40E_GLNVM_ULD_CONF_GLOBAL_DONE_MASK)) {
  337. hw_dbg(hw, "Core and Global modules ready %d\n", cnt1);
  338. break;
  339. }
  340. usleep_range(10000, 20000);
  341. }
  342. if (!(reg & (I40E_GLNVM_ULD_CONF_CORE_DONE_MASK |
  343. I40E_GLNVM_ULD_CONF_GLOBAL_DONE_MASK))) {
  344. hw_dbg(hw, "wait for FW Reset complete timedout\n");
  345. hw_dbg(hw, "I40E_GLNVM_ULD = 0x%x\n", reg);
  346. return I40E_ERR_RESET_FAILED;
  347. }
  348. /* If there was a Global Reset in progress when we got here,
  349. * we don't need to do the PF Reset
  350. */
  351. if (!cnt) {
  352. if (hw->revision_id == 0)
  353. cnt = I40E_PF_RESET_WAIT_COUNT_A0;
  354. else
  355. cnt = I40E_PF_RESET_WAIT_COUNT;
  356. reg = rd32(hw, I40E_PFGEN_CTRL);
  357. wr32(hw, I40E_PFGEN_CTRL,
  358. (reg | I40E_PFGEN_CTRL_PFSWR_MASK));
  359. for (; cnt; cnt--) {
  360. reg = rd32(hw, I40E_PFGEN_CTRL);
  361. if (!(reg & I40E_PFGEN_CTRL_PFSWR_MASK))
  362. break;
  363. usleep_range(1000, 2000);
  364. }
  365. if (reg & I40E_PFGEN_CTRL_PFSWR_MASK) {
  366. hw_dbg(hw, "PF reset polling failed to complete.\n");
  367. return I40E_ERR_RESET_FAILED;
  368. }
  369. }
  370. i40e_clear_pxe_mode(hw);
  371. return 0;
  372. }
  373. /**
  374. * i40e_clear_pxe_mode - clear pxe operations mode
  375. * @hw: pointer to the hw struct
  376. *
  377. * Make sure all PXE mode settings are cleared, including things
  378. * like descriptor fetch/write-back mode.
  379. **/
  380. void i40e_clear_pxe_mode(struct i40e_hw *hw)
  381. {
  382. u32 reg;
  383. /* Clear single descriptor fetch/write-back mode */
  384. reg = rd32(hw, I40E_GLLAN_RCTL_0);
  385. if (hw->revision_id == 0) {
  386. /* As a work around clear PXE_MODE instead of setting it */
  387. wr32(hw, I40E_GLLAN_RCTL_0, (reg & (~I40E_GLLAN_RCTL_0_PXE_MODE_MASK)));
  388. } else {
  389. wr32(hw, I40E_GLLAN_RCTL_0, (reg | I40E_GLLAN_RCTL_0_PXE_MODE_MASK));
  390. }
  391. }
  392. /**
  393. * i40e_led_is_mine - helper to find matching led
  394. * @hw: pointer to the hw struct
  395. * @idx: index into GPIO registers
  396. *
  397. * returns: 0 if no match, otherwise the value of the GPIO_CTL register
  398. */
  399. static u32 i40e_led_is_mine(struct i40e_hw *hw, int idx)
  400. {
  401. u32 gpio_val = 0;
  402. u32 port;
  403. if (!hw->func_caps.led[idx])
  404. return 0;
  405. gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(idx));
  406. port = (gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK) >>
  407. I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT;
  408. /* if PRT_NUM_NA is 1 then this LED is not port specific, OR
  409. * if it is not our port then ignore
  410. */
  411. if ((gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_NA_MASK) ||
  412. (port != hw->port))
  413. return 0;
  414. return gpio_val;
  415. }
  416. #define I40E_LED0 22
  417. #define I40E_LINK_ACTIVITY 0xC
  418. /**
  419. * i40e_led_get - return current on/off mode
  420. * @hw: pointer to the hw struct
  421. *
  422. * The value returned is the 'mode' field as defined in the
  423. * GPIO register definitions: 0x0 = off, 0xf = on, and other
  424. * values are variations of possible behaviors relating to
  425. * blink, link, and wire.
  426. **/
  427. u32 i40e_led_get(struct i40e_hw *hw)
  428. {
  429. u32 mode = 0;
  430. int i;
  431. /* as per the documentation GPIO 22-29 are the LED
  432. * GPIO pins named LED0..LED7
  433. */
  434. for (i = I40E_LED0; i <= I40E_GLGEN_GPIO_CTL_MAX_INDEX; i++) {
  435. u32 gpio_val = i40e_led_is_mine(hw, i);
  436. if (!gpio_val)
  437. continue;
  438. mode = (gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK) >>
  439. I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT;
  440. break;
  441. }
  442. return mode;
  443. }
  444. /**
  445. * i40e_led_set - set new on/off mode
  446. * @hw: pointer to the hw struct
  447. * @mode: 0=off, 0xf=on (else see manual for mode details)
  448. * @blink: true if the LED should blink when on, false if steady
  449. *
  450. * if this function is used to turn on the blink it should
  451. * be used to disable the blink when restoring the original state.
  452. **/
  453. void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink)
  454. {
  455. int i;
  456. if (mode & 0xfffffff0)
  457. hw_dbg(hw, "invalid mode passed in %X\n", mode);
  458. /* as per the documentation GPIO 22-29 are the LED
  459. * GPIO pins named LED0..LED7
  460. */
  461. for (i = I40E_LED0; i <= I40E_GLGEN_GPIO_CTL_MAX_INDEX; i++) {
  462. u32 gpio_val = i40e_led_is_mine(hw, i);
  463. if (!gpio_val)
  464. continue;
  465. gpio_val &= ~I40E_GLGEN_GPIO_CTL_LED_MODE_MASK;
  466. /* this & is a bit of paranoia, but serves as a range check */
  467. gpio_val |= ((mode << I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT) &
  468. I40E_GLGEN_GPIO_CTL_LED_MODE_MASK);
  469. if (mode == I40E_LINK_ACTIVITY)
  470. blink = false;
  471. gpio_val |= (blink ? 1 : 0) <<
  472. I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT;
  473. wr32(hw, I40E_GLGEN_GPIO_CTL(i), gpio_val);
  474. break;
  475. }
  476. }
  477. /* Admin command wrappers */
  478. /**
  479. * i40e_aq_set_link_restart_an
  480. * @hw: pointer to the hw struct
  481. * @cmd_details: pointer to command details structure or NULL
  482. *
  483. * Sets up the link and restarts the Auto-Negotiation over the link.
  484. **/
  485. i40e_status i40e_aq_set_link_restart_an(struct i40e_hw *hw,
  486. struct i40e_asq_cmd_details *cmd_details)
  487. {
  488. struct i40e_aq_desc desc;
  489. struct i40e_aqc_set_link_restart_an *cmd =
  490. (struct i40e_aqc_set_link_restart_an *)&desc.params.raw;
  491. i40e_status status;
  492. i40e_fill_default_direct_cmd_desc(&desc,
  493. i40e_aqc_opc_set_link_restart_an);
  494. cmd->command = I40E_AQ_PHY_RESTART_AN;
  495. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  496. return status;
  497. }
  498. /**
  499. * i40e_aq_get_link_info
  500. * @hw: pointer to the hw struct
  501. * @enable_lse: enable/disable LinkStatusEvent reporting
  502. * @link: pointer to link status structure - optional
  503. * @cmd_details: pointer to command details structure or NULL
  504. *
  505. * Returns the link status of the adapter.
  506. **/
  507. i40e_status i40e_aq_get_link_info(struct i40e_hw *hw,
  508. bool enable_lse, struct i40e_link_status *link,
  509. struct i40e_asq_cmd_details *cmd_details)
  510. {
  511. struct i40e_aq_desc desc;
  512. struct i40e_aqc_get_link_status *resp =
  513. (struct i40e_aqc_get_link_status *)&desc.params.raw;
  514. struct i40e_link_status *hw_link_info = &hw->phy.link_info;
  515. i40e_status status;
  516. u16 command_flags;
  517. i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_link_status);
  518. if (enable_lse)
  519. command_flags = I40E_AQ_LSE_ENABLE;
  520. else
  521. command_flags = I40E_AQ_LSE_DISABLE;
  522. resp->command_flags = cpu_to_le16(command_flags);
  523. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  524. if (status)
  525. goto aq_get_link_info_exit;
  526. /* save off old link status information */
  527. hw->phy.link_info_old = *hw_link_info;
  528. /* update link status */
  529. hw_link_info->phy_type = (enum i40e_aq_phy_type)resp->phy_type;
  530. hw->phy.media_type = i40e_get_media_type(hw);
  531. hw_link_info->link_speed = (enum i40e_aq_link_speed)resp->link_speed;
  532. hw_link_info->link_info = resp->link_info;
  533. hw_link_info->an_info = resp->an_info;
  534. hw_link_info->ext_info = resp->ext_info;
  535. hw_link_info->loopback = resp->loopback;
  536. if (resp->command_flags & cpu_to_le16(I40E_AQ_LSE_ENABLE))
  537. hw_link_info->lse_enable = true;
  538. else
  539. hw_link_info->lse_enable = false;
  540. /* save link status information */
  541. if (link)
  542. *link = *hw_link_info;
  543. /* flag cleared so helper functions don't call AQ again */
  544. hw->phy.get_link_info = false;
  545. aq_get_link_info_exit:
  546. return status;
  547. }
  548. /**
  549. * i40e_aq_add_vsi
  550. * @hw: pointer to the hw struct
  551. * @vsi_ctx: pointer to a vsi context struct
  552. * @cmd_details: pointer to command details structure or NULL
  553. *
  554. * Add a VSI context to the hardware.
  555. **/
  556. i40e_status i40e_aq_add_vsi(struct i40e_hw *hw,
  557. struct i40e_vsi_context *vsi_ctx,
  558. struct i40e_asq_cmd_details *cmd_details)
  559. {
  560. struct i40e_aq_desc desc;
  561. struct i40e_aqc_add_get_update_vsi *cmd =
  562. (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
  563. struct i40e_aqc_add_get_update_vsi_completion *resp =
  564. (struct i40e_aqc_add_get_update_vsi_completion *)
  565. &desc.params.raw;
  566. i40e_status status;
  567. i40e_fill_default_direct_cmd_desc(&desc,
  568. i40e_aqc_opc_add_vsi);
  569. cmd->uplink_seid = cpu_to_le16(vsi_ctx->uplink_seid);
  570. cmd->connection_type = vsi_ctx->connection_type;
  571. cmd->vf_id = vsi_ctx->vf_num;
  572. cmd->vsi_flags = cpu_to_le16(vsi_ctx->flags);
  573. desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
  574. if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
  575. desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
  576. status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
  577. sizeof(vsi_ctx->info), cmd_details);
  578. if (status)
  579. goto aq_add_vsi_exit;
  580. vsi_ctx->seid = le16_to_cpu(resp->seid);
  581. vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
  582. vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
  583. vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);
  584. aq_add_vsi_exit:
  585. return status;
  586. }
  587. /**
  588. * i40e_aq_set_vsi_unicast_promiscuous
  589. * @hw: pointer to the hw struct
  590. * @seid: vsi number
  591. * @set: set unicast promiscuous enable/disable
  592. * @cmd_details: pointer to command details structure or NULL
  593. **/
  594. i40e_status i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw,
  595. u16 seid, bool set,
  596. struct i40e_asq_cmd_details *cmd_details)
  597. {
  598. struct i40e_aq_desc desc;
  599. struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
  600. (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
  601. i40e_status status;
  602. u16 flags = 0;
  603. i40e_fill_default_direct_cmd_desc(&desc,
  604. i40e_aqc_opc_set_vsi_promiscuous_modes);
  605. if (set)
  606. flags |= I40E_AQC_SET_VSI_PROMISC_UNICAST;
  607. cmd->promiscuous_flags = cpu_to_le16(flags);
  608. cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_UNICAST);
  609. cmd->seid = cpu_to_le16(seid);
  610. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  611. return status;
  612. }
  613. /**
  614. * i40e_aq_set_vsi_multicast_promiscuous
  615. * @hw: pointer to the hw struct
  616. * @seid: vsi number
  617. * @set: set multicast promiscuous enable/disable
  618. * @cmd_details: pointer to command details structure or NULL
  619. **/
  620. i40e_status i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw,
  621. u16 seid, bool set, struct i40e_asq_cmd_details *cmd_details)
  622. {
  623. struct i40e_aq_desc desc;
  624. struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
  625. (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
  626. i40e_status status;
  627. u16 flags = 0;
  628. i40e_fill_default_direct_cmd_desc(&desc,
  629. i40e_aqc_opc_set_vsi_promiscuous_modes);
  630. if (set)
  631. flags |= I40E_AQC_SET_VSI_PROMISC_MULTICAST;
  632. cmd->promiscuous_flags = cpu_to_le16(flags);
  633. cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_MULTICAST);
  634. cmd->seid = cpu_to_le16(seid);
  635. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  636. return status;
  637. }
  638. /**
  639. * i40e_aq_set_vsi_broadcast
  640. * @hw: pointer to the hw struct
  641. * @seid: vsi number
  642. * @set_filter: true to set filter, false to clear filter
  643. * @cmd_details: pointer to command details structure or NULL
  644. *
  645. * Set or clear the broadcast promiscuous flag (filter) for a given VSI.
  646. **/
  647. i40e_status i40e_aq_set_vsi_broadcast(struct i40e_hw *hw,
  648. u16 seid, bool set_filter,
  649. struct i40e_asq_cmd_details *cmd_details)
  650. {
  651. struct i40e_aq_desc desc;
  652. struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
  653. (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
  654. i40e_status status;
  655. i40e_fill_default_direct_cmd_desc(&desc,
  656. i40e_aqc_opc_set_vsi_promiscuous_modes);
  657. if (set_filter)
  658. cmd->promiscuous_flags
  659. |= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
  660. else
  661. cmd->promiscuous_flags
  662. &= cpu_to_le16(~I40E_AQC_SET_VSI_PROMISC_BROADCAST);
  663. cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
  664. cmd->seid = cpu_to_le16(seid);
  665. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  666. return status;
  667. }
  668. /**
  669. * i40e_get_vsi_params - get VSI configuration info
  670. * @hw: pointer to the hw struct
  671. * @vsi_ctx: pointer to a vsi context struct
  672. * @cmd_details: pointer to command details structure or NULL
  673. **/
  674. i40e_status i40e_aq_get_vsi_params(struct i40e_hw *hw,
  675. struct i40e_vsi_context *vsi_ctx,
  676. struct i40e_asq_cmd_details *cmd_details)
  677. {
  678. struct i40e_aq_desc desc;
  679. struct i40e_aqc_add_get_update_vsi *cmd =
  680. (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
  681. struct i40e_aqc_add_get_update_vsi_completion *resp =
  682. (struct i40e_aqc_add_get_update_vsi_completion *)
  683. &desc.params.raw;
  684. i40e_status status;
  685. i40e_fill_default_direct_cmd_desc(&desc,
  686. i40e_aqc_opc_get_vsi_parameters);
  687. cmd->uplink_seid = cpu_to_le16(vsi_ctx->seid);
  688. desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
  689. if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
  690. desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
  691. status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
  692. sizeof(vsi_ctx->info), NULL);
  693. if (status)
  694. goto aq_get_vsi_params_exit;
  695. vsi_ctx->seid = le16_to_cpu(resp->seid);
  696. vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
  697. vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
  698. vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);
  699. aq_get_vsi_params_exit:
  700. return status;
  701. }
  702. /**
  703. * i40e_aq_update_vsi_params
  704. * @hw: pointer to the hw struct
  705. * @vsi_ctx: pointer to a vsi context struct
  706. * @cmd_details: pointer to command details structure or NULL
  707. *
  708. * Update a VSI context.
  709. **/
  710. i40e_status i40e_aq_update_vsi_params(struct i40e_hw *hw,
  711. struct i40e_vsi_context *vsi_ctx,
  712. struct i40e_asq_cmd_details *cmd_details)
  713. {
  714. struct i40e_aq_desc desc;
  715. struct i40e_aqc_add_get_update_vsi *cmd =
  716. (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
  717. i40e_status status;
  718. i40e_fill_default_direct_cmd_desc(&desc,
  719. i40e_aqc_opc_update_vsi_parameters);
  720. cmd->uplink_seid = cpu_to_le16(vsi_ctx->seid);
  721. desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
  722. if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
  723. desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
  724. status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
  725. sizeof(vsi_ctx->info), cmd_details);
  726. return status;
  727. }
  728. /**
  729. * i40e_aq_get_switch_config
  730. * @hw: pointer to the hardware structure
  731. * @buf: pointer to the result buffer
  732. * @buf_size: length of input buffer
  733. * @start_seid: seid to start for the report, 0 == beginning
  734. * @cmd_details: pointer to command details structure or NULL
  735. *
  736. * Fill the buf with switch configuration returned from AdminQ command
  737. **/
  738. i40e_status i40e_aq_get_switch_config(struct i40e_hw *hw,
  739. struct i40e_aqc_get_switch_config_resp *buf,
  740. u16 buf_size, u16 *start_seid,
  741. struct i40e_asq_cmd_details *cmd_details)
  742. {
  743. struct i40e_aq_desc desc;
  744. struct i40e_aqc_switch_seid *scfg =
  745. (struct i40e_aqc_switch_seid *)&desc.params.raw;
  746. i40e_status status;
  747. i40e_fill_default_direct_cmd_desc(&desc,
  748. i40e_aqc_opc_get_switch_config);
  749. desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
  750. if (buf_size > I40E_AQ_LARGE_BUF)
  751. desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
  752. scfg->seid = cpu_to_le16(*start_seid);
  753. status = i40e_asq_send_command(hw, &desc, buf, buf_size, cmd_details);
  754. *start_seid = le16_to_cpu(scfg->seid);
  755. return status;
  756. }
  757. /**
  758. * i40e_aq_get_firmware_version
  759. * @hw: pointer to the hw struct
  760. * @fw_major_version: firmware major version
  761. * @fw_minor_version: firmware minor version
  762. * @api_major_version: major queue version
  763. * @api_minor_version: minor queue version
  764. * @cmd_details: pointer to command details structure or NULL
  765. *
  766. * Get the firmware version from the admin queue commands
  767. **/
  768. i40e_status i40e_aq_get_firmware_version(struct i40e_hw *hw,
  769. u16 *fw_major_version, u16 *fw_minor_version,
  770. u16 *api_major_version, u16 *api_minor_version,
  771. struct i40e_asq_cmd_details *cmd_details)
  772. {
  773. struct i40e_aq_desc desc;
  774. struct i40e_aqc_get_version *resp =
  775. (struct i40e_aqc_get_version *)&desc.params.raw;
  776. i40e_status status;
  777. i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_version);
  778. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  779. if (!status) {
  780. if (fw_major_version != NULL)
  781. *fw_major_version = le16_to_cpu(resp->fw_major);
  782. if (fw_minor_version != NULL)
  783. *fw_minor_version = le16_to_cpu(resp->fw_minor);
  784. if (api_major_version != NULL)
  785. *api_major_version = le16_to_cpu(resp->api_major);
  786. if (api_minor_version != NULL)
  787. *api_minor_version = le16_to_cpu(resp->api_minor);
  788. }
  789. return status;
  790. }
  791. /**
  792. * i40e_aq_send_driver_version
  793. * @hw: pointer to the hw struct
  794. * @dv: driver's major, minor version
  795. * @cmd_details: pointer to command details structure or NULL
  796. *
  797. * Send the driver version to the firmware
  798. **/
  799. i40e_status i40e_aq_send_driver_version(struct i40e_hw *hw,
  800. struct i40e_driver_version *dv,
  801. struct i40e_asq_cmd_details *cmd_details)
  802. {
  803. struct i40e_aq_desc desc;
  804. struct i40e_aqc_driver_version *cmd =
  805. (struct i40e_aqc_driver_version *)&desc.params.raw;
  806. i40e_status status;
  807. if (dv == NULL)
  808. return I40E_ERR_PARAM;
  809. i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_driver_version);
  810. desc.flags |= cpu_to_le16(I40E_AQ_FLAG_SI);
  811. cmd->driver_major_ver = dv->major_version;
  812. cmd->driver_minor_ver = dv->minor_version;
  813. cmd->driver_build_ver = dv->build_version;
  814. cmd->driver_subbuild_ver = dv->subbuild_version;
  815. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  816. return status;
  817. }
  818. /**
  819. * i40e_get_link_status - get status of the HW network link
  820. * @hw: pointer to the hw struct
  821. *
  822. * Returns true if link is up, false if link is down.
  823. *
  824. * Side effect: LinkStatusEvent reporting becomes enabled
  825. **/
  826. bool i40e_get_link_status(struct i40e_hw *hw)
  827. {
  828. i40e_status status = 0;
  829. bool link_status = false;
  830. if (hw->phy.get_link_info) {
  831. status = i40e_aq_get_link_info(hw, true, NULL, NULL);
  832. if (status)
  833. goto i40e_get_link_status_exit;
  834. }
  835. link_status = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
  836. i40e_get_link_status_exit:
  837. return link_status;
  838. }
  839. /**
  840. * i40e_aq_add_veb - Insert a VEB between the VSI and the MAC
  841. * @hw: pointer to the hw struct
  842. * @uplink_seid: the MAC or other gizmo SEID
  843. * @downlink_seid: the VSI SEID
  844. * @enabled_tc: bitmap of TCs to be enabled
  845. * @default_port: true for default port VSI, false for control port
  846. * @enable_l2_filtering: true to add L2 filter table rules to regular forwarding rules for cloud support
  847. * @veb_seid: pointer to where to put the resulting VEB SEID
  848. * @cmd_details: pointer to command details structure or NULL
  849. *
  850. * This asks the FW to add a VEB between the uplink and downlink
  851. * elements. If the uplink SEID is 0, this will be a floating VEB.
  852. **/
  853. i40e_status i40e_aq_add_veb(struct i40e_hw *hw, u16 uplink_seid,
  854. u16 downlink_seid, u8 enabled_tc,
  855. bool default_port, bool enable_l2_filtering,
  856. u16 *veb_seid,
  857. struct i40e_asq_cmd_details *cmd_details)
  858. {
  859. struct i40e_aq_desc desc;
  860. struct i40e_aqc_add_veb *cmd =
  861. (struct i40e_aqc_add_veb *)&desc.params.raw;
  862. struct i40e_aqc_add_veb_completion *resp =
  863. (struct i40e_aqc_add_veb_completion *)&desc.params.raw;
  864. i40e_status status;
  865. u16 veb_flags = 0;
  866. /* SEIDs need to either both be set or both be 0 for floating VEB */
  867. if (!!uplink_seid != !!downlink_seid)
  868. return I40E_ERR_PARAM;
  869. i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_veb);
  870. cmd->uplink_seid = cpu_to_le16(uplink_seid);
  871. cmd->downlink_seid = cpu_to_le16(downlink_seid);
  872. cmd->enable_tcs = enabled_tc;
  873. if (!uplink_seid)
  874. veb_flags |= I40E_AQC_ADD_VEB_FLOATING;
  875. if (default_port)
  876. veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DEFAULT;
  877. else
  878. veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DATA;
  879. if (enable_l2_filtering)
  880. veb_flags |= I40E_AQC_ADD_VEB_ENABLE_L2_FILTER;
  881. cmd->veb_flags = cpu_to_le16(veb_flags);
  882. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  883. if (!status && veb_seid)
  884. *veb_seid = le16_to_cpu(resp->veb_seid);
  885. return status;
  886. }
  887. /**
  888. * i40e_aq_get_veb_parameters - Retrieve VEB parameters
  889. * @hw: pointer to the hw struct
  890. * @veb_seid: the SEID of the VEB to query
  891. * @switch_id: the uplink switch id
  892. * @floating: set to true if the VEB is floating
  893. * @statistic_index: index of the stats counter block for this VEB
  894. * @vebs_used: number of VEB's used by function
  895. * @vebs_free: total VEB's not reserved by any function
  896. * @cmd_details: pointer to command details structure or NULL
  897. *
  898. * This retrieves the parameters for a particular VEB, specified by
  899. * uplink_seid, and returns them to the caller.
  900. **/
  901. i40e_status i40e_aq_get_veb_parameters(struct i40e_hw *hw,
  902. u16 veb_seid, u16 *switch_id,
  903. bool *floating, u16 *statistic_index,
  904. u16 *vebs_used, u16 *vebs_free,
  905. struct i40e_asq_cmd_details *cmd_details)
  906. {
  907. struct i40e_aq_desc desc;
  908. struct i40e_aqc_get_veb_parameters_completion *cmd_resp =
  909. (struct i40e_aqc_get_veb_parameters_completion *)
  910. &desc.params.raw;
  911. i40e_status status;
  912. if (veb_seid == 0)
  913. return I40E_ERR_PARAM;
  914. i40e_fill_default_direct_cmd_desc(&desc,
  915. i40e_aqc_opc_get_veb_parameters);
  916. cmd_resp->seid = cpu_to_le16(veb_seid);
  917. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  918. if (status)
  919. goto get_veb_exit;
  920. if (switch_id)
  921. *switch_id = le16_to_cpu(cmd_resp->switch_id);
  922. if (statistic_index)
  923. *statistic_index = le16_to_cpu(cmd_resp->statistic_index);
  924. if (vebs_used)
  925. *vebs_used = le16_to_cpu(cmd_resp->vebs_used);
  926. if (vebs_free)
  927. *vebs_free = le16_to_cpu(cmd_resp->vebs_free);
  928. if (floating) {
  929. u16 flags = le16_to_cpu(cmd_resp->veb_flags);
  930. if (flags & I40E_AQC_ADD_VEB_FLOATING)
  931. *floating = true;
  932. else
  933. *floating = false;
  934. }
  935. get_veb_exit:
  936. return status;
  937. }
  938. /**
  939. * i40e_aq_add_macvlan
  940. * @hw: pointer to the hw struct
  941. * @seid: VSI for the mac address
  942. * @mv_list: list of macvlans to be added
  943. * @count: length of the list
  944. * @cmd_details: pointer to command details structure or NULL
  945. *
  946. * Add MAC/VLAN addresses to the HW filtering
  947. **/
  948. i40e_status i40e_aq_add_macvlan(struct i40e_hw *hw, u16 seid,
  949. struct i40e_aqc_add_macvlan_element_data *mv_list,
  950. u16 count, struct i40e_asq_cmd_details *cmd_details)
  951. {
  952. struct i40e_aq_desc desc;
  953. struct i40e_aqc_macvlan *cmd =
  954. (struct i40e_aqc_macvlan *)&desc.params.raw;
  955. i40e_status status;
  956. u16 buf_size;
  957. if (count == 0 || !mv_list || !hw)
  958. return I40E_ERR_PARAM;
  959. buf_size = count * sizeof(struct i40e_aqc_add_macvlan_element_data);
  960. /* prep the rest of the request */
  961. i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_macvlan);
  962. cmd->num_addresses = cpu_to_le16(count);
  963. cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
  964. cmd->seid[1] = 0;
  965. cmd->seid[2] = 0;
  966. desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
  967. if (buf_size > I40E_AQ_LARGE_BUF)
  968. desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
  969. status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
  970. cmd_details);
  971. return status;
  972. }
  973. /**
  974. * i40e_aq_remove_macvlan
  975. * @hw: pointer to the hw struct
  976. * @seid: VSI for the mac address
  977. * @mv_list: list of macvlans to be removed
  978. * @count: length of the list
  979. * @cmd_details: pointer to command details structure or NULL
  980. *
  981. * Remove MAC/VLAN addresses from the HW filtering
  982. **/
  983. i40e_status i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 seid,
  984. struct i40e_aqc_remove_macvlan_element_data *mv_list,
  985. u16 count, struct i40e_asq_cmd_details *cmd_details)
  986. {
  987. struct i40e_aq_desc desc;
  988. struct i40e_aqc_macvlan *cmd =
  989. (struct i40e_aqc_macvlan *)&desc.params.raw;
  990. i40e_status status;
  991. u16 buf_size;
  992. if (count == 0 || !mv_list || !hw)
  993. return I40E_ERR_PARAM;
  994. buf_size = count * sizeof(struct i40e_aqc_remove_macvlan_element_data);
  995. /* prep the rest of the request */
  996. i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_remove_macvlan);
  997. cmd->num_addresses = cpu_to_le16(count);
  998. cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
  999. cmd->seid[1] = 0;
  1000. cmd->seid[2] = 0;
  1001. desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
  1002. if (buf_size > I40E_AQ_LARGE_BUF)
  1003. desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
  1004. status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
  1005. cmd_details);
  1006. return status;
  1007. }
  1008. /**
  1009. * i40e_aq_send_msg_to_vf
  1010. * @hw: pointer to the hardware structure
  1011. * @vfid: vf id to send msg
  1012. * @v_opcode: opcodes for VF-PF communication
  1013. * @v_retval: return error code
  1014. * @msg: pointer to the msg buffer
  1015. * @msglen: msg length
  1016. * @cmd_details: pointer to command details
  1017. *
  1018. * send msg to vf
  1019. **/
  1020. i40e_status i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid,
  1021. u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen,
  1022. struct i40e_asq_cmd_details *cmd_details)
  1023. {
  1024. struct i40e_aq_desc desc;
  1025. struct i40e_aqc_pf_vf_message *cmd =
  1026. (struct i40e_aqc_pf_vf_message *)&desc.params.raw;
  1027. i40e_status status;
  1028. i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_send_msg_to_vf);
  1029. cmd->id = cpu_to_le32(vfid);
  1030. desc.cookie_high = cpu_to_le32(v_opcode);
  1031. desc.cookie_low = cpu_to_le32(v_retval);
  1032. desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_SI);
  1033. if (msglen) {
  1034. desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF |
  1035. I40E_AQ_FLAG_RD));
  1036. if (msglen > I40E_AQ_LARGE_BUF)
  1037. desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
  1038. desc.datalen = cpu_to_le16(msglen);
  1039. }
  1040. status = i40e_asq_send_command(hw, &desc, msg, msglen, cmd_details);
  1041. return status;
  1042. }
  1043. /**
  1044. * i40e_aq_set_hmc_resource_profile
  1045. * @hw: pointer to the hw struct
  1046. * @profile: type of profile the HMC is to be set as
  1047. * @pe_vf_enabled_count: the number of PE enabled VFs the system has
  1048. * @cmd_details: pointer to command details structure or NULL
  1049. *
  1050. * set the HMC profile of the device.
  1051. **/
  1052. i40e_status i40e_aq_set_hmc_resource_profile(struct i40e_hw *hw,
  1053. enum i40e_aq_hmc_profile profile,
  1054. u8 pe_vf_enabled_count,
  1055. struct i40e_asq_cmd_details *cmd_details)
  1056. {
  1057. struct i40e_aq_desc desc;
  1058. struct i40e_aq_get_set_hmc_resource_profile *cmd =
  1059. (struct i40e_aq_get_set_hmc_resource_profile *)&desc.params.raw;
  1060. i40e_status status;
  1061. i40e_fill_default_direct_cmd_desc(&desc,
  1062. i40e_aqc_opc_set_hmc_resource_profile);
  1063. cmd->pm_profile = (u8)profile;
  1064. cmd->pe_vf_enabled = pe_vf_enabled_count;
  1065. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  1066. return status;
  1067. }
  1068. /**
  1069. * i40e_aq_request_resource
  1070. * @hw: pointer to the hw struct
  1071. * @resource: resource id
  1072. * @access: access type
  1073. * @sdp_number: resource number
  1074. * @timeout: the maximum time in ms that the driver may hold the resource
  1075. * @cmd_details: pointer to command details structure or NULL
  1076. *
  1077. * requests common resource using the admin queue commands
  1078. **/
  1079. i40e_status i40e_aq_request_resource(struct i40e_hw *hw,
  1080. enum i40e_aq_resources_ids resource,
  1081. enum i40e_aq_resource_access_type access,
  1082. u8 sdp_number, u64 *timeout,
  1083. struct i40e_asq_cmd_details *cmd_details)
  1084. {
  1085. struct i40e_aq_desc desc;
  1086. struct i40e_aqc_request_resource *cmd_resp =
  1087. (struct i40e_aqc_request_resource *)&desc.params.raw;
  1088. i40e_status status;
  1089. i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_request_resource);
  1090. cmd_resp->resource_id = cpu_to_le16(resource);
  1091. cmd_resp->access_type = cpu_to_le16(access);
  1092. cmd_resp->resource_number = cpu_to_le32(sdp_number);
  1093. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  1094. /* The completion specifies the maximum time in ms that the driver
  1095. * may hold the resource in the Timeout field.
  1096. * If the resource is held by someone else, the command completes with
  1097. * busy return value and the timeout field indicates the maximum time
  1098. * the current owner of the resource has to free it.
  1099. */
  1100. if (!status || hw->aq.asq_last_status == I40E_AQ_RC_EBUSY)
  1101. *timeout = le32_to_cpu(cmd_resp->timeout);
  1102. return status;
  1103. }
  1104. /**
  1105. * i40e_aq_release_resource
  1106. * @hw: pointer to the hw struct
  1107. * @resource: resource id
  1108. * @sdp_number: resource number
  1109. * @cmd_details: pointer to command details structure or NULL
  1110. *
  1111. * release common resource using the admin queue commands
  1112. **/
  1113. i40e_status i40e_aq_release_resource(struct i40e_hw *hw,
  1114. enum i40e_aq_resources_ids resource,
  1115. u8 sdp_number,
  1116. struct i40e_asq_cmd_details *cmd_details)
  1117. {
  1118. struct i40e_aq_desc desc;
  1119. struct i40e_aqc_request_resource *cmd =
  1120. (struct i40e_aqc_request_resource *)&desc.params.raw;
  1121. i40e_status status;
  1122. i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_release_resource);
  1123. cmd->resource_id = cpu_to_le16(resource);
  1124. cmd->resource_number = cpu_to_le32(sdp_number);
  1125. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  1126. return status;
  1127. }
  1128. /**
  1129. * i40e_aq_read_nvm
  1130. * @hw: pointer to the hw struct
  1131. * @module_pointer: module pointer location in words from the NVM beginning
  1132. * @offset: byte offset from the module beginning
  1133. * @length: length of the section to be read (in bytes from the offset)
  1134. * @data: command buffer (size [bytes] = length)
  1135. * @last_command: tells if this is the last command in a series
  1136. * @cmd_details: pointer to command details structure or NULL
  1137. *
  1138. * Read the NVM using the admin queue commands
  1139. **/
  1140. i40e_status i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer,
  1141. u32 offset, u16 length, void *data,
  1142. bool last_command,
  1143. struct i40e_asq_cmd_details *cmd_details)
  1144. {
  1145. struct i40e_aq_desc desc;
  1146. struct i40e_aqc_nvm_update *cmd =
  1147. (struct i40e_aqc_nvm_update *)&desc.params.raw;
  1148. i40e_status status;
  1149. /* In offset the highest byte must be zeroed. */
  1150. if (offset & 0xFF000000) {
  1151. status = I40E_ERR_PARAM;
  1152. goto i40e_aq_read_nvm_exit;
  1153. }
  1154. i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_nvm_read);
  1155. /* If this is the last command in a series, set the proper flag. */
  1156. if (last_command)
  1157. cmd->command_flags |= I40E_AQ_NVM_LAST_CMD;
  1158. cmd->module_pointer = module_pointer;
  1159. cmd->offset = cpu_to_le32(offset);
  1160. cmd->length = cpu_to_le16(length);
  1161. desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
  1162. if (length > I40E_AQ_LARGE_BUF)
  1163. desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
  1164. status = i40e_asq_send_command(hw, &desc, data, length, cmd_details);
  1165. i40e_aq_read_nvm_exit:
  1166. return status;
  1167. }
  1168. #define I40E_DEV_FUNC_CAP_SWITCH_MODE 0x01
  1169. #define I40E_DEV_FUNC_CAP_MGMT_MODE 0x02
  1170. #define I40E_DEV_FUNC_CAP_NPAR 0x03
  1171. #define I40E_DEV_FUNC_CAP_OS2BMC 0x04
  1172. #define I40E_DEV_FUNC_CAP_VALID_FUNC 0x05
  1173. #define I40E_DEV_FUNC_CAP_SRIOV_1_1 0x12
  1174. #define I40E_DEV_FUNC_CAP_VF 0x13
  1175. #define I40E_DEV_FUNC_CAP_VMDQ 0x14
  1176. #define I40E_DEV_FUNC_CAP_802_1_QBG 0x15
  1177. #define I40E_DEV_FUNC_CAP_802_1_QBH 0x16
  1178. #define I40E_DEV_FUNC_CAP_VSI 0x17
  1179. #define I40E_DEV_FUNC_CAP_DCB 0x18
  1180. #define I40E_DEV_FUNC_CAP_FCOE 0x21
  1181. #define I40E_DEV_FUNC_CAP_RSS 0x40
  1182. #define I40E_DEV_FUNC_CAP_RX_QUEUES 0x41
  1183. #define I40E_DEV_FUNC_CAP_TX_QUEUES 0x42
  1184. #define I40E_DEV_FUNC_CAP_MSIX 0x43
  1185. #define I40E_DEV_FUNC_CAP_MSIX_VF 0x44
  1186. #define I40E_DEV_FUNC_CAP_FLOW_DIRECTOR 0x45
  1187. #define I40E_DEV_FUNC_CAP_IEEE_1588 0x46
  1188. #define I40E_DEV_FUNC_CAP_MFP_MODE_1 0xF1
  1189. #define I40E_DEV_FUNC_CAP_CEM 0xF2
  1190. #define I40E_DEV_FUNC_CAP_IWARP 0x51
  1191. #define I40E_DEV_FUNC_CAP_LED 0x61
  1192. #define I40E_DEV_FUNC_CAP_SDP 0x62
  1193. #define I40E_DEV_FUNC_CAP_MDIO 0x63
  1194. /**
  1195. * i40e_parse_discover_capabilities
  1196. * @hw: pointer to the hw struct
  1197. * @buff: pointer to a buffer containing device/function capability records
  1198. * @cap_count: number of capability records in the list
  1199. * @list_type_opc: type of capabilities list to parse
  1200. *
  1201. * Parse the device/function capabilities list.
  1202. **/
  1203. static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
  1204. u32 cap_count,
  1205. enum i40e_admin_queue_opc list_type_opc)
  1206. {
  1207. struct i40e_aqc_list_capabilities_element_resp *cap;
  1208. u32 number, logical_id, phys_id;
  1209. struct i40e_hw_capabilities *p;
  1210. u32 reg_val;
  1211. u32 i = 0;
  1212. u16 id;
  1213. cap = (struct i40e_aqc_list_capabilities_element_resp *) buff;
  1214. if (list_type_opc == i40e_aqc_opc_list_dev_capabilities)
  1215. p = (struct i40e_hw_capabilities *)&hw->dev_caps;
  1216. else if (list_type_opc == i40e_aqc_opc_list_func_capabilities)
  1217. p = (struct i40e_hw_capabilities *)&hw->func_caps;
  1218. else
  1219. return;
  1220. for (i = 0; i < cap_count; i++, cap++) {
  1221. id = le16_to_cpu(cap->id);
  1222. number = le32_to_cpu(cap->number);
  1223. logical_id = le32_to_cpu(cap->logical_id);
  1224. phys_id = le32_to_cpu(cap->phys_id);
  1225. switch (id) {
  1226. case I40E_DEV_FUNC_CAP_SWITCH_MODE:
  1227. p->switch_mode = number;
  1228. break;
  1229. case I40E_DEV_FUNC_CAP_MGMT_MODE:
  1230. p->management_mode = number;
  1231. break;
  1232. case I40E_DEV_FUNC_CAP_NPAR:
  1233. p->npar_enable = number;
  1234. break;
  1235. case I40E_DEV_FUNC_CAP_OS2BMC:
  1236. p->os2bmc = number;
  1237. break;
  1238. case I40E_DEV_FUNC_CAP_VALID_FUNC:
  1239. p->valid_functions = number;
  1240. break;
  1241. case I40E_DEV_FUNC_CAP_SRIOV_1_1:
  1242. if (number == 1)
  1243. p->sr_iov_1_1 = true;
  1244. break;
  1245. case I40E_DEV_FUNC_CAP_VF:
  1246. p->num_vfs = number;
  1247. p->vf_base_id = logical_id;
  1248. break;
  1249. case I40E_DEV_FUNC_CAP_VMDQ:
  1250. if (number == 1)
  1251. p->vmdq = true;
  1252. break;
  1253. case I40E_DEV_FUNC_CAP_802_1_QBG:
  1254. if (number == 1)
  1255. p->evb_802_1_qbg = true;
  1256. break;
  1257. case I40E_DEV_FUNC_CAP_802_1_QBH:
  1258. if (number == 1)
  1259. p->evb_802_1_qbh = true;
  1260. break;
  1261. case I40E_DEV_FUNC_CAP_VSI:
  1262. p->num_vsis = number;
  1263. break;
  1264. case I40E_DEV_FUNC_CAP_DCB:
  1265. if (number == 1) {
  1266. p->dcb = true;
  1267. p->enabled_tcmap = logical_id;
  1268. p->maxtc = phys_id;
  1269. }
  1270. break;
  1271. case I40E_DEV_FUNC_CAP_FCOE:
  1272. if (number == 1)
  1273. p->fcoe = true;
  1274. break;
  1275. case I40E_DEV_FUNC_CAP_RSS:
  1276. p->rss = true;
  1277. reg_val = rd32(hw, I40E_PFQF_CTL_0);
  1278. if (reg_val & I40E_PFQF_CTL_0_HASHLUTSIZE_MASK)
  1279. p->rss_table_size = number;
  1280. else
  1281. p->rss_table_size = 128;
  1282. p->rss_table_entry_width = logical_id;
  1283. break;
  1284. case I40E_DEV_FUNC_CAP_RX_QUEUES:
  1285. p->num_rx_qp = number;
  1286. p->base_queue = phys_id;
  1287. break;
  1288. case I40E_DEV_FUNC_CAP_TX_QUEUES:
  1289. p->num_tx_qp = number;
  1290. p->base_queue = phys_id;
  1291. break;
  1292. case I40E_DEV_FUNC_CAP_MSIX:
  1293. p->num_msix_vectors = number;
  1294. break;
  1295. case I40E_DEV_FUNC_CAP_MSIX_VF:
  1296. p->num_msix_vectors_vf = number;
  1297. break;
  1298. case I40E_DEV_FUNC_CAP_MFP_MODE_1:
  1299. if (number == 1)
  1300. p->mfp_mode_1 = true;
  1301. break;
  1302. case I40E_DEV_FUNC_CAP_CEM:
  1303. if (number == 1)
  1304. p->mgmt_cem = true;
  1305. break;
  1306. case I40E_DEV_FUNC_CAP_IWARP:
  1307. if (number == 1)
  1308. p->iwarp = true;
  1309. break;
  1310. case I40E_DEV_FUNC_CAP_LED:
  1311. if (phys_id < I40E_HW_CAP_MAX_GPIO)
  1312. p->led[phys_id] = true;
  1313. break;
  1314. case I40E_DEV_FUNC_CAP_SDP:
  1315. if (phys_id < I40E_HW_CAP_MAX_GPIO)
  1316. p->sdp[phys_id] = true;
  1317. break;
  1318. case I40E_DEV_FUNC_CAP_MDIO:
  1319. if (number == 1) {
  1320. p->mdio_port_num = phys_id;
  1321. p->mdio_port_mode = logical_id;
  1322. }
  1323. break;
  1324. case I40E_DEV_FUNC_CAP_IEEE_1588:
  1325. if (number == 1)
  1326. p->ieee_1588 = true;
  1327. break;
  1328. case I40E_DEV_FUNC_CAP_FLOW_DIRECTOR:
  1329. p->fd = true;
  1330. p->fd_filters_guaranteed = number;
  1331. p->fd_filters_best_effort = logical_id;
  1332. break;
  1333. default:
  1334. break;
  1335. }
  1336. }
  1337. /* additional HW specific goodies that might
  1338. * someday be HW version specific
  1339. */
  1340. p->rx_buf_chain_len = I40E_MAX_CHAINED_RX_BUFFERS;
  1341. }
  1342. /**
  1343. * i40e_aq_discover_capabilities
  1344. * @hw: pointer to the hw struct
  1345. * @buff: a virtual buffer to hold the capabilities
  1346. * @buff_size: Size of the virtual buffer
  1347. * @data_size: Size of the returned data, or buff size needed if AQ err==ENOMEM
  1348. * @list_type_opc: capabilities type to discover - pass in the command opcode
  1349. * @cmd_details: pointer to command details structure or NULL
  1350. *
  1351. * Get the device capabilities descriptions from the firmware
  1352. **/
  1353. i40e_status i40e_aq_discover_capabilities(struct i40e_hw *hw,
  1354. void *buff, u16 buff_size, u16 *data_size,
  1355. enum i40e_admin_queue_opc list_type_opc,
  1356. struct i40e_asq_cmd_details *cmd_details)
  1357. {
  1358. struct i40e_aqc_list_capabilites *cmd;
  1359. struct i40e_aq_desc desc;
  1360. i40e_status status = 0;
  1361. cmd = (struct i40e_aqc_list_capabilites *)&desc.params.raw;
  1362. if (list_type_opc != i40e_aqc_opc_list_func_capabilities &&
  1363. list_type_opc != i40e_aqc_opc_list_dev_capabilities) {
  1364. status = I40E_ERR_PARAM;
  1365. goto exit;
  1366. }
  1367. i40e_fill_default_direct_cmd_desc(&desc, list_type_opc);
  1368. desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
  1369. if (buff_size > I40E_AQ_LARGE_BUF)
  1370. desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
  1371. status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
  1372. *data_size = le16_to_cpu(desc.datalen);
  1373. if (status)
  1374. goto exit;
  1375. i40e_parse_discover_capabilities(hw, buff, le32_to_cpu(cmd->count),
  1376. list_type_opc);
  1377. exit:
  1378. return status;
  1379. }
  1380. /**
  1381. * i40e_aq_get_lldp_mib
  1382. * @hw: pointer to the hw struct
  1383. * @bridge_type: type of bridge requested
  1384. * @mib_type: Local, Remote or both Local and Remote MIBs
  1385. * @buff: pointer to a user supplied buffer to store the MIB block
  1386. * @buff_size: size of the buffer (in bytes)
  1387. * @local_len : length of the returned Local LLDP MIB
  1388. * @remote_len: length of the returned Remote LLDP MIB
  1389. * @cmd_details: pointer to command details structure or NULL
  1390. *
  1391. * Requests the complete LLDP MIB (entire packet).
  1392. **/
  1393. i40e_status i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,
  1394. u8 mib_type, void *buff, u16 buff_size,
  1395. u16 *local_len, u16 *remote_len,
  1396. struct i40e_asq_cmd_details *cmd_details)
  1397. {
  1398. struct i40e_aq_desc desc;
  1399. struct i40e_aqc_lldp_get_mib *cmd =
  1400. (struct i40e_aqc_lldp_get_mib *)&desc.params.raw;
  1401. struct i40e_aqc_lldp_get_mib *resp =
  1402. (struct i40e_aqc_lldp_get_mib *)&desc.params.raw;
  1403. i40e_status status;
  1404. if (buff_size == 0 || !buff)
  1405. return I40E_ERR_PARAM;
  1406. i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_get_mib);
  1407. /* Indirect Command */
  1408. desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
  1409. cmd->type = mib_type & I40E_AQ_LLDP_MIB_TYPE_MASK;
  1410. cmd->type |= ((bridge_type << I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) &
  1411. I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
  1412. desc.datalen = cpu_to_le16(buff_size);
  1413. desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
  1414. if (buff_size > I40E_AQ_LARGE_BUF)
  1415. desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
  1416. status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
  1417. if (!status) {
  1418. if (local_len != NULL)
  1419. *local_len = le16_to_cpu(resp->local_len);
  1420. if (remote_len != NULL)
  1421. *remote_len = le16_to_cpu(resp->remote_len);
  1422. }
  1423. return status;
  1424. }
  1425. /**
  1426. * i40e_aq_cfg_lldp_mib_change_event
  1427. * @hw: pointer to the hw struct
  1428. * @enable_update: Enable or Disable event posting
  1429. * @cmd_details: pointer to command details structure or NULL
  1430. *
  1431. * Enable or Disable posting of an event on ARQ when LLDP MIB
  1432. * associated with the interface changes
  1433. **/
  1434. i40e_status i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw,
  1435. bool enable_update,
  1436. struct i40e_asq_cmd_details *cmd_details)
  1437. {
  1438. struct i40e_aq_desc desc;
  1439. struct i40e_aqc_lldp_update_mib *cmd =
  1440. (struct i40e_aqc_lldp_update_mib *)&desc.params.raw;
  1441. i40e_status status;
  1442. i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_update_mib);
  1443. if (!enable_update)
  1444. cmd->command |= I40E_AQ_LLDP_MIB_UPDATE_DISABLE;
  1445. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  1446. return status;
  1447. }
  1448. /**
  1449. * i40e_aq_stop_lldp
  1450. * @hw: pointer to the hw struct
  1451. * @shutdown_agent: True if LLDP Agent needs to be Shutdown
  1452. * @cmd_details: pointer to command details structure or NULL
  1453. *
  1454. * Stop or Shutdown the embedded LLDP Agent
  1455. **/
  1456. i40e_status i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent,
  1457. struct i40e_asq_cmd_details *cmd_details)
  1458. {
  1459. struct i40e_aq_desc desc;
  1460. struct i40e_aqc_lldp_stop *cmd =
  1461. (struct i40e_aqc_lldp_stop *)&desc.params.raw;
  1462. i40e_status status;
  1463. i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_stop);
  1464. if (shutdown_agent)
  1465. cmd->command |= I40E_AQ_LLDP_AGENT_SHUTDOWN;
  1466. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  1467. return status;
  1468. }
  1469. /**
  1470. * i40e_aq_start_lldp
  1471. * @hw: pointer to the hw struct
  1472. * @cmd_details: pointer to command details structure or NULL
  1473. *
  1474. * Start the embedded LLDP Agent on all ports.
  1475. **/
  1476. i40e_status i40e_aq_start_lldp(struct i40e_hw *hw,
  1477. struct i40e_asq_cmd_details *cmd_details)
  1478. {
  1479. struct i40e_aq_desc desc;
  1480. struct i40e_aqc_lldp_start *cmd =
  1481. (struct i40e_aqc_lldp_start *)&desc.params.raw;
  1482. i40e_status status;
  1483. i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_start);
  1484. cmd->command = I40E_AQ_LLDP_AGENT_START;
  1485. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  1486. return status;
  1487. }
  1488. /**
  1489. * i40e_aq_add_udp_tunnel
  1490. * @hw: pointer to the hw struct
  1491. * @udp_port: the UDP port to add
  1492. * @header_len: length of the tunneling header length in DWords
  1493. * @protocol_index: protocol index type
  1494. * @filter_index: pointer to filter index
  1495. * @cmd_details: pointer to command details structure or NULL
  1496. **/
  1497. i40e_status i40e_aq_add_udp_tunnel(struct i40e_hw *hw,
  1498. u16 udp_port, u8 header_len,
  1499. u8 protocol_index, u8 *filter_index,
  1500. struct i40e_asq_cmd_details *cmd_details)
  1501. {
  1502. struct i40e_aq_desc desc;
  1503. struct i40e_aqc_add_udp_tunnel *cmd =
  1504. (struct i40e_aqc_add_udp_tunnel *)&desc.params.raw;
  1505. struct i40e_aqc_del_udp_tunnel_completion *resp =
  1506. (struct i40e_aqc_del_udp_tunnel_completion *)&desc.params.raw;
  1507. i40e_status status;
  1508. i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_udp_tunnel);
  1509. cmd->udp_port = cpu_to_le16(udp_port);
  1510. cmd->protocol_type = protocol_index;
  1511. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  1512. if (!status)
  1513. *filter_index = resp->index;
  1514. return status;
  1515. }
  1516. /**
  1517. * i40e_aq_del_udp_tunnel
  1518. * @hw: pointer to the hw struct
  1519. * @index: filter index
  1520. * @cmd_details: pointer to command details structure or NULL
  1521. **/
  1522. i40e_status i40e_aq_del_udp_tunnel(struct i40e_hw *hw, u8 index,
  1523. struct i40e_asq_cmd_details *cmd_details)
  1524. {
  1525. struct i40e_aq_desc desc;
  1526. struct i40e_aqc_remove_udp_tunnel *cmd =
  1527. (struct i40e_aqc_remove_udp_tunnel *)&desc.params.raw;
  1528. i40e_status status;
  1529. i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_del_udp_tunnel);
  1530. cmd->index = index;
  1531. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  1532. return status;
  1533. }
  1534. /**
  1535. * i40e_aq_delete_element - Delete switch element
  1536. * @hw: pointer to the hw struct
  1537. * @seid: the SEID to delete from the switch
  1538. * @cmd_details: pointer to command details structure or NULL
  1539. *
  1540. * This deletes a switch element from the switch.
  1541. **/
  1542. i40e_status i40e_aq_delete_element(struct i40e_hw *hw, u16 seid,
  1543. struct i40e_asq_cmd_details *cmd_details)
  1544. {
  1545. struct i40e_aq_desc desc;
  1546. struct i40e_aqc_switch_seid *cmd =
  1547. (struct i40e_aqc_switch_seid *)&desc.params.raw;
  1548. i40e_status status;
  1549. if (seid == 0)
  1550. return I40E_ERR_PARAM;
  1551. i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_delete_element);
  1552. cmd->seid = cpu_to_le16(seid);
  1553. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  1554. return status;
  1555. }
  1556. /**
  1557. * i40e_aq_dcb_updated - DCB Updated Command
  1558. * @hw: pointer to the hw struct
  1559. * @cmd_details: pointer to command details structure or NULL
  1560. *
  1561. * EMP will return when the shared RPB settings have been
  1562. * recomputed and modified. The retval field in the descriptor
  1563. * will be set to 0 when RPB is modified.
  1564. **/
  1565. i40e_status i40e_aq_dcb_updated(struct i40e_hw *hw,
  1566. struct i40e_asq_cmd_details *cmd_details)
  1567. {
  1568. struct i40e_aq_desc desc;
  1569. i40e_status status;
  1570. i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_dcb_updated);
  1571. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  1572. return status;
  1573. }
  1574. /**
  1575. * i40e_aq_tx_sched_cmd - generic Tx scheduler AQ command handler
  1576. * @hw: pointer to the hw struct
  1577. * @seid: seid for the physical port/switching component/vsi
  1578. * @buff: Indirect buffer to hold data parameters and response
  1579. * @buff_size: Indirect buffer size
  1580. * @opcode: Tx scheduler AQ command opcode
  1581. * @cmd_details: pointer to command details structure or NULL
  1582. *
  1583. * Generic command handler for Tx scheduler AQ commands
  1584. **/
  1585. static i40e_status i40e_aq_tx_sched_cmd(struct i40e_hw *hw, u16 seid,
  1586. void *buff, u16 buff_size,
  1587. enum i40e_admin_queue_opc opcode,
  1588. struct i40e_asq_cmd_details *cmd_details)
  1589. {
  1590. struct i40e_aq_desc desc;
  1591. struct i40e_aqc_tx_sched_ind *cmd =
  1592. (struct i40e_aqc_tx_sched_ind *)&desc.params.raw;
  1593. i40e_status status;
  1594. bool cmd_param_flag = false;
  1595. switch (opcode) {
  1596. case i40e_aqc_opc_configure_vsi_ets_sla_bw_limit:
  1597. case i40e_aqc_opc_configure_vsi_tc_bw:
  1598. case i40e_aqc_opc_enable_switching_comp_ets:
  1599. case i40e_aqc_opc_modify_switching_comp_ets:
  1600. case i40e_aqc_opc_disable_switching_comp_ets:
  1601. case i40e_aqc_opc_configure_switching_comp_ets_bw_limit:
  1602. case i40e_aqc_opc_configure_switching_comp_bw_config:
  1603. cmd_param_flag = true;
  1604. break;
  1605. case i40e_aqc_opc_query_vsi_bw_config:
  1606. case i40e_aqc_opc_query_vsi_ets_sla_config:
  1607. case i40e_aqc_opc_query_switching_comp_ets_config:
  1608. case i40e_aqc_opc_query_port_ets_config:
  1609. case i40e_aqc_opc_query_switching_comp_bw_config:
  1610. cmd_param_flag = false;
  1611. break;
  1612. default:
  1613. return I40E_ERR_PARAM;
  1614. }
  1615. i40e_fill_default_direct_cmd_desc(&desc, opcode);
  1616. /* Indirect command */
  1617. desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
  1618. if (cmd_param_flag)
  1619. desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);
  1620. if (buff_size > I40E_AQ_LARGE_BUF)
  1621. desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
  1622. desc.datalen = cpu_to_le16(buff_size);
  1623. cmd->vsi_seid = cpu_to_le16(seid);
  1624. status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
  1625. return status;
  1626. }
  1627. /**
  1628. * i40e_aq_config_vsi_tc_bw - Config VSI BW Allocation per TC
  1629. * @hw: pointer to the hw struct
  1630. * @seid: VSI seid
  1631. * @bw_data: Buffer holding enabled TCs, relative TC BW limit/credits
  1632. * @cmd_details: pointer to command details structure or NULL
  1633. **/
  1634. i40e_status i40e_aq_config_vsi_tc_bw(struct i40e_hw *hw,
  1635. u16 seid,
  1636. struct i40e_aqc_configure_vsi_tc_bw_data *bw_data,
  1637. struct i40e_asq_cmd_details *cmd_details)
  1638. {
  1639. return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
  1640. i40e_aqc_opc_configure_vsi_tc_bw,
  1641. cmd_details);
  1642. }
  1643. /**
  1644. * i40e_aq_config_switch_comp_ets - Enable/Disable/Modify ETS on the port
  1645. * @hw: pointer to the hw struct
  1646. * @seid: seid of the switching component connected to Physical Port
  1647. * @ets_data: Buffer holding ETS parameters
  1648. * @cmd_details: pointer to command details structure or NULL
  1649. **/
  1650. i40e_status i40e_aq_config_switch_comp_ets(struct i40e_hw *hw,
  1651. u16 seid,
  1652. struct i40e_aqc_configure_switching_comp_ets_data *ets_data,
  1653. enum i40e_admin_queue_opc opcode,
  1654. struct i40e_asq_cmd_details *cmd_details)
  1655. {
  1656. return i40e_aq_tx_sched_cmd(hw, seid, (void *)ets_data,
  1657. sizeof(*ets_data), opcode, cmd_details);
  1658. }
  1659. /**
  1660. * i40e_aq_config_switch_comp_bw_config - Config Switch comp BW Alloc per TC
  1661. * @hw: pointer to the hw struct
  1662. * @seid: seid of the switching component
  1663. * @bw_data: Buffer holding enabled TCs, relative/absolute TC BW limit/credits
  1664. * @cmd_details: pointer to command details structure or NULL
  1665. **/
  1666. i40e_status i40e_aq_config_switch_comp_bw_config(struct i40e_hw *hw,
  1667. u16 seid,
  1668. struct i40e_aqc_configure_switching_comp_bw_config_data *bw_data,
  1669. struct i40e_asq_cmd_details *cmd_details)
  1670. {
  1671. return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
  1672. i40e_aqc_opc_configure_switching_comp_bw_config,
  1673. cmd_details);
  1674. }
  1675. /**
  1676. * i40e_aq_query_vsi_bw_config - Query VSI BW configuration
  1677. * @hw: pointer to the hw struct
  1678. * @seid: seid of the VSI
  1679. * @bw_data: Buffer to hold VSI BW configuration
  1680. * @cmd_details: pointer to command details structure or NULL
  1681. **/
  1682. i40e_status i40e_aq_query_vsi_bw_config(struct i40e_hw *hw,
  1683. u16 seid,
  1684. struct i40e_aqc_query_vsi_bw_config_resp *bw_data,
  1685. struct i40e_asq_cmd_details *cmd_details)
  1686. {
  1687. return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
  1688. i40e_aqc_opc_query_vsi_bw_config,
  1689. cmd_details);
  1690. }
  1691. /**
  1692. * i40e_aq_query_vsi_ets_sla_config - Query VSI BW configuration per TC
  1693. * @hw: pointer to the hw struct
  1694. * @seid: seid of the VSI
  1695. * @bw_data: Buffer to hold VSI BW configuration per TC
  1696. * @cmd_details: pointer to command details structure or NULL
  1697. **/
  1698. i40e_status i40e_aq_query_vsi_ets_sla_config(struct i40e_hw *hw,
  1699. u16 seid,
  1700. struct i40e_aqc_query_vsi_ets_sla_config_resp *bw_data,
  1701. struct i40e_asq_cmd_details *cmd_details)
  1702. {
  1703. return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
  1704. i40e_aqc_opc_query_vsi_ets_sla_config,
  1705. cmd_details);
  1706. }
  1707. /**
  1708. * i40e_aq_query_switch_comp_ets_config - Query Switch comp BW config per TC
  1709. * @hw: pointer to the hw struct
  1710. * @seid: seid of the switching component
  1711. * @bw_data: Buffer to hold switching component's per TC BW config
  1712. * @cmd_details: pointer to command details structure or NULL
  1713. **/
  1714. i40e_status i40e_aq_query_switch_comp_ets_config(struct i40e_hw *hw,
  1715. u16 seid,
  1716. struct i40e_aqc_query_switching_comp_ets_config_resp *bw_data,
  1717. struct i40e_asq_cmd_details *cmd_details)
  1718. {
  1719. return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
  1720. i40e_aqc_opc_query_switching_comp_ets_config,
  1721. cmd_details);
  1722. }
  1723. /**
  1724. * i40e_aq_query_port_ets_config - Query Physical Port ETS configuration
  1725. * @hw: pointer to the hw struct
  1726. * @seid: seid of the VSI or switching component connected to Physical Port
  1727. * @bw_data: Buffer to hold current ETS configuration for the Physical Port
  1728. * @cmd_details: pointer to command details structure or NULL
  1729. **/
  1730. i40e_status i40e_aq_query_port_ets_config(struct i40e_hw *hw,
  1731. u16 seid,
  1732. struct i40e_aqc_query_port_ets_config_resp *bw_data,
  1733. struct i40e_asq_cmd_details *cmd_details)
  1734. {
  1735. return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
  1736. i40e_aqc_opc_query_port_ets_config,
  1737. cmd_details);
  1738. }
  1739. /**
  1740. * i40e_aq_query_switch_comp_bw_config - Query Switch comp BW configuration
  1741. * @hw: pointer to the hw struct
  1742. * @seid: seid of the switching component
  1743. * @bw_data: Buffer to hold switching component's BW configuration
  1744. * @cmd_details: pointer to command details structure or NULL
  1745. **/
  1746. i40e_status i40e_aq_query_switch_comp_bw_config(struct i40e_hw *hw,
  1747. u16 seid,
  1748. struct i40e_aqc_query_switching_comp_bw_config_resp *bw_data,
  1749. struct i40e_asq_cmd_details *cmd_details)
  1750. {
  1751. return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
  1752. i40e_aqc_opc_query_switching_comp_bw_config,
  1753. cmd_details);
  1754. }
  1755. /**
  1756. * i40e_validate_filter_settings
  1757. * @hw: pointer to the hardware structure
  1758. * @settings: Filter control settings
  1759. *
  1760. * Check and validate the filter control settings passed.
  1761. * The function checks for the valid filter/context sizes being
  1762. * passed for FCoE and PE.
  1763. *
  1764. * Returns 0 if the values passed are valid and within
  1765. * range else returns an error.
  1766. **/
  1767. static i40e_status i40e_validate_filter_settings(struct i40e_hw *hw,
  1768. struct i40e_filter_control_settings *settings)
  1769. {
  1770. u32 fcoe_cntx_size, fcoe_filt_size;
  1771. u32 pe_cntx_size, pe_filt_size;
  1772. u32 fcoe_fmax, pe_fmax;
  1773. u32 val;
  1774. /* Validate FCoE settings passed */
  1775. switch (settings->fcoe_filt_num) {
  1776. case I40E_HASH_FILTER_SIZE_1K:
  1777. case I40E_HASH_FILTER_SIZE_2K:
  1778. case I40E_HASH_FILTER_SIZE_4K:
  1779. case I40E_HASH_FILTER_SIZE_8K:
  1780. case I40E_HASH_FILTER_SIZE_16K:
  1781. case I40E_HASH_FILTER_SIZE_32K:
  1782. fcoe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
  1783. fcoe_filt_size <<= (u32)settings->fcoe_filt_num;
  1784. break;
  1785. default:
  1786. return I40E_ERR_PARAM;
  1787. }
  1788. switch (settings->fcoe_cntx_num) {
  1789. case I40E_DMA_CNTX_SIZE_512:
  1790. case I40E_DMA_CNTX_SIZE_1K:
  1791. case I40E_DMA_CNTX_SIZE_2K:
  1792. case I40E_DMA_CNTX_SIZE_4K:
  1793. fcoe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
  1794. fcoe_cntx_size <<= (u32)settings->fcoe_cntx_num;
  1795. break;
  1796. default:
  1797. return I40E_ERR_PARAM;
  1798. }
  1799. /* Validate PE settings passed */
  1800. switch (settings->pe_filt_num) {
  1801. case I40E_HASH_FILTER_SIZE_1K:
  1802. case I40E_HASH_FILTER_SIZE_2K:
  1803. case I40E_HASH_FILTER_SIZE_4K:
  1804. case I40E_HASH_FILTER_SIZE_8K:
  1805. case I40E_HASH_FILTER_SIZE_16K:
  1806. case I40E_HASH_FILTER_SIZE_32K:
  1807. case I40E_HASH_FILTER_SIZE_64K:
  1808. case I40E_HASH_FILTER_SIZE_128K:
  1809. case I40E_HASH_FILTER_SIZE_256K:
  1810. case I40E_HASH_FILTER_SIZE_512K:
  1811. case I40E_HASH_FILTER_SIZE_1M:
  1812. pe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
  1813. pe_filt_size <<= (u32)settings->pe_filt_num;
  1814. break;
  1815. default:
  1816. return I40E_ERR_PARAM;
  1817. }
  1818. switch (settings->pe_cntx_num) {
  1819. case I40E_DMA_CNTX_SIZE_512:
  1820. case I40E_DMA_CNTX_SIZE_1K:
  1821. case I40E_DMA_CNTX_SIZE_2K:
  1822. case I40E_DMA_CNTX_SIZE_4K:
  1823. case I40E_DMA_CNTX_SIZE_8K:
  1824. case I40E_DMA_CNTX_SIZE_16K:
  1825. case I40E_DMA_CNTX_SIZE_32K:
  1826. case I40E_DMA_CNTX_SIZE_64K:
  1827. case I40E_DMA_CNTX_SIZE_128K:
  1828. case I40E_DMA_CNTX_SIZE_256K:
  1829. pe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
  1830. pe_cntx_size <<= (u32)settings->pe_cntx_num;
  1831. break;
  1832. default:
  1833. return I40E_ERR_PARAM;
  1834. }
  1835. /* FCHSIZE + FCDSIZE should not be greater than PMFCOEFMAX */
  1836. val = rd32(hw, I40E_GLHMC_FCOEFMAX);
  1837. fcoe_fmax = (val & I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_MASK)
  1838. >> I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_SHIFT;
  1839. if (fcoe_filt_size + fcoe_cntx_size > fcoe_fmax)
  1840. return I40E_ERR_INVALID_SIZE;
  1841. /* PEHSIZE + PEDSIZE should not be greater than PMPEXFMAX */
  1842. val = rd32(hw, I40E_GLHMC_PEXFMAX);
  1843. pe_fmax = (val & I40E_GLHMC_PEXFMAX_PMPEXFMAX_MASK)
  1844. >> I40E_GLHMC_PEXFMAX_PMPEXFMAX_SHIFT;
  1845. if (pe_filt_size + pe_cntx_size > pe_fmax)
  1846. return I40E_ERR_INVALID_SIZE;
  1847. return 0;
  1848. }
  1849. /**
  1850. * i40e_set_filter_control
  1851. * @hw: pointer to the hardware structure
  1852. * @settings: Filter control settings
  1853. *
  1854. * Set the Queue Filters for PE/FCoE and enable filters required
  1855. * for a single PF. It is expected that these settings are programmed
  1856. * at the driver initialization time.
  1857. **/
  1858. i40e_status i40e_set_filter_control(struct i40e_hw *hw,
  1859. struct i40e_filter_control_settings *settings)
  1860. {
  1861. i40e_status ret = 0;
  1862. u32 hash_lut_size = 0;
  1863. u32 val;
  1864. if (!settings)
  1865. return I40E_ERR_PARAM;
  1866. /* Validate the input settings */
  1867. ret = i40e_validate_filter_settings(hw, settings);
  1868. if (ret)
  1869. return ret;
  1870. /* Read the PF Queue Filter control register */
  1871. val = rd32(hw, I40E_PFQF_CTL_0);
  1872. /* Program required PE hash buckets for the PF */
  1873. val &= ~I40E_PFQF_CTL_0_PEHSIZE_MASK;
  1874. val |= ((u32)settings->pe_filt_num << I40E_PFQF_CTL_0_PEHSIZE_SHIFT) &
  1875. I40E_PFQF_CTL_0_PEHSIZE_MASK;
  1876. /* Program required PE contexts for the PF */
  1877. val &= ~I40E_PFQF_CTL_0_PEDSIZE_MASK;
  1878. val |= ((u32)settings->pe_cntx_num << I40E_PFQF_CTL_0_PEDSIZE_SHIFT) &
  1879. I40E_PFQF_CTL_0_PEDSIZE_MASK;
  1880. /* Program required FCoE hash buckets for the PF */
  1881. val &= ~I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
  1882. val |= ((u32)settings->fcoe_filt_num <<
  1883. I40E_PFQF_CTL_0_PFFCHSIZE_SHIFT) &
  1884. I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
  1885. /* Program required FCoE DDP contexts for the PF */
  1886. val &= ~I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
  1887. val |= ((u32)settings->fcoe_cntx_num <<
  1888. I40E_PFQF_CTL_0_PFFCDSIZE_SHIFT) &
  1889. I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
  1890. /* Program Hash LUT size for the PF */
  1891. val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
  1892. if (settings->hash_lut_size == I40E_HASH_LUT_SIZE_512)
  1893. hash_lut_size = 1;
  1894. val |= (hash_lut_size << I40E_PFQF_CTL_0_HASHLUTSIZE_SHIFT) &
  1895. I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
  1896. /* Enable FDIR, Ethertype and MACVLAN filters for PF and VFs */
  1897. if (settings->enable_fdir)
  1898. val |= I40E_PFQF_CTL_0_FD_ENA_MASK;
  1899. if (settings->enable_ethtype)
  1900. val |= I40E_PFQF_CTL_0_ETYPE_ENA_MASK;
  1901. if (settings->enable_macvlan)
  1902. val |= I40E_PFQF_CTL_0_MACVLAN_ENA_MASK;
  1903. wr32(hw, I40E_PFQF_CTL_0, val);
  1904. return 0;
  1905. }
  1906. /**
  1907. * i40e_aq_add_rem_control_packet_filter - Add or Remove Control Packet Filter
  1908. * @hw: pointer to the hw struct
  1909. * @mac_addr: MAC address to use in the filter
  1910. * @ethtype: Ethertype to use in the filter
  1911. * @flags: Flags that needs to be applied to the filter
  1912. * @vsi_seid: seid of the control VSI
  1913. * @queue: VSI queue number to send the packet to
  1914. * @is_add: Add control packet filter if True else remove
  1915. * @stats: Structure to hold information on control filter counts
  1916. * @cmd_details: pointer to command details structure or NULL
  1917. *
  1918. * This command will Add or Remove control packet filter for a control VSI.
  1919. * In return it will update the total number of perfect filter count in
  1920. * the stats member.
  1921. **/
  1922. i40e_status i40e_aq_add_rem_control_packet_filter(struct i40e_hw *hw,
  1923. u8 *mac_addr, u16 ethtype, u16 flags,
  1924. u16 vsi_seid, u16 queue, bool is_add,
  1925. struct i40e_control_filter_stats *stats,
  1926. struct i40e_asq_cmd_details *cmd_details)
  1927. {
  1928. struct i40e_aq_desc desc;
  1929. struct i40e_aqc_add_remove_control_packet_filter *cmd =
  1930. (struct i40e_aqc_add_remove_control_packet_filter *)
  1931. &desc.params.raw;
  1932. struct i40e_aqc_add_remove_control_packet_filter_completion *resp =
  1933. (struct i40e_aqc_add_remove_control_packet_filter_completion *)
  1934. &desc.params.raw;
  1935. i40e_status status;
  1936. if (vsi_seid == 0)
  1937. return I40E_ERR_PARAM;
  1938. if (is_add) {
  1939. i40e_fill_default_direct_cmd_desc(&desc,
  1940. i40e_aqc_opc_add_control_packet_filter);
  1941. cmd->queue = cpu_to_le16(queue);
  1942. } else {
  1943. i40e_fill_default_direct_cmd_desc(&desc,
  1944. i40e_aqc_opc_remove_control_packet_filter);
  1945. }
  1946. if (mac_addr)
  1947. memcpy(cmd->mac, mac_addr, ETH_ALEN);
  1948. cmd->etype = cpu_to_le16(ethtype);
  1949. cmd->flags = cpu_to_le16(flags);
  1950. cmd->seid = cpu_to_le16(vsi_seid);
  1951. status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
  1952. if (!status && stats) {
  1953. stats->mac_etype_used = le16_to_cpu(resp->mac_etype_used);
  1954. stats->etype_used = le16_to_cpu(resp->etype_used);
  1955. stats->mac_etype_free = le16_to_cpu(resp->mac_etype_free);
  1956. stats->etype_free = le16_to_cpu(resp->etype_free);
  1957. }
  1958. return status;
  1959. }
  1960. /**
  1961. * i40e_set_pci_config_data - store PCI bus info
  1962. * @hw: pointer to hardware structure
  1963. * @link_status: the link status word from PCI config space
  1964. *
  1965. * Stores the PCI bus info (speed, width, type) within the i40e_hw structure
  1966. **/
  1967. void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status)
  1968. {
  1969. hw->bus.type = i40e_bus_type_pci_express;
  1970. switch (link_status & PCI_EXP_LNKSTA_NLW) {
  1971. case PCI_EXP_LNKSTA_NLW_X1:
  1972. hw->bus.width = i40e_bus_width_pcie_x1;
  1973. break;
  1974. case PCI_EXP_LNKSTA_NLW_X2:
  1975. hw->bus.width = i40e_bus_width_pcie_x2;
  1976. break;
  1977. case PCI_EXP_LNKSTA_NLW_X4:
  1978. hw->bus.width = i40e_bus_width_pcie_x4;
  1979. break;
  1980. case PCI_EXP_LNKSTA_NLW_X8:
  1981. hw->bus.width = i40e_bus_width_pcie_x8;
  1982. break;
  1983. default:
  1984. hw->bus.width = i40e_bus_width_unknown;
  1985. break;
  1986. }
  1987. switch (link_status & PCI_EXP_LNKSTA_CLS) {
  1988. case PCI_EXP_LNKSTA_CLS_2_5GB:
  1989. hw->bus.speed = i40e_bus_speed_2500;
  1990. break;
  1991. case PCI_EXP_LNKSTA_CLS_5_0GB:
  1992. hw->bus.speed = i40e_bus_speed_5000;
  1993. break;
  1994. case PCI_EXP_LNKSTA_CLS_8_0GB:
  1995. hw->bus.speed = i40e_bus_speed_8000;
  1996. break;
  1997. default:
  1998. hw->bus.speed = i40e_bus_speed_unknown;
  1999. break;
  2000. }
  2001. }