enic_main.c 57 KB

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  1. /*
  2. * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. *
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/string.h>
  22. #include <linux/errno.h>
  23. #include <linux/types.h>
  24. #include <linux/init.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/workqueue.h>
  27. #include <linux/pci.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/etherdevice.h>
  30. #include <linux/if.h>
  31. #include <linux/if_ether.h>
  32. #include <linux/if_vlan.h>
  33. #include <linux/in.h>
  34. #include <linux/ip.h>
  35. #include <linux/ipv6.h>
  36. #include <linux/tcp.h>
  37. #include <linux/rtnetlink.h>
  38. #include <linux/prefetch.h>
  39. #include <net/ip6_checksum.h>
  40. #include "cq_enet_desc.h"
  41. #include "vnic_dev.h"
  42. #include "vnic_intr.h"
  43. #include "vnic_stats.h"
  44. #include "vnic_vic.h"
  45. #include "enic_res.h"
  46. #include "enic.h"
  47. #include "enic_dev.h"
  48. #include "enic_pp.h"
  49. #define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
  50. #define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
  51. #define MAX_TSO (1 << 16)
  52. #define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
  53. #define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
  54. #define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
  55. #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF 0x0071 /* enet SRIOV VF */
  56. /* Supported devices */
  57. static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
  58. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
  59. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
  60. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) },
  61. { 0, } /* end of table */
  62. };
  63. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  64. MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
  65. MODULE_LICENSE("GPL");
  66. MODULE_VERSION(DRV_VERSION);
  67. MODULE_DEVICE_TABLE(pci, enic_id_table);
  68. int enic_is_dynamic(struct enic *enic)
  69. {
  70. return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
  71. }
  72. int enic_sriov_enabled(struct enic *enic)
  73. {
  74. return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0;
  75. }
  76. static int enic_is_sriov_vf(struct enic *enic)
  77. {
  78. return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
  79. }
  80. int enic_is_valid_vf(struct enic *enic, int vf)
  81. {
  82. #ifdef CONFIG_PCI_IOV
  83. return vf >= 0 && vf < enic->num_vfs;
  84. #else
  85. return 0;
  86. #endif
  87. }
  88. static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
  89. {
  90. struct enic *enic = vnic_dev_priv(wq->vdev);
  91. if (buf->sop)
  92. pci_unmap_single(enic->pdev, buf->dma_addr,
  93. buf->len, PCI_DMA_TODEVICE);
  94. else
  95. pci_unmap_page(enic->pdev, buf->dma_addr,
  96. buf->len, PCI_DMA_TODEVICE);
  97. if (buf->os_buf)
  98. dev_kfree_skb_any(buf->os_buf);
  99. }
  100. static void enic_wq_free_buf(struct vnic_wq *wq,
  101. struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
  102. {
  103. enic_free_wq_buf(wq, buf);
  104. }
  105. static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  106. u8 type, u16 q_number, u16 completed_index, void *opaque)
  107. {
  108. struct enic *enic = vnic_dev_priv(vdev);
  109. spin_lock(&enic->wq_lock[q_number]);
  110. vnic_wq_service(&enic->wq[q_number], cq_desc,
  111. completed_index, enic_wq_free_buf,
  112. opaque);
  113. if (netif_tx_queue_stopped(netdev_get_tx_queue(enic->netdev, q_number)) &&
  114. vnic_wq_desc_avail(&enic->wq[q_number]) >=
  115. (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
  116. netif_wake_subqueue(enic->netdev, q_number);
  117. spin_unlock(&enic->wq_lock[q_number]);
  118. return 0;
  119. }
  120. static void enic_log_q_error(struct enic *enic)
  121. {
  122. unsigned int i;
  123. u32 error_status;
  124. for (i = 0; i < enic->wq_count; i++) {
  125. error_status = vnic_wq_error_status(&enic->wq[i]);
  126. if (error_status)
  127. netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
  128. i, error_status);
  129. }
  130. for (i = 0; i < enic->rq_count; i++) {
  131. error_status = vnic_rq_error_status(&enic->rq[i]);
  132. if (error_status)
  133. netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
  134. i, error_status);
  135. }
  136. }
  137. static void enic_msglvl_check(struct enic *enic)
  138. {
  139. u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
  140. if (msg_enable != enic->msg_enable) {
  141. netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
  142. enic->msg_enable, msg_enable);
  143. enic->msg_enable = msg_enable;
  144. }
  145. }
  146. static void enic_mtu_check(struct enic *enic)
  147. {
  148. u32 mtu = vnic_dev_mtu(enic->vdev);
  149. struct net_device *netdev = enic->netdev;
  150. if (mtu && mtu != enic->port_mtu) {
  151. enic->port_mtu = mtu;
  152. if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
  153. mtu = max_t(int, ENIC_MIN_MTU,
  154. min_t(int, ENIC_MAX_MTU, mtu));
  155. if (mtu != netdev->mtu)
  156. schedule_work(&enic->change_mtu_work);
  157. } else {
  158. if (mtu < netdev->mtu)
  159. netdev_warn(netdev,
  160. "interface MTU (%d) set higher "
  161. "than switch port MTU (%d)\n",
  162. netdev->mtu, mtu);
  163. }
  164. }
  165. }
  166. static void enic_link_check(struct enic *enic)
  167. {
  168. int link_status = vnic_dev_link_status(enic->vdev);
  169. int carrier_ok = netif_carrier_ok(enic->netdev);
  170. if (link_status && !carrier_ok) {
  171. netdev_info(enic->netdev, "Link UP\n");
  172. netif_carrier_on(enic->netdev);
  173. } else if (!link_status && carrier_ok) {
  174. netdev_info(enic->netdev, "Link DOWN\n");
  175. netif_carrier_off(enic->netdev);
  176. }
  177. }
  178. static void enic_notify_check(struct enic *enic)
  179. {
  180. enic_msglvl_check(enic);
  181. enic_mtu_check(enic);
  182. enic_link_check(enic);
  183. }
  184. #define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
  185. static irqreturn_t enic_isr_legacy(int irq, void *data)
  186. {
  187. struct net_device *netdev = data;
  188. struct enic *enic = netdev_priv(netdev);
  189. unsigned int io_intr = enic_legacy_io_intr();
  190. unsigned int err_intr = enic_legacy_err_intr();
  191. unsigned int notify_intr = enic_legacy_notify_intr();
  192. u32 pba;
  193. vnic_intr_mask(&enic->intr[io_intr]);
  194. pba = vnic_intr_legacy_pba(enic->legacy_pba);
  195. if (!pba) {
  196. vnic_intr_unmask(&enic->intr[io_intr]);
  197. return IRQ_NONE; /* not our interrupt */
  198. }
  199. if (ENIC_TEST_INTR(pba, notify_intr)) {
  200. vnic_intr_return_all_credits(&enic->intr[notify_intr]);
  201. enic_notify_check(enic);
  202. }
  203. if (ENIC_TEST_INTR(pba, err_intr)) {
  204. vnic_intr_return_all_credits(&enic->intr[err_intr]);
  205. enic_log_q_error(enic);
  206. /* schedule recovery from WQ/RQ error */
  207. schedule_work(&enic->reset);
  208. return IRQ_HANDLED;
  209. }
  210. if (ENIC_TEST_INTR(pba, io_intr)) {
  211. if (napi_schedule_prep(&enic->napi[0]))
  212. __napi_schedule(&enic->napi[0]);
  213. } else {
  214. vnic_intr_unmask(&enic->intr[io_intr]);
  215. }
  216. return IRQ_HANDLED;
  217. }
  218. static irqreturn_t enic_isr_msi(int irq, void *data)
  219. {
  220. struct enic *enic = data;
  221. /* With MSI, there is no sharing of interrupts, so this is
  222. * our interrupt and there is no need to ack it. The device
  223. * is not providing per-vector masking, so the OS will not
  224. * write to PCI config space to mask/unmask the interrupt.
  225. * We're using mask_on_assertion for MSI, so the device
  226. * automatically masks the interrupt when the interrupt is
  227. * generated. Later, when exiting polling, the interrupt
  228. * will be unmasked (see enic_poll).
  229. *
  230. * Also, the device uses the same PCIe Traffic Class (TC)
  231. * for Memory Write data and MSI, so there are no ordering
  232. * issues; the MSI will always arrive at the Root Complex
  233. * _after_ corresponding Memory Writes (i.e. descriptor
  234. * writes).
  235. */
  236. napi_schedule(&enic->napi[0]);
  237. return IRQ_HANDLED;
  238. }
  239. static irqreturn_t enic_isr_msix_rq(int irq, void *data)
  240. {
  241. struct napi_struct *napi = data;
  242. /* schedule NAPI polling for RQ cleanup */
  243. napi_schedule(napi);
  244. return IRQ_HANDLED;
  245. }
  246. static irqreturn_t enic_isr_msix_wq(int irq, void *data)
  247. {
  248. struct enic *enic = data;
  249. unsigned int cq;
  250. unsigned int intr;
  251. unsigned int wq_work_to_do = -1; /* no limit */
  252. unsigned int wq_work_done;
  253. unsigned int wq_irq;
  254. wq_irq = (u32)irq - enic->msix_entry[enic_msix_wq_intr(enic, 0)].vector;
  255. cq = enic_cq_wq(enic, wq_irq);
  256. intr = enic_msix_wq_intr(enic, wq_irq);
  257. wq_work_done = vnic_cq_service(&enic->cq[cq],
  258. wq_work_to_do, enic_wq_service, NULL);
  259. vnic_intr_return_credits(&enic->intr[intr],
  260. wq_work_done,
  261. 1 /* unmask intr */,
  262. 1 /* reset intr timer */);
  263. return IRQ_HANDLED;
  264. }
  265. static irqreturn_t enic_isr_msix_err(int irq, void *data)
  266. {
  267. struct enic *enic = data;
  268. unsigned int intr = enic_msix_err_intr(enic);
  269. vnic_intr_return_all_credits(&enic->intr[intr]);
  270. enic_log_q_error(enic);
  271. /* schedule recovery from WQ/RQ error */
  272. schedule_work(&enic->reset);
  273. return IRQ_HANDLED;
  274. }
  275. static irqreturn_t enic_isr_msix_notify(int irq, void *data)
  276. {
  277. struct enic *enic = data;
  278. unsigned int intr = enic_msix_notify_intr(enic);
  279. vnic_intr_return_all_credits(&enic->intr[intr]);
  280. enic_notify_check(enic);
  281. return IRQ_HANDLED;
  282. }
  283. static inline void enic_queue_wq_skb_cont(struct enic *enic,
  284. struct vnic_wq *wq, struct sk_buff *skb,
  285. unsigned int len_left, int loopback)
  286. {
  287. const skb_frag_t *frag;
  288. /* Queue additional data fragments */
  289. for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
  290. len_left -= skb_frag_size(frag);
  291. enic_queue_wq_desc_cont(wq, skb,
  292. skb_frag_dma_map(&enic->pdev->dev,
  293. frag, 0, skb_frag_size(frag),
  294. DMA_TO_DEVICE),
  295. skb_frag_size(frag),
  296. (len_left == 0), /* EOP? */
  297. loopback);
  298. }
  299. }
  300. static inline void enic_queue_wq_skb_vlan(struct enic *enic,
  301. struct vnic_wq *wq, struct sk_buff *skb,
  302. int vlan_tag_insert, unsigned int vlan_tag, int loopback)
  303. {
  304. unsigned int head_len = skb_headlen(skb);
  305. unsigned int len_left = skb->len - head_len;
  306. int eop = (len_left == 0);
  307. /* Queue the main skb fragment. The fragments are no larger
  308. * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
  309. * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
  310. * per fragment is queued.
  311. */
  312. enic_queue_wq_desc(wq, skb,
  313. pci_map_single(enic->pdev, skb->data,
  314. head_len, PCI_DMA_TODEVICE),
  315. head_len,
  316. vlan_tag_insert, vlan_tag,
  317. eop, loopback);
  318. if (!eop)
  319. enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
  320. }
  321. static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
  322. struct vnic_wq *wq, struct sk_buff *skb,
  323. int vlan_tag_insert, unsigned int vlan_tag, int loopback)
  324. {
  325. unsigned int head_len = skb_headlen(skb);
  326. unsigned int len_left = skb->len - head_len;
  327. unsigned int hdr_len = skb_checksum_start_offset(skb);
  328. unsigned int csum_offset = hdr_len + skb->csum_offset;
  329. int eop = (len_left == 0);
  330. /* Queue the main skb fragment. The fragments are no larger
  331. * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
  332. * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
  333. * per fragment is queued.
  334. */
  335. enic_queue_wq_desc_csum_l4(wq, skb,
  336. pci_map_single(enic->pdev, skb->data,
  337. head_len, PCI_DMA_TODEVICE),
  338. head_len,
  339. csum_offset,
  340. hdr_len,
  341. vlan_tag_insert, vlan_tag,
  342. eop, loopback);
  343. if (!eop)
  344. enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
  345. }
  346. static inline void enic_queue_wq_skb_tso(struct enic *enic,
  347. struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
  348. int vlan_tag_insert, unsigned int vlan_tag, int loopback)
  349. {
  350. unsigned int frag_len_left = skb_headlen(skb);
  351. unsigned int len_left = skb->len - frag_len_left;
  352. unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  353. int eop = (len_left == 0);
  354. unsigned int len;
  355. dma_addr_t dma_addr;
  356. unsigned int offset = 0;
  357. skb_frag_t *frag;
  358. /* Preload TCP csum field with IP pseudo hdr calculated
  359. * with IP length set to zero. HW will later add in length
  360. * to each TCP segment resulting from the TSO.
  361. */
  362. if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
  363. ip_hdr(skb)->check = 0;
  364. tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
  365. ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
  366. } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
  367. tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
  368. &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
  369. }
  370. /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
  371. * for the main skb fragment
  372. */
  373. while (frag_len_left) {
  374. len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
  375. dma_addr = pci_map_single(enic->pdev, skb->data + offset,
  376. len, PCI_DMA_TODEVICE);
  377. enic_queue_wq_desc_tso(wq, skb,
  378. dma_addr,
  379. len,
  380. mss, hdr_len,
  381. vlan_tag_insert, vlan_tag,
  382. eop && (len == frag_len_left), loopback);
  383. frag_len_left -= len;
  384. offset += len;
  385. }
  386. if (eop)
  387. return;
  388. /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
  389. * for additional data fragments
  390. */
  391. for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
  392. len_left -= skb_frag_size(frag);
  393. frag_len_left = skb_frag_size(frag);
  394. offset = 0;
  395. while (frag_len_left) {
  396. len = min(frag_len_left,
  397. (unsigned int)WQ_ENET_MAX_DESC_LEN);
  398. dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag,
  399. offset, len,
  400. DMA_TO_DEVICE);
  401. enic_queue_wq_desc_cont(wq, skb,
  402. dma_addr,
  403. len,
  404. (len_left == 0) &&
  405. (len == frag_len_left), /* EOP? */
  406. loopback);
  407. frag_len_left -= len;
  408. offset += len;
  409. }
  410. }
  411. }
  412. static inline void enic_queue_wq_skb(struct enic *enic,
  413. struct vnic_wq *wq, struct sk_buff *skb)
  414. {
  415. unsigned int mss = skb_shinfo(skb)->gso_size;
  416. unsigned int vlan_tag = 0;
  417. int vlan_tag_insert = 0;
  418. int loopback = 0;
  419. if (vlan_tx_tag_present(skb)) {
  420. /* VLAN tag from trunking driver */
  421. vlan_tag_insert = 1;
  422. vlan_tag = vlan_tx_tag_get(skb);
  423. } else if (enic->loop_enable) {
  424. vlan_tag = enic->loop_tag;
  425. loopback = 1;
  426. }
  427. if (mss)
  428. enic_queue_wq_skb_tso(enic, wq, skb, mss,
  429. vlan_tag_insert, vlan_tag, loopback);
  430. else if (skb->ip_summed == CHECKSUM_PARTIAL)
  431. enic_queue_wq_skb_csum_l4(enic, wq, skb,
  432. vlan_tag_insert, vlan_tag, loopback);
  433. else
  434. enic_queue_wq_skb_vlan(enic, wq, skb,
  435. vlan_tag_insert, vlan_tag, loopback);
  436. }
  437. /* netif_tx_lock held, process context with BHs disabled, or BH */
  438. static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
  439. struct net_device *netdev)
  440. {
  441. struct enic *enic = netdev_priv(netdev);
  442. struct vnic_wq *wq;
  443. unsigned long flags;
  444. unsigned int txq_map;
  445. if (skb->len <= 0) {
  446. dev_kfree_skb(skb);
  447. return NETDEV_TX_OK;
  448. }
  449. txq_map = skb_get_queue_mapping(skb) % enic->wq_count;
  450. wq = &enic->wq[txq_map];
  451. /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
  452. * which is very likely. In the off chance it's going to take
  453. * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
  454. */
  455. if (skb_shinfo(skb)->gso_size == 0 &&
  456. skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
  457. skb_linearize(skb)) {
  458. dev_kfree_skb(skb);
  459. return NETDEV_TX_OK;
  460. }
  461. spin_lock_irqsave(&enic->wq_lock[txq_map], flags);
  462. if (vnic_wq_desc_avail(wq) <
  463. skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
  464. netif_tx_stop_queue(netdev_get_tx_queue(netdev, txq_map));
  465. /* This is a hard error, log it */
  466. netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
  467. spin_unlock_irqrestore(&enic->wq_lock[txq_map], flags);
  468. return NETDEV_TX_BUSY;
  469. }
  470. enic_queue_wq_skb(enic, wq, skb);
  471. if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
  472. netif_tx_stop_queue(netdev_get_tx_queue(netdev, txq_map));
  473. spin_unlock_irqrestore(&enic->wq_lock[txq_map], flags);
  474. return NETDEV_TX_OK;
  475. }
  476. /* dev_base_lock rwlock held, nominally process context */
  477. static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev,
  478. struct rtnl_link_stats64 *net_stats)
  479. {
  480. struct enic *enic = netdev_priv(netdev);
  481. struct vnic_stats *stats;
  482. enic_dev_stats_dump(enic, &stats);
  483. net_stats->tx_packets = stats->tx.tx_frames_ok;
  484. net_stats->tx_bytes = stats->tx.tx_bytes_ok;
  485. net_stats->tx_errors = stats->tx.tx_errors;
  486. net_stats->tx_dropped = stats->tx.tx_drops;
  487. net_stats->rx_packets = stats->rx.rx_frames_ok;
  488. net_stats->rx_bytes = stats->rx.rx_bytes_ok;
  489. net_stats->rx_errors = stats->rx.rx_errors;
  490. net_stats->multicast = stats->rx.rx_multicast_frames_ok;
  491. net_stats->rx_over_errors = enic->rq_truncated_pkts;
  492. net_stats->rx_crc_errors = enic->rq_bad_fcs;
  493. net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
  494. return net_stats;
  495. }
  496. void enic_reset_addr_lists(struct enic *enic)
  497. {
  498. enic->mc_count = 0;
  499. enic->uc_count = 0;
  500. enic->flags = 0;
  501. }
  502. static int enic_set_mac_addr(struct net_device *netdev, char *addr)
  503. {
  504. struct enic *enic = netdev_priv(netdev);
  505. if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
  506. if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
  507. return -EADDRNOTAVAIL;
  508. } else {
  509. if (!is_valid_ether_addr(addr))
  510. return -EADDRNOTAVAIL;
  511. }
  512. memcpy(netdev->dev_addr, addr, netdev->addr_len);
  513. return 0;
  514. }
  515. static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
  516. {
  517. struct enic *enic = netdev_priv(netdev);
  518. struct sockaddr *saddr = p;
  519. char *addr = saddr->sa_data;
  520. int err;
  521. if (netif_running(enic->netdev)) {
  522. err = enic_dev_del_station_addr(enic);
  523. if (err)
  524. return err;
  525. }
  526. err = enic_set_mac_addr(netdev, addr);
  527. if (err)
  528. return err;
  529. if (netif_running(enic->netdev)) {
  530. err = enic_dev_add_station_addr(enic);
  531. if (err)
  532. return err;
  533. }
  534. return err;
  535. }
  536. static int enic_set_mac_address(struct net_device *netdev, void *p)
  537. {
  538. struct sockaddr *saddr = p;
  539. char *addr = saddr->sa_data;
  540. struct enic *enic = netdev_priv(netdev);
  541. int err;
  542. err = enic_dev_del_station_addr(enic);
  543. if (err)
  544. return err;
  545. err = enic_set_mac_addr(netdev, addr);
  546. if (err)
  547. return err;
  548. return enic_dev_add_station_addr(enic);
  549. }
  550. static void enic_update_multicast_addr_list(struct enic *enic)
  551. {
  552. struct net_device *netdev = enic->netdev;
  553. struct netdev_hw_addr *ha;
  554. unsigned int mc_count = netdev_mc_count(netdev);
  555. u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
  556. unsigned int i, j;
  557. if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS) {
  558. netdev_warn(netdev, "Registering only %d out of %d "
  559. "multicast addresses\n",
  560. ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
  561. mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
  562. }
  563. /* Is there an easier way? Trying to minimize to
  564. * calls to add/del multicast addrs. We keep the
  565. * addrs from the last call in enic->mc_addr and
  566. * look for changes to add/del.
  567. */
  568. i = 0;
  569. netdev_for_each_mc_addr(ha, netdev) {
  570. if (i == mc_count)
  571. break;
  572. memcpy(mc_addr[i++], ha->addr, ETH_ALEN);
  573. }
  574. for (i = 0; i < enic->mc_count; i++) {
  575. for (j = 0; j < mc_count; j++)
  576. if (ether_addr_equal(enic->mc_addr[i], mc_addr[j]))
  577. break;
  578. if (j == mc_count)
  579. enic_dev_del_addr(enic, enic->mc_addr[i]);
  580. }
  581. for (i = 0; i < mc_count; i++) {
  582. for (j = 0; j < enic->mc_count; j++)
  583. if (ether_addr_equal(mc_addr[i], enic->mc_addr[j]))
  584. break;
  585. if (j == enic->mc_count)
  586. enic_dev_add_addr(enic, mc_addr[i]);
  587. }
  588. /* Save the list to compare against next time
  589. */
  590. for (i = 0; i < mc_count; i++)
  591. memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
  592. enic->mc_count = mc_count;
  593. }
  594. static void enic_update_unicast_addr_list(struct enic *enic)
  595. {
  596. struct net_device *netdev = enic->netdev;
  597. struct netdev_hw_addr *ha;
  598. unsigned int uc_count = netdev_uc_count(netdev);
  599. u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN];
  600. unsigned int i, j;
  601. if (uc_count > ENIC_UNICAST_PERFECT_FILTERS) {
  602. netdev_warn(netdev, "Registering only %d out of %d "
  603. "unicast addresses\n",
  604. ENIC_UNICAST_PERFECT_FILTERS, uc_count);
  605. uc_count = ENIC_UNICAST_PERFECT_FILTERS;
  606. }
  607. /* Is there an easier way? Trying to minimize to
  608. * calls to add/del unicast addrs. We keep the
  609. * addrs from the last call in enic->uc_addr and
  610. * look for changes to add/del.
  611. */
  612. i = 0;
  613. netdev_for_each_uc_addr(ha, netdev) {
  614. if (i == uc_count)
  615. break;
  616. memcpy(uc_addr[i++], ha->addr, ETH_ALEN);
  617. }
  618. for (i = 0; i < enic->uc_count; i++) {
  619. for (j = 0; j < uc_count; j++)
  620. if (ether_addr_equal(enic->uc_addr[i], uc_addr[j]))
  621. break;
  622. if (j == uc_count)
  623. enic_dev_del_addr(enic, enic->uc_addr[i]);
  624. }
  625. for (i = 0; i < uc_count; i++) {
  626. for (j = 0; j < enic->uc_count; j++)
  627. if (ether_addr_equal(uc_addr[i], enic->uc_addr[j]))
  628. break;
  629. if (j == enic->uc_count)
  630. enic_dev_add_addr(enic, uc_addr[i]);
  631. }
  632. /* Save the list to compare against next time
  633. */
  634. for (i = 0; i < uc_count; i++)
  635. memcpy(enic->uc_addr[i], uc_addr[i], ETH_ALEN);
  636. enic->uc_count = uc_count;
  637. }
  638. /* netif_tx_lock held, BHs disabled */
  639. static void enic_set_rx_mode(struct net_device *netdev)
  640. {
  641. struct enic *enic = netdev_priv(netdev);
  642. int directed = 1;
  643. int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
  644. int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
  645. int promisc = (netdev->flags & IFF_PROMISC) ||
  646. netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
  647. int allmulti = (netdev->flags & IFF_ALLMULTI) ||
  648. netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
  649. unsigned int flags = netdev->flags |
  650. (allmulti ? IFF_ALLMULTI : 0) |
  651. (promisc ? IFF_PROMISC : 0);
  652. if (enic->flags != flags) {
  653. enic->flags = flags;
  654. enic_dev_packet_filter(enic, directed,
  655. multicast, broadcast, promisc, allmulti);
  656. }
  657. if (!promisc) {
  658. enic_update_unicast_addr_list(enic);
  659. if (!allmulti)
  660. enic_update_multicast_addr_list(enic);
  661. }
  662. }
  663. /* netif_tx_lock held, BHs disabled */
  664. static void enic_tx_timeout(struct net_device *netdev)
  665. {
  666. struct enic *enic = netdev_priv(netdev);
  667. schedule_work(&enic->reset);
  668. }
  669. static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
  670. {
  671. struct enic *enic = netdev_priv(netdev);
  672. struct enic_port_profile *pp;
  673. int err;
  674. ENIC_PP_BY_INDEX(enic, vf, pp, &err);
  675. if (err)
  676. return err;
  677. if (is_valid_ether_addr(mac) || is_zero_ether_addr(mac)) {
  678. if (vf == PORT_SELF_VF) {
  679. memcpy(pp->vf_mac, mac, ETH_ALEN);
  680. return 0;
  681. } else {
  682. /*
  683. * For sriov vf's set the mac in hw
  684. */
  685. ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
  686. vnic_dev_set_mac_addr, mac);
  687. return enic_dev_status_to_errno(err);
  688. }
  689. } else
  690. return -EINVAL;
  691. }
  692. static int enic_set_vf_port(struct net_device *netdev, int vf,
  693. struct nlattr *port[])
  694. {
  695. struct enic *enic = netdev_priv(netdev);
  696. struct enic_port_profile prev_pp;
  697. struct enic_port_profile *pp;
  698. int err = 0, restore_pp = 1;
  699. ENIC_PP_BY_INDEX(enic, vf, pp, &err);
  700. if (err)
  701. return err;
  702. if (!port[IFLA_PORT_REQUEST])
  703. return -EOPNOTSUPP;
  704. memcpy(&prev_pp, pp, sizeof(*enic->pp));
  705. memset(pp, 0, sizeof(*enic->pp));
  706. pp->set |= ENIC_SET_REQUEST;
  707. pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]);
  708. if (port[IFLA_PORT_PROFILE]) {
  709. pp->set |= ENIC_SET_NAME;
  710. memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]),
  711. PORT_PROFILE_MAX);
  712. }
  713. if (port[IFLA_PORT_INSTANCE_UUID]) {
  714. pp->set |= ENIC_SET_INSTANCE;
  715. memcpy(pp->instance_uuid,
  716. nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
  717. }
  718. if (port[IFLA_PORT_HOST_UUID]) {
  719. pp->set |= ENIC_SET_HOST;
  720. memcpy(pp->host_uuid,
  721. nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
  722. }
  723. if (vf == PORT_SELF_VF) {
  724. /* Special case handling: mac came from IFLA_VF_MAC */
  725. if (!is_zero_ether_addr(prev_pp.vf_mac))
  726. memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN);
  727. if (is_zero_ether_addr(netdev->dev_addr))
  728. eth_hw_addr_random(netdev);
  729. } else {
  730. /* SR-IOV VF: get mac from adapter */
  731. ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
  732. vnic_dev_get_mac_addr, pp->mac_addr);
  733. if (err) {
  734. netdev_err(netdev, "Error getting mac for vf %d\n", vf);
  735. memcpy(pp, &prev_pp, sizeof(*pp));
  736. return enic_dev_status_to_errno(err);
  737. }
  738. }
  739. err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp);
  740. if (err) {
  741. if (restore_pp) {
  742. /* Things are still the way they were: Implicit
  743. * DISASSOCIATE failed
  744. */
  745. memcpy(pp, &prev_pp, sizeof(*pp));
  746. } else {
  747. memset(pp, 0, sizeof(*pp));
  748. if (vf == PORT_SELF_VF)
  749. memset(netdev->dev_addr, 0, ETH_ALEN);
  750. }
  751. } else {
  752. /* Set flag to indicate that the port assoc/disassoc
  753. * request has been sent out to fw
  754. */
  755. pp->set |= ENIC_PORT_REQUEST_APPLIED;
  756. /* If DISASSOCIATE, clean up all assigned/saved macaddresses */
  757. if (pp->request == PORT_REQUEST_DISASSOCIATE) {
  758. memset(pp->mac_addr, 0, ETH_ALEN);
  759. if (vf == PORT_SELF_VF)
  760. memset(netdev->dev_addr, 0, ETH_ALEN);
  761. }
  762. }
  763. if (vf == PORT_SELF_VF)
  764. memset(pp->vf_mac, 0, ETH_ALEN);
  765. return err;
  766. }
  767. static int enic_get_vf_port(struct net_device *netdev, int vf,
  768. struct sk_buff *skb)
  769. {
  770. struct enic *enic = netdev_priv(netdev);
  771. u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
  772. struct enic_port_profile *pp;
  773. int err;
  774. ENIC_PP_BY_INDEX(enic, vf, pp, &err);
  775. if (err)
  776. return err;
  777. if (!(pp->set & ENIC_PORT_REQUEST_APPLIED))
  778. return -ENODATA;
  779. err = enic_process_get_pp_request(enic, vf, pp->request, &response);
  780. if (err)
  781. return err;
  782. if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp->request) ||
  783. nla_put_u16(skb, IFLA_PORT_RESPONSE, response) ||
  784. ((pp->set & ENIC_SET_NAME) &&
  785. nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp->name)) ||
  786. ((pp->set & ENIC_SET_INSTANCE) &&
  787. nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
  788. pp->instance_uuid)) ||
  789. ((pp->set & ENIC_SET_HOST) &&
  790. nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp->host_uuid)))
  791. goto nla_put_failure;
  792. return 0;
  793. nla_put_failure:
  794. return -EMSGSIZE;
  795. }
  796. static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
  797. {
  798. struct enic *enic = vnic_dev_priv(rq->vdev);
  799. if (!buf->os_buf)
  800. return;
  801. pci_unmap_single(enic->pdev, buf->dma_addr,
  802. buf->len, PCI_DMA_FROMDEVICE);
  803. dev_kfree_skb_any(buf->os_buf);
  804. }
  805. static int enic_rq_alloc_buf(struct vnic_rq *rq)
  806. {
  807. struct enic *enic = vnic_dev_priv(rq->vdev);
  808. struct net_device *netdev = enic->netdev;
  809. struct sk_buff *skb;
  810. unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
  811. unsigned int os_buf_index = 0;
  812. dma_addr_t dma_addr;
  813. skb = netdev_alloc_skb_ip_align(netdev, len);
  814. if (!skb)
  815. return -ENOMEM;
  816. dma_addr = pci_map_single(enic->pdev, skb->data,
  817. len, PCI_DMA_FROMDEVICE);
  818. enic_queue_rq_desc(rq, skb, os_buf_index,
  819. dma_addr, len);
  820. return 0;
  821. }
  822. static void enic_rq_indicate_buf(struct vnic_rq *rq,
  823. struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
  824. int skipped, void *opaque)
  825. {
  826. struct enic *enic = vnic_dev_priv(rq->vdev);
  827. struct net_device *netdev = enic->netdev;
  828. struct sk_buff *skb;
  829. u8 type, color, eop, sop, ingress_port, vlan_stripped;
  830. u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
  831. u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
  832. u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
  833. u8 packet_error;
  834. u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
  835. u32 rss_hash;
  836. if (skipped)
  837. return;
  838. skb = buf->os_buf;
  839. prefetch(skb->data - NET_IP_ALIGN);
  840. pci_unmap_single(enic->pdev, buf->dma_addr,
  841. buf->len, PCI_DMA_FROMDEVICE);
  842. cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
  843. &type, &color, &q_number, &completed_index,
  844. &ingress_port, &fcoe, &eop, &sop, &rss_type,
  845. &csum_not_calc, &rss_hash, &bytes_written,
  846. &packet_error, &vlan_stripped, &vlan_tci, &checksum,
  847. &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
  848. &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
  849. &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
  850. &fcs_ok);
  851. if (packet_error) {
  852. if (!fcs_ok) {
  853. if (bytes_written > 0)
  854. enic->rq_bad_fcs++;
  855. else if (bytes_written == 0)
  856. enic->rq_truncated_pkts++;
  857. }
  858. dev_kfree_skb_any(skb);
  859. return;
  860. }
  861. if (eop && bytes_written > 0) {
  862. /* Good receive
  863. */
  864. skb_put(skb, bytes_written);
  865. skb->protocol = eth_type_trans(skb, netdev);
  866. skb_record_rx_queue(skb, q_number);
  867. if (netdev->features & NETIF_F_RXHASH) {
  868. skb_set_hash(skb, rss_hash,
  869. (rss_type &
  870. (NIC_CFG_RSS_HASH_TYPE_TCP_IPV6_EX |
  871. NIC_CFG_RSS_HASH_TYPE_TCP_IPV6 |
  872. NIC_CFG_RSS_HASH_TYPE_TCP_IPV4)) ?
  873. PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
  874. }
  875. if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc) {
  876. skb->csum = htons(checksum);
  877. skb->ip_summed = CHECKSUM_COMPLETE;
  878. }
  879. if (vlan_stripped)
  880. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tci);
  881. if (netdev->features & NETIF_F_GRO)
  882. napi_gro_receive(&enic->napi[q_number], skb);
  883. else
  884. netif_receive_skb(skb);
  885. } else {
  886. /* Buffer overflow
  887. */
  888. dev_kfree_skb_any(skb);
  889. }
  890. }
  891. static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  892. u8 type, u16 q_number, u16 completed_index, void *opaque)
  893. {
  894. struct enic *enic = vnic_dev_priv(vdev);
  895. vnic_rq_service(&enic->rq[q_number], cq_desc,
  896. completed_index, VNIC_RQ_RETURN_DESC,
  897. enic_rq_indicate_buf, opaque);
  898. return 0;
  899. }
  900. static int enic_poll(struct napi_struct *napi, int budget)
  901. {
  902. struct net_device *netdev = napi->dev;
  903. struct enic *enic = netdev_priv(netdev);
  904. unsigned int cq_rq = enic_cq_rq(enic, 0);
  905. unsigned int cq_wq = enic_cq_wq(enic, 0);
  906. unsigned int intr = enic_legacy_io_intr();
  907. unsigned int rq_work_to_do = budget;
  908. unsigned int wq_work_to_do = -1; /* no limit */
  909. unsigned int work_done, rq_work_done, wq_work_done;
  910. int err;
  911. /* Service RQ (first) and WQ
  912. */
  913. rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
  914. rq_work_to_do, enic_rq_service, NULL);
  915. wq_work_done = vnic_cq_service(&enic->cq[cq_wq],
  916. wq_work_to_do, enic_wq_service, NULL);
  917. /* Accumulate intr event credits for this polling
  918. * cycle. An intr event is the completion of a
  919. * a WQ or RQ packet.
  920. */
  921. work_done = rq_work_done + wq_work_done;
  922. if (work_done > 0)
  923. vnic_intr_return_credits(&enic->intr[intr],
  924. work_done,
  925. 0 /* don't unmask intr */,
  926. 0 /* don't reset intr timer */);
  927. err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
  928. /* Buffer allocation failed. Stay in polling
  929. * mode so we can try to fill the ring again.
  930. */
  931. if (err)
  932. rq_work_done = rq_work_to_do;
  933. if (rq_work_done < rq_work_to_do) {
  934. /* Some work done, but not enough to stay in polling,
  935. * exit polling
  936. */
  937. napi_complete(napi);
  938. vnic_intr_unmask(&enic->intr[intr]);
  939. }
  940. return rq_work_done;
  941. }
  942. static int enic_poll_msix(struct napi_struct *napi, int budget)
  943. {
  944. struct net_device *netdev = napi->dev;
  945. struct enic *enic = netdev_priv(netdev);
  946. unsigned int rq = (napi - &enic->napi[0]);
  947. unsigned int cq = enic_cq_rq(enic, rq);
  948. unsigned int intr = enic_msix_rq_intr(enic, rq);
  949. unsigned int work_to_do = budget;
  950. unsigned int work_done;
  951. int err;
  952. /* Service RQ
  953. */
  954. work_done = vnic_cq_service(&enic->cq[cq],
  955. work_to_do, enic_rq_service, NULL);
  956. /* Return intr event credits for this polling
  957. * cycle. An intr event is the completion of a
  958. * RQ packet.
  959. */
  960. if (work_done > 0)
  961. vnic_intr_return_credits(&enic->intr[intr],
  962. work_done,
  963. 0 /* don't unmask intr */,
  964. 0 /* don't reset intr timer */);
  965. err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
  966. /* Buffer allocation failed. Stay in polling mode
  967. * so we can try to fill the ring again.
  968. */
  969. if (err)
  970. work_done = work_to_do;
  971. if (work_done < work_to_do) {
  972. /* Some work done, but not enough to stay in polling,
  973. * exit polling
  974. */
  975. napi_complete(napi);
  976. vnic_intr_unmask(&enic->intr[intr]);
  977. }
  978. return work_done;
  979. }
  980. static void enic_notify_timer(unsigned long data)
  981. {
  982. struct enic *enic = (struct enic *)data;
  983. enic_notify_check(enic);
  984. mod_timer(&enic->notify_timer,
  985. round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
  986. }
  987. static void enic_free_intr(struct enic *enic)
  988. {
  989. struct net_device *netdev = enic->netdev;
  990. unsigned int i;
  991. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  992. case VNIC_DEV_INTR_MODE_INTX:
  993. free_irq(enic->pdev->irq, netdev);
  994. break;
  995. case VNIC_DEV_INTR_MODE_MSI:
  996. free_irq(enic->pdev->irq, enic);
  997. break;
  998. case VNIC_DEV_INTR_MODE_MSIX:
  999. for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
  1000. if (enic->msix[i].requested)
  1001. free_irq(enic->msix_entry[i].vector,
  1002. enic->msix[i].devid);
  1003. break;
  1004. default:
  1005. break;
  1006. }
  1007. }
  1008. static int enic_request_intr(struct enic *enic)
  1009. {
  1010. struct net_device *netdev = enic->netdev;
  1011. unsigned int i, intr;
  1012. int err = 0;
  1013. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1014. case VNIC_DEV_INTR_MODE_INTX:
  1015. err = request_irq(enic->pdev->irq, enic_isr_legacy,
  1016. IRQF_SHARED, netdev->name, netdev);
  1017. break;
  1018. case VNIC_DEV_INTR_MODE_MSI:
  1019. err = request_irq(enic->pdev->irq, enic_isr_msi,
  1020. 0, netdev->name, enic);
  1021. break;
  1022. case VNIC_DEV_INTR_MODE_MSIX:
  1023. for (i = 0; i < enic->rq_count; i++) {
  1024. intr = enic_msix_rq_intr(enic, i);
  1025. snprintf(enic->msix[intr].devname,
  1026. sizeof(enic->msix[intr].devname),
  1027. "%.11s-rx-%d", netdev->name, i);
  1028. enic->msix[intr].isr = enic_isr_msix_rq;
  1029. enic->msix[intr].devid = &enic->napi[i];
  1030. }
  1031. for (i = 0; i < enic->wq_count; i++) {
  1032. intr = enic_msix_wq_intr(enic, i);
  1033. snprintf(enic->msix[intr].devname,
  1034. sizeof(enic->msix[intr].devname),
  1035. "%.11s-tx-%d", netdev->name, i);
  1036. enic->msix[intr].isr = enic_isr_msix_wq;
  1037. enic->msix[intr].devid = enic;
  1038. }
  1039. intr = enic_msix_err_intr(enic);
  1040. snprintf(enic->msix[intr].devname,
  1041. sizeof(enic->msix[intr].devname),
  1042. "%.11s-err", netdev->name);
  1043. enic->msix[intr].isr = enic_isr_msix_err;
  1044. enic->msix[intr].devid = enic;
  1045. intr = enic_msix_notify_intr(enic);
  1046. snprintf(enic->msix[intr].devname,
  1047. sizeof(enic->msix[intr].devname),
  1048. "%.11s-notify", netdev->name);
  1049. enic->msix[intr].isr = enic_isr_msix_notify;
  1050. enic->msix[intr].devid = enic;
  1051. for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
  1052. enic->msix[i].requested = 0;
  1053. for (i = 0; i < enic->intr_count; i++) {
  1054. err = request_irq(enic->msix_entry[i].vector,
  1055. enic->msix[i].isr, 0,
  1056. enic->msix[i].devname,
  1057. enic->msix[i].devid);
  1058. if (err) {
  1059. enic_free_intr(enic);
  1060. break;
  1061. }
  1062. enic->msix[i].requested = 1;
  1063. }
  1064. break;
  1065. default:
  1066. break;
  1067. }
  1068. return err;
  1069. }
  1070. static void enic_synchronize_irqs(struct enic *enic)
  1071. {
  1072. unsigned int i;
  1073. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1074. case VNIC_DEV_INTR_MODE_INTX:
  1075. case VNIC_DEV_INTR_MODE_MSI:
  1076. synchronize_irq(enic->pdev->irq);
  1077. break;
  1078. case VNIC_DEV_INTR_MODE_MSIX:
  1079. for (i = 0; i < enic->intr_count; i++)
  1080. synchronize_irq(enic->msix_entry[i].vector);
  1081. break;
  1082. default:
  1083. break;
  1084. }
  1085. }
  1086. static int enic_dev_notify_set(struct enic *enic)
  1087. {
  1088. int err;
  1089. spin_lock(&enic->devcmd_lock);
  1090. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1091. case VNIC_DEV_INTR_MODE_INTX:
  1092. err = vnic_dev_notify_set(enic->vdev,
  1093. enic_legacy_notify_intr());
  1094. break;
  1095. case VNIC_DEV_INTR_MODE_MSIX:
  1096. err = vnic_dev_notify_set(enic->vdev,
  1097. enic_msix_notify_intr(enic));
  1098. break;
  1099. default:
  1100. err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
  1101. break;
  1102. }
  1103. spin_unlock(&enic->devcmd_lock);
  1104. return err;
  1105. }
  1106. static void enic_notify_timer_start(struct enic *enic)
  1107. {
  1108. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1109. case VNIC_DEV_INTR_MODE_MSI:
  1110. mod_timer(&enic->notify_timer, jiffies);
  1111. break;
  1112. default:
  1113. /* Using intr for notification for INTx/MSI-X */
  1114. break;
  1115. }
  1116. }
  1117. /* rtnl lock is held, process context */
  1118. static int enic_open(struct net_device *netdev)
  1119. {
  1120. struct enic *enic = netdev_priv(netdev);
  1121. unsigned int i;
  1122. int err;
  1123. err = enic_request_intr(enic);
  1124. if (err) {
  1125. netdev_err(netdev, "Unable to request irq.\n");
  1126. return err;
  1127. }
  1128. err = enic_dev_notify_set(enic);
  1129. if (err) {
  1130. netdev_err(netdev,
  1131. "Failed to alloc notify buffer, aborting.\n");
  1132. goto err_out_free_intr;
  1133. }
  1134. for (i = 0; i < enic->rq_count; i++) {
  1135. vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
  1136. /* Need at least one buffer on ring to get going */
  1137. if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
  1138. netdev_err(netdev, "Unable to alloc receive buffers\n");
  1139. err = -ENOMEM;
  1140. goto err_out_notify_unset;
  1141. }
  1142. }
  1143. for (i = 0; i < enic->wq_count; i++)
  1144. vnic_wq_enable(&enic->wq[i]);
  1145. for (i = 0; i < enic->rq_count; i++)
  1146. vnic_rq_enable(&enic->rq[i]);
  1147. if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
  1148. enic_dev_add_station_addr(enic);
  1149. enic_set_rx_mode(netdev);
  1150. netif_tx_wake_all_queues(netdev);
  1151. for (i = 0; i < enic->rq_count; i++)
  1152. napi_enable(&enic->napi[i]);
  1153. enic_dev_enable(enic);
  1154. for (i = 0; i < enic->intr_count; i++)
  1155. vnic_intr_unmask(&enic->intr[i]);
  1156. enic_notify_timer_start(enic);
  1157. return 0;
  1158. err_out_notify_unset:
  1159. enic_dev_notify_unset(enic);
  1160. err_out_free_intr:
  1161. enic_free_intr(enic);
  1162. return err;
  1163. }
  1164. /* rtnl lock is held, process context */
  1165. static int enic_stop(struct net_device *netdev)
  1166. {
  1167. struct enic *enic = netdev_priv(netdev);
  1168. unsigned int i;
  1169. int err;
  1170. for (i = 0; i < enic->intr_count; i++) {
  1171. vnic_intr_mask(&enic->intr[i]);
  1172. (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
  1173. }
  1174. enic_synchronize_irqs(enic);
  1175. del_timer_sync(&enic->notify_timer);
  1176. enic_dev_disable(enic);
  1177. for (i = 0; i < enic->rq_count; i++)
  1178. napi_disable(&enic->napi[i]);
  1179. netif_carrier_off(netdev);
  1180. netif_tx_disable(netdev);
  1181. if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
  1182. enic_dev_del_station_addr(enic);
  1183. for (i = 0; i < enic->wq_count; i++) {
  1184. err = vnic_wq_disable(&enic->wq[i]);
  1185. if (err)
  1186. return err;
  1187. }
  1188. for (i = 0; i < enic->rq_count; i++) {
  1189. err = vnic_rq_disable(&enic->rq[i]);
  1190. if (err)
  1191. return err;
  1192. }
  1193. enic_dev_notify_unset(enic);
  1194. enic_free_intr(enic);
  1195. for (i = 0; i < enic->wq_count; i++)
  1196. vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
  1197. for (i = 0; i < enic->rq_count; i++)
  1198. vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
  1199. for (i = 0; i < enic->cq_count; i++)
  1200. vnic_cq_clean(&enic->cq[i]);
  1201. for (i = 0; i < enic->intr_count; i++)
  1202. vnic_intr_clean(&enic->intr[i]);
  1203. return 0;
  1204. }
  1205. static int enic_change_mtu(struct net_device *netdev, int new_mtu)
  1206. {
  1207. struct enic *enic = netdev_priv(netdev);
  1208. int running = netif_running(netdev);
  1209. if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
  1210. return -EINVAL;
  1211. if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
  1212. return -EOPNOTSUPP;
  1213. if (running)
  1214. enic_stop(netdev);
  1215. netdev->mtu = new_mtu;
  1216. if (netdev->mtu > enic->port_mtu)
  1217. netdev_warn(netdev,
  1218. "interface MTU (%d) set higher than port MTU (%d)\n",
  1219. netdev->mtu, enic->port_mtu);
  1220. if (running)
  1221. enic_open(netdev);
  1222. return 0;
  1223. }
  1224. static void enic_change_mtu_work(struct work_struct *work)
  1225. {
  1226. struct enic *enic = container_of(work, struct enic, change_mtu_work);
  1227. struct net_device *netdev = enic->netdev;
  1228. int new_mtu = vnic_dev_mtu(enic->vdev);
  1229. int err;
  1230. unsigned int i;
  1231. new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu));
  1232. rtnl_lock();
  1233. /* Stop RQ */
  1234. del_timer_sync(&enic->notify_timer);
  1235. for (i = 0; i < enic->rq_count; i++)
  1236. napi_disable(&enic->napi[i]);
  1237. vnic_intr_mask(&enic->intr[0]);
  1238. enic_synchronize_irqs(enic);
  1239. err = vnic_rq_disable(&enic->rq[0]);
  1240. if (err) {
  1241. rtnl_unlock();
  1242. netdev_err(netdev, "Unable to disable RQ.\n");
  1243. return;
  1244. }
  1245. vnic_rq_clean(&enic->rq[0], enic_free_rq_buf);
  1246. vnic_cq_clean(&enic->cq[0]);
  1247. vnic_intr_clean(&enic->intr[0]);
  1248. /* Fill RQ with new_mtu-sized buffers */
  1249. netdev->mtu = new_mtu;
  1250. vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
  1251. /* Need at least one buffer on ring to get going */
  1252. if (vnic_rq_desc_used(&enic->rq[0]) == 0) {
  1253. rtnl_unlock();
  1254. netdev_err(netdev, "Unable to alloc receive buffers.\n");
  1255. return;
  1256. }
  1257. /* Start RQ */
  1258. vnic_rq_enable(&enic->rq[0]);
  1259. napi_enable(&enic->napi[0]);
  1260. vnic_intr_unmask(&enic->intr[0]);
  1261. enic_notify_timer_start(enic);
  1262. rtnl_unlock();
  1263. netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);
  1264. }
  1265. #ifdef CONFIG_NET_POLL_CONTROLLER
  1266. static void enic_poll_controller(struct net_device *netdev)
  1267. {
  1268. struct enic *enic = netdev_priv(netdev);
  1269. struct vnic_dev *vdev = enic->vdev;
  1270. unsigned int i, intr;
  1271. switch (vnic_dev_get_intr_mode(vdev)) {
  1272. case VNIC_DEV_INTR_MODE_MSIX:
  1273. for (i = 0; i < enic->rq_count; i++) {
  1274. intr = enic_msix_rq_intr(enic, i);
  1275. enic_isr_msix_rq(enic->msix_entry[intr].vector,
  1276. &enic->napi[i]);
  1277. }
  1278. for (i = 0; i < enic->wq_count; i++) {
  1279. intr = enic_msix_wq_intr(enic, i);
  1280. enic_isr_msix_wq(enic->msix_entry[intr].vector, enic);
  1281. }
  1282. break;
  1283. case VNIC_DEV_INTR_MODE_MSI:
  1284. enic_isr_msi(enic->pdev->irq, enic);
  1285. break;
  1286. case VNIC_DEV_INTR_MODE_INTX:
  1287. enic_isr_legacy(enic->pdev->irq, netdev);
  1288. break;
  1289. default:
  1290. break;
  1291. }
  1292. }
  1293. #endif
  1294. static int enic_dev_wait(struct vnic_dev *vdev,
  1295. int (*start)(struct vnic_dev *, int),
  1296. int (*finished)(struct vnic_dev *, int *),
  1297. int arg)
  1298. {
  1299. unsigned long time;
  1300. int done;
  1301. int err;
  1302. BUG_ON(in_interrupt());
  1303. err = start(vdev, arg);
  1304. if (err)
  1305. return err;
  1306. /* Wait for func to complete...2 seconds max
  1307. */
  1308. time = jiffies + (HZ * 2);
  1309. do {
  1310. err = finished(vdev, &done);
  1311. if (err)
  1312. return err;
  1313. if (done)
  1314. return 0;
  1315. schedule_timeout_uninterruptible(HZ / 10);
  1316. } while (time_after(time, jiffies));
  1317. return -ETIMEDOUT;
  1318. }
  1319. static int enic_dev_open(struct enic *enic)
  1320. {
  1321. int err;
  1322. err = enic_dev_wait(enic->vdev, vnic_dev_open,
  1323. vnic_dev_open_done, 0);
  1324. if (err)
  1325. dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
  1326. err);
  1327. return err;
  1328. }
  1329. static int enic_dev_hang_reset(struct enic *enic)
  1330. {
  1331. int err;
  1332. err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
  1333. vnic_dev_hang_reset_done, 0);
  1334. if (err)
  1335. netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
  1336. err);
  1337. return err;
  1338. }
  1339. static int enic_set_rsskey(struct enic *enic)
  1340. {
  1341. dma_addr_t rss_key_buf_pa;
  1342. union vnic_rss_key *rss_key_buf_va = NULL;
  1343. union vnic_rss_key rss_key = {
  1344. .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101},
  1345. .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101},
  1346. .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115},
  1347. .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108},
  1348. };
  1349. int err;
  1350. rss_key_buf_va = pci_alloc_consistent(enic->pdev,
  1351. sizeof(union vnic_rss_key), &rss_key_buf_pa);
  1352. if (!rss_key_buf_va)
  1353. return -ENOMEM;
  1354. memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
  1355. spin_lock(&enic->devcmd_lock);
  1356. err = enic_set_rss_key(enic,
  1357. rss_key_buf_pa,
  1358. sizeof(union vnic_rss_key));
  1359. spin_unlock(&enic->devcmd_lock);
  1360. pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
  1361. rss_key_buf_va, rss_key_buf_pa);
  1362. return err;
  1363. }
  1364. static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
  1365. {
  1366. dma_addr_t rss_cpu_buf_pa;
  1367. union vnic_rss_cpu *rss_cpu_buf_va = NULL;
  1368. unsigned int i;
  1369. int err;
  1370. rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
  1371. sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
  1372. if (!rss_cpu_buf_va)
  1373. return -ENOMEM;
  1374. for (i = 0; i < (1 << rss_hash_bits); i++)
  1375. (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
  1376. spin_lock(&enic->devcmd_lock);
  1377. err = enic_set_rss_cpu(enic,
  1378. rss_cpu_buf_pa,
  1379. sizeof(union vnic_rss_cpu));
  1380. spin_unlock(&enic->devcmd_lock);
  1381. pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
  1382. rss_cpu_buf_va, rss_cpu_buf_pa);
  1383. return err;
  1384. }
  1385. static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
  1386. u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
  1387. {
  1388. const u8 tso_ipid_split_en = 0;
  1389. const u8 ig_vlan_strip_en = 1;
  1390. int err;
  1391. /* Enable VLAN tag stripping.
  1392. */
  1393. spin_lock(&enic->devcmd_lock);
  1394. err = enic_set_nic_cfg(enic,
  1395. rss_default_cpu, rss_hash_type,
  1396. rss_hash_bits, rss_base_cpu,
  1397. rss_enable, tso_ipid_split_en,
  1398. ig_vlan_strip_en);
  1399. spin_unlock(&enic->devcmd_lock);
  1400. return err;
  1401. }
  1402. static int enic_set_rss_nic_cfg(struct enic *enic)
  1403. {
  1404. struct device *dev = enic_get_dev(enic);
  1405. const u8 rss_default_cpu = 0;
  1406. const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
  1407. NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
  1408. NIC_CFG_RSS_HASH_TYPE_IPV6 |
  1409. NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
  1410. const u8 rss_hash_bits = 7;
  1411. const u8 rss_base_cpu = 0;
  1412. u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
  1413. if (rss_enable) {
  1414. if (!enic_set_rsskey(enic)) {
  1415. if (enic_set_rsscpu(enic, rss_hash_bits)) {
  1416. rss_enable = 0;
  1417. dev_warn(dev, "RSS disabled, "
  1418. "Failed to set RSS cpu indirection table.");
  1419. }
  1420. } else {
  1421. rss_enable = 0;
  1422. dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
  1423. }
  1424. }
  1425. return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
  1426. rss_hash_bits, rss_base_cpu, rss_enable);
  1427. }
  1428. static void enic_reset(struct work_struct *work)
  1429. {
  1430. struct enic *enic = container_of(work, struct enic, reset);
  1431. if (!netif_running(enic->netdev))
  1432. return;
  1433. rtnl_lock();
  1434. spin_lock(&enic->enic_api_lock);
  1435. enic_dev_hang_notify(enic);
  1436. enic_stop(enic->netdev);
  1437. enic_dev_hang_reset(enic);
  1438. enic_reset_addr_lists(enic);
  1439. enic_init_vnic_resources(enic);
  1440. enic_set_rss_nic_cfg(enic);
  1441. enic_dev_set_ig_vlan_rewrite_mode(enic);
  1442. enic_open(enic->netdev);
  1443. spin_unlock(&enic->enic_api_lock);
  1444. call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev);
  1445. rtnl_unlock();
  1446. }
  1447. static int enic_set_intr_mode(struct enic *enic)
  1448. {
  1449. unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
  1450. unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
  1451. unsigned int i;
  1452. /* Set interrupt mode (INTx, MSI, MSI-X) depending
  1453. * on system capabilities.
  1454. *
  1455. * Try MSI-X first
  1456. *
  1457. * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
  1458. * (the second to last INTR is used for WQ/RQ errors)
  1459. * (the last INTR is used for notifications)
  1460. */
  1461. BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
  1462. for (i = 0; i < n + m + 2; i++)
  1463. enic->msix_entry[i].entry = i;
  1464. /* Use multiple RQs if RSS is enabled
  1465. */
  1466. if (ENIC_SETTING(enic, RSS) &&
  1467. enic->config.intr_mode < 1 &&
  1468. enic->rq_count >= n &&
  1469. enic->wq_count >= m &&
  1470. enic->cq_count >= n + m &&
  1471. enic->intr_count >= n + m + 2) {
  1472. if (!pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
  1473. enic->rq_count = n;
  1474. enic->wq_count = m;
  1475. enic->cq_count = n + m;
  1476. enic->intr_count = n + m + 2;
  1477. vnic_dev_set_intr_mode(enic->vdev,
  1478. VNIC_DEV_INTR_MODE_MSIX);
  1479. return 0;
  1480. }
  1481. }
  1482. if (enic->config.intr_mode < 1 &&
  1483. enic->rq_count >= 1 &&
  1484. enic->wq_count >= m &&
  1485. enic->cq_count >= 1 + m &&
  1486. enic->intr_count >= 1 + m + 2) {
  1487. if (!pci_enable_msix(enic->pdev, enic->msix_entry, 1 + m + 2)) {
  1488. enic->rq_count = 1;
  1489. enic->wq_count = m;
  1490. enic->cq_count = 1 + m;
  1491. enic->intr_count = 1 + m + 2;
  1492. vnic_dev_set_intr_mode(enic->vdev,
  1493. VNIC_DEV_INTR_MODE_MSIX);
  1494. return 0;
  1495. }
  1496. }
  1497. /* Next try MSI
  1498. *
  1499. * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
  1500. */
  1501. if (enic->config.intr_mode < 2 &&
  1502. enic->rq_count >= 1 &&
  1503. enic->wq_count >= 1 &&
  1504. enic->cq_count >= 2 &&
  1505. enic->intr_count >= 1 &&
  1506. !pci_enable_msi(enic->pdev)) {
  1507. enic->rq_count = 1;
  1508. enic->wq_count = 1;
  1509. enic->cq_count = 2;
  1510. enic->intr_count = 1;
  1511. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
  1512. return 0;
  1513. }
  1514. /* Next try INTx
  1515. *
  1516. * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
  1517. * (the first INTR is used for WQ/RQ)
  1518. * (the second INTR is used for WQ/RQ errors)
  1519. * (the last INTR is used for notifications)
  1520. */
  1521. if (enic->config.intr_mode < 3 &&
  1522. enic->rq_count >= 1 &&
  1523. enic->wq_count >= 1 &&
  1524. enic->cq_count >= 2 &&
  1525. enic->intr_count >= 3) {
  1526. enic->rq_count = 1;
  1527. enic->wq_count = 1;
  1528. enic->cq_count = 2;
  1529. enic->intr_count = 3;
  1530. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
  1531. return 0;
  1532. }
  1533. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
  1534. return -EINVAL;
  1535. }
  1536. static void enic_clear_intr_mode(struct enic *enic)
  1537. {
  1538. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1539. case VNIC_DEV_INTR_MODE_MSIX:
  1540. pci_disable_msix(enic->pdev);
  1541. break;
  1542. case VNIC_DEV_INTR_MODE_MSI:
  1543. pci_disable_msi(enic->pdev);
  1544. break;
  1545. default:
  1546. break;
  1547. }
  1548. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
  1549. }
  1550. static const struct net_device_ops enic_netdev_dynamic_ops = {
  1551. .ndo_open = enic_open,
  1552. .ndo_stop = enic_stop,
  1553. .ndo_start_xmit = enic_hard_start_xmit,
  1554. .ndo_get_stats64 = enic_get_stats,
  1555. .ndo_validate_addr = eth_validate_addr,
  1556. .ndo_set_rx_mode = enic_set_rx_mode,
  1557. .ndo_set_mac_address = enic_set_mac_address_dynamic,
  1558. .ndo_change_mtu = enic_change_mtu,
  1559. .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
  1560. .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
  1561. .ndo_tx_timeout = enic_tx_timeout,
  1562. .ndo_set_vf_port = enic_set_vf_port,
  1563. .ndo_get_vf_port = enic_get_vf_port,
  1564. .ndo_set_vf_mac = enic_set_vf_mac,
  1565. #ifdef CONFIG_NET_POLL_CONTROLLER
  1566. .ndo_poll_controller = enic_poll_controller,
  1567. #endif
  1568. };
  1569. static const struct net_device_ops enic_netdev_ops = {
  1570. .ndo_open = enic_open,
  1571. .ndo_stop = enic_stop,
  1572. .ndo_start_xmit = enic_hard_start_xmit,
  1573. .ndo_get_stats64 = enic_get_stats,
  1574. .ndo_validate_addr = eth_validate_addr,
  1575. .ndo_set_mac_address = enic_set_mac_address,
  1576. .ndo_set_rx_mode = enic_set_rx_mode,
  1577. .ndo_change_mtu = enic_change_mtu,
  1578. .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
  1579. .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
  1580. .ndo_tx_timeout = enic_tx_timeout,
  1581. .ndo_set_vf_port = enic_set_vf_port,
  1582. .ndo_get_vf_port = enic_get_vf_port,
  1583. .ndo_set_vf_mac = enic_set_vf_mac,
  1584. #ifdef CONFIG_NET_POLL_CONTROLLER
  1585. .ndo_poll_controller = enic_poll_controller,
  1586. #endif
  1587. };
  1588. static void enic_dev_deinit(struct enic *enic)
  1589. {
  1590. unsigned int i;
  1591. for (i = 0; i < enic->rq_count; i++)
  1592. netif_napi_del(&enic->napi[i]);
  1593. enic_free_vnic_resources(enic);
  1594. enic_clear_intr_mode(enic);
  1595. }
  1596. static int enic_dev_init(struct enic *enic)
  1597. {
  1598. struct device *dev = enic_get_dev(enic);
  1599. struct net_device *netdev = enic->netdev;
  1600. unsigned int i;
  1601. int err;
  1602. /* Get interrupt coalesce timer info */
  1603. err = enic_dev_intr_coal_timer_info(enic);
  1604. if (err) {
  1605. dev_warn(dev, "Using default conversion factor for "
  1606. "interrupt coalesce timer\n");
  1607. vnic_dev_intr_coal_timer_info_default(enic->vdev);
  1608. }
  1609. /* Get vNIC configuration
  1610. */
  1611. err = enic_get_vnic_config(enic);
  1612. if (err) {
  1613. dev_err(dev, "Get vNIC configuration failed, aborting\n");
  1614. return err;
  1615. }
  1616. /* Get available resource counts
  1617. */
  1618. enic_get_res_counts(enic);
  1619. /* Set interrupt mode based on resource counts and system
  1620. * capabilities
  1621. */
  1622. err = enic_set_intr_mode(enic);
  1623. if (err) {
  1624. dev_err(dev, "Failed to set intr mode based on resource "
  1625. "counts and system capabilities, aborting\n");
  1626. return err;
  1627. }
  1628. /* Allocate and configure vNIC resources
  1629. */
  1630. err = enic_alloc_vnic_resources(enic);
  1631. if (err) {
  1632. dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
  1633. goto err_out_free_vnic_resources;
  1634. }
  1635. enic_init_vnic_resources(enic);
  1636. err = enic_set_rss_nic_cfg(enic);
  1637. if (err) {
  1638. dev_err(dev, "Failed to config nic, aborting\n");
  1639. goto err_out_free_vnic_resources;
  1640. }
  1641. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1642. default:
  1643. netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
  1644. break;
  1645. case VNIC_DEV_INTR_MODE_MSIX:
  1646. for (i = 0; i < enic->rq_count; i++)
  1647. netif_napi_add(netdev, &enic->napi[i],
  1648. enic_poll_msix, 64);
  1649. break;
  1650. }
  1651. return 0;
  1652. err_out_free_vnic_resources:
  1653. enic_clear_intr_mode(enic);
  1654. enic_free_vnic_resources(enic);
  1655. return err;
  1656. }
  1657. static void enic_iounmap(struct enic *enic)
  1658. {
  1659. unsigned int i;
  1660. for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
  1661. if (enic->bar[i].vaddr)
  1662. iounmap(enic->bar[i].vaddr);
  1663. }
  1664. static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  1665. {
  1666. struct device *dev = &pdev->dev;
  1667. struct net_device *netdev;
  1668. struct enic *enic;
  1669. int using_dac = 0;
  1670. unsigned int i;
  1671. int err;
  1672. #ifdef CONFIG_PCI_IOV
  1673. int pos = 0;
  1674. #endif
  1675. int num_pps = 1;
  1676. /* Allocate net device structure and initialize. Private
  1677. * instance data is initialized to zero.
  1678. */
  1679. netdev = alloc_etherdev_mqs(sizeof(struct enic),
  1680. ENIC_RQ_MAX, ENIC_WQ_MAX);
  1681. if (!netdev)
  1682. return -ENOMEM;
  1683. pci_set_drvdata(pdev, netdev);
  1684. SET_NETDEV_DEV(netdev, &pdev->dev);
  1685. enic = netdev_priv(netdev);
  1686. enic->netdev = netdev;
  1687. enic->pdev = pdev;
  1688. /* Setup PCI resources
  1689. */
  1690. err = pci_enable_device_mem(pdev);
  1691. if (err) {
  1692. dev_err(dev, "Cannot enable PCI device, aborting\n");
  1693. goto err_out_free_netdev;
  1694. }
  1695. err = pci_request_regions(pdev, DRV_NAME);
  1696. if (err) {
  1697. dev_err(dev, "Cannot request PCI regions, aborting\n");
  1698. goto err_out_disable_device;
  1699. }
  1700. pci_set_master(pdev);
  1701. /* Query PCI controller on system for DMA addressing
  1702. * limitation for the device. Try 64-bit first, and
  1703. * fail to 32-bit.
  1704. */
  1705. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  1706. if (err) {
  1707. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1708. if (err) {
  1709. dev_err(dev, "No usable DMA configuration, aborting\n");
  1710. goto err_out_release_regions;
  1711. }
  1712. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  1713. if (err) {
  1714. dev_err(dev, "Unable to obtain %u-bit DMA "
  1715. "for consistent allocations, aborting\n", 32);
  1716. goto err_out_release_regions;
  1717. }
  1718. } else {
  1719. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
  1720. if (err) {
  1721. dev_err(dev, "Unable to obtain %u-bit DMA "
  1722. "for consistent allocations, aborting\n", 64);
  1723. goto err_out_release_regions;
  1724. }
  1725. using_dac = 1;
  1726. }
  1727. /* Map vNIC resources from BAR0-5
  1728. */
  1729. for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
  1730. if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
  1731. continue;
  1732. enic->bar[i].len = pci_resource_len(pdev, i);
  1733. enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
  1734. if (!enic->bar[i].vaddr) {
  1735. dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
  1736. err = -ENODEV;
  1737. goto err_out_iounmap;
  1738. }
  1739. enic->bar[i].bus_addr = pci_resource_start(pdev, i);
  1740. }
  1741. /* Register vNIC device
  1742. */
  1743. enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
  1744. ARRAY_SIZE(enic->bar));
  1745. if (!enic->vdev) {
  1746. dev_err(dev, "vNIC registration failed, aborting\n");
  1747. err = -ENODEV;
  1748. goto err_out_iounmap;
  1749. }
  1750. #ifdef CONFIG_PCI_IOV
  1751. /* Get number of subvnics */
  1752. pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
  1753. if (pos) {
  1754. pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF,
  1755. &enic->num_vfs);
  1756. if (enic->num_vfs) {
  1757. err = pci_enable_sriov(pdev, enic->num_vfs);
  1758. if (err) {
  1759. dev_err(dev, "SRIOV enable failed, aborting."
  1760. " pci_enable_sriov() returned %d\n",
  1761. err);
  1762. goto err_out_vnic_unregister;
  1763. }
  1764. enic->priv_flags |= ENIC_SRIOV_ENABLED;
  1765. num_pps = enic->num_vfs;
  1766. }
  1767. }
  1768. #endif
  1769. /* Allocate structure for port profiles */
  1770. enic->pp = kcalloc(num_pps, sizeof(*enic->pp), GFP_KERNEL);
  1771. if (!enic->pp) {
  1772. err = -ENOMEM;
  1773. goto err_out_disable_sriov_pp;
  1774. }
  1775. /* Issue device open to get device in known state
  1776. */
  1777. err = enic_dev_open(enic);
  1778. if (err) {
  1779. dev_err(dev, "vNIC dev open failed, aborting\n");
  1780. goto err_out_disable_sriov;
  1781. }
  1782. /* Setup devcmd lock
  1783. */
  1784. spin_lock_init(&enic->devcmd_lock);
  1785. spin_lock_init(&enic->enic_api_lock);
  1786. /*
  1787. * Set ingress vlan rewrite mode before vnic initialization
  1788. */
  1789. err = enic_dev_set_ig_vlan_rewrite_mode(enic);
  1790. if (err) {
  1791. dev_err(dev,
  1792. "Failed to set ingress vlan rewrite mode, aborting.\n");
  1793. goto err_out_dev_close;
  1794. }
  1795. /* Issue device init to initialize the vnic-to-switch link.
  1796. * We'll start with carrier off and wait for link UP
  1797. * notification later to turn on carrier. We don't need
  1798. * to wait here for the vnic-to-switch link initialization
  1799. * to complete; link UP notification is the indication that
  1800. * the process is complete.
  1801. */
  1802. netif_carrier_off(netdev);
  1803. /* Do not call dev_init for a dynamic vnic.
  1804. * For a dynamic vnic, init_prov_info will be
  1805. * called later by an upper layer.
  1806. */
  1807. if (!enic_is_dynamic(enic)) {
  1808. err = vnic_dev_init(enic->vdev, 0);
  1809. if (err) {
  1810. dev_err(dev, "vNIC dev init failed, aborting\n");
  1811. goto err_out_dev_close;
  1812. }
  1813. }
  1814. err = enic_dev_init(enic);
  1815. if (err) {
  1816. dev_err(dev, "Device initialization failed, aborting\n");
  1817. goto err_out_dev_close;
  1818. }
  1819. netif_set_real_num_tx_queues(netdev, enic->wq_count);
  1820. netif_set_real_num_rx_queues(netdev, enic->rq_count);
  1821. /* Setup notification timer, HW reset task, and wq locks
  1822. */
  1823. init_timer(&enic->notify_timer);
  1824. enic->notify_timer.function = enic_notify_timer;
  1825. enic->notify_timer.data = (unsigned long)enic;
  1826. INIT_WORK(&enic->reset, enic_reset);
  1827. INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work);
  1828. for (i = 0; i < enic->wq_count; i++)
  1829. spin_lock_init(&enic->wq_lock[i]);
  1830. /* Register net device
  1831. */
  1832. enic->port_mtu = enic->config.mtu;
  1833. (void)enic_change_mtu(netdev, enic->port_mtu);
  1834. err = enic_set_mac_addr(netdev, enic->mac_addr);
  1835. if (err) {
  1836. dev_err(dev, "Invalid MAC address, aborting\n");
  1837. goto err_out_dev_deinit;
  1838. }
  1839. enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
  1840. enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
  1841. if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
  1842. netdev->netdev_ops = &enic_netdev_dynamic_ops;
  1843. else
  1844. netdev->netdev_ops = &enic_netdev_ops;
  1845. netdev->watchdog_timeo = 2 * HZ;
  1846. enic_set_ethtool_ops(netdev);
  1847. netdev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
  1848. if (ENIC_SETTING(enic, LOOP)) {
  1849. netdev->features &= ~NETIF_F_HW_VLAN_CTAG_TX;
  1850. enic->loop_enable = 1;
  1851. enic->loop_tag = enic->config.loop_tag;
  1852. dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
  1853. }
  1854. if (ENIC_SETTING(enic, TXCSUM))
  1855. netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
  1856. if (ENIC_SETTING(enic, TSO))
  1857. netdev->hw_features |= NETIF_F_TSO |
  1858. NETIF_F_TSO6 | NETIF_F_TSO_ECN;
  1859. if (ENIC_SETTING(enic, RSS))
  1860. netdev->hw_features |= NETIF_F_RXHASH;
  1861. if (ENIC_SETTING(enic, RXCSUM))
  1862. netdev->hw_features |= NETIF_F_RXCSUM;
  1863. netdev->features |= netdev->hw_features;
  1864. if (using_dac)
  1865. netdev->features |= NETIF_F_HIGHDMA;
  1866. netdev->priv_flags |= IFF_UNICAST_FLT;
  1867. err = register_netdev(netdev);
  1868. if (err) {
  1869. dev_err(dev, "Cannot register net device, aborting\n");
  1870. goto err_out_dev_deinit;
  1871. }
  1872. return 0;
  1873. err_out_dev_deinit:
  1874. enic_dev_deinit(enic);
  1875. err_out_dev_close:
  1876. vnic_dev_close(enic->vdev);
  1877. err_out_disable_sriov:
  1878. kfree(enic->pp);
  1879. err_out_disable_sriov_pp:
  1880. #ifdef CONFIG_PCI_IOV
  1881. if (enic_sriov_enabled(enic)) {
  1882. pci_disable_sriov(pdev);
  1883. enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
  1884. }
  1885. err_out_vnic_unregister:
  1886. #endif
  1887. vnic_dev_unregister(enic->vdev);
  1888. err_out_iounmap:
  1889. enic_iounmap(enic);
  1890. err_out_release_regions:
  1891. pci_release_regions(pdev);
  1892. err_out_disable_device:
  1893. pci_disable_device(pdev);
  1894. err_out_free_netdev:
  1895. free_netdev(netdev);
  1896. return err;
  1897. }
  1898. static void enic_remove(struct pci_dev *pdev)
  1899. {
  1900. struct net_device *netdev = pci_get_drvdata(pdev);
  1901. if (netdev) {
  1902. struct enic *enic = netdev_priv(netdev);
  1903. cancel_work_sync(&enic->reset);
  1904. cancel_work_sync(&enic->change_mtu_work);
  1905. unregister_netdev(netdev);
  1906. enic_dev_deinit(enic);
  1907. vnic_dev_close(enic->vdev);
  1908. #ifdef CONFIG_PCI_IOV
  1909. if (enic_sriov_enabled(enic)) {
  1910. pci_disable_sriov(pdev);
  1911. enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
  1912. }
  1913. #endif
  1914. kfree(enic->pp);
  1915. vnic_dev_unregister(enic->vdev);
  1916. enic_iounmap(enic);
  1917. pci_release_regions(pdev);
  1918. pci_disable_device(pdev);
  1919. free_netdev(netdev);
  1920. }
  1921. }
  1922. static struct pci_driver enic_driver = {
  1923. .name = DRV_NAME,
  1924. .id_table = enic_id_table,
  1925. .probe = enic_probe,
  1926. .remove = enic_remove,
  1927. };
  1928. static int __init enic_init_module(void)
  1929. {
  1930. pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
  1931. return pci_register_driver(&enic_driver);
  1932. }
  1933. static void __exit enic_cleanup_module(void)
  1934. {
  1935. pci_unregister_driver(&enic_driver);
  1936. }
  1937. module_init(enic_init_module);
  1938. module_exit(enic_cleanup_module);