bnx2x_sriov.c 102 KB

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  1. /* bnx2x_sriov.c: Broadcom Everest network driver.
  2. *
  3. * Copyright 2009-2013 Broadcom Corporation
  4. *
  5. * Unless you and Broadcom execute a separate written software license
  6. * agreement governing use of this software, this software is licensed to you
  7. * under the terms of the GNU General Public License version 2, available
  8. * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
  9. *
  10. * Notwithstanding the above, under no circumstances may you combine this
  11. * software in any way with any other Broadcom software provided under a
  12. * license other than the GPL, without Broadcom's express prior written
  13. * consent.
  14. *
  15. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  16. * Written by: Shmulik Ravid <shmulikr@broadcom.com>
  17. * Ariel Elior <ariele@broadcom.com>
  18. *
  19. */
  20. #include "bnx2x.h"
  21. #include "bnx2x_init.h"
  22. #include "bnx2x_cmn.h"
  23. #include "bnx2x_sp.h"
  24. #include <linux/crc32.h>
  25. #include <linux/if_vlan.h>
  26. /* General service functions */
  27. static void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid,
  28. u16 pf_id)
  29. {
  30. REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid),
  31. pf_id);
  32. REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_VF_TO_PF_OFFSET(abs_fid),
  33. pf_id);
  34. REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_VF_TO_PF_OFFSET(abs_fid),
  35. pf_id);
  36. REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_VF_TO_PF_OFFSET(abs_fid),
  37. pf_id);
  38. }
  39. static void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid,
  40. u8 enable)
  41. {
  42. REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(abs_fid),
  43. enable);
  44. REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_FUNC_EN_OFFSET(abs_fid),
  45. enable);
  46. REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_FUNC_EN_OFFSET(abs_fid),
  47. enable);
  48. REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_FUNC_EN_OFFSET(abs_fid),
  49. enable);
  50. }
  51. int bnx2x_vf_idx_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
  52. {
  53. int idx;
  54. for_each_vf(bp, idx)
  55. if (bnx2x_vf(bp, idx, abs_vfid) == abs_vfid)
  56. break;
  57. return idx;
  58. }
  59. static
  60. struct bnx2x_virtf *bnx2x_vf_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
  61. {
  62. u16 idx = (u16)bnx2x_vf_idx_by_abs_fid(bp, abs_vfid);
  63. return (idx < BNX2X_NR_VIRTFN(bp)) ? BP_VF(bp, idx) : NULL;
  64. }
  65. static void bnx2x_vf_igu_ack_sb(struct bnx2x *bp, struct bnx2x_virtf *vf,
  66. u8 igu_sb_id, u8 segment, u16 index, u8 op,
  67. u8 update)
  68. {
  69. /* acking a VF sb through the PF - use the GRC */
  70. u32 ctl;
  71. u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA;
  72. u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;
  73. u32 func_encode = vf->abs_vfid;
  74. u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + igu_sb_id;
  75. struct igu_regular cmd_data = {0};
  76. cmd_data.sb_id_and_flags =
  77. ((index << IGU_REGULAR_SB_INDEX_SHIFT) |
  78. (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
  79. (update << IGU_REGULAR_BUPDATE_SHIFT) |
  80. (op << IGU_REGULAR_ENABLE_INT_SHIFT));
  81. ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT |
  82. func_encode << IGU_CTRL_REG_FID_SHIFT |
  83. IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT;
  84. DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
  85. cmd_data.sb_id_and_flags, igu_addr_data);
  86. REG_WR(bp, igu_addr_data, cmd_data.sb_id_and_flags);
  87. mmiowb();
  88. barrier();
  89. DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
  90. ctl, igu_addr_ctl);
  91. REG_WR(bp, igu_addr_ctl, ctl);
  92. mmiowb();
  93. barrier();
  94. }
  95. /* VFOP - VF slow-path operation support */
  96. #define BNX2X_VFOP_FILTER_ADD_CNT_MAX 0x10000
  97. /* VFOP operations states */
  98. enum bnx2x_vfop_qctor_state {
  99. BNX2X_VFOP_QCTOR_INIT,
  100. BNX2X_VFOP_QCTOR_SETUP,
  101. BNX2X_VFOP_QCTOR_INT_EN
  102. };
  103. enum bnx2x_vfop_qdtor_state {
  104. BNX2X_VFOP_QDTOR_HALT,
  105. BNX2X_VFOP_QDTOR_TERMINATE,
  106. BNX2X_VFOP_QDTOR_CFCDEL,
  107. BNX2X_VFOP_QDTOR_DONE
  108. };
  109. enum bnx2x_vfop_vlan_mac_state {
  110. BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE,
  111. BNX2X_VFOP_VLAN_MAC_CLEAR,
  112. BNX2X_VFOP_VLAN_MAC_CHK_DONE,
  113. BNX2X_VFOP_MAC_CONFIG_LIST,
  114. BNX2X_VFOP_VLAN_CONFIG_LIST,
  115. BNX2X_VFOP_VLAN_CONFIG_LIST_0
  116. };
  117. enum bnx2x_vfop_qsetup_state {
  118. BNX2X_VFOP_QSETUP_CTOR,
  119. BNX2X_VFOP_QSETUP_VLAN0,
  120. BNX2X_VFOP_QSETUP_DONE
  121. };
  122. enum bnx2x_vfop_mcast_state {
  123. BNX2X_VFOP_MCAST_DEL,
  124. BNX2X_VFOP_MCAST_ADD,
  125. BNX2X_VFOP_MCAST_CHK_DONE
  126. };
  127. enum bnx2x_vfop_qflr_state {
  128. BNX2X_VFOP_QFLR_CLR_VLAN,
  129. BNX2X_VFOP_QFLR_CLR_MAC,
  130. BNX2X_VFOP_QFLR_TERMINATE,
  131. BNX2X_VFOP_QFLR_DONE
  132. };
  133. enum bnx2x_vfop_flr_state {
  134. BNX2X_VFOP_FLR_QUEUES,
  135. BNX2X_VFOP_FLR_HW
  136. };
  137. enum bnx2x_vfop_close_state {
  138. BNX2X_VFOP_CLOSE_QUEUES,
  139. BNX2X_VFOP_CLOSE_HW
  140. };
  141. enum bnx2x_vfop_rxmode_state {
  142. BNX2X_VFOP_RXMODE_CONFIG,
  143. BNX2X_VFOP_RXMODE_DONE
  144. };
  145. enum bnx2x_vfop_qteardown_state {
  146. BNX2X_VFOP_QTEARDOWN_RXMODE,
  147. BNX2X_VFOP_QTEARDOWN_CLR_VLAN,
  148. BNX2X_VFOP_QTEARDOWN_CLR_MAC,
  149. BNX2X_VFOP_QTEARDOWN_CLR_MCAST,
  150. BNX2X_VFOP_QTEARDOWN_QDTOR,
  151. BNX2X_VFOP_QTEARDOWN_DONE
  152. };
  153. enum bnx2x_vfop_rss_state {
  154. BNX2X_VFOP_RSS_CONFIG,
  155. BNX2X_VFOP_RSS_DONE
  156. };
  157. #define bnx2x_vfop_reset_wq(vf) atomic_set(&vf->op_in_progress, 0)
  158. void bnx2x_vfop_qctor_dump_tx(struct bnx2x *bp, struct bnx2x_virtf *vf,
  159. struct bnx2x_queue_init_params *init_params,
  160. struct bnx2x_queue_setup_params *setup_params,
  161. u16 q_idx, u16 sb_idx)
  162. {
  163. DP(BNX2X_MSG_IOV,
  164. "VF[%d] Q_SETUP: txq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, flags=0x%lx, traffic-type=%d",
  165. vf->abs_vfid,
  166. q_idx,
  167. sb_idx,
  168. init_params->tx.sb_cq_index,
  169. init_params->tx.hc_rate,
  170. setup_params->flags,
  171. setup_params->txq_params.traffic_type);
  172. }
  173. void bnx2x_vfop_qctor_dump_rx(struct bnx2x *bp, struct bnx2x_virtf *vf,
  174. struct bnx2x_queue_init_params *init_params,
  175. struct bnx2x_queue_setup_params *setup_params,
  176. u16 q_idx, u16 sb_idx)
  177. {
  178. struct bnx2x_rxq_setup_params *rxq_params = &setup_params->rxq_params;
  179. DP(BNX2X_MSG_IOV, "VF[%d] Q_SETUP: rxq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, mtu=%d, buf-size=%d\n"
  180. "sge-size=%d, max_sge_pkt=%d, tpa-agg-size=%d, flags=0x%lx, drop-flags=0x%x, cache-log=%d\n",
  181. vf->abs_vfid,
  182. q_idx,
  183. sb_idx,
  184. init_params->rx.sb_cq_index,
  185. init_params->rx.hc_rate,
  186. setup_params->gen_params.mtu,
  187. rxq_params->buf_sz,
  188. rxq_params->sge_buf_sz,
  189. rxq_params->max_sges_pkt,
  190. rxq_params->tpa_agg_sz,
  191. setup_params->flags,
  192. rxq_params->drop_flags,
  193. rxq_params->cache_line_log);
  194. }
  195. void bnx2x_vfop_qctor_prep(struct bnx2x *bp,
  196. struct bnx2x_virtf *vf,
  197. struct bnx2x_vf_queue *q,
  198. struct bnx2x_vfop_qctor_params *p,
  199. unsigned long q_type)
  200. {
  201. struct bnx2x_queue_init_params *init_p = &p->qstate.params.init;
  202. struct bnx2x_queue_setup_params *setup_p = &p->prep_qsetup;
  203. /* INIT */
  204. /* Enable host coalescing in the transition to INIT state */
  205. if (test_bit(BNX2X_Q_FLG_HC, &init_p->rx.flags))
  206. __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->rx.flags);
  207. if (test_bit(BNX2X_Q_FLG_HC, &init_p->tx.flags))
  208. __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->tx.flags);
  209. /* FW SB ID */
  210. init_p->rx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
  211. init_p->tx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
  212. /* context */
  213. init_p->cxts[0] = q->cxt;
  214. /* SETUP */
  215. /* Setup-op general parameters */
  216. setup_p->gen_params.spcl_id = vf->sp_cl_id;
  217. setup_p->gen_params.stat_id = vfq_stat_id(vf, q);
  218. /* Setup-op pause params:
  219. * Nothing to do, the pause thresholds are set by default to 0 which
  220. * effectively turns off the feature for this queue. We don't want
  221. * one queue (VF) to interfering with another queue (another VF)
  222. */
  223. if (vf->cfg_flags & VF_CFG_FW_FC)
  224. BNX2X_ERR("No support for pause to VFs (abs_vfid: %d)\n",
  225. vf->abs_vfid);
  226. /* Setup-op flags:
  227. * collect statistics, zero statistics, local-switching, security,
  228. * OV for Flex10, RSS and MCAST for leading
  229. */
  230. if (test_bit(BNX2X_Q_FLG_STATS, &setup_p->flags))
  231. __set_bit(BNX2X_Q_FLG_ZERO_STATS, &setup_p->flags);
  232. /* for VFs, enable tx switching, bd coherency, and mac address
  233. * anti-spoofing
  234. */
  235. __set_bit(BNX2X_Q_FLG_TX_SWITCH, &setup_p->flags);
  236. __set_bit(BNX2X_Q_FLG_TX_SEC, &setup_p->flags);
  237. __set_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);
  238. /* Setup-op rx parameters */
  239. if (test_bit(BNX2X_Q_TYPE_HAS_RX, &q_type)) {
  240. struct bnx2x_rxq_setup_params *rxq_p = &setup_p->rxq_params;
  241. rxq_p->cl_qzone_id = vfq_qzone_id(vf, q);
  242. rxq_p->fw_sb_id = vf_igu_sb(vf, q->sb_idx);
  243. rxq_p->rss_engine_id = FW_VF_HANDLE(vf->abs_vfid);
  244. if (test_bit(BNX2X_Q_FLG_TPA, &setup_p->flags))
  245. rxq_p->max_tpa_queues = BNX2X_VF_MAX_TPA_AGG_QUEUES;
  246. }
  247. /* Setup-op tx parameters */
  248. if (test_bit(BNX2X_Q_TYPE_HAS_TX, &q_type)) {
  249. setup_p->txq_params.tss_leading_cl_id = vf->leading_rss;
  250. setup_p->txq_params.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
  251. }
  252. }
  253. /* VFOP queue construction */
  254. static void bnx2x_vfop_qctor(struct bnx2x *bp, struct bnx2x_virtf *vf)
  255. {
  256. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  257. struct bnx2x_vfop_args_qctor *args = &vfop->args.qctor;
  258. struct bnx2x_queue_state_params *q_params = &vfop->op_p->qctor.qstate;
  259. enum bnx2x_vfop_qctor_state state = vfop->state;
  260. bnx2x_vfop_reset_wq(vf);
  261. if (vfop->rc < 0)
  262. goto op_err;
  263. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  264. switch (state) {
  265. case BNX2X_VFOP_QCTOR_INIT:
  266. /* has this queue already been opened? */
  267. if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
  268. BNX2X_Q_LOGICAL_STATE_ACTIVE) {
  269. DP(BNX2X_MSG_IOV,
  270. "Entered qctor but queue was already up. Aborting gracefully\n");
  271. goto op_done;
  272. }
  273. /* next state */
  274. vfop->state = BNX2X_VFOP_QCTOR_SETUP;
  275. q_params->cmd = BNX2X_Q_CMD_INIT;
  276. vfop->rc = bnx2x_queue_state_change(bp, q_params);
  277. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  278. case BNX2X_VFOP_QCTOR_SETUP:
  279. /* next state */
  280. vfop->state = BNX2X_VFOP_QCTOR_INT_EN;
  281. /* copy pre-prepared setup params to the queue-state params */
  282. vfop->op_p->qctor.qstate.params.setup =
  283. vfop->op_p->qctor.prep_qsetup;
  284. q_params->cmd = BNX2X_Q_CMD_SETUP;
  285. vfop->rc = bnx2x_queue_state_change(bp, q_params);
  286. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  287. case BNX2X_VFOP_QCTOR_INT_EN:
  288. /* enable interrupts */
  289. bnx2x_vf_igu_ack_sb(bp, vf, vf_igu_sb(vf, args->sb_idx),
  290. USTORM_ID, 0, IGU_INT_ENABLE, 0);
  291. goto op_done;
  292. default:
  293. bnx2x_vfop_default(state);
  294. }
  295. op_err:
  296. BNX2X_ERR("QCTOR[%d:%d] error: cmd %d, rc %d\n",
  297. vf->abs_vfid, args->qid, q_params->cmd, vfop->rc);
  298. op_done:
  299. bnx2x_vfop_end(bp, vf, vfop);
  300. op_pending:
  301. return;
  302. }
  303. static int bnx2x_vfop_qctor_cmd(struct bnx2x *bp,
  304. struct bnx2x_virtf *vf,
  305. struct bnx2x_vfop_cmd *cmd,
  306. int qid)
  307. {
  308. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  309. if (vfop) {
  310. vf->op_params.qctor.qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
  311. vfop->args.qctor.qid = qid;
  312. vfop->args.qctor.sb_idx = bnx2x_vfq(vf, qid, sb_idx);
  313. bnx2x_vfop_opset(BNX2X_VFOP_QCTOR_INIT,
  314. bnx2x_vfop_qctor, cmd->done);
  315. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qctor,
  316. cmd->block);
  317. }
  318. return -ENOMEM;
  319. }
  320. /* VFOP queue destruction */
  321. static void bnx2x_vfop_qdtor(struct bnx2x *bp, struct bnx2x_virtf *vf)
  322. {
  323. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  324. struct bnx2x_vfop_args_qdtor *qdtor = &vfop->args.qdtor;
  325. struct bnx2x_queue_state_params *q_params = &vfop->op_p->qctor.qstate;
  326. enum bnx2x_vfop_qdtor_state state = vfop->state;
  327. bnx2x_vfop_reset_wq(vf);
  328. if (vfop->rc < 0)
  329. goto op_err;
  330. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  331. switch (state) {
  332. case BNX2X_VFOP_QDTOR_HALT:
  333. /* has this queue already been stopped? */
  334. if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
  335. BNX2X_Q_LOGICAL_STATE_STOPPED) {
  336. DP(BNX2X_MSG_IOV,
  337. "Entered qdtor but queue was already stopped. Aborting gracefully\n");
  338. /* next state */
  339. vfop->state = BNX2X_VFOP_QDTOR_DONE;
  340. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  341. }
  342. /* next state */
  343. vfop->state = BNX2X_VFOP_QDTOR_TERMINATE;
  344. q_params->cmd = BNX2X_Q_CMD_HALT;
  345. vfop->rc = bnx2x_queue_state_change(bp, q_params);
  346. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  347. case BNX2X_VFOP_QDTOR_TERMINATE:
  348. /* next state */
  349. vfop->state = BNX2X_VFOP_QDTOR_CFCDEL;
  350. q_params->cmd = BNX2X_Q_CMD_TERMINATE;
  351. vfop->rc = bnx2x_queue_state_change(bp, q_params);
  352. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  353. case BNX2X_VFOP_QDTOR_CFCDEL:
  354. /* next state */
  355. vfop->state = BNX2X_VFOP_QDTOR_DONE;
  356. q_params->cmd = BNX2X_Q_CMD_CFC_DEL;
  357. vfop->rc = bnx2x_queue_state_change(bp, q_params);
  358. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  359. op_err:
  360. BNX2X_ERR("QDTOR[%d:%d] error: cmd %d, rc %d\n",
  361. vf->abs_vfid, qdtor->qid, q_params->cmd, vfop->rc);
  362. op_done:
  363. case BNX2X_VFOP_QDTOR_DONE:
  364. /* invalidate the context */
  365. if (qdtor->cxt) {
  366. qdtor->cxt->ustorm_ag_context.cdu_usage = 0;
  367. qdtor->cxt->xstorm_ag_context.cdu_reserved = 0;
  368. }
  369. bnx2x_vfop_end(bp, vf, vfop);
  370. return;
  371. default:
  372. bnx2x_vfop_default(state);
  373. }
  374. op_pending:
  375. return;
  376. }
  377. static int bnx2x_vfop_qdtor_cmd(struct bnx2x *bp,
  378. struct bnx2x_virtf *vf,
  379. struct bnx2x_vfop_cmd *cmd,
  380. int qid)
  381. {
  382. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  383. if (vfop) {
  384. struct bnx2x_queue_state_params *qstate =
  385. &vf->op_params.qctor.qstate;
  386. memset(qstate, 0, sizeof(*qstate));
  387. qstate->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
  388. vfop->args.qdtor.qid = qid;
  389. vfop->args.qdtor.cxt = bnx2x_vfq(vf, qid, cxt);
  390. bnx2x_vfop_opset(BNX2X_VFOP_QDTOR_HALT,
  391. bnx2x_vfop_qdtor, cmd->done);
  392. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qdtor,
  393. cmd->block);
  394. } else {
  395. BNX2X_ERR("VF[%d] failed to add a vfop\n", vf->abs_vfid);
  396. return -ENOMEM;
  397. }
  398. }
  399. static void
  400. bnx2x_vf_set_igu_info(struct bnx2x *bp, u8 igu_sb_id, u8 abs_vfid)
  401. {
  402. struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
  403. if (vf) {
  404. /* the first igu entry belonging to VFs of this PF */
  405. if (!BP_VFDB(bp)->first_vf_igu_entry)
  406. BP_VFDB(bp)->first_vf_igu_entry = igu_sb_id;
  407. /* the first igu entry belonging to this VF */
  408. if (!vf_sb_count(vf))
  409. vf->igu_base_id = igu_sb_id;
  410. ++vf_sb_count(vf);
  411. ++vf->sb_count;
  412. }
  413. BP_VFDB(bp)->vf_sbs_pool++;
  414. }
  415. /* VFOP MAC/VLAN helpers */
  416. static inline void bnx2x_vfop_credit(struct bnx2x *bp,
  417. struct bnx2x_vfop *vfop,
  418. struct bnx2x_vlan_mac_obj *obj)
  419. {
  420. struct bnx2x_vfop_args_filters *args = &vfop->args.filters;
  421. /* update credit only if there is no error
  422. * and a valid credit counter
  423. */
  424. if (!vfop->rc && args->credit) {
  425. struct list_head *pos;
  426. int read_lock;
  427. int cnt = 0;
  428. read_lock = bnx2x_vlan_mac_h_read_lock(bp, obj);
  429. if (read_lock)
  430. DP(BNX2X_MSG_SP, "Failed to take vlan mac read head; continuing anyway\n");
  431. list_for_each(pos, &obj->head)
  432. cnt++;
  433. if (!read_lock)
  434. bnx2x_vlan_mac_h_read_unlock(bp, obj);
  435. atomic_set(args->credit, cnt);
  436. }
  437. }
  438. static int bnx2x_vfop_set_user_req(struct bnx2x *bp,
  439. struct bnx2x_vfop_filter *pos,
  440. struct bnx2x_vlan_mac_data *user_req)
  441. {
  442. user_req->cmd = pos->add ? BNX2X_VLAN_MAC_ADD :
  443. BNX2X_VLAN_MAC_DEL;
  444. switch (pos->type) {
  445. case BNX2X_VFOP_FILTER_MAC:
  446. memcpy(user_req->u.mac.mac, pos->mac, ETH_ALEN);
  447. break;
  448. case BNX2X_VFOP_FILTER_VLAN:
  449. user_req->u.vlan.vlan = pos->vid;
  450. break;
  451. default:
  452. BNX2X_ERR("Invalid filter type, skipping\n");
  453. return 1;
  454. }
  455. return 0;
  456. }
  457. static int bnx2x_vfop_config_list(struct bnx2x *bp,
  458. struct bnx2x_vfop_filters *filters,
  459. struct bnx2x_vlan_mac_ramrod_params *vlan_mac)
  460. {
  461. struct bnx2x_vfop_filter *pos, *tmp;
  462. struct list_head rollback_list, *filters_list = &filters->head;
  463. struct bnx2x_vlan_mac_data *user_req = &vlan_mac->user_req;
  464. int rc = 0, cnt = 0;
  465. INIT_LIST_HEAD(&rollback_list);
  466. list_for_each_entry_safe(pos, tmp, filters_list, link) {
  467. if (bnx2x_vfop_set_user_req(bp, pos, user_req))
  468. continue;
  469. rc = bnx2x_config_vlan_mac(bp, vlan_mac);
  470. if (rc >= 0) {
  471. cnt += pos->add ? 1 : -1;
  472. list_move(&pos->link, &rollback_list);
  473. rc = 0;
  474. } else if (rc == -EEXIST) {
  475. rc = 0;
  476. } else {
  477. BNX2X_ERR("Failed to add a new vlan_mac command\n");
  478. break;
  479. }
  480. }
  481. /* rollback if error or too many rules added */
  482. if (rc || cnt > filters->add_cnt) {
  483. BNX2X_ERR("error or too many rules added. Performing rollback\n");
  484. list_for_each_entry_safe(pos, tmp, &rollback_list, link) {
  485. pos->add = !pos->add; /* reverse op */
  486. bnx2x_vfop_set_user_req(bp, pos, user_req);
  487. bnx2x_config_vlan_mac(bp, vlan_mac);
  488. list_del(&pos->link);
  489. }
  490. cnt = 0;
  491. if (!rc)
  492. rc = -EINVAL;
  493. }
  494. filters->add_cnt = cnt;
  495. return rc;
  496. }
  497. /* VFOP set VLAN/MAC */
  498. static void bnx2x_vfop_vlan_mac(struct bnx2x *bp, struct bnx2x_virtf *vf)
  499. {
  500. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  501. struct bnx2x_vlan_mac_ramrod_params *vlan_mac = &vfop->op_p->vlan_mac;
  502. struct bnx2x_vlan_mac_obj *obj = vlan_mac->vlan_mac_obj;
  503. struct bnx2x_vfop_filters *filters = vfop->args.filters.multi_filter;
  504. enum bnx2x_vfop_vlan_mac_state state = vfop->state;
  505. if (vfop->rc < 0)
  506. goto op_err;
  507. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  508. bnx2x_vfop_reset_wq(vf);
  509. switch (state) {
  510. case BNX2X_VFOP_VLAN_MAC_CLEAR:
  511. /* next state */
  512. vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
  513. /* do delete */
  514. vfop->rc = obj->delete_all(bp, obj,
  515. &vlan_mac->user_req.vlan_mac_flags,
  516. &vlan_mac->ramrod_flags);
  517. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  518. case BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE:
  519. /* next state */
  520. vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
  521. /* do config */
  522. vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
  523. if (vfop->rc == -EEXIST)
  524. vfop->rc = 0;
  525. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  526. case BNX2X_VFOP_VLAN_MAC_CHK_DONE:
  527. vfop->rc = !!obj->raw.check_pending(&obj->raw);
  528. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  529. case BNX2X_VFOP_MAC_CONFIG_LIST:
  530. /* next state */
  531. vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
  532. /* do list config */
  533. vfop->rc = bnx2x_vfop_config_list(bp, filters, vlan_mac);
  534. if (vfop->rc)
  535. goto op_err;
  536. set_bit(RAMROD_CONT, &vlan_mac->ramrod_flags);
  537. vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
  538. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  539. case BNX2X_VFOP_VLAN_CONFIG_LIST:
  540. /* next state */
  541. vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
  542. /* do list config */
  543. vfop->rc = bnx2x_vfop_config_list(bp, filters, vlan_mac);
  544. if (!vfop->rc) {
  545. set_bit(RAMROD_CONT, &vlan_mac->ramrod_flags);
  546. vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
  547. }
  548. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  549. default:
  550. bnx2x_vfop_default(state);
  551. }
  552. op_err:
  553. BNX2X_ERR("VLAN-MAC error: rc %d\n", vfop->rc);
  554. op_done:
  555. kfree(filters);
  556. bnx2x_vfop_credit(bp, vfop, obj);
  557. bnx2x_vfop_end(bp, vf, vfop);
  558. op_pending:
  559. return;
  560. }
  561. struct bnx2x_vfop_vlan_mac_flags {
  562. bool drv_only;
  563. bool dont_consume;
  564. bool single_cmd;
  565. bool add;
  566. };
  567. static void
  568. bnx2x_vfop_vlan_mac_prep_ramrod(struct bnx2x_vlan_mac_ramrod_params *ramrod,
  569. struct bnx2x_vfop_vlan_mac_flags *flags)
  570. {
  571. struct bnx2x_vlan_mac_data *ureq = &ramrod->user_req;
  572. memset(ramrod, 0, sizeof(*ramrod));
  573. /* ramrod flags */
  574. if (flags->drv_only)
  575. set_bit(RAMROD_DRV_CLR_ONLY, &ramrod->ramrod_flags);
  576. if (flags->single_cmd)
  577. set_bit(RAMROD_EXEC, &ramrod->ramrod_flags);
  578. /* mac_vlan flags */
  579. if (flags->dont_consume)
  580. set_bit(BNX2X_DONT_CONSUME_CAM_CREDIT, &ureq->vlan_mac_flags);
  581. /* cmd */
  582. ureq->cmd = flags->add ? BNX2X_VLAN_MAC_ADD : BNX2X_VLAN_MAC_DEL;
  583. }
  584. static inline void
  585. bnx2x_vfop_mac_prep_ramrod(struct bnx2x_vlan_mac_ramrod_params *ramrod,
  586. struct bnx2x_vfop_vlan_mac_flags *flags)
  587. {
  588. bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, flags);
  589. set_bit(BNX2X_ETH_MAC, &ramrod->user_req.vlan_mac_flags);
  590. }
  591. static int bnx2x_vfop_mac_delall_cmd(struct bnx2x *bp,
  592. struct bnx2x_virtf *vf,
  593. struct bnx2x_vfop_cmd *cmd,
  594. int qid, bool drv_only)
  595. {
  596. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  597. int rc;
  598. if (vfop) {
  599. struct bnx2x_vfop_args_filters filters = {
  600. .multi_filter = NULL, /* single */
  601. .credit = NULL, /* consume credit */
  602. };
  603. struct bnx2x_vfop_vlan_mac_flags flags = {
  604. .drv_only = drv_only,
  605. .dont_consume = (filters.credit != NULL),
  606. .single_cmd = true,
  607. .add = false /* don't care */,
  608. };
  609. struct bnx2x_vlan_mac_ramrod_params *ramrod =
  610. &vf->op_params.vlan_mac;
  611. /* set ramrod params */
  612. bnx2x_vfop_mac_prep_ramrod(ramrod, &flags);
  613. /* set object */
  614. rc = validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, mac_obj));
  615. if (rc)
  616. return rc;
  617. ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
  618. /* set extra args */
  619. vfop->args.filters = filters;
  620. bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CLEAR,
  621. bnx2x_vfop_vlan_mac, cmd->done);
  622. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
  623. cmd->block);
  624. }
  625. return -ENOMEM;
  626. }
  627. int bnx2x_vfop_mac_list_cmd(struct bnx2x *bp,
  628. struct bnx2x_virtf *vf,
  629. struct bnx2x_vfop_cmd *cmd,
  630. struct bnx2x_vfop_filters *macs,
  631. int qid, bool drv_only)
  632. {
  633. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  634. int rc;
  635. if (vfop) {
  636. struct bnx2x_vfop_args_filters filters = {
  637. .multi_filter = macs,
  638. .credit = NULL, /* consume credit */
  639. };
  640. struct bnx2x_vfop_vlan_mac_flags flags = {
  641. .drv_only = drv_only,
  642. .dont_consume = (filters.credit != NULL),
  643. .single_cmd = false,
  644. .add = false, /* don't care since only the items in the
  645. * filters list affect the sp operation,
  646. * not the list itself
  647. */
  648. };
  649. struct bnx2x_vlan_mac_ramrod_params *ramrod =
  650. &vf->op_params.vlan_mac;
  651. /* set ramrod params */
  652. bnx2x_vfop_mac_prep_ramrod(ramrod, &flags);
  653. /* set object */
  654. rc = validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, mac_obj));
  655. if (rc)
  656. return rc;
  657. ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
  658. /* set extra args */
  659. filters.multi_filter->add_cnt = BNX2X_VFOP_FILTER_ADD_CNT_MAX;
  660. vfop->args.filters = filters;
  661. bnx2x_vfop_opset(BNX2X_VFOP_MAC_CONFIG_LIST,
  662. bnx2x_vfop_vlan_mac, cmd->done);
  663. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
  664. cmd->block);
  665. }
  666. return -ENOMEM;
  667. }
  668. static int bnx2x_vfop_vlan_set_cmd(struct bnx2x *bp,
  669. struct bnx2x_virtf *vf,
  670. struct bnx2x_vfop_cmd *cmd,
  671. int qid, u16 vid, bool add)
  672. {
  673. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  674. int rc;
  675. if (vfop) {
  676. struct bnx2x_vfop_args_filters filters = {
  677. .multi_filter = NULL, /* single command */
  678. .credit = &bnx2x_vfq(vf, qid, vlan_count),
  679. };
  680. struct bnx2x_vfop_vlan_mac_flags flags = {
  681. .drv_only = false,
  682. .dont_consume = (filters.credit != NULL),
  683. .single_cmd = true,
  684. .add = add,
  685. };
  686. struct bnx2x_vlan_mac_ramrod_params *ramrod =
  687. &vf->op_params.vlan_mac;
  688. /* set ramrod params */
  689. bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
  690. ramrod->user_req.u.vlan.vlan = vid;
  691. /* set object */
  692. rc = validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, vlan_obj));
  693. if (rc)
  694. return rc;
  695. ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
  696. /* set extra args */
  697. vfop->args.filters = filters;
  698. bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE,
  699. bnx2x_vfop_vlan_mac, cmd->done);
  700. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
  701. cmd->block);
  702. }
  703. return -ENOMEM;
  704. }
  705. static int bnx2x_vfop_vlan_delall_cmd(struct bnx2x *bp,
  706. struct bnx2x_virtf *vf,
  707. struct bnx2x_vfop_cmd *cmd,
  708. int qid, bool drv_only)
  709. {
  710. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  711. int rc;
  712. if (vfop) {
  713. struct bnx2x_vfop_args_filters filters = {
  714. .multi_filter = NULL, /* single command */
  715. .credit = &bnx2x_vfq(vf, qid, vlan_count),
  716. };
  717. struct bnx2x_vfop_vlan_mac_flags flags = {
  718. .drv_only = drv_only,
  719. .dont_consume = (filters.credit != NULL),
  720. .single_cmd = true,
  721. .add = false, /* don't care */
  722. };
  723. struct bnx2x_vlan_mac_ramrod_params *ramrod =
  724. &vf->op_params.vlan_mac;
  725. /* set ramrod params */
  726. bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
  727. /* set object */
  728. rc = validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, vlan_obj));
  729. if (rc)
  730. return rc;
  731. ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
  732. /* set extra args */
  733. vfop->args.filters = filters;
  734. bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CLEAR,
  735. bnx2x_vfop_vlan_mac, cmd->done);
  736. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
  737. cmd->block);
  738. }
  739. return -ENOMEM;
  740. }
  741. int bnx2x_vfop_vlan_list_cmd(struct bnx2x *bp,
  742. struct bnx2x_virtf *vf,
  743. struct bnx2x_vfop_cmd *cmd,
  744. struct bnx2x_vfop_filters *vlans,
  745. int qid, bool drv_only)
  746. {
  747. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  748. int rc;
  749. if (vfop) {
  750. struct bnx2x_vfop_args_filters filters = {
  751. .multi_filter = vlans,
  752. .credit = &bnx2x_vfq(vf, qid, vlan_count),
  753. };
  754. struct bnx2x_vfop_vlan_mac_flags flags = {
  755. .drv_only = drv_only,
  756. .dont_consume = (filters.credit != NULL),
  757. .single_cmd = false,
  758. .add = false, /* don't care */
  759. };
  760. struct bnx2x_vlan_mac_ramrod_params *ramrod =
  761. &vf->op_params.vlan_mac;
  762. /* set ramrod params */
  763. bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
  764. /* set object */
  765. rc = validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, vlan_obj));
  766. if (rc)
  767. return rc;
  768. ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
  769. /* set extra args */
  770. filters.multi_filter->add_cnt = vf_vlan_rules_cnt(vf) -
  771. atomic_read(filters.credit);
  772. vfop->args.filters = filters;
  773. bnx2x_vfop_opset(BNX2X_VFOP_VLAN_CONFIG_LIST,
  774. bnx2x_vfop_vlan_mac, cmd->done);
  775. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
  776. cmd->block);
  777. }
  778. return -ENOMEM;
  779. }
  780. /* VFOP queue setup (queue constructor + set vlan 0) */
  781. static void bnx2x_vfop_qsetup(struct bnx2x *bp, struct bnx2x_virtf *vf)
  782. {
  783. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  784. int qid = vfop->args.qctor.qid;
  785. enum bnx2x_vfop_qsetup_state state = vfop->state;
  786. struct bnx2x_vfop_cmd cmd = {
  787. .done = bnx2x_vfop_qsetup,
  788. .block = false,
  789. };
  790. if (vfop->rc < 0)
  791. goto op_err;
  792. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  793. switch (state) {
  794. case BNX2X_VFOP_QSETUP_CTOR:
  795. /* init the queue ctor command */
  796. vfop->state = BNX2X_VFOP_QSETUP_VLAN0;
  797. vfop->rc = bnx2x_vfop_qctor_cmd(bp, vf, &cmd, qid);
  798. if (vfop->rc)
  799. goto op_err;
  800. return;
  801. case BNX2X_VFOP_QSETUP_VLAN0:
  802. /* skip if non-leading or FPGA/EMU*/
  803. if (qid)
  804. goto op_done;
  805. /* init the queue set-vlan command (for vlan 0) */
  806. vfop->state = BNX2X_VFOP_QSETUP_DONE;
  807. vfop->rc = bnx2x_vfop_vlan_set_cmd(bp, vf, &cmd, qid, 0, true);
  808. if (vfop->rc)
  809. goto op_err;
  810. return;
  811. op_err:
  812. BNX2X_ERR("QSETUP[%d:%d] error: rc %d\n", vf->abs_vfid, qid, vfop->rc);
  813. op_done:
  814. case BNX2X_VFOP_QSETUP_DONE:
  815. vf->cfg_flags |= VF_CFG_VLAN;
  816. smp_mb__before_clear_bit();
  817. set_bit(BNX2X_SP_RTNL_HYPERVISOR_VLAN,
  818. &bp->sp_rtnl_state);
  819. smp_mb__after_clear_bit();
  820. schedule_delayed_work(&bp->sp_rtnl_task, 0);
  821. bnx2x_vfop_end(bp, vf, vfop);
  822. return;
  823. default:
  824. bnx2x_vfop_default(state);
  825. }
  826. }
  827. int bnx2x_vfop_qsetup_cmd(struct bnx2x *bp,
  828. struct bnx2x_virtf *vf,
  829. struct bnx2x_vfop_cmd *cmd,
  830. int qid)
  831. {
  832. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  833. if (vfop) {
  834. vfop->args.qctor.qid = qid;
  835. bnx2x_vfop_opset(BNX2X_VFOP_QSETUP_CTOR,
  836. bnx2x_vfop_qsetup, cmd->done);
  837. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qsetup,
  838. cmd->block);
  839. }
  840. return -ENOMEM;
  841. }
  842. /* VFOP queue FLR handling (clear vlans, clear macs, queue destructor) */
  843. static void bnx2x_vfop_qflr(struct bnx2x *bp, struct bnx2x_virtf *vf)
  844. {
  845. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  846. int qid = vfop->args.qx.qid;
  847. enum bnx2x_vfop_qflr_state state = vfop->state;
  848. struct bnx2x_queue_state_params *qstate;
  849. struct bnx2x_vfop_cmd cmd;
  850. bnx2x_vfop_reset_wq(vf);
  851. if (vfop->rc < 0)
  852. goto op_err;
  853. DP(BNX2X_MSG_IOV, "VF[%d] STATE: %d\n", vf->abs_vfid, state);
  854. cmd.done = bnx2x_vfop_qflr;
  855. cmd.block = false;
  856. switch (state) {
  857. case BNX2X_VFOP_QFLR_CLR_VLAN:
  858. /* vlan-clear-all: driver-only, don't consume credit */
  859. vfop->state = BNX2X_VFOP_QFLR_CLR_MAC;
  860. if (!validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, vlan_obj))) {
  861. /* the vlan_mac vfop will re-schedule us */
  862. vfop->rc = bnx2x_vfop_vlan_delall_cmd(bp, vf, &cmd,
  863. qid, true);
  864. if (vfop->rc)
  865. goto op_err;
  866. return;
  867. } else {
  868. /* need to reschedule ourselves */
  869. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  870. }
  871. case BNX2X_VFOP_QFLR_CLR_MAC:
  872. /* mac-clear-all: driver only consume credit */
  873. vfop->state = BNX2X_VFOP_QFLR_TERMINATE;
  874. if (!validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, mac_obj))) {
  875. /* the vlan_mac vfop will re-schedule us */
  876. vfop->rc = bnx2x_vfop_mac_delall_cmd(bp, vf, &cmd,
  877. qid, true);
  878. if (vfop->rc)
  879. goto op_err;
  880. return;
  881. } else {
  882. /* need to reschedule ourselves */
  883. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  884. }
  885. case BNX2X_VFOP_QFLR_TERMINATE:
  886. qstate = &vfop->op_p->qctor.qstate;
  887. memset(qstate , 0, sizeof(*qstate));
  888. qstate->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
  889. vfop->state = BNX2X_VFOP_QFLR_DONE;
  890. DP(BNX2X_MSG_IOV, "VF[%d] qstate during flr was %d\n",
  891. vf->abs_vfid, qstate->q_obj->state);
  892. if (qstate->q_obj->state != BNX2X_Q_STATE_RESET) {
  893. qstate->q_obj->state = BNX2X_Q_STATE_STOPPED;
  894. qstate->cmd = BNX2X_Q_CMD_TERMINATE;
  895. vfop->rc = bnx2x_queue_state_change(bp, qstate);
  896. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_VERIFY_PEND);
  897. } else {
  898. goto op_done;
  899. }
  900. op_err:
  901. BNX2X_ERR("QFLR[%d:%d] error: rc %d\n",
  902. vf->abs_vfid, qid, vfop->rc);
  903. op_done:
  904. case BNX2X_VFOP_QFLR_DONE:
  905. bnx2x_vfop_end(bp, vf, vfop);
  906. return;
  907. default:
  908. bnx2x_vfop_default(state);
  909. }
  910. op_pending:
  911. return;
  912. }
  913. static int bnx2x_vfop_qflr_cmd(struct bnx2x *bp,
  914. struct bnx2x_virtf *vf,
  915. struct bnx2x_vfop_cmd *cmd,
  916. int qid)
  917. {
  918. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  919. if (vfop) {
  920. vfop->args.qx.qid = qid;
  921. bnx2x_vfop_opset(BNX2X_VFOP_QFLR_CLR_VLAN,
  922. bnx2x_vfop_qflr, cmd->done);
  923. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qflr,
  924. cmd->block);
  925. }
  926. return -ENOMEM;
  927. }
  928. /* VFOP multi-casts */
  929. static void bnx2x_vfop_mcast(struct bnx2x *bp, struct bnx2x_virtf *vf)
  930. {
  931. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  932. struct bnx2x_mcast_ramrod_params *mcast = &vfop->op_p->mcast;
  933. struct bnx2x_raw_obj *raw = &mcast->mcast_obj->raw;
  934. struct bnx2x_vfop_args_mcast *args = &vfop->args.mc_list;
  935. enum bnx2x_vfop_mcast_state state = vfop->state;
  936. int i;
  937. bnx2x_vfop_reset_wq(vf);
  938. if (vfop->rc < 0)
  939. goto op_err;
  940. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  941. switch (state) {
  942. case BNX2X_VFOP_MCAST_DEL:
  943. /* clear existing mcasts */
  944. vfop->state = (args->mc_num) ? BNX2X_VFOP_MCAST_ADD
  945. : BNX2X_VFOP_MCAST_CHK_DONE;
  946. mcast->mcast_list_len = vf->mcast_list_len;
  947. vf->mcast_list_len = args->mc_num;
  948. vfop->rc = bnx2x_config_mcast(bp, mcast, BNX2X_MCAST_CMD_DEL);
  949. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  950. case BNX2X_VFOP_MCAST_ADD:
  951. if (raw->check_pending(raw))
  952. goto op_pending;
  953. /* update mcast list on the ramrod params */
  954. INIT_LIST_HEAD(&mcast->mcast_list);
  955. for (i = 0; i < args->mc_num; i++)
  956. list_add_tail(&(args->mc[i].link),
  957. &mcast->mcast_list);
  958. mcast->mcast_list_len = args->mc_num;
  959. /* add new mcasts */
  960. vfop->state = BNX2X_VFOP_MCAST_CHK_DONE;
  961. vfop->rc = bnx2x_config_mcast(bp, mcast,
  962. BNX2X_MCAST_CMD_ADD);
  963. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  964. case BNX2X_VFOP_MCAST_CHK_DONE:
  965. vfop->rc = raw->check_pending(raw) ? 1 : 0;
  966. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  967. default:
  968. bnx2x_vfop_default(state);
  969. }
  970. op_err:
  971. BNX2X_ERR("MCAST CONFIG error: rc %d\n", vfop->rc);
  972. op_done:
  973. kfree(args->mc);
  974. bnx2x_vfop_end(bp, vf, vfop);
  975. op_pending:
  976. return;
  977. }
  978. int bnx2x_vfop_mcast_cmd(struct bnx2x *bp,
  979. struct bnx2x_virtf *vf,
  980. struct bnx2x_vfop_cmd *cmd,
  981. bnx2x_mac_addr_t *mcasts,
  982. int mcast_num, bool drv_only)
  983. {
  984. struct bnx2x_vfop *vfop = NULL;
  985. size_t mc_sz = mcast_num * sizeof(struct bnx2x_mcast_list_elem);
  986. struct bnx2x_mcast_list_elem *mc = mc_sz ? kzalloc(mc_sz, GFP_KERNEL) :
  987. NULL;
  988. if (!mc_sz || mc) {
  989. vfop = bnx2x_vfop_add(bp, vf);
  990. if (vfop) {
  991. int i;
  992. struct bnx2x_mcast_ramrod_params *ramrod =
  993. &vf->op_params.mcast;
  994. /* set ramrod params */
  995. memset(ramrod, 0, sizeof(*ramrod));
  996. ramrod->mcast_obj = &vf->mcast_obj;
  997. if (drv_only)
  998. set_bit(RAMROD_DRV_CLR_ONLY,
  999. &ramrod->ramrod_flags);
  1000. /* copy mcasts pointers */
  1001. vfop->args.mc_list.mc_num = mcast_num;
  1002. vfop->args.mc_list.mc = mc;
  1003. for (i = 0; i < mcast_num; i++)
  1004. mc[i].mac = mcasts[i];
  1005. bnx2x_vfop_opset(BNX2X_VFOP_MCAST_DEL,
  1006. bnx2x_vfop_mcast, cmd->done);
  1007. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_mcast,
  1008. cmd->block);
  1009. } else {
  1010. kfree(mc);
  1011. }
  1012. }
  1013. return -ENOMEM;
  1014. }
  1015. /* VFOP rx-mode */
  1016. static void bnx2x_vfop_rxmode(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1017. {
  1018. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  1019. struct bnx2x_rx_mode_ramrod_params *ramrod = &vfop->op_p->rx_mode;
  1020. enum bnx2x_vfop_rxmode_state state = vfop->state;
  1021. bnx2x_vfop_reset_wq(vf);
  1022. if (vfop->rc < 0)
  1023. goto op_err;
  1024. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  1025. switch (state) {
  1026. case BNX2X_VFOP_RXMODE_CONFIG:
  1027. /* next state */
  1028. vfop->state = BNX2X_VFOP_RXMODE_DONE;
  1029. /* record the accept flags in vfdb so hypervisor can modify them
  1030. * if necessary
  1031. */
  1032. bnx2x_vfq(vf, ramrod->cl_id - vf->igu_base_id, accept_flags) =
  1033. ramrod->rx_accept_flags;
  1034. vfop->rc = bnx2x_config_rx_mode(bp, ramrod);
  1035. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  1036. op_err:
  1037. BNX2X_ERR("RXMODE error: rc %d\n", vfop->rc);
  1038. op_done:
  1039. case BNX2X_VFOP_RXMODE_DONE:
  1040. bnx2x_vfop_end(bp, vf, vfop);
  1041. return;
  1042. default:
  1043. bnx2x_vfop_default(state);
  1044. }
  1045. op_pending:
  1046. return;
  1047. }
  1048. static void bnx2x_vf_prep_rx_mode(struct bnx2x *bp, u8 qid,
  1049. struct bnx2x_rx_mode_ramrod_params *ramrod,
  1050. struct bnx2x_virtf *vf,
  1051. unsigned long accept_flags)
  1052. {
  1053. struct bnx2x_vf_queue *vfq = vfq_get(vf, qid);
  1054. memset(ramrod, 0, sizeof(*ramrod));
  1055. ramrod->cid = vfq->cid;
  1056. ramrod->cl_id = vfq_cl_id(vf, vfq);
  1057. ramrod->rx_mode_obj = &bp->rx_mode_obj;
  1058. ramrod->func_id = FW_VF_HANDLE(vf->abs_vfid);
  1059. ramrod->rx_accept_flags = accept_flags;
  1060. ramrod->tx_accept_flags = accept_flags;
  1061. ramrod->pstate = &vf->filter_state;
  1062. ramrod->state = BNX2X_FILTER_RX_MODE_PENDING;
  1063. set_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
  1064. set_bit(RAMROD_RX, &ramrod->ramrod_flags);
  1065. set_bit(RAMROD_TX, &ramrod->ramrod_flags);
  1066. ramrod->rdata = bnx2x_vf_sp(bp, vf, rx_mode_rdata.e2);
  1067. ramrod->rdata_mapping = bnx2x_vf_sp_map(bp, vf, rx_mode_rdata.e2);
  1068. }
  1069. int bnx2x_vfop_rxmode_cmd(struct bnx2x *bp,
  1070. struct bnx2x_virtf *vf,
  1071. struct bnx2x_vfop_cmd *cmd,
  1072. int qid, unsigned long accept_flags)
  1073. {
  1074. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  1075. if (vfop) {
  1076. struct bnx2x_rx_mode_ramrod_params *ramrod =
  1077. &vf->op_params.rx_mode;
  1078. bnx2x_vf_prep_rx_mode(bp, qid, ramrod, vf, accept_flags);
  1079. bnx2x_vfop_opset(BNX2X_VFOP_RXMODE_CONFIG,
  1080. bnx2x_vfop_rxmode, cmd->done);
  1081. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_rxmode,
  1082. cmd->block);
  1083. }
  1084. return -ENOMEM;
  1085. }
  1086. /* VFOP queue tear-down ('drop all' rx-mode, clear vlans, clear macs,
  1087. * queue destructor)
  1088. */
  1089. static void bnx2x_vfop_qdown(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1090. {
  1091. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  1092. int qid = vfop->args.qx.qid;
  1093. enum bnx2x_vfop_qteardown_state state = vfop->state;
  1094. struct bnx2x_vfop_cmd cmd;
  1095. if (vfop->rc < 0)
  1096. goto op_err;
  1097. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  1098. cmd.done = bnx2x_vfop_qdown;
  1099. cmd.block = false;
  1100. switch (state) {
  1101. case BNX2X_VFOP_QTEARDOWN_RXMODE:
  1102. /* Drop all */
  1103. vfop->state = BNX2X_VFOP_QTEARDOWN_CLR_VLAN;
  1104. vfop->rc = bnx2x_vfop_rxmode_cmd(bp, vf, &cmd, qid, 0);
  1105. if (vfop->rc)
  1106. goto op_err;
  1107. return;
  1108. case BNX2X_VFOP_QTEARDOWN_CLR_VLAN:
  1109. /* vlan-clear-all: don't consume credit */
  1110. vfop->state = BNX2X_VFOP_QTEARDOWN_CLR_MAC;
  1111. vfop->rc = bnx2x_vfop_vlan_delall_cmd(bp, vf, &cmd, qid, false);
  1112. if (vfop->rc)
  1113. goto op_err;
  1114. return;
  1115. case BNX2X_VFOP_QTEARDOWN_CLR_MAC:
  1116. /* mac-clear-all: consume credit */
  1117. vfop->state = BNX2X_VFOP_QTEARDOWN_CLR_MCAST;
  1118. vfop->rc = bnx2x_vfop_mac_delall_cmd(bp, vf, &cmd, qid, false);
  1119. if (vfop->rc)
  1120. goto op_err;
  1121. return;
  1122. case BNX2X_VFOP_QTEARDOWN_CLR_MCAST:
  1123. vfop->state = BNX2X_VFOP_QTEARDOWN_QDTOR;
  1124. vfop->rc = bnx2x_vfop_mcast_cmd(bp, vf, &cmd, NULL, 0, false);
  1125. if (vfop->rc)
  1126. goto op_err;
  1127. return;
  1128. case BNX2X_VFOP_QTEARDOWN_QDTOR:
  1129. /* run the queue destruction flow */
  1130. DP(BNX2X_MSG_IOV, "case: BNX2X_VFOP_QTEARDOWN_QDTOR\n");
  1131. vfop->state = BNX2X_VFOP_QTEARDOWN_DONE;
  1132. DP(BNX2X_MSG_IOV, "new state: BNX2X_VFOP_QTEARDOWN_DONE\n");
  1133. vfop->rc = bnx2x_vfop_qdtor_cmd(bp, vf, &cmd, qid);
  1134. DP(BNX2X_MSG_IOV, "returned from cmd\n");
  1135. if (vfop->rc)
  1136. goto op_err;
  1137. return;
  1138. op_err:
  1139. BNX2X_ERR("QTEARDOWN[%d:%d] error: rc %d\n",
  1140. vf->abs_vfid, qid, vfop->rc);
  1141. case BNX2X_VFOP_QTEARDOWN_DONE:
  1142. bnx2x_vfop_end(bp, vf, vfop);
  1143. return;
  1144. default:
  1145. bnx2x_vfop_default(state);
  1146. }
  1147. }
  1148. int bnx2x_vfop_qdown_cmd(struct bnx2x *bp,
  1149. struct bnx2x_virtf *vf,
  1150. struct bnx2x_vfop_cmd *cmd,
  1151. int qid)
  1152. {
  1153. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  1154. /* for non leading queues skip directly to qdown sate */
  1155. if (vfop) {
  1156. vfop->args.qx.qid = qid;
  1157. bnx2x_vfop_opset(qid == LEADING_IDX ?
  1158. BNX2X_VFOP_QTEARDOWN_RXMODE :
  1159. BNX2X_VFOP_QTEARDOWN_QDTOR, bnx2x_vfop_qdown,
  1160. cmd->done);
  1161. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qdown,
  1162. cmd->block);
  1163. }
  1164. return -ENOMEM;
  1165. }
  1166. /* VF enable primitives
  1167. * when pretend is required the caller is responsible
  1168. * for calling pretend prior to calling these routines
  1169. */
  1170. /* internal vf enable - until vf is enabled internally all transactions
  1171. * are blocked. This routine should always be called last with pretend.
  1172. */
  1173. static void bnx2x_vf_enable_internal(struct bnx2x *bp, u8 enable)
  1174. {
  1175. REG_WR(bp, PGLUE_B_REG_INTERNAL_VFID_ENABLE, enable ? 1 : 0);
  1176. }
  1177. /* clears vf error in all semi blocks */
  1178. static void bnx2x_vf_semi_clear_err(struct bnx2x *bp, u8 abs_vfid)
  1179. {
  1180. REG_WR(bp, TSEM_REG_VFPF_ERR_NUM, abs_vfid);
  1181. REG_WR(bp, USEM_REG_VFPF_ERR_NUM, abs_vfid);
  1182. REG_WR(bp, CSEM_REG_VFPF_ERR_NUM, abs_vfid);
  1183. REG_WR(bp, XSEM_REG_VFPF_ERR_NUM, abs_vfid);
  1184. }
  1185. static void bnx2x_vf_pglue_clear_err(struct bnx2x *bp, u8 abs_vfid)
  1186. {
  1187. u32 was_err_group = (2 * BP_PATH(bp) + abs_vfid) >> 5;
  1188. u32 was_err_reg = 0;
  1189. switch (was_err_group) {
  1190. case 0:
  1191. was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR;
  1192. break;
  1193. case 1:
  1194. was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_63_32_CLR;
  1195. break;
  1196. case 2:
  1197. was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_95_64_CLR;
  1198. break;
  1199. case 3:
  1200. was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR;
  1201. break;
  1202. }
  1203. REG_WR(bp, was_err_reg, 1 << (abs_vfid & 0x1f));
  1204. }
  1205. static void bnx2x_vf_igu_reset(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1206. {
  1207. int i;
  1208. u32 val;
  1209. /* Set VF masks and configuration - pretend */
  1210. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
  1211. REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_LSB, 0);
  1212. REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_MSB, 0);
  1213. REG_WR(bp, IGU_REG_SB_MASK_LSB, 0);
  1214. REG_WR(bp, IGU_REG_SB_MASK_MSB, 0);
  1215. REG_WR(bp, IGU_REG_PBA_STATUS_LSB, 0);
  1216. REG_WR(bp, IGU_REG_PBA_STATUS_MSB, 0);
  1217. val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
  1218. val |= (IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_MSI_MSIX_EN);
  1219. if (vf->cfg_flags & VF_CFG_INT_SIMD)
  1220. val |= IGU_VF_CONF_SINGLE_ISR_EN;
  1221. val &= ~IGU_VF_CONF_PARENT_MASK;
  1222. val |= (BP_ABS_FUNC(bp) >> 1) << IGU_VF_CONF_PARENT_SHIFT;
  1223. REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
  1224. DP(BNX2X_MSG_IOV,
  1225. "value in IGU_REG_VF_CONFIGURATION of vf %d after write is 0x%08x\n",
  1226. vf->abs_vfid, val);
  1227. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  1228. /* iterate over all queues, clear sb consumer */
  1229. for (i = 0; i < vf_sb_count(vf); i++) {
  1230. u8 igu_sb_id = vf_igu_sb(vf, i);
  1231. /* zero prod memory */
  1232. REG_WR(bp, IGU_REG_PROD_CONS_MEMORY + igu_sb_id * 4, 0);
  1233. /* clear sb state machine */
  1234. bnx2x_igu_clear_sb_gen(bp, vf->abs_vfid, igu_sb_id,
  1235. false /* VF */);
  1236. /* disable + update */
  1237. bnx2x_vf_igu_ack_sb(bp, vf, igu_sb_id, USTORM_ID, 0,
  1238. IGU_INT_DISABLE, 1);
  1239. }
  1240. }
  1241. void bnx2x_vf_enable_access(struct bnx2x *bp, u8 abs_vfid)
  1242. {
  1243. /* set the VF-PF association in the FW */
  1244. storm_memset_vf_to_pf(bp, FW_VF_HANDLE(abs_vfid), BP_FUNC(bp));
  1245. storm_memset_func_en(bp, FW_VF_HANDLE(abs_vfid), 1);
  1246. /* clear vf errors*/
  1247. bnx2x_vf_semi_clear_err(bp, abs_vfid);
  1248. bnx2x_vf_pglue_clear_err(bp, abs_vfid);
  1249. /* internal vf-enable - pretend */
  1250. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, abs_vfid));
  1251. DP(BNX2X_MSG_IOV, "enabling internal access for vf %x\n", abs_vfid);
  1252. bnx2x_vf_enable_internal(bp, true);
  1253. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  1254. }
  1255. static void bnx2x_vf_enable_traffic(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1256. {
  1257. /* Reset vf in IGU interrupts are still disabled */
  1258. bnx2x_vf_igu_reset(bp, vf);
  1259. /* pretend to enable the vf with the PBF */
  1260. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
  1261. REG_WR(bp, PBF_REG_DISABLE_VF, 0);
  1262. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  1263. }
  1264. static u8 bnx2x_vf_is_pcie_pending(struct bnx2x *bp, u8 abs_vfid)
  1265. {
  1266. struct pci_dev *dev;
  1267. struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
  1268. if (!vf)
  1269. return false;
  1270. dev = pci_get_bus_and_slot(vf->bus, vf->devfn);
  1271. if (dev)
  1272. return bnx2x_is_pcie_pending(dev);
  1273. return false;
  1274. }
  1275. int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid)
  1276. {
  1277. /* Verify no pending pci transactions */
  1278. if (bnx2x_vf_is_pcie_pending(bp, abs_vfid))
  1279. BNX2X_ERR("PCIE Transactions still pending\n");
  1280. return 0;
  1281. }
  1282. /* must be called after the number of PF queues and the number of VFs are
  1283. * both known
  1284. */
  1285. static void
  1286. bnx2x_iov_static_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1287. {
  1288. struct vf_pf_resc_request *resc = &vf->alloc_resc;
  1289. u16 vlan_count = 0;
  1290. /* will be set only during VF-ACQUIRE */
  1291. resc->num_rxqs = 0;
  1292. resc->num_txqs = 0;
  1293. /* no credit calculations for macs (just yet) */
  1294. resc->num_mac_filters = 1;
  1295. /* divvy up vlan rules */
  1296. vlan_count = bp->vlans_pool.check(&bp->vlans_pool);
  1297. vlan_count = 1 << ilog2(vlan_count);
  1298. resc->num_vlan_filters = vlan_count / BNX2X_NR_VIRTFN(bp);
  1299. /* no real limitation */
  1300. resc->num_mc_filters = 0;
  1301. /* num_sbs already set */
  1302. resc->num_sbs = vf->sb_count;
  1303. }
  1304. /* FLR routines: */
  1305. static void bnx2x_vf_free_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1306. {
  1307. /* reset the state variables */
  1308. bnx2x_iov_static_resc(bp, vf);
  1309. vf->state = VF_FREE;
  1310. }
  1311. static void bnx2x_vf_flr_clnup_hw(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1312. {
  1313. u32 poll_cnt = bnx2x_flr_clnup_poll_count(bp);
  1314. /* DQ usage counter */
  1315. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
  1316. bnx2x_flr_clnup_poll_hw_counter(bp, DORQ_REG_VF_USAGE_CNT,
  1317. "DQ VF usage counter timed out",
  1318. poll_cnt);
  1319. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  1320. /* FW cleanup command - poll for the results */
  1321. if (bnx2x_send_final_clnup(bp, (u8)FW_VF_HANDLE(vf->abs_vfid),
  1322. poll_cnt))
  1323. BNX2X_ERR("VF[%d] Final cleanup timed-out\n", vf->abs_vfid);
  1324. /* verify TX hw is flushed */
  1325. bnx2x_tx_hw_flushed(bp, poll_cnt);
  1326. }
  1327. static void bnx2x_vfop_flr(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1328. {
  1329. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  1330. struct bnx2x_vfop_args_qx *qx = &vfop->args.qx;
  1331. enum bnx2x_vfop_flr_state state = vfop->state;
  1332. struct bnx2x_vfop_cmd cmd = {
  1333. .done = bnx2x_vfop_flr,
  1334. .block = false,
  1335. };
  1336. if (vfop->rc < 0)
  1337. goto op_err;
  1338. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  1339. switch (state) {
  1340. case BNX2X_VFOP_FLR_QUEUES:
  1341. /* the cleanup operations are valid if and only if the VF
  1342. * was first acquired.
  1343. */
  1344. if (++(qx->qid) < vf_rxq_count(vf)) {
  1345. vfop->rc = bnx2x_vfop_qflr_cmd(bp, vf, &cmd,
  1346. qx->qid);
  1347. if (vfop->rc)
  1348. goto op_err;
  1349. return;
  1350. }
  1351. /* remove multicasts */
  1352. vfop->state = BNX2X_VFOP_FLR_HW;
  1353. vfop->rc = bnx2x_vfop_mcast_cmd(bp, vf, &cmd, NULL,
  1354. 0, true);
  1355. if (vfop->rc)
  1356. goto op_err;
  1357. return;
  1358. case BNX2X_VFOP_FLR_HW:
  1359. /* dispatch final cleanup and wait for HW queues to flush */
  1360. bnx2x_vf_flr_clnup_hw(bp, vf);
  1361. /* release VF resources */
  1362. bnx2x_vf_free_resc(bp, vf);
  1363. /* re-open the mailbox */
  1364. bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
  1365. goto op_done;
  1366. default:
  1367. bnx2x_vfop_default(state);
  1368. }
  1369. op_err:
  1370. BNX2X_ERR("VF[%d] FLR error: rc %d\n", vf->abs_vfid, vfop->rc);
  1371. op_done:
  1372. vf->flr_clnup_stage = VF_FLR_ACK;
  1373. bnx2x_vfop_end(bp, vf, vfop);
  1374. bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
  1375. }
  1376. static int bnx2x_vfop_flr_cmd(struct bnx2x *bp,
  1377. struct bnx2x_virtf *vf,
  1378. vfop_handler_t done)
  1379. {
  1380. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  1381. if (vfop) {
  1382. vfop->args.qx.qid = -1; /* loop */
  1383. bnx2x_vfop_opset(BNX2X_VFOP_FLR_QUEUES,
  1384. bnx2x_vfop_flr, done);
  1385. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_flr, false);
  1386. }
  1387. return -ENOMEM;
  1388. }
  1389. static void bnx2x_vf_flr_clnup(struct bnx2x *bp, struct bnx2x_virtf *prev_vf)
  1390. {
  1391. int i = prev_vf ? prev_vf->index + 1 : 0;
  1392. struct bnx2x_virtf *vf;
  1393. /* find next VF to cleanup */
  1394. next_vf_to_clean:
  1395. for (;
  1396. i < BNX2X_NR_VIRTFN(bp) &&
  1397. (bnx2x_vf(bp, i, state) != VF_RESET ||
  1398. bnx2x_vf(bp, i, flr_clnup_stage) != VF_FLR_CLN);
  1399. i++)
  1400. ;
  1401. DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. Num of vfs: %d\n", i,
  1402. BNX2X_NR_VIRTFN(bp));
  1403. if (i < BNX2X_NR_VIRTFN(bp)) {
  1404. vf = BP_VF(bp, i);
  1405. /* lock the vf pf channel */
  1406. bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
  1407. /* invoke the VF FLR SM */
  1408. if (bnx2x_vfop_flr_cmd(bp, vf, bnx2x_vf_flr_clnup)) {
  1409. BNX2X_ERR("VF[%d]: FLR cleanup failed -ENOMEM\n",
  1410. vf->abs_vfid);
  1411. /* mark the VF to be ACKED and continue */
  1412. vf->flr_clnup_stage = VF_FLR_ACK;
  1413. goto next_vf_to_clean;
  1414. }
  1415. return;
  1416. }
  1417. /* we are done, update vf records */
  1418. for_each_vf(bp, i) {
  1419. vf = BP_VF(bp, i);
  1420. if (vf->flr_clnup_stage != VF_FLR_ACK)
  1421. continue;
  1422. vf->flr_clnup_stage = VF_FLR_EPILOG;
  1423. }
  1424. /* Acknowledge the handled VFs.
  1425. * we are acknowledge all the vfs which an flr was requested for, even
  1426. * if amongst them there are such that we never opened, since the mcp
  1427. * will interrupt us immediately again if we only ack some of the bits,
  1428. * resulting in an endless loop. This can happen for example in KVM
  1429. * where an 'all ones' flr request is sometimes given by hyper visor
  1430. */
  1431. DP(BNX2X_MSG_MCP, "DRV_STATUS_VF_DISABLED ACK for vfs 0x%x 0x%x\n",
  1432. bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
  1433. for (i = 0; i < FLRD_VFS_DWORDS; i++)
  1434. SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i],
  1435. bp->vfdb->flrd_vfs[i]);
  1436. bnx2x_fw_command(bp, DRV_MSG_CODE_VF_DISABLED_DONE, 0);
  1437. /* clear the acked bits - better yet if the MCP implemented
  1438. * write to clear semantics
  1439. */
  1440. for (i = 0; i < FLRD_VFS_DWORDS; i++)
  1441. SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i], 0);
  1442. }
  1443. void bnx2x_vf_handle_flr_event(struct bnx2x *bp)
  1444. {
  1445. int i;
  1446. /* Read FLR'd VFs */
  1447. for (i = 0; i < FLRD_VFS_DWORDS; i++)
  1448. bp->vfdb->flrd_vfs[i] = SHMEM2_RD(bp, mcp_vf_disabled[i]);
  1449. DP(BNX2X_MSG_MCP,
  1450. "DRV_STATUS_VF_DISABLED received for vfs 0x%x 0x%x\n",
  1451. bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
  1452. for_each_vf(bp, i) {
  1453. struct bnx2x_virtf *vf = BP_VF(bp, i);
  1454. u32 reset = 0;
  1455. if (vf->abs_vfid < 32)
  1456. reset = bp->vfdb->flrd_vfs[0] & (1 << vf->abs_vfid);
  1457. else
  1458. reset = bp->vfdb->flrd_vfs[1] &
  1459. (1 << (vf->abs_vfid - 32));
  1460. if (reset) {
  1461. /* set as reset and ready for cleanup */
  1462. vf->state = VF_RESET;
  1463. vf->flr_clnup_stage = VF_FLR_CLN;
  1464. DP(BNX2X_MSG_IOV,
  1465. "Initiating Final cleanup for VF %d\n",
  1466. vf->abs_vfid);
  1467. }
  1468. }
  1469. /* do the FLR cleanup for all marked VFs*/
  1470. bnx2x_vf_flr_clnup(bp, NULL);
  1471. }
  1472. /* IOV global initialization routines */
  1473. void bnx2x_iov_init_dq(struct bnx2x *bp)
  1474. {
  1475. if (!IS_SRIOV(bp))
  1476. return;
  1477. /* Set the DQ such that the CID reflect the abs_vfid */
  1478. REG_WR(bp, DORQ_REG_VF_NORM_VF_BASE, 0);
  1479. REG_WR(bp, DORQ_REG_MAX_RVFID_SIZE, ilog2(BNX2X_MAX_NUM_OF_VFS));
  1480. /* Set VFs starting CID. If its > 0 the preceding CIDs are belong to
  1481. * the PF L2 queues
  1482. */
  1483. REG_WR(bp, DORQ_REG_VF_NORM_CID_BASE, BNX2X_FIRST_VF_CID);
  1484. /* The VF window size is the log2 of the max number of CIDs per VF */
  1485. REG_WR(bp, DORQ_REG_VF_NORM_CID_WND_SIZE, BNX2X_VF_CID_WND);
  1486. /* The VF doorbell size 0 - *B, 4 - 128B. We set it here to match
  1487. * the Pf doorbell size although the 2 are independent.
  1488. */
  1489. REG_WR(bp, DORQ_REG_VF_NORM_CID_OFST, 3);
  1490. /* No security checks for now -
  1491. * configure single rule (out of 16) mask = 0x1, value = 0x0,
  1492. * CID range 0 - 0x1ffff
  1493. */
  1494. REG_WR(bp, DORQ_REG_VF_TYPE_MASK_0, 1);
  1495. REG_WR(bp, DORQ_REG_VF_TYPE_VALUE_0, 0);
  1496. REG_WR(bp, DORQ_REG_VF_TYPE_MIN_MCID_0, 0);
  1497. REG_WR(bp, DORQ_REG_VF_TYPE_MAX_MCID_0, 0x1ffff);
  1498. /* set the VF doorbell threshold */
  1499. REG_WR(bp, DORQ_REG_VF_USAGE_CT_LIMIT, 4);
  1500. }
  1501. void bnx2x_iov_init_dmae(struct bnx2x *bp)
  1502. {
  1503. if (pci_find_ext_capability(bp->pdev, PCI_EXT_CAP_ID_SRIOV))
  1504. REG_WR(bp, DMAE_REG_BACKWARD_COMP_EN, 0);
  1505. }
  1506. static int bnx2x_vf_bus(struct bnx2x *bp, int vfid)
  1507. {
  1508. struct pci_dev *dev = bp->pdev;
  1509. struct bnx2x_sriov *iov = &bp->vfdb->sriov;
  1510. return dev->bus->number + ((dev->devfn + iov->offset +
  1511. iov->stride * vfid) >> 8);
  1512. }
  1513. static int bnx2x_vf_devfn(struct bnx2x *bp, int vfid)
  1514. {
  1515. struct pci_dev *dev = bp->pdev;
  1516. struct bnx2x_sriov *iov = &bp->vfdb->sriov;
  1517. return (dev->devfn + iov->offset + iov->stride * vfid) & 0xff;
  1518. }
  1519. static void bnx2x_vf_set_bars(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1520. {
  1521. int i, n;
  1522. struct pci_dev *dev = bp->pdev;
  1523. struct bnx2x_sriov *iov = &bp->vfdb->sriov;
  1524. for (i = 0, n = 0; i < PCI_SRIOV_NUM_BARS; i += 2, n++) {
  1525. u64 start = pci_resource_start(dev, PCI_IOV_RESOURCES + i);
  1526. u32 size = pci_resource_len(dev, PCI_IOV_RESOURCES + i);
  1527. size /= iov->total;
  1528. vf->bars[n].bar = start + size * vf->abs_vfid;
  1529. vf->bars[n].size = size;
  1530. }
  1531. }
  1532. static int bnx2x_ari_enabled(struct pci_dev *dev)
  1533. {
  1534. return dev->bus->self && dev->bus->self->ari_enabled;
  1535. }
  1536. static void
  1537. bnx2x_get_vf_igu_cam_info(struct bnx2x *bp)
  1538. {
  1539. int sb_id;
  1540. u32 val;
  1541. u8 fid, current_pf = 0;
  1542. /* IGU in normal mode - read CAM */
  1543. for (sb_id = 0; sb_id < IGU_REG_MAPPING_MEMORY_SIZE; sb_id++) {
  1544. val = REG_RD(bp, IGU_REG_MAPPING_MEMORY + sb_id * 4);
  1545. if (!(val & IGU_REG_MAPPING_MEMORY_VALID))
  1546. continue;
  1547. fid = GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID);
  1548. if (fid & IGU_FID_ENCODE_IS_PF)
  1549. current_pf = fid & IGU_FID_PF_NUM_MASK;
  1550. else if (current_pf == BP_FUNC(bp))
  1551. bnx2x_vf_set_igu_info(bp, sb_id,
  1552. (fid & IGU_FID_VF_NUM_MASK));
  1553. DP(BNX2X_MSG_IOV, "%s[%d], igu_sb_id=%d, msix=%d\n",
  1554. ((fid & IGU_FID_ENCODE_IS_PF) ? "PF" : "VF"),
  1555. ((fid & IGU_FID_ENCODE_IS_PF) ? (fid & IGU_FID_PF_NUM_MASK) :
  1556. (fid & IGU_FID_VF_NUM_MASK)), sb_id,
  1557. GET_FIELD((val), IGU_REG_MAPPING_MEMORY_VECTOR));
  1558. }
  1559. DP(BNX2X_MSG_IOV, "vf_sbs_pool is %d\n", BP_VFDB(bp)->vf_sbs_pool);
  1560. }
  1561. static void __bnx2x_iov_free_vfdb(struct bnx2x *bp)
  1562. {
  1563. if (bp->vfdb) {
  1564. kfree(bp->vfdb->vfqs);
  1565. kfree(bp->vfdb->vfs);
  1566. kfree(bp->vfdb);
  1567. }
  1568. bp->vfdb = NULL;
  1569. }
  1570. static int bnx2x_sriov_pci_cfg_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
  1571. {
  1572. int pos;
  1573. struct pci_dev *dev = bp->pdev;
  1574. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
  1575. if (!pos) {
  1576. BNX2X_ERR("failed to find SRIOV capability in device\n");
  1577. return -ENODEV;
  1578. }
  1579. iov->pos = pos;
  1580. DP(BNX2X_MSG_IOV, "sriov ext pos %d\n", pos);
  1581. pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
  1582. pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &iov->total);
  1583. pci_read_config_word(dev, pos + PCI_SRIOV_INITIAL_VF, &iov->initial);
  1584. pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
  1585. pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
  1586. pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
  1587. pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
  1588. pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
  1589. return 0;
  1590. }
  1591. static int bnx2x_sriov_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
  1592. {
  1593. u32 val;
  1594. /* read the SRIOV capability structure
  1595. * The fields can be read via configuration read or
  1596. * directly from the device (starting at offset PCICFG_OFFSET)
  1597. */
  1598. if (bnx2x_sriov_pci_cfg_info(bp, iov))
  1599. return -ENODEV;
  1600. /* get the number of SRIOV bars */
  1601. iov->nres = 0;
  1602. /* read the first_vfid */
  1603. val = REG_RD(bp, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF);
  1604. iov->first_vf_in_pf = ((val & GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK)
  1605. * 8) - (BNX2X_MAX_NUM_OF_VFS * BP_PATH(bp));
  1606. DP(BNX2X_MSG_IOV,
  1607. "IOV info[%d]: first vf %d, nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
  1608. BP_FUNC(bp),
  1609. iov->first_vf_in_pf, iov->nres, iov->cap, iov->ctrl, iov->total,
  1610. iov->initial, iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
  1611. return 0;
  1612. }
  1613. /* must be called after PF bars are mapped */
  1614. int bnx2x_iov_init_one(struct bnx2x *bp, int int_mode_param,
  1615. int num_vfs_param)
  1616. {
  1617. int err, i;
  1618. struct bnx2x_sriov *iov;
  1619. struct pci_dev *dev = bp->pdev;
  1620. bp->vfdb = NULL;
  1621. /* verify is pf */
  1622. if (IS_VF(bp))
  1623. return 0;
  1624. /* verify sriov capability is present in configuration space */
  1625. if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV))
  1626. return 0;
  1627. /* verify chip revision */
  1628. if (CHIP_IS_E1x(bp))
  1629. return 0;
  1630. /* check if SRIOV support is turned off */
  1631. if (!num_vfs_param)
  1632. return 0;
  1633. /* SRIOV assumes that num of PF CIDs < BNX2X_FIRST_VF_CID */
  1634. if (BNX2X_L2_MAX_CID(bp) >= BNX2X_FIRST_VF_CID) {
  1635. BNX2X_ERR("PF cids %d are overspilling into vf space (starts at %d). Abort SRIOV\n",
  1636. BNX2X_L2_MAX_CID(bp), BNX2X_FIRST_VF_CID);
  1637. return 0;
  1638. }
  1639. /* SRIOV can be enabled only with MSIX */
  1640. if (int_mode_param == BNX2X_INT_MODE_MSI ||
  1641. int_mode_param == BNX2X_INT_MODE_INTX) {
  1642. BNX2X_ERR("Forced MSI/INTx mode is incompatible with SRIOV\n");
  1643. return 0;
  1644. }
  1645. err = -EIO;
  1646. /* verify ari is enabled */
  1647. if (!bnx2x_ari_enabled(bp->pdev)) {
  1648. BNX2X_ERR("ARI not supported (check pci bridge ARI forwarding), SRIOV can not be enabled\n");
  1649. return 0;
  1650. }
  1651. /* verify igu is in normal mode */
  1652. if (CHIP_INT_MODE_IS_BC(bp)) {
  1653. BNX2X_ERR("IGU not normal mode, SRIOV can not be enabled\n");
  1654. return 0;
  1655. }
  1656. /* allocate the vfs database */
  1657. bp->vfdb = kzalloc(sizeof(*(bp->vfdb)), GFP_KERNEL);
  1658. if (!bp->vfdb) {
  1659. BNX2X_ERR("failed to allocate vf database\n");
  1660. err = -ENOMEM;
  1661. goto failed;
  1662. }
  1663. /* get the sriov info - Linux already collected all the pertinent
  1664. * information, however the sriov structure is for the private use
  1665. * of the pci module. Also we want this information regardless
  1666. * of the hyper-visor.
  1667. */
  1668. iov = &(bp->vfdb->sriov);
  1669. err = bnx2x_sriov_info(bp, iov);
  1670. if (err)
  1671. goto failed;
  1672. /* SR-IOV capability was enabled but there are no VFs*/
  1673. if (iov->total == 0)
  1674. goto failed;
  1675. iov->nr_virtfn = min_t(u16, iov->total, num_vfs_param);
  1676. DP(BNX2X_MSG_IOV, "num_vfs_param was %d, nr_virtfn was %d\n",
  1677. num_vfs_param, iov->nr_virtfn);
  1678. /* allocate the vf array */
  1679. bp->vfdb->vfs = kzalloc(sizeof(struct bnx2x_virtf) *
  1680. BNX2X_NR_VIRTFN(bp), GFP_KERNEL);
  1681. if (!bp->vfdb->vfs) {
  1682. BNX2X_ERR("failed to allocate vf array\n");
  1683. err = -ENOMEM;
  1684. goto failed;
  1685. }
  1686. /* Initial VF init - index and abs_vfid - nr_virtfn must be set */
  1687. for_each_vf(bp, i) {
  1688. bnx2x_vf(bp, i, index) = i;
  1689. bnx2x_vf(bp, i, abs_vfid) = iov->first_vf_in_pf + i;
  1690. bnx2x_vf(bp, i, state) = VF_FREE;
  1691. INIT_LIST_HEAD(&bnx2x_vf(bp, i, op_list_head));
  1692. mutex_init(&bnx2x_vf(bp, i, op_mutex));
  1693. bnx2x_vf(bp, i, op_current) = CHANNEL_TLV_NONE;
  1694. }
  1695. /* re-read the IGU CAM for VFs - index and abs_vfid must be set */
  1696. bnx2x_get_vf_igu_cam_info(bp);
  1697. /* allocate the queue arrays for all VFs */
  1698. bp->vfdb->vfqs = kzalloc(
  1699. BNX2X_MAX_NUM_VF_QUEUES * sizeof(struct bnx2x_vf_queue),
  1700. GFP_KERNEL);
  1701. DP(BNX2X_MSG_IOV, "bp->vfdb->vfqs was %p\n", bp->vfdb->vfqs);
  1702. if (!bp->vfdb->vfqs) {
  1703. BNX2X_ERR("failed to allocate vf queue array\n");
  1704. err = -ENOMEM;
  1705. goto failed;
  1706. }
  1707. return 0;
  1708. failed:
  1709. DP(BNX2X_MSG_IOV, "Failed err=%d\n", err);
  1710. __bnx2x_iov_free_vfdb(bp);
  1711. return err;
  1712. }
  1713. void bnx2x_iov_remove_one(struct bnx2x *bp)
  1714. {
  1715. int vf_idx;
  1716. /* if SRIOV is not enabled there's nothing to do */
  1717. if (!IS_SRIOV(bp))
  1718. return;
  1719. DP(BNX2X_MSG_IOV, "about to call disable sriov\n");
  1720. pci_disable_sriov(bp->pdev);
  1721. DP(BNX2X_MSG_IOV, "sriov disabled\n");
  1722. /* disable access to all VFs */
  1723. for (vf_idx = 0; vf_idx < bp->vfdb->sriov.total; vf_idx++) {
  1724. bnx2x_pretend_func(bp,
  1725. HW_VF_HANDLE(bp,
  1726. bp->vfdb->sriov.first_vf_in_pf +
  1727. vf_idx));
  1728. DP(BNX2X_MSG_IOV, "disabling internal access for vf %d\n",
  1729. bp->vfdb->sriov.first_vf_in_pf + vf_idx);
  1730. bnx2x_vf_enable_internal(bp, 0);
  1731. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  1732. }
  1733. /* free vf database */
  1734. __bnx2x_iov_free_vfdb(bp);
  1735. }
  1736. void bnx2x_iov_free_mem(struct bnx2x *bp)
  1737. {
  1738. int i;
  1739. if (!IS_SRIOV(bp))
  1740. return;
  1741. /* free vfs hw contexts */
  1742. for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
  1743. struct hw_dma *cxt = &bp->vfdb->context[i];
  1744. BNX2X_PCI_FREE(cxt->addr, cxt->mapping, cxt->size);
  1745. }
  1746. BNX2X_PCI_FREE(BP_VFDB(bp)->sp_dma.addr,
  1747. BP_VFDB(bp)->sp_dma.mapping,
  1748. BP_VFDB(bp)->sp_dma.size);
  1749. BNX2X_PCI_FREE(BP_VF_MBX_DMA(bp)->addr,
  1750. BP_VF_MBX_DMA(bp)->mapping,
  1751. BP_VF_MBX_DMA(bp)->size);
  1752. BNX2X_PCI_FREE(BP_VF_BULLETIN_DMA(bp)->addr,
  1753. BP_VF_BULLETIN_DMA(bp)->mapping,
  1754. BP_VF_BULLETIN_DMA(bp)->size);
  1755. }
  1756. int bnx2x_iov_alloc_mem(struct bnx2x *bp)
  1757. {
  1758. size_t tot_size;
  1759. int i, rc = 0;
  1760. if (!IS_SRIOV(bp))
  1761. return rc;
  1762. /* allocate vfs hw contexts */
  1763. tot_size = (BP_VFDB(bp)->sriov.first_vf_in_pf + BNX2X_NR_VIRTFN(bp)) *
  1764. BNX2X_CIDS_PER_VF * sizeof(union cdu_context);
  1765. for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
  1766. struct hw_dma *cxt = BP_VF_CXT_PAGE(bp, i);
  1767. cxt->size = min_t(size_t, tot_size, CDU_ILT_PAGE_SZ);
  1768. if (cxt->size) {
  1769. BNX2X_PCI_ALLOC(cxt->addr, &cxt->mapping, cxt->size);
  1770. } else {
  1771. cxt->addr = NULL;
  1772. cxt->mapping = 0;
  1773. }
  1774. tot_size -= cxt->size;
  1775. }
  1776. /* allocate vfs ramrods dma memory - client_init and set_mac */
  1777. tot_size = BNX2X_NR_VIRTFN(bp) * sizeof(struct bnx2x_vf_sp);
  1778. BNX2X_PCI_ALLOC(BP_VFDB(bp)->sp_dma.addr, &BP_VFDB(bp)->sp_dma.mapping,
  1779. tot_size);
  1780. BP_VFDB(bp)->sp_dma.size = tot_size;
  1781. /* allocate mailboxes */
  1782. tot_size = BNX2X_NR_VIRTFN(bp) * MBX_MSG_ALIGNED_SIZE;
  1783. BNX2X_PCI_ALLOC(BP_VF_MBX_DMA(bp)->addr, &BP_VF_MBX_DMA(bp)->mapping,
  1784. tot_size);
  1785. BP_VF_MBX_DMA(bp)->size = tot_size;
  1786. /* allocate local bulletin boards */
  1787. tot_size = BNX2X_NR_VIRTFN(bp) * BULLETIN_CONTENT_SIZE;
  1788. BNX2X_PCI_ALLOC(BP_VF_BULLETIN_DMA(bp)->addr,
  1789. &BP_VF_BULLETIN_DMA(bp)->mapping, tot_size);
  1790. BP_VF_BULLETIN_DMA(bp)->size = tot_size;
  1791. return 0;
  1792. alloc_mem_err:
  1793. return -ENOMEM;
  1794. }
  1795. static void bnx2x_vfq_init(struct bnx2x *bp, struct bnx2x_virtf *vf,
  1796. struct bnx2x_vf_queue *q)
  1797. {
  1798. u8 cl_id = vfq_cl_id(vf, q);
  1799. u8 func_id = FW_VF_HANDLE(vf->abs_vfid);
  1800. unsigned long q_type = 0;
  1801. set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type);
  1802. set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type);
  1803. /* Queue State object */
  1804. bnx2x_init_queue_obj(bp, &q->sp_obj,
  1805. cl_id, &q->cid, 1, func_id,
  1806. bnx2x_vf_sp(bp, vf, q_data),
  1807. bnx2x_vf_sp_map(bp, vf, q_data),
  1808. q_type);
  1809. DP(BNX2X_MSG_IOV,
  1810. "initialized vf %d's queue object. func id set to %d. cid set to 0x%x\n",
  1811. vf->abs_vfid, q->sp_obj.func_id, q->cid);
  1812. }
  1813. /* called by bnx2x_nic_load */
  1814. int bnx2x_iov_nic_init(struct bnx2x *bp)
  1815. {
  1816. int vfid;
  1817. if (!IS_SRIOV(bp)) {
  1818. DP(BNX2X_MSG_IOV, "vfdb was not allocated\n");
  1819. return 0;
  1820. }
  1821. DP(BNX2X_MSG_IOV, "num of vfs: %d\n", (bp)->vfdb->sriov.nr_virtfn);
  1822. /* let FLR complete ... */
  1823. msleep(100);
  1824. /* initialize vf database */
  1825. for_each_vf(bp, vfid) {
  1826. struct bnx2x_virtf *vf = BP_VF(bp, vfid);
  1827. int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vfid) *
  1828. BNX2X_CIDS_PER_VF;
  1829. union cdu_context *base_cxt = (union cdu_context *)
  1830. BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
  1831. (base_vf_cid & (ILT_PAGE_CIDS-1));
  1832. DP(BNX2X_MSG_IOV,
  1833. "VF[%d] Max IGU SBs: %d, base vf cid 0x%x, base cid 0x%x, base cxt %p\n",
  1834. vf->abs_vfid, vf_sb_count(vf), base_vf_cid,
  1835. BNX2X_FIRST_VF_CID + base_vf_cid, base_cxt);
  1836. /* init statically provisioned resources */
  1837. bnx2x_iov_static_resc(bp, vf);
  1838. /* queues are initialized during VF-ACQUIRE */
  1839. /* reserve the vf vlan credit */
  1840. bp->vlans_pool.get(&bp->vlans_pool, vf_vlan_rules_cnt(vf));
  1841. vf->filter_state = 0;
  1842. vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id);
  1843. /* init mcast object - This object will be re-initialized
  1844. * during VF-ACQUIRE with the proper cl_id and cid.
  1845. * It needs to be initialized here so that it can be safely
  1846. * handled by a subsequent FLR flow.
  1847. */
  1848. vf->mcast_list_len = 0;
  1849. bnx2x_init_mcast_obj(bp, &vf->mcast_obj, 0xFF,
  1850. 0xFF, 0xFF, 0xFF,
  1851. bnx2x_vf_sp(bp, vf, mcast_rdata),
  1852. bnx2x_vf_sp_map(bp, vf, mcast_rdata),
  1853. BNX2X_FILTER_MCAST_PENDING,
  1854. &vf->filter_state,
  1855. BNX2X_OBJ_TYPE_RX_TX);
  1856. /* set the mailbox message addresses */
  1857. BP_VF_MBX(bp, vfid)->msg = (struct bnx2x_vf_mbx_msg *)
  1858. (((u8 *)BP_VF_MBX_DMA(bp)->addr) + vfid *
  1859. MBX_MSG_ALIGNED_SIZE);
  1860. BP_VF_MBX(bp, vfid)->msg_mapping = BP_VF_MBX_DMA(bp)->mapping +
  1861. vfid * MBX_MSG_ALIGNED_SIZE;
  1862. /* Enable vf mailbox */
  1863. bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
  1864. }
  1865. /* Final VF init */
  1866. for_each_vf(bp, vfid) {
  1867. struct bnx2x_virtf *vf = BP_VF(bp, vfid);
  1868. /* fill in the BDF and bars */
  1869. vf->bus = bnx2x_vf_bus(bp, vfid);
  1870. vf->devfn = bnx2x_vf_devfn(bp, vfid);
  1871. bnx2x_vf_set_bars(bp, vf);
  1872. DP(BNX2X_MSG_IOV,
  1873. "VF info[%d]: bus 0x%x, devfn 0x%x, bar0 [0x%x, %d], bar1 [0x%x, %d], bar2 [0x%x, %d]\n",
  1874. vf->abs_vfid, vf->bus, vf->devfn,
  1875. (unsigned)vf->bars[0].bar, vf->bars[0].size,
  1876. (unsigned)vf->bars[1].bar, vf->bars[1].size,
  1877. (unsigned)vf->bars[2].bar, vf->bars[2].size);
  1878. }
  1879. return 0;
  1880. }
  1881. /* called by bnx2x_chip_cleanup */
  1882. int bnx2x_iov_chip_cleanup(struct bnx2x *bp)
  1883. {
  1884. int i;
  1885. if (!IS_SRIOV(bp))
  1886. return 0;
  1887. /* release all the VFs */
  1888. for_each_vf(bp, i)
  1889. bnx2x_vf_release(bp, BP_VF(bp, i), true); /* blocking */
  1890. return 0;
  1891. }
  1892. /* called by bnx2x_init_hw_func, returns the next ilt line */
  1893. int bnx2x_iov_init_ilt(struct bnx2x *bp, u16 line)
  1894. {
  1895. int i;
  1896. struct bnx2x_ilt *ilt = BP_ILT(bp);
  1897. if (!IS_SRIOV(bp))
  1898. return line;
  1899. /* set vfs ilt lines */
  1900. for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
  1901. struct hw_dma *hw_cxt = BP_VF_CXT_PAGE(bp, i);
  1902. ilt->lines[line+i].page = hw_cxt->addr;
  1903. ilt->lines[line+i].page_mapping = hw_cxt->mapping;
  1904. ilt->lines[line+i].size = hw_cxt->size; /* doesn't matter */
  1905. }
  1906. return line + i;
  1907. }
  1908. static u8 bnx2x_iov_is_vf_cid(struct bnx2x *bp, u16 cid)
  1909. {
  1910. return ((cid >= BNX2X_FIRST_VF_CID) &&
  1911. ((cid - BNX2X_FIRST_VF_CID) < BNX2X_VF_CIDS));
  1912. }
  1913. static
  1914. void bnx2x_vf_handle_classification_eqe(struct bnx2x *bp,
  1915. struct bnx2x_vf_queue *vfq,
  1916. union event_ring_elem *elem)
  1917. {
  1918. unsigned long ramrod_flags = 0;
  1919. int rc = 0;
  1920. /* Always push next commands out, don't wait here */
  1921. set_bit(RAMROD_CONT, &ramrod_flags);
  1922. switch (elem->message.data.eth_event.echo >> BNX2X_SWCID_SHIFT) {
  1923. case BNX2X_FILTER_MAC_PENDING:
  1924. rc = vfq->mac_obj.complete(bp, &vfq->mac_obj, elem,
  1925. &ramrod_flags);
  1926. break;
  1927. case BNX2X_FILTER_VLAN_PENDING:
  1928. rc = vfq->vlan_obj.complete(bp, &vfq->vlan_obj, elem,
  1929. &ramrod_flags);
  1930. break;
  1931. default:
  1932. BNX2X_ERR("Unsupported classification command: %d\n",
  1933. elem->message.data.eth_event.echo);
  1934. return;
  1935. }
  1936. if (rc < 0)
  1937. BNX2X_ERR("Failed to schedule new commands: %d\n", rc);
  1938. else if (rc > 0)
  1939. DP(BNX2X_MSG_IOV, "Scheduled next pending commands...\n");
  1940. }
  1941. static
  1942. void bnx2x_vf_handle_mcast_eqe(struct bnx2x *bp,
  1943. struct bnx2x_virtf *vf)
  1944. {
  1945. struct bnx2x_mcast_ramrod_params rparam = {NULL};
  1946. int rc;
  1947. rparam.mcast_obj = &vf->mcast_obj;
  1948. vf->mcast_obj.raw.clear_pending(&vf->mcast_obj.raw);
  1949. /* If there are pending mcast commands - send them */
  1950. if (vf->mcast_obj.check_pending(&vf->mcast_obj)) {
  1951. rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
  1952. if (rc < 0)
  1953. BNX2X_ERR("Failed to send pending mcast commands: %d\n",
  1954. rc);
  1955. }
  1956. }
  1957. static
  1958. void bnx2x_vf_handle_filters_eqe(struct bnx2x *bp,
  1959. struct bnx2x_virtf *vf)
  1960. {
  1961. smp_mb__before_clear_bit();
  1962. clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
  1963. smp_mb__after_clear_bit();
  1964. }
  1965. int bnx2x_iov_eq_sp_event(struct bnx2x *bp, union event_ring_elem *elem)
  1966. {
  1967. struct bnx2x_virtf *vf;
  1968. int qidx = 0, abs_vfid;
  1969. u8 opcode;
  1970. u16 cid = 0xffff;
  1971. if (!IS_SRIOV(bp))
  1972. return 1;
  1973. /* first get the cid - the only events we handle here are cfc-delete
  1974. * and set-mac completion
  1975. */
  1976. opcode = elem->message.opcode;
  1977. switch (opcode) {
  1978. case EVENT_RING_OPCODE_CFC_DEL:
  1979. cid = SW_CID((__force __le32)
  1980. elem->message.data.cfc_del_event.cid);
  1981. DP(BNX2X_MSG_IOV, "checking cfc-del comp cid=%d\n", cid);
  1982. break;
  1983. case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
  1984. case EVENT_RING_OPCODE_MULTICAST_RULES:
  1985. case EVENT_RING_OPCODE_FILTERS_RULES:
  1986. cid = (elem->message.data.eth_event.echo &
  1987. BNX2X_SWCID_MASK);
  1988. DP(BNX2X_MSG_IOV, "checking filtering comp cid=%d\n", cid);
  1989. break;
  1990. case EVENT_RING_OPCODE_VF_FLR:
  1991. abs_vfid = elem->message.data.vf_flr_event.vf_id;
  1992. DP(BNX2X_MSG_IOV, "Got VF FLR notification abs_vfid=%d\n",
  1993. abs_vfid);
  1994. goto get_vf;
  1995. case EVENT_RING_OPCODE_MALICIOUS_VF:
  1996. abs_vfid = elem->message.data.malicious_vf_event.vf_id;
  1997. BNX2X_ERR("Got VF MALICIOUS notification abs_vfid=%d err_id=0x%x\n",
  1998. abs_vfid,
  1999. elem->message.data.malicious_vf_event.err_id);
  2000. goto get_vf;
  2001. default:
  2002. return 1;
  2003. }
  2004. /* check if the cid is the VF range */
  2005. if (!bnx2x_iov_is_vf_cid(bp, cid)) {
  2006. DP(BNX2X_MSG_IOV, "cid is outside vf range: %d\n", cid);
  2007. return 1;
  2008. }
  2009. /* extract vf and rxq index from vf_cid - relies on the following:
  2010. * 1. vfid on cid reflects the true abs_vfid
  2011. * 2. The max number of VFs (per path) is 64
  2012. */
  2013. qidx = cid & ((1 << BNX2X_VF_CID_WND)-1);
  2014. abs_vfid = (cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
  2015. get_vf:
  2016. vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
  2017. if (!vf) {
  2018. BNX2X_ERR("EQ completion for unknown VF, cid %d, abs_vfid %d\n",
  2019. cid, abs_vfid);
  2020. return 0;
  2021. }
  2022. switch (opcode) {
  2023. case EVENT_RING_OPCODE_CFC_DEL:
  2024. DP(BNX2X_MSG_IOV, "got VF [%d:%d] cfc delete ramrod\n",
  2025. vf->abs_vfid, qidx);
  2026. vfq_get(vf, qidx)->sp_obj.complete_cmd(bp,
  2027. &vfq_get(vf,
  2028. qidx)->sp_obj,
  2029. BNX2X_Q_CMD_CFC_DEL);
  2030. break;
  2031. case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
  2032. DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mac/vlan ramrod\n",
  2033. vf->abs_vfid, qidx);
  2034. bnx2x_vf_handle_classification_eqe(bp, vfq_get(vf, qidx), elem);
  2035. break;
  2036. case EVENT_RING_OPCODE_MULTICAST_RULES:
  2037. DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mcast ramrod\n",
  2038. vf->abs_vfid, qidx);
  2039. bnx2x_vf_handle_mcast_eqe(bp, vf);
  2040. break;
  2041. case EVENT_RING_OPCODE_FILTERS_RULES:
  2042. DP(BNX2X_MSG_IOV, "got VF [%d:%d] set rx-mode ramrod\n",
  2043. vf->abs_vfid, qidx);
  2044. bnx2x_vf_handle_filters_eqe(bp, vf);
  2045. break;
  2046. case EVENT_RING_OPCODE_VF_FLR:
  2047. case EVENT_RING_OPCODE_MALICIOUS_VF:
  2048. /* Do nothing for now */
  2049. return 0;
  2050. }
  2051. /* SRIOV: reschedule any 'in_progress' operations */
  2052. bnx2x_iov_sp_event(bp, cid, false);
  2053. return 0;
  2054. }
  2055. static struct bnx2x_virtf *bnx2x_vf_by_cid(struct bnx2x *bp, int vf_cid)
  2056. {
  2057. /* extract the vf from vf_cid - relies on the following:
  2058. * 1. vfid on cid reflects the true abs_vfid
  2059. * 2. The max number of VFs (per path) is 64
  2060. */
  2061. int abs_vfid = (vf_cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
  2062. return bnx2x_vf_by_abs_fid(bp, abs_vfid);
  2063. }
  2064. void bnx2x_iov_set_queue_sp_obj(struct bnx2x *bp, int vf_cid,
  2065. struct bnx2x_queue_sp_obj **q_obj)
  2066. {
  2067. struct bnx2x_virtf *vf;
  2068. if (!IS_SRIOV(bp))
  2069. return;
  2070. vf = bnx2x_vf_by_cid(bp, vf_cid);
  2071. if (vf) {
  2072. /* extract queue index from vf_cid - relies on the following:
  2073. * 1. vfid on cid reflects the true abs_vfid
  2074. * 2. The max number of VFs (per path) is 64
  2075. */
  2076. int q_index = vf_cid & ((1 << BNX2X_VF_CID_WND)-1);
  2077. *q_obj = &bnx2x_vfq(vf, q_index, sp_obj);
  2078. } else {
  2079. BNX2X_ERR("No vf matching cid %d\n", vf_cid);
  2080. }
  2081. }
  2082. void bnx2x_iov_sp_event(struct bnx2x *bp, int vf_cid, bool queue_work)
  2083. {
  2084. struct bnx2x_virtf *vf;
  2085. /* check if the cid is the VF range */
  2086. if (!IS_SRIOV(bp) || !bnx2x_iov_is_vf_cid(bp, vf_cid))
  2087. return;
  2088. vf = bnx2x_vf_by_cid(bp, vf_cid);
  2089. if (vf) {
  2090. /* set in_progress flag */
  2091. atomic_set(&vf->op_in_progress, 1);
  2092. if (queue_work)
  2093. queue_delayed_work(bnx2x_wq, &bp->sp_task, 0);
  2094. }
  2095. }
  2096. void bnx2x_iov_adjust_stats_req(struct bnx2x *bp)
  2097. {
  2098. int i;
  2099. int first_queue_query_index, num_queues_req;
  2100. dma_addr_t cur_data_offset;
  2101. struct stats_query_entry *cur_query_entry;
  2102. u8 stats_count = 0;
  2103. bool is_fcoe = false;
  2104. if (!IS_SRIOV(bp))
  2105. return;
  2106. if (!NO_FCOE(bp))
  2107. is_fcoe = true;
  2108. /* fcoe adds one global request and one queue request */
  2109. num_queues_req = BNX2X_NUM_ETH_QUEUES(bp) + is_fcoe;
  2110. first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX -
  2111. (is_fcoe ? 0 : 1);
  2112. DP(BNX2X_MSG_IOV,
  2113. "BNX2X_NUM_ETH_QUEUES %d, is_fcoe %d, first_queue_query_index %d => determined the last non virtual statistics query index is %d. Will add queries on top of that\n",
  2114. BNX2X_NUM_ETH_QUEUES(bp), is_fcoe, first_queue_query_index,
  2115. first_queue_query_index + num_queues_req);
  2116. cur_data_offset = bp->fw_stats_data_mapping +
  2117. offsetof(struct bnx2x_fw_stats_data, queue_stats) +
  2118. num_queues_req * sizeof(struct per_queue_stats);
  2119. cur_query_entry = &bp->fw_stats_req->
  2120. query[first_queue_query_index + num_queues_req];
  2121. for_each_vf(bp, i) {
  2122. int j;
  2123. struct bnx2x_virtf *vf = BP_VF(bp, i);
  2124. if (vf->state != VF_ENABLED) {
  2125. DP(BNX2X_MSG_IOV,
  2126. "vf %d not enabled so no stats for it\n",
  2127. vf->abs_vfid);
  2128. continue;
  2129. }
  2130. DP(BNX2X_MSG_IOV, "add addresses for vf %d\n", vf->abs_vfid);
  2131. for_each_vfq(vf, j) {
  2132. struct bnx2x_vf_queue *rxq = vfq_get(vf, j);
  2133. dma_addr_t q_stats_addr =
  2134. vf->fw_stat_map + j * vf->stats_stride;
  2135. /* collect stats fro active queues only */
  2136. if (bnx2x_get_q_logical_state(bp, &rxq->sp_obj) ==
  2137. BNX2X_Q_LOGICAL_STATE_STOPPED)
  2138. continue;
  2139. /* create stats query entry for this queue */
  2140. cur_query_entry->kind = STATS_TYPE_QUEUE;
  2141. cur_query_entry->index = vfq_stat_id(vf, rxq);
  2142. cur_query_entry->funcID =
  2143. cpu_to_le16(FW_VF_HANDLE(vf->abs_vfid));
  2144. cur_query_entry->address.hi =
  2145. cpu_to_le32(U64_HI(q_stats_addr));
  2146. cur_query_entry->address.lo =
  2147. cpu_to_le32(U64_LO(q_stats_addr));
  2148. DP(BNX2X_MSG_IOV,
  2149. "added address %x %x for vf %d queue %d client %d\n",
  2150. cur_query_entry->address.hi,
  2151. cur_query_entry->address.lo, cur_query_entry->funcID,
  2152. j, cur_query_entry->index);
  2153. cur_query_entry++;
  2154. cur_data_offset += sizeof(struct per_queue_stats);
  2155. stats_count++;
  2156. /* all stats are coalesced to the leading queue */
  2157. if (vf->cfg_flags & VF_CFG_STATS_COALESCE)
  2158. break;
  2159. }
  2160. }
  2161. bp->fw_stats_req->hdr.cmd_num = bp->fw_stats_num + stats_count;
  2162. }
  2163. void bnx2x_iov_sp_task(struct bnx2x *bp)
  2164. {
  2165. int i;
  2166. if (!IS_SRIOV(bp))
  2167. return;
  2168. /* Iterate over all VFs and invoke state transition for VFs with
  2169. * 'in-progress' slow-path operations
  2170. */
  2171. DP(BNX2X_MSG_IOV, "searching for pending vf operations\n");
  2172. for_each_vf(bp, i) {
  2173. struct bnx2x_virtf *vf = BP_VF(bp, i);
  2174. if (!vf) {
  2175. BNX2X_ERR("VF was null! skipping...\n");
  2176. continue;
  2177. }
  2178. if (!list_empty(&vf->op_list_head) &&
  2179. atomic_read(&vf->op_in_progress)) {
  2180. DP(BNX2X_MSG_IOV, "running pending op for vf %d\n", i);
  2181. bnx2x_vfop_cur(bp, vf)->transition(bp, vf);
  2182. }
  2183. }
  2184. }
  2185. static inline
  2186. struct bnx2x_virtf *__vf_from_stat_id(struct bnx2x *bp, u8 stat_id)
  2187. {
  2188. int i;
  2189. struct bnx2x_virtf *vf = NULL;
  2190. for_each_vf(bp, i) {
  2191. vf = BP_VF(bp, i);
  2192. if (stat_id >= vf->igu_base_id &&
  2193. stat_id < vf->igu_base_id + vf_sb_count(vf))
  2194. break;
  2195. }
  2196. return vf;
  2197. }
  2198. /* VF API helpers */
  2199. static void bnx2x_vf_qtbl_set_q(struct bnx2x *bp, u8 abs_vfid, u8 qid,
  2200. u8 enable)
  2201. {
  2202. u32 reg = PXP_REG_HST_ZONE_PERMISSION_TABLE + qid * 4;
  2203. u32 val = enable ? (abs_vfid | (1 << 6)) : 0;
  2204. REG_WR(bp, reg, val);
  2205. }
  2206. static void bnx2x_vf_clr_qtbl(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2207. {
  2208. int i;
  2209. for_each_vfq(vf, i)
  2210. bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
  2211. vfq_qzone_id(vf, vfq_get(vf, i)), false);
  2212. }
  2213. static void bnx2x_vf_igu_disable(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2214. {
  2215. u32 val;
  2216. /* clear the VF configuration - pretend */
  2217. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
  2218. val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
  2219. val &= ~(IGU_VF_CONF_MSI_MSIX_EN | IGU_VF_CONF_SINGLE_ISR_EN |
  2220. IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_PARENT_MASK);
  2221. REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
  2222. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  2223. }
  2224. u8 bnx2x_vf_max_queue_cnt(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2225. {
  2226. return min_t(u8, min_t(u8, vf_sb_count(vf), BNX2X_CIDS_PER_VF),
  2227. BNX2X_VF_MAX_QUEUES);
  2228. }
  2229. static
  2230. int bnx2x_vf_chk_avail_resc(struct bnx2x *bp, struct bnx2x_virtf *vf,
  2231. struct vf_pf_resc_request *req_resc)
  2232. {
  2233. u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
  2234. u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
  2235. return ((req_resc->num_rxqs <= rxq_cnt) &&
  2236. (req_resc->num_txqs <= txq_cnt) &&
  2237. (req_resc->num_sbs <= vf_sb_count(vf)) &&
  2238. (req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) &&
  2239. (req_resc->num_vlan_filters <= vf_vlan_rules_cnt(vf)));
  2240. }
  2241. /* CORE VF API */
  2242. int bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf,
  2243. struct vf_pf_resc_request *resc)
  2244. {
  2245. int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vf->index) *
  2246. BNX2X_CIDS_PER_VF;
  2247. union cdu_context *base_cxt = (union cdu_context *)
  2248. BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
  2249. (base_vf_cid & (ILT_PAGE_CIDS-1));
  2250. int i;
  2251. /* if state is 'acquired' the VF was not released or FLR'd, in
  2252. * this case the returned resources match the acquired already
  2253. * acquired resources. Verify that the requested numbers do
  2254. * not exceed the already acquired numbers.
  2255. */
  2256. if (vf->state == VF_ACQUIRED) {
  2257. DP(BNX2X_MSG_IOV, "VF[%d] Trying to re-acquire resources (VF was not released or FLR'd)\n",
  2258. vf->abs_vfid);
  2259. if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
  2260. BNX2X_ERR("VF[%d] When re-acquiring resources, requested numbers must be <= then previously acquired numbers\n",
  2261. vf->abs_vfid);
  2262. return -EINVAL;
  2263. }
  2264. return 0;
  2265. }
  2266. /* Otherwise vf state must be 'free' or 'reset' */
  2267. if (vf->state != VF_FREE && vf->state != VF_RESET) {
  2268. BNX2X_ERR("VF[%d] Can not acquire a VF with state %d\n",
  2269. vf->abs_vfid, vf->state);
  2270. return -EINVAL;
  2271. }
  2272. /* static allocation:
  2273. * the global maximum number are fixed per VF. Fail the request if
  2274. * requested number exceed these globals
  2275. */
  2276. if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
  2277. DP(BNX2X_MSG_IOV,
  2278. "cannot fulfill vf resource request. Placing maximal available values in response\n");
  2279. /* set the max resource in the vf */
  2280. return -ENOMEM;
  2281. }
  2282. /* Set resources counters - 0 request means max available */
  2283. vf_sb_count(vf) = resc->num_sbs;
  2284. vf_rxq_count(vf) = resc->num_rxqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
  2285. vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
  2286. if (resc->num_mac_filters)
  2287. vf_mac_rules_cnt(vf) = resc->num_mac_filters;
  2288. if (resc->num_vlan_filters)
  2289. vf_vlan_rules_cnt(vf) = resc->num_vlan_filters;
  2290. DP(BNX2X_MSG_IOV,
  2291. "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n",
  2292. vf_sb_count(vf), vf_rxq_count(vf),
  2293. vf_txq_count(vf), vf_mac_rules_cnt(vf),
  2294. vf_vlan_rules_cnt(vf));
  2295. /* Initialize the queues */
  2296. if (!vf->vfqs) {
  2297. DP(BNX2X_MSG_IOV, "vf->vfqs was not allocated\n");
  2298. return -EINVAL;
  2299. }
  2300. for_each_vfq(vf, i) {
  2301. struct bnx2x_vf_queue *q = vfq_get(vf, i);
  2302. if (!q) {
  2303. BNX2X_ERR("q number %d was not allocated\n", i);
  2304. return -EINVAL;
  2305. }
  2306. q->index = i;
  2307. q->cxt = &((base_cxt + i)->eth);
  2308. q->cid = BNX2X_FIRST_VF_CID + base_vf_cid + i;
  2309. DP(BNX2X_MSG_IOV, "VFQ[%d:%d]: index %d, cid 0x%x, cxt %p\n",
  2310. vf->abs_vfid, i, q->index, q->cid, q->cxt);
  2311. /* init SP objects */
  2312. bnx2x_vfq_init(bp, vf, q);
  2313. }
  2314. vf->state = VF_ACQUIRED;
  2315. return 0;
  2316. }
  2317. int bnx2x_vf_init(struct bnx2x *bp, struct bnx2x_virtf *vf, dma_addr_t *sb_map)
  2318. {
  2319. struct bnx2x_func_init_params func_init = {0};
  2320. u16 flags = 0;
  2321. int i;
  2322. /* the sb resources are initialized at this point, do the
  2323. * FW/HW initializations
  2324. */
  2325. for_each_vf_sb(vf, i)
  2326. bnx2x_init_sb(bp, (dma_addr_t)sb_map[i], vf->abs_vfid, true,
  2327. vf_igu_sb(vf, i), vf_igu_sb(vf, i));
  2328. /* Sanity checks */
  2329. if (vf->state != VF_ACQUIRED) {
  2330. DP(BNX2X_MSG_IOV, "VF[%d] is not in VF_ACQUIRED, but %d\n",
  2331. vf->abs_vfid, vf->state);
  2332. return -EINVAL;
  2333. }
  2334. /* let FLR complete ... */
  2335. msleep(100);
  2336. /* FLR cleanup epilogue */
  2337. if (bnx2x_vf_flr_clnup_epilog(bp, vf->abs_vfid))
  2338. return -EBUSY;
  2339. /* reset IGU VF statistics: MSIX */
  2340. REG_WR(bp, IGU_REG_STATISTIC_NUM_MESSAGE_SENT + vf->abs_vfid * 4 , 0);
  2341. /* vf init */
  2342. if (vf->cfg_flags & VF_CFG_STATS)
  2343. flags |= (FUNC_FLG_STATS | FUNC_FLG_SPQ);
  2344. if (vf->cfg_flags & VF_CFG_TPA)
  2345. flags |= FUNC_FLG_TPA;
  2346. if (is_vf_multi(vf))
  2347. flags |= FUNC_FLG_RSS;
  2348. /* function setup */
  2349. func_init.func_flgs = flags;
  2350. func_init.pf_id = BP_FUNC(bp);
  2351. func_init.func_id = FW_VF_HANDLE(vf->abs_vfid);
  2352. func_init.fw_stat_map = vf->fw_stat_map;
  2353. func_init.spq_map = vf->spq_map;
  2354. func_init.spq_prod = 0;
  2355. bnx2x_func_init(bp, &func_init);
  2356. /* Enable the vf */
  2357. bnx2x_vf_enable_access(bp, vf->abs_vfid);
  2358. bnx2x_vf_enable_traffic(bp, vf);
  2359. /* queue protection table */
  2360. for_each_vfq(vf, i)
  2361. bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
  2362. vfq_qzone_id(vf, vfq_get(vf, i)), true);
  2363. vf->state = VF_ENABLED;
  2364. /* update vf bulletin board */
  2365. bnx2x_post_vf_bulletin(bp, vf->index);
  2366. return 0;
  2367. }
  2368. struct set_vf_state_cookie {
  2369. struct bnx2x_virtf *vf;
  2370. u8 state;
  2371. };
  2372. static void bnx2x_set_vf_state(void *cookie)
  2373. {
  2374. struct set_vf_state_cookie *p = (struct set_vf_state_cookie *)cookie;
  2375. p->vf->state = p->state;
  2376. }
  2377. /* VFOP close (teardown the queues, delete mcasts and close HW) */
  2378. static void bnx2x_vfop_close(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2379. {
  2380. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  2381. struct bnx2x_vfop_args_qx *qx = &vfop->args.qx;
  2382. enum bnx2x_vfop_close_state state = vfop->state;
  2383. struct bnx2x_vfop_cmd cmd = {
  2384. .done = bnx2x_vfop_close,
  2385. .block = false,
  2386. };
  2387. if (vfop->rc < 0)
  2388. goto op_err;
  2389. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  2390. switch (state) {
  2391. case BNX2X_VFOP_CLOSE_QUEUES:
  2392. if (++(qx->qid) < vf_rxq_count(vf)) {
  2393. vfop->rc = bnx2x_vfop_qdown_cmd(bp, vf, &cmd, qx->qid);
  2394. if (vfop->rc)
  2395. goto op_err;
  2396. return;
  2397. }
  2398. vfop->state = BNX2X_VFOP_CLOSE_HW;
  2399. vfop->rc = 0;
  2400. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  2401. case BNX2X_VFOP_CLOSE_HW:
  2402. /* disable the interrupts */
  2403. DP(BNX2X_MSG_IOV, "disabling igu\n");
  2404. bnx2x_vf_igu_disable(bp, vf);
  2405. /* disable the VF */
  2406. DP(BNX2X_MSG_IOV, "clearing qtbl\n");
  2407. bnx2x_vf_clr_qtbl(bp, vf);
  2408. goto op_done;
  2409. default:
  2410. bnx2x_vfop_default(state);
  2411. }
  2412. op_err:
  2413. BNX2X_ERR("VF[%d] CLOSE error: rc %d\n", vf->abs_vfid, vfop->rc);
  2414. op_done:
  2415. /* need to make sure there are no outstanding stats ramrods which may
  2416. * cause the device to access the VF's stats buffer which it will free
  2417. * as soon as we return from the close flow.
  2418. */
  2419. {
  2420. struct set_vf_state_cookie cookie;
  2421. cookie.vf = vf;
  2422. cookie.state = VF_ACQUIRED;
  2423. bnx2x_stats_safe_exec(bp, bnx2x_set_vf_state, &cookie);
  2424. }
  2425. DP(BNX2X_MSG_IOV, "set state to acquired\n");
  2426. bnx2x_vfop_end(bp, vf, vfop);
  2427. op_pending:
  2428. /* Not supported at the moment; Exists for macros only */
  2429. return;
  2430. }
  2431. int bnx2x_vfop_close_cmd(struct bnx2x *bp,
  2432. struct bnx2x_virtf *vf,
  2433. struct bnx2x_vfop_cmd *cmd)
  2434. {
  2435. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  2436. if (vfop) {
  2437. vfop->args.qx.qid = -1; /* loop */
  2438. bnx2x_vfop_opset(BNX2X_VFOP_CLOSE_QUEUES,
  2439. bnx2x_vfop_close, cmd->done);
  2440. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_close,
  2441. cmd->block);
  2442. }
  2443. return -ENOMEM;
  2444. }
  2445. /* VF release can be called either: 1. The VF was acquired but
  2446. * not enabled 2. the vf was enabled or in the process of being
  2447. * enabled
  2448. */
  2449. static void bnx2x_vfop_release(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2450. {
  2451. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  2452. struct bnx2x_vfop_cmd cmd = {
  2453. .done = bnx2x_vfop_release,
  2454. .block = false,
  2455. };
  2456. DP(BNX2X_MSG_IOV, "vfop->rc %d\n", vfop->rc);
  2457. if (vfop->rc < 0)
  2458. goto op_err;
  2459. DP(BNX2X_MSG_IOV, "VF[%d] STATE: %s\n", vf->abs_vfid,
  2460. vf->state == VF_FREE ? "Free" :
  2461. vf->state == VF_ACQUIRED ? "Acquired" :
  2462. vf->state == VF_ENABLED ? "Enabled" :
  2463. vf->state == VF_RESET ? "Reset" :
  2464. "Unknown");
  2465. switch (vf->state) {
  2466. case VF_ENABLED:
  2467. vfop->rc = bnx2x_vfop_close_cmd(bp, vf, &cmd);
  2468. if (vfop->rc)
  2469. goto op_err;
  2470. return;
  2471. case VF_ACQUIRED:
  2472. DP(BNX2X_MSG_IOV, "about to free resources\n");
  2473. bnx2x_vf_free_resc(bp, vf);
  2474. DP(BNX2X_MSG_IOV, "vfop->rc %d\n", vfop->rc);
  2475. goto op_done;
  2476. case VF_FREE:
  2477. case VF_RESET:
  2478. /* do nothing */
  2479. goto op_done;
  2480. default:
  2481. bnx2x_vfop_default(vf->state);
  2482. }
  2483. op_err:
  2484. BNX2X_ERR("VF[%d] RELEASE error: rc %d\n", vf->abs_vfid, vfop->rc);
  2485. op_done:
  2486. bnx2x_vfop_end(bp, vf, vfop);
  2487. }
  2488. static void bnx2x_vfop_rss(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2489. {
  2490. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  2491. enum bnx2x_vfop_rss_state state;
  2492. if (!vfop) {
  2493. BNX2X_ERR("vfop was null\n");
  2494. return;
  2495. }
  2496. state = vfop->state;
  2497. bnx2x_vfop_reset_wq(vf);
  2498. if (vfop->rc < 0)
  2499. goto op_err;
  2500. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  2501. switch (state) {
  2502. case BNX2X_VFOP_RSS_CONFIG:
  2503. /* next state */
  2504. vfop->state = BNX2X_VFOP_RSS_DONE;
  2505. bnx2x_config_rss(bp, &vfop->op_p->rss);
  2506. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  2507. op_err:
  2508. BNX2X_ERR("RSS error: rc %d\n", vfop->rc);
  2509. op_done:
  2510. case BNX2X_VFOP_RSS_DONE:
  2511. bnx2x_vfop_end(bp, vf, vfop);
  2512. return;
  2513. default:
  2514. bnx2x_vfop_default(state);
  2515. }
  2516. op_pending:
  2517. return;
  2518. }
  2519. int bnx2x_vfop_release_cmd(struct bnx2x *bp,
  2520. struct bnx2x_virtf *vf,
  2521. struct bnx2x_vfop_cmd *cmd)
  2522. {
  2523. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  2524. if (vfop) {
  2525. bnx2x_vfop_opset(-1, /* use vf->state */
  2526. bnx2x_vfop_release, cmd->done);
  2527. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_release,
  2528. cmd->block);
  2529. }
  2530. return -ENOMEM;
  2531. }
  2532. int bnx2x_vfop_rss_cmd(struct bnx2x *bp,
  2533. struct bnx2x_virtf *vf,
  2534. struct bnx2x_vfop_cmd *cmd)
  2535. {
  2536. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  2537. if (vfop) {
  2538. bnx2x_vfop_opset(BNX2X_VFOP_RSS_CONFIG, bnx2x_vfop_rss,
  2539. cmd->done);
  2540. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_rss,
  2541. cmd->block);
  2542. }
  2543. return -ENOMEM;
  2544. }
  2545. /* VF release ~ VF close + VF release-resources
  2546. * Release is the ultimate SW shutdown and is called whenever an
  2547. * irrecoverable error is encountered.
  2548. */
  2549. void bnx2x_vf_release(struct bnx2x *bp, struct bnx2x_virtf *vf, bool block)
  2550. {
  2551. struct bnx2x_vfop_cmd cmd = {
  2552. .done = NULL,
  2553. .block = block,
  2554. };
  2555. int rc;
  2556. DP(BNX2X_MSG_IOV, "PF releasing vf %d\n", vf->abs_vfid);
  2557. bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
  2558. rc = bnx2x_vfop_release_cmd(bp, vf, &cmd);
  2559. if (rc)
  2560. WARN(rc,
  2561. "VF[%d] Failed to allocate resources for release op- rc=%d\n",
  2562. vf->abs_vfid, rc);
  2563. }
  2564. static inline void bnx2x_vf_get_sbdf(struct bnx2x *bp,
  2565. struct bnx2x_virtf *vf, u32 *sbdf)
  2566. {
  2567. *sbdf = vf->devfn | (vf->bus << 8);
  2568. }
  2569. static inline void bnx2x_vf_get_bars(struct bnx2x *bp, struct bnx2x_virtf *vf,
  2570. struct bnx2x_vf_bar_info *bar_info)
  2571. {
  2572. int n;
  2573. bar_info->nr_bars = bp->vfdb->sriov.nres;
  2574. for (n = 0; n < bar_info->nr_bars; n++)
  2575. bar_info->bars[n] = vf->bars[n];
  2576. }
  2577. void bnx2x_lock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
  2578. enum channel_tlvs tlv)
  2579. {
  2580. /* we don't lock the channel for unsupported tlvs */
  2581. if (!bnx2x_tlv_supported(tlv)) {
  2582. BNX2X_ERR("attempting to lock with unsupported tlv. Aborting\n");
  2583. return;
  2584. }
  2585. /* lock the channel */
  2586. mutex_lock(&vf->op_mutex);
  2587. /* record the locking op */
  2588. vf->op_current = tlv;
  2589. /* log the lock */
  2590. DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel locked by %d\n",
  2591. vf->abs_vfid, tlv);
  2592. }
  2593. void bnx2x_unlock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
  2594. enum channel_tlvs expected_tlv)
  2595. {
  2596. enum channel_tlvs current_tlv;
  2597. if (!vf) {
  2598. BNX2X_ERR("VF was %p\n", vf);
  2599. return;
  2600. }
  2601. current_tlv = vf->op_current;
  2602. /* we don't unlock the channel for unsupported tlvs */
  2603. if (!bnx2x_tlv_supported(expected_tlv))
  2604. return;
  2605. WARN(expected_tlv != vf->op_current,
  2606. "lock mismatch: expected %d found %d", expected_tlv,
  2607. vf->op_current);
  2608. /* record the locking op */
  2609. vf->op_current = CHANNEL_TLV_NONE;
  2610. /* lock the channel */
  2611. mutex_unlock(&vf->op_mutex);
  2612. /* log the unlock */
  2613. DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel unlocked by %d\n",
  2614. vf->abs_vfid, vf->op_current);
  2615. }
  2616. static int bnx2x_set_pf_tx_switching(struct bnx2x *bp, bool enable)
  2617. {
  2618. struct bnx2x_queue_state_params q_params;
  2619. u32 prev_flags;
  2620. int i, rc;
  2621. /* Verify changes are needed and record current Tx switching state */
  2622. prev_flags = bp->flags;
  2623. if (enable)
  2624. bp->flags |= TX_SWITCHING;
  2625. else
  2626. bp->flags &= ~TX_SWITCHING;
  2627. if (prev_flags == bp->flags)
  2628. return 0;
  2629. /* Verify state enables the sending of queue ramrods */
  2630. if ((bp->state != BNX2X_STATE_OPEN) ||
  2631. (bnx2x_get_q_logical_state(bp,
  2632. &bnx2x_sp_obj(bp, &bp->fp[0]).q_obj) !=
  2633. BNX2X_Q_LOGICAL_STATE_ACTIVE))
  2634. return 0;
  2635. /* send q. update ramrod to configure Tx switching */
  2636. memset(&q_params, 0, sizeof(q_params));
  2637. __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
  2638. q_params.cmd = BNX2X_Q_CMD_UPDATE;
  2639. __set_bit(BNX2X_Q_UPDATE_TX_SWITCHING_CHNG,
  2640. &q_params.params.update.update_flags);
  2641. if (enable)
  2642. __set_bit(BNX2X_Q_UPDATE_TX_SWITCHING,
  2643. &q_params.params.update.update_flags);
  2644. else
  2645. __clear_bit(BNX2X_Q_UPDATE_TX_SWITCHING,
  2646. &q_params.params.update.update_flags);
  2647. /* send the ramrod on all the queues of the PF */
  2648. for_each_eth_queue(bp, i) {
  2649. struct bnx2x_fastpath *fp = &bp->fp[i];
  2650. /* Set the appropriate Queue object */
  2651. q_params.q_obj = &bnx2x_sp_obj(bp, fp).q_obj;
  2652. /* Update the Queue state */
  2653. rc = bnx2x_queue_state_change(bp, &q_params);
  2654. if (rc) {
  2655. BNX2X_ERR("Failed to configure Tx switching\n");
  2656. return rc;
  2657. }
  2658. }
  2659. DP(BNX2X_MSG_IOV, "%s Tx Switching\n", enable ? "Enabled" : "Disabled");
  2660. return 0;
  2661. }
  2662. int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs_param)
  2663. {
  2664. struct bnx2x *bp = netdev_priv(pci_get_drvdata(dev));
  2665. if (!IS_SRIOV(bp)) {
  2666. BNX2X_ERR("failed to configure SR-IOV since vfdb was not allocated. Check dmesg for errors in probe stage\n");
  2667. return -EINVAL;
  2668. }
  2669. DP(BNX2X_MSG_IOV, "bnx2x_sriov_configure called with %d, BNX2X_NR_VIRTFN(bp) was %d\n",
  2670. num_vfs_param, BNX2X_NR_VIRTFN(bp));
  2671. /* HW channel is only operational when PF is up */
  2672. if (bp->state != BNX2X_STATE_OPEN) {
  2673. BNX2X_ERR("VF num configuration via sysfs not supported while PF is down\n");
  2674. return -EINVAL;
  2675. }
  2676. /* we are always bound by the total_vfs in the configuration space */
  2677. if (num_vfs_param > BNX2X_NR_VIRTFN(bp)) {
  2678. BNX2X_ERR("truncating requested number of VFs (%d) down to maximum allowed (%d)\n",
  2679. num_vfs_param, BNX2X_NR_VIRTFN(bp));
  2680. num_vfs_param = BNX2X_NR_VIRTFN(bp);
  2681. }
  2682. bp->requested_nr_virtfn = num_vfs_param;
  2683. if (num_vfs_param == 0) {
  2684. bnx2x_set_pf_tx_switching(bp, false);
  2685. pci_disable_sriov(dev);
  2686. return 0;
  2687. } else {
  2688. return bnx2x_enable_sriov(bp);
  2689. }
  2690. }
  2691. #define IGU_ENTRY_SIZE 4
  2692. int bnx2x_enable_sriov(struct bnx2x *bp)
  2693. {
  2694. int rc = 0, req_vfs = bp->requested_nr_virtfn;
  2695. int vf_idx, sb_idx, vfq_idx, qcount, first_vf;
  2696. u32 igu_entry, address;
  2697. u16 num_vf_queues;
  2698. if (req_vfs == 0)
  2699. return 0;
  2700. first_vf = bp->vfdb->sriov.first_vf_in_pf;
  2701. /* statically distribute vf sb pool between VFs */
  2702. num_vf_queues = min_t(u16, BNX2X_VF_MAX_QUEUES,
  2703. BP_VFDB(bp)->vf_sbs_pool / req_vfs);
  2704. /* zero previous values learned from igu cam */
  2705. for (vf_idx = 0; vf_idx < req_vfs; vf_idx++) {
  2706. struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
  2707. vf->sb_count = 0;
  2708. vf_sb_count(BP_VF(bp, vf_idx)) = 0;
  2709. }
  2710. bp->vfdb->vf_sbs_pool = 0;
  2711. /* prepare IGU cam */
  2712. sb_idx = BP_VFDB(bp)->first_vf_igu_entry;
  2713. address = IGU_REG_MAPPING_MEMORY + sb_idx * IGU_ENTRY_SIZE;
  2714. for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
  2715. for (vfq_idx = 0; vfq_idx < num_vf_queues; vfq_idx++) {
  2716. igu_entry = vf_idx << IGU_REG_MAPPING_MEMORY_FID_SHIFT |
  2717. vfq_idx << IGU_REG_MAPPING_MEMORY_VECTOR_SHIFT |
  2718. IGU_REG_MAPPING_MEMORY_VALID;
  2719. DP(BNX2X_MSG_IOV, "assigning sb %d to vf %d\n",
  2720. sb_idx, vf_idx);
  2721. REG_WR(bp, address, igu_entry);
  2722. sb_idx++;
  2723. address += IGU_ENTRY_SIZE;
  2724. }
  2725. }
  2726. /* Reinitialize vf database according to igu cam */
  2727. bnx2x_get_vf_igu_cam_info(bp);
  2728. DP(BNX2X_MSG_IOV, "vf_sbs_pool %d, num_vf_queues %d\n",
  2729. BP_VFDB(bp)->vf_sbs_pool, num_vf_queues);
  2730. qcount = 0;
  2731. for_each_vf(bp, vf_idx) {
  2732. struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
  2733. /* set local queue arrays */
  2734. vf->vfqs = &bp->vfdb->vfqs[qcount];
  2735. qcount += vf_sb_count(vf);
  2736. bnx2x_iov_static_resc(bp, vf);
  2737. }
  2738. /* prepare msix vectors in VF configuration space - the value in the
  2739. * PCI configuration space should be the index of the last entry,
  2740. * namely one less than the actual size of the table
  2741. */
  2742. for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
  2743. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf_idx));
  2744. REG_WR(bp, PCICFG_OFFSET + GRC_CONFIG_REG_VF_MSIX_CONTROL,
  2745. num_vf_queues - 1);
  2746. DP(BNX2X_MSG_IOV, "set msix vec num in VF %d cfg space to %d\n",
  2747. vf_idx, num_vf_queues - 1);
  2748. }
  2749. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  2750. /* enable sriov. This will probe all the VFs, and consequentially cause
  2751. * the "acquire" messages to appear on the VF PF channel.
  2752. */
  2753. DP(BNX2X_MSG_IOV, "about to call enable sriov\n");
  2754. bnx2x_disable_sriov(bp);
  2755. rc = bnx2x_set_pf_tx_switching(bp, true);
  2756. if (rc)
  2757. return rc;
  2758. rc = pci_enable_sriov(bp->pdev, req_vfs);
  2759. if (rc) {
  2760. BNX2X_ERR("pci_enable_sriov failed with %d\n", rc);
  2761. return rc;
  2762. }
  2763. DP(BNX2X_MSG_IOV, "sriov enabled (%d vfs)\n", req_vfs);
  2764. return req_vfs;
  2765. }
  2766. void bnx2x_pf_set_vfs_vlan(struct bnx2x *bp)
  2767. {
  2768. int vfidx;
  2769. struct pf_vf_bulletin_content *bulletin;
  2770. DP(BNX2X_MSG_IOV, "configuring vlan for VFs from sp-task\n");
  2771. for_each_vf(bp, vfidx) {
  2772. bulletin = BP_VF_BULLETIN(bp, vfidx);
  2773. if (BP_VF(bp, vfidx)->cfg_flags & VF_CFG_VLAN)
  2774. bnx2x_set_vf_vlan(bp->dev, vfidx, bulletin->vlan, 0);
  2775. }
  2776. }
  2777. void bnx2x_disable_sriov(struct bnx2x *bp)
  2778. {
  2779. pci_disable_sriov(bp->pdev);
  2780. }
  2781. static int bnx2x_vf_ndo_prep(struct bnx2x *bp, int vfidx,
  2782. struct bnx2x_virtf **vf,
  2783. struct pf_vf_bulletin_content **bulletin)
  2784. {
  2785. if (bp->state != BNX2X_STATE_OPEN) {
  2786. BNX2X_ERR("vf ndo called though PF is down\n");
  2787. return -EINVAL;
  2788. }
  2789. if (!IS_SRIOV(bp)) {
  2790. BNX2X_ERR("vf ndo called though sriov is disabled\n");
  2791. return -EINVAL;
  2792. }
  2793. if (vfidx >= BNX2X_NR_VIRTFN(bp)) {
  2794. BNX2X_ERR("vf ndo called for uninitialized VF. vfidx was %d BNX2X_NR_VIRTFN was %d\n",
  2795. vfidx, BNX2X_NR_VIRTFN(bp));
  2796. return -EINVAL;
  2797. }
  2798. /* init members */
  2799. *vf = BP_VF(bp, vfidx);
  2800. *bulletin = BP_VF_BULLETIN(bp, vfidx);
  2801. if (!*vf) {
  2802. BNX2X_ERR("vf ndo called but vf struct is null. vfidx was %d\n",
  2803. vfidx);
  2804. return -EINVAL;
  2805. }
  2806. if (!(*vf)->vfqs) {
  2807. BNX2X_ERR("vf ndo called but vfqs struct is null. Was ndo invoked before dynamically enabling SR-IOV? vfidx was %d\n",
  2808. vfidx);
  2809. return -EINVAL;
  2810. }
  2811. if (!*bulletin) {
  2812. BNX2X_ERR("vf ndo called but Bulletin Board struct is null. vfidx was %d\n",
  2813. vfidx);
  2814. return -EINVAL;
  2815. }
  2816. return 0;
  2817. }
  2818. int bnx2x_get_vf_config(struct net_device *dev, int vfidx,
  2819. struct ifla_vf_info *ivi)
  2820. {
  2821. struct bnx2x *bp = netdev_priv(dev);
  2822. struct bnx2x_virtf *vf = NULL;
  2823. struct pf_vf_bulletin_content *bulletin = NULL;
  2824. struct bnx2x_vlan_mac_obj *mac_obj;
  2825. struct bnx2x_vlan_mac_obj *vlan_obj;
  2826. int rc;
  2827. /* sanity and init */
  2828. rc = bnx2x_vf_ndo_prep(bp, vfidx, &vf, &bulletin);
  2829. if (rc)
  2830. return rc;
  2831. mac_obj = &bnx2x_leading_vfq(vf, mac_obj);
  2832. vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
  2833. if (!mac_obj || !vlan_obj) {
  2834. BNX2X_ERR("VF partially initialized\n");
  2835. return -EINVAL;
  2836. }
  2837. ivi->vf = vfidx;
  2838. ivi->qos = 0;
  2839. ivi->tx_rate = 10000; /* always 10G. TBA take from link struct */
  2840. ivi->spoofchk = 1; /*always enabled */
  2841. if (vf->state == VF_ENABLED) {
  2842. /* mac and vlan are in vlan_mac objects */
  2843. if (validate_vlan_mac(bp, &bnx2x_leading_vfq(vf, mac_obj)))
  2844. mac_obj->get_n_elements(bp, mac_obj, 1, (u8 *)&ivi->mac,
  2845. 0, ETH_ALEN);
  2846. if (validate_vlan_mac(bp, &bnx2x_leading_vfq(vf, vlan_obj)))
  2847. vlan_obj->get_n_elements(bp, vlan_obj, 1,
  2848. (u8 *)&ivi->vlan, 0,
  2849. VLAN_HLEN);
  2850. } else {
  2851. /* mac */
  2852. if (bulletin->valid_bitmap & (1 << MAC_ADDR_VALID))
  2853. /* mac configured by ndo so its in bulletin board */
  2854. memcpy(&ivi->mac, bulletin->mac, ETH_ALEN);
  2855. else
  2856. /* function has not been loaded yet. Show mac as 0s */
  2857. memset(&ivi->mac, 0, ETH_ALEN);
  2858. /* vlan */
  2859. if (bulletin->valid_bitmap & (1 << VLAN_VALID))
  2860. /* vlan configured by ndo so its in bulletin board */
  2861. memcpy(&ivi->vlan, &bulletin->vlan, VLAN_HLEN);
  2862. else
  2863. /* function has not been loaded yet. Show vlans as 0s */
  2864. memset(&ivi->vlan, 0, VLAN_HLEN);
  2865. }
  2866. return 0;
  2867. }
  2868. /* New mac for VF. Consider these cases:
  2869. * 1. VF hasn't been acquired yet - save the mac in local bulletin board and
  2870. * supply at acquire.
  2871. * 2. VF has already been acquired but has not yet initialized - store in local
  2872. * bulletin board. mac will be posted on VF bulletin board after VF init. VF
  2873. * will configure this mac when it is ready.
  2874. * 3. VF has already initialized but has not yet setup a queue - post the new
  2875. * mac on VF's bulletin board right now. VF will configure this mac when it
  2876. * is ready.
  2877. * 4. VF has already set a queue - delete any macs already configured for this
  2878. * queue and manually config the new mac.
  2879. * In any event, once this function has been called refuse any attempts by the
  2880. * VF to configure any mac for itself except for this mac. In case of a race
  2881. * where the VF fails to see the new post on its bulletin board before sending a
  2882. * mac configuration request, the PF will simply fail the request and VF can try
  2883. * again after consulting its bulletin board.
  2884. */
  2885. int bnx2x_set_vf_mac(struct net_device *dev, int vfidx, u8 *mac)
  2886. {
  2887. struct bnx2x *bp = netdev_priv(dev);
  2888. int rc, q_logical_state;
  2889. struct bnx2x_virtf *vf = NULL;
  2890. struct pf_vf_bulletin_content *bulletin = NULL;
  2891. /* sanity and init */
  2892. rc = bnx2x_vf_ndo_prep(bp, vfidx, &vf, &bulletin);
  2893. if (rc)
  2894. return rc;
  2895. if (!is_valid_ether_addr(mac)) {
  2896. BNX2X_ERR("mac address invalid\n");
  2897. return -EINVAL;
  2898. }
  2899. /* update PF's copy of the VF's bulletin. Will no longer accept mac
  2900. * configuration requests from vf unless match this mac
  2901. */
  2902. bulletin->valid_bitmap |= 1 << MAC_ADDR_VALID;
  2903. memcpy(bulletin->mac, mac, ETH_ALEN);
  2904. /* Post update on VF's bulletin board */
  2905. rc = bnx2x_post_vf_bulletin(bp, vfidx);
  2906. if (rc) {
  2907. BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);
  2908. return rc;
  2909. }
  2910. q_logical_state =
  2911. bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj));
  2912. if (vf->state == VF_ENABLED &&
  2913. q_logical_state == BNX2X_Q_LOGICAL_STATE_ACTIVE) {
  2914. /* configure the mac in device on this vf's queue */
  2915. unsigned long ramrod_flags = 0;
  2916. struct bnx2x_vlan_mac_obj *mac_obj =
  2917. &bnx2x_leading_vfq(vf, mac_obj);
  2918. rc = validate_vlan_mac(bp, &bnx2x_leading_vfq(vf, mac_obj));
  2919. if (rc)
  2920. return rc;
  2921. /* must lock vfpf channel to protect against vf flows */
  2922. bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
  2923. /* remove existing eth macs */
  2924. rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_ETH_MAC, true);
  2925. if (rc) {
  2926. BNX2X_ERR("failed to delete eth macs\n");
  2927. rc = -EINVAL;
  2928. goto out;
  2929. }
  2930. /* remove existing uc list macs */
  2931. rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_UC_LIST_MAC, true);
  2932. if (rc) {
  2933. BNX2X_ERR("failed to delete uc_list macs\n");
  2934. rc = -EINVAL;
  2935. goto out;
  2936. }
  2937. /* configure the new mac to device */
  2938. __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
  2939. bnx2x_set_mac_one(bp, (u8 *)&bulletin->mac, mac_obj, true,
  2940. BNX2X_ETH_MAC, &ramrod_flags);
  2941. out:
  2942. bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
  2943. }
  2944. return 0;
  2945. }
  2946. int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos)
  2947. {
  2948. struct bnx2x_queue_state_params q_params = {NULL};
  2949. struct bnx2x_vlan_mac_ramrod_params ramrod_param;
  2950. struct bnx2x_queue_update_params *update_params;
  2951. struct pf_vf_bulletin_content *bulletin = NULL;
  2952. struct bnx2x_rx_mode_ramrod_params rx_ramrod;
  2953. struct bnx2x *bp = netdev_priv(dev);
  2954. struct bnx2x_vlan_mac_obj *vlan_obj;
  2955. unsigned long vlan_mac_flags = 0;
  2956. unsigned long ramrod_flags = 0;
  2957. struct bnx2x_virtf *vf = NULL;
  2958. unsigned long accept_flags;
  2959. int rc;
  2960. /* sanity and init */
  2961. rc = bnx2x_vf_ndo_prep(bp, vfidx, &vf, &bulletin);
  2962. if (rc)
  2963. return rc;
  2964. if (vlan > 4095) {
  2965. BNX2X_ERR("illegal vlan value %d\n", vlan);
  2966. return -EINVAL;
  2967. }
  2968. DP(BNX2X_MSG_IOV, "configuring VF %d with VLAN %d qos %d\n",
  2969. vfidx, vlan, 0);
  2970. /* update PF's copy of the VF's bulletin. No point in posting the vlan
  2971. * to the VF since it doesn't have anything to do with it. But it useful
  2972. * to store it here in case the VF is not up yet and we can only
  2973. * configure the vlan later when it does. Treat vlan id 0 as remove the
  2974. * Host tag.
  2975. */
  2976. if (vlan > 0)
  2977. bulletin->valid_bitmap |= 1 << VLAN_VALID;
  2978. else
  2979. bulletin->valid_bitmap &= ~(1 << VLAN_VALID);
  2980. bulletin->vlan = vlan;
  2981. /* is vf initialized and queue set up? */
  2982. if (vf->state != VF_ENABLED ||
  2983. bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj)) !=
  2984. BNX2X_Q_LOGICAL_STATE_ACTIVE)
  2985. return rc;
  2986. /* configure the vlan in device on this vf's queue */
  2987. vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
  2988. rc = validate_vlan_mac(bp, &bnx2x_leading_vfq(vf, mac_obj));
  2989. if (rc)
  2990. return rc;
  2991. /* must lock vfpf channel to protect against vf flows */
  2992. bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
  2993. /* remove existing vlans */
  2994. __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
  2995. rc = vlan_obj->delete_all(bp, vlan_obj, &vlan_mac_flags,
  2996. &ramrod_flags);
  2997. if (rc) {
  2998. BNX2X_ERR("failed to delete vlans\n");
  2999. rc = -EINVAL;
  3000. goto out;
  3001. }
  3002. /* need to remove/add the VF's accept_any_vlan bit */
  3003. accept_flags = bnx2x_leading_vfq(vf, accept_flags);
  3004. if (vlan)
  3005. clear_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);
  3006. else
  3007. set_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);
  3008. bnx2x_vf_prep_rx_mode(bp, LEADING_IDX, &rx_ramrod, vf,
  3009. accept_flags);
  3010. bnx2x_leading_vfq(vf, accept_flags) = accept_flags;
  3011. bnx2x_config_rx_mode(bp, &rx_ramrod);
  3012. /* configure the new vlan to device */
  3013. memset(&ramrod_param, 0, sizeof(ramrod_param));
  3014. __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
  3015. ramrod_param.vlan_mac_obj = vlan_obj;
  3016. ramrod_param.ramrod_flags = ramrod_flags;
  3017. set_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
  3018. &ramrod_param.user_req.vlan_mac_flags);
  3019. ramrod_param.user_req.u.vlan.vlan = vlan;
  3020. ramrod_param.user_req.cmd = BNX2X_VLAN_MAC_ADD;
  3021. rc = bnx2x_config_vlan_mac(bp, &ramrod_param);
  3022. if (rc) {
  3023. BNX2X_ERR("failed to configure vlan\n");
  3024. rc = -EINVAL;
  3025. goto out;
  3026. }
  3027. /* send queue update ramrod to configure default vlan and silent
  3028. * vlan removal
  3029. */
  3030. __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
  3031. q_params.cmd = BNX2X_Q_CMD_UPDATE;
  3032. q_params.q_obj = &bnx2x_leading_vfq(vf, sp_obj);
  3033. update_params = &q_params.params.update;
  3034. __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
  3035. &update_params->update_flags);
  3036. __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
  3037. &update_params->update_flags);
  3038. if (vlan == 0) {
  3039. /* if vlan is 0 then we want to leave the VF traffic
  3040. * untagged, and leave the incoming traffic untouched
  3041. * (i.e. do not remove any vlan tags).
  3042. */
  3043. __clear_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
  3044. &update_params->update_flags);
  3045. __clear_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
  3046. &update_params->update_flags);
  3047. } else {
  3048. /* configure default vlan to vf queue and set silent
  3049. * vlan removal (the vf remains unaware of this vlan).
  3050. */
  3051. __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
  3052. &update_params->update_flags);
  3053. __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
  3054. &update_params->update_flags);
  3055. update_params->def_vlan = vlan;
  3056. update_params->silent_removal_value =
  3057. vlan & VLAN_VID_MASK;
  3058. update_params->silent_removal_mask = VLAN_VID_MASK;
  3059. }
  3060. /* Update the Queue state */
  3061. rc = bnx2x_queue_state_change(bp, &q_params);
  3062. if (rc) {
  3063. BNX2X_ERR("Failed to configure default VLAN\n");
  3064. goto out;
  3065. }
  3066. /* clear the flag indicating that this VF needs its vlan
  3067. * (will only be set if the HV configured the Vlan before vf was
  3068. * up and we were called because the VF came up later
  3069. */
  3070. out:
  3071. vf->cfg_flags &= ~VF_CFG_VLAN;
  3072. bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
  3073. return rc;
  3074. }
  3075. /* crc is the first field in the bulletin board. Compute the crc over the
  3076. * entire bulletin board excluding the crc field itself. Use the length field
  3077. * as the Bulletin Board was posted by a PF with possibly a different version
  3078. * from the vf which will sample it. Therefore, the length is computed by the
  3079. * PF and the used blindly by the VF.
  3080. */
  3081. u32 bnx2x_crc_vf_bulletin(struct bnx2x *bp,
  3082. struct pf_vf_bulletin_content *bulletin)
  3083. {
  3084. return crc32(BULLETIN_CRC_SEED,
  3085. ((u8 *)bulletin) + sizeof(bulletin->crc),
  3086. bulletin->length - sizeof(bulletin->crc));
  3087. }
  3088. /* Check for new posts on the bulletin board */
  3089. enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp)
  3090. {
  3091. struct pf_vf_bulletin_content bulletin = bp->pf2vf_bulletin->content;
  3092. int attempts;
  3093. /* bulletin board hasn't changed since last sample */
  3094. if (bp->old_bulletin.version == bulletin.version)
  3095. return PFVF_BULLETIN_UNCHANGED;
  3096. /* validate crc of new bulletin board */
  3097. if (bp->old_bulletin.version != bp->pf2vf_bulletin->content.version) {
  3098. /* sampling structure in mid post may result with corrupted data
  3099. * validate crc to ensure coherency.
  3100. */
  3101. for (attempts = 0; attempts < BULLETIN_ATTEMPTS; attempts++) {
  3102. bulletin = bp->pf2vf_bulletin->content;
  3103. if (bulletin.crc == bnx2x_crc_vf_bulletin(bp,
  3104. &bulletin))
  3105. break;
  3106. BNX2X_ERR("bad crc on bulletin board. Contained %x computed %x\n",
  3107. bulletin.crc,
  3108. bnx2x_crc_vf_bulletin(bp, &bulletin));
  3109. }
  3110. if (attempts >= BULLETIN_ATTEMPTS) {
  3111. BNX2X_ERR("pf to vf bulletin board crc was wrong %d consecutive times. Aborting\n",
  3112. attempts);
  3113. return PFVF_BULLETIN_CRC_ERR;
  3114. }
  3115. }
  3116. /* the mac address in bulletin board is valid and is new */
  3117. if (bulletin.valid_bitmap & 1 << MAC_ADDR_VALID &&
  3118. !ether_addr_equal(bulletin.mac, bp->old_bulletin.mac)) {
  3119. /* update new mac to net device */
  3120. memcpy(bp->dev->dev_addr, bulletin.mac, ETH_ALEN);
  3121. }
  3122. /* the vlan in bulletin board is valid and is new */
  3123. if (bulletin.valid_bitmap & 1 << VLAN_VALID)
  3124. memcpy(&bulletin.vlan, &bp->old_bulletin.vlan, VLAN_HLEN);
  3125. /* copy new bulletin board to bp */
  3126. bp->old_bulletin = bulletin;
  3127. return PFVF_BULLETIN_UPDATED;
  3128. }
  3129. void bnx2x_timer_sriov(struct bnx2x *bp)
  3130. {
  3131. bnx2x_sample_bulletin(bp);
  3132. /* if channel is down we need to self destruct */
  3133. if (bp->old_bulletin.valid_bitmap & 1 << CHANNEL_DOWN) {
  3134. smp_mb__before_clear_bit();
  3135. set_bit(BNX2X_SP_RTNL_VFPF_CHANNEL_DOWN,
  3136. &bp->sp_rtnl_state);
  3137. smp_mb__after_clear_bit();
  3138. schedule_delayed_work(&bp->sp_rtnl_task, 0);
  3139. }
  3140. }
  3141. void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp)
  3142. {
  3143. /* vf doorbells are embedded within the regview */
  3144. return bp->regview + PXP_VF_ADDR_DB_START;
  3145. }
  3146. int bnx2x_vf_pci_alloc(struct bnx2x *bp)
  3147. {
  3148. mutex_init(&bp->vf2pf_mutex);
  3149. /* allocate vf2pf mailbox for vf to pf channel */
  3150. BNX2X_PCI_ALLOC(bp->vf2pf_mbox, &bp->vf2pf_mbox_mapping,
  3151. sizeof(struct bnx2x_vf_mbx_msg));
  3152. /* allocate pf 2 vf bulletin board */
  3153. BNX2X_PCI_ALLOC(bp->pf2vf_bulletin, &bp->pf2vf_bulletin_mapping,
  3154. sizeof(union pf_vf_bulletin));
  3155. return 0;
  3156. alloc_mem_err:
  3157. BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping,
  3158. sizeof(struct bnx2x_vf_mbx_msg));
  3159. BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->pf2vf_bulletin_mapping,
  3160. sizeof(union pf_vf_bulletin));
  3161. return -ENOMEM;
  3162. }
  3163. void bnx2x_iov_channel_down(struct bnx2x *bp)
  3164. {
  3165. int vf_idx;
  3166. struct pf_vf_bulletin_content *bulletin;
  3167. if (!IS_SRIOV(bp))
  3168. return;
  3169. for_each_vf(bp, vf_idx) {
  3170. /* locate this VFs bulletin board and update the channel down
  3171. * bit
  3172. */
  3173. bulletin = BP_VF_BULLETIN(bp, vf_idx);
  3174. bulletin->valid_bitmap |= 1 << CHANNEL_DOWN;
  3175. /* update vf bulletin board */
  3176. bnx2x_post_vf_bulletin(bp, vf_idx);
  3177. }
  3178. }