atl1c_main.c 78 KB

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  1. /*
  2. * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
  3. *
  4. * Derived from Intel e1000 driver
  5. * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the Free
  9. * Software Foundation; either version 2 of the License, or (at your option)
  10. * any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc., 59
  19. * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20. */
  21. #include "atl1c.h"
  22. #define ATL1C_DRV_VERSION "1.0.1.1-NAPI"
  23. char atl1c_driver_name[] = "atl1c";
  24. char atl1c_driver_version[] = ATL1C_DRV_VERSION;
  25. /*
  26. * atl1c_pci_tbl - PCI Device ID Table
  27. *
  28. * Wildcard entries (PCI_ANY_ID) should come last
  29. * Last entry must be all 0s
  30. *
  31. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  32. * Class, Class Mask, private data (not used) }
  33. */
  34. static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = {
  35. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
  36. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
  37. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
  38. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
  39. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
  40. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)},
  41. /* required last entry */
  42. { 0 }
  43. };
  44. MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
  45. MODULE_AUTHOR("Jie Yang");
  46. MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>");
  47. MODULE_DESCRIPTION("Qualcom Atheros 100/1000M Ethernet Network Driver");
  48. MODULE_LICENSE("GPL");
  49. MODULE_VERSION(ATL1C_DRV_VERSION);
  50. static int atl1c_stop_mac(struct atl1c_hw *hw);
  51. static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
  52. static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed);
  53. static void atl1c_start_mac(struct atl1c_adapter *adapter);
  54. static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
  55. int *work_done, int work_to_do);
  56. static int atl1c_up(struct atl1c_adapter *adapter);
  57. static void atl1c_down(struct atl1c_adapter *adapter);
  58. static int atl1c_reset_mac(struct atl1c_hw *hw);
  59. static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter);
  60. static int atl1c_configure(struct atl1c_adapter *adapter);
  61. static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter);
  62. static const u16 atl1c_pay_load_size[] = {
  63. 128, 256, 512, 1024, 2048, 4096,
  64. };
  65. static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
  66. NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
  67. static void atl1c_pcie_patch(struct atl1c_hw *hw)
  68. {
  69. u32 mst_data, data;
  70. /* pclk sel could switch to 25M */
  71. AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data);
  72. mst_data &= ~MASTER_CTRL_CLK_SEL_DIS;
  73. AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data);
  74. /* WoL/PCIE related settings */
  75. if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) {
  76. AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
  77. data |= PCIE_PHYMISC_FORCE_RCV_DET;
  78. AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
  79. } else { /* new dev set bit5 of MASTER */
  80. if (!(mst_data & MASTER_CTRL_WAKEN_25M))
  81. AT_WRITE_REG(hw, REG_MASTER_CTRL,
  82. mst_data | MASTER_CTRL_WAKEN_25M);
  83. }
  84. /* aspm/PCIE setting only for l2cb 1.0 */
  85. if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
  86. AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
  87. data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW,
  88. L2CB1_PCIE_PHYMISC2_CDR_BW);
  89. data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH,
  90. L2CB1_PCIE_PHYMISC2_L0S_TH);
  91. AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
  92. /* extend L1 sync timer */
  93. AT_READ_REG(hw, REG_LINK_CTRL, &data);
  94. data |= LINK_CTRL_EXT_SYNC;
  95. AT_WRITE_REG(hw, REG_LINK_CTRL, data);
  96. }
  97. /* l2cb 1.x & l1d 1.x */
  98. if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) {
  99. AT_READ_REG(hw, REG_PM_CTRL, &data);
  100. data |= PM_CTRL_L0S_BUFSRX_EN;
  101. AT_WRITE_REG(hw, REG_PM_CTRL, data);
  102. /* clear vendor msg */
  103. AT_READ_REG(hw, REG_DMA_DBG, &data);
  104. AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG);
  105. }
  106. }
  107. /* FIXME: no need any more ? */
  108. /*
  109. * atl1c_init_pcie - init PCIE module
  110. */
  111. static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
  112. {
  113. u32 data;
  114. u32 pci_cmd;
  115. struct pci_dev *pdev = hw->adapter->pdev;
  116. int pos;
  117. AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
  118. pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
  119. pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
  120. PCI_COMMAND_IO);
  121. AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
  122. /*
  123. * Clear any PowerSaveing Settings
  124. */
  125. pci_enable_wake(pdev, PCI_D3hot, 0);
  126. pci_enable_wake(pdev, PCI_D3cold, 0);
  127. /* wol sts read-clear */
  128. AT_READ_REG(hw, REG_WOL_CTRL, &data);
  129. AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
  130. /*
  131. * Mask some pcie error bits
  132. */
  133. pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
  134. if (pos) {
  135. pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data);
  136. data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP);
  137. pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data);
  138. }
  139. /* clear error status */
  140. pcie_capability_write_word(pdev, PCI_EXP_DEVSTA,
  141. PCI_EXP_DEVSTA_NFED |
  142. PCI_EXP_DEVSTA_FED |
  143. PCI_EXP_DEVSTA_CED |
  144. PCI_EXP_DEVSTA_URD);
  145. AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
  146. data &= ~LTSSM_ID_EN_WRO;
  147. AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
  148. atl1c_pcie_patch(hw);
  149. if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
  150. atl1c_disable_l0s_l1(hw);
  151. msleep(5);
  152. }
  153. /**
  154. * atl1c_irq_enable - Enable default interrupt generation settings
  155. * @adapter: board private structure
  156. */
  157. static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
  158. {
  159. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  160. AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
  161. AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
  162. AT_WRITE_FLUSH(&adapter->hw);
  163. }
  164. }
  165. /**
  166. * atl1c_irq_disable - Mask off interrupt generation on the NIC
  167. * @adapter: board private structure
  168. */
  169. static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
  170. {
  171. atomic_inc(&adapter->irq_sem);
  172. AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
  173. AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
  174. AT_WRITE_FLUSH(&adapter->hw);
  175. synchronize_irq(adapter->pdev->irq);
  176. }
  177. /**
  178. * atl1c_irq_reset - reset interrupt confiure on the NIC
  179. * @adapter: board private structure
  180. */
  181. static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
  182. {
  183. atomic_set(&adapter->irq_sem, 1);
  184. atl1c_irq_enable(adapter);
  185. }
  186. /*
  187. * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
  188. * of the idle status register until the device is actually idle
  189. */
  190. static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl)
  191. {
  192. int timeout;
  193. u32 data;
  194. for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
  195. AT_READ_REG(hw, REG_IDLE_STATUS, &data);
  196. if ((data & modu_ctrl) == 0)
  197. return 0;
  198. msleep(1);
  199. }
  200. return data;
  201. }
  202. /**
  203. * atl1c_phy_config - Timer Call-back
  204. * @data: pointer to netdev cast into an unsigned long
  205. */
  206. static void atl1c_phy_config(unsigned long data)
  207. {
  208. struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
  209. struct atl1c_hw *hw = &adapter->hw;
  210. unsigned long flags;
  211. spin_lock_irqsave(&adapter->mdio_lock, flags);
  212. atl1c_restart_autoneg(hw);
  213. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  214. }
  215. void atl1c_reinit_locked(struct atl1c_adapter *adapter)
  216. {
  217. WARN_ON(in_interrupt());
  218. atl1c_down(adapter);
  219. atl1c_up(adapter);
  220. clear_bit(__AT_RESETTING, &adapter->flags);
  221. }
  222. static void atl1c_check_link_status(struct atl1c_adapter *adapter)
  223. {
  224. struct atl1c_hw *hw = &adapter->hw;
  225. struct net_device *netdev = adapter->netdev;
  226. struct pci_dev *pdev = adapter->pdev;
  227. int err;
  228. unsigned long flags;
  229. u16 speed, duplex, phy_data;
  230. spin_lock_irqsave(&adapter->mdio_lock, flags);
  231. /* MII_BMSR must read twise */
  232. atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
  233. atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
  234. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  235. if ((phy_data & BMSR_LSTATUS) == 0) {
  236. /* link down */
  237. netif_carrier_off(netdev);
  238. hw->hibernate = true;
  239. if (atl1c_reset_mac(hw) != 0)
  240. if (netif_msg_hw(adapter))
  241. dev_warn(&pdev->dev, "reset mac failed\n");
  242. atl1c_set_aspm(hw, SPEED_0);
  243. atl1c_post_phy_linkchg(hw, SPEED_0);
  244. atl1c_reset_dma_ring(adapter);
  245. atl1c_configure(adapter);
  246. } else {
  247. /* Link Up */
  248. hw->hibernate = false;
  249. spin_lock_irqsave(&adapter->mdio_lock, flags);
  250. err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
  251. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  252. if (unlikely(err))
  253. return;
  254. /* link result is our setting */
  255. if (adapter->link_speed != speed ||
  256. adapter->link_duplex != duplex) {
  257. adapter->link_speed = speed;
  258. adapter->link_duplex = duplex;
  259. atl1c_set_aspm(hw, speed);
  260. atl1c_post_phy_linkchg(hw, speed);
  261. atl1c_start_mac(adapter);
  262. if (netif_msg_link(adapter))
  263. dev_info(&pdev->dev,
  264. "%s: %s NIC Link is Up<%d Mbps %s>\n",
  265. atl1c_driver_name, netdev->name,
  266. adapter->link_speed,
  267. adapter->link_duplex == FULL_DUPLEX ?
  268. "Full Duplex" : "Half Duplex");
  269. }
  270. if (!netif_carrier_ok(netdev))
  271. netif_carrier_on(netdev);
  272. }
  273. }
  274. static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
  275. {
  276. struct net_device *netdev = adapter->netdev;
  277. struct pci_dev *pdev = adapter->pdev;
  278. u16 phy_data;
  279. u16 link_up;
  280. spin_lock(&adapter->mdio_lock);
  281. atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  282. atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  283. spin_unlock(&adapter->mdio_lock);
  284. link_up = phy_data & BMSR_LSTATUS;
  285. /* notify upper layer link down ASAP */
  286. if (!link_up) {
  287. if (netif_carrier_ok(netdev)) {
  288. /* old link state: Up */
  289. netif_carrier_off(netdev);
  290. if (netif_msg_link(adapter))
  291. dev_info(&pdev->dev,
  292. "%s: %s NIC Link is Down\n",
  293. atl1c_driver_name, netdev->name);
  294. adapter->link_speed = SPEED_0;
  295. }
  296. }
  297. set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event);
  298. schedule_work(&adapter->common_task);
  299. }
  300. static void atl1c_common_task(struct work_struct *work)
  301. {
  302. struct atl1c_adapter *adapter;
  303. struct net_device *netdev;
  304. adapter = container_of(work, struct atl1c_adapter, common_task);
  305. netdev = adapter->netdev;
  306. if (test_bit(__AT_DOWN, &adapter->flags))
  307. return;
  308. if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) {
  309. netif_device_detach(netdev);
  310. atl1c_down(adapter);
  311. atl1c_up(adapter);
  312. netif_device_attach(netdev);
  313. }
  314. if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE,
  315. &adapter->work_event)) {
  316. atl1c_irq_disable(adapter);
  317. atl1c_check_link_status(adapter);
  318. atl1c_irq_enable(adapter);
  319. }
  320. }
  321. static void atl1c_del_timer(struct atl1c_adapter *adapter)
  322. {
  323. del_timer_sync(&adapter->phy_config_timer);
  324. }
  325. /**
  326. * atl1c_tx_timeout - Respond to a Tx Hang
  327. * @netdev: network interface device structure
  328. */
  329. static void atl1c_tx_timeout(struct net_device *netdev)
  330. {
  331. struct atl1c_adapter *adapter = netdev_priv(netdev);
  332. /* Do the reset outside of interrupt context */
  333. set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
  334. schedule_work(&adapter->common_task);
  335. }
  336. /**
  337. * atl1c_set_multi - Multicast and Promiscuous mode set
  338. * @netdev: network interface device structure
  339. *
  340. * The set_multi entry point is called whenever the multicast address
  341. * list or the network interface flags are updated. This routine is
  342. * responsible for configuring the hardware for proper multicast,
  343. * promiscuous mode, and all-multi behavior.
  344. */
  345. static void atl1c_set_multi(struct net_device *netdev)
  346. {
  347. struct atl1c_adapter *adapter = netdev_priv(netdev);
  348. struct atl1c_hw *hw = &adapter->hw;
  349. struct netdev_hw_addr *ha;
  350. u32 mac_ctrl_data;
  351. u32 hash_value;
  352. /* Check for Promiscuous and All Multicast modes */
  353. AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
  354. if (netdev->flags & IFF_PROMISC) {
  355. mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
  356. } else if (netdev->flags & IFF_ALLMULTI) {
  357. mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
  358. mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
  359. } else {
  360. mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
  361. }
  362. AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
  363. /* clear the old settings from the multicast hash table */
  364. AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
  365. AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
  366. /* comoute mc addresses' hash value ,and put it into hash table */
  367. netdev_for_each_mc_addr(ha, netdev) {
  368. hash_value = atl1c_hash_mc_addr(hw, ha->addr);
  369. atl1c_hash_set(hw, hash_value);
  370. }
  371. }
  372. static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
  373. {
  374. if (features & NETIF_F_HW_VLAN_CTAG_RX) {
  375. /* enable VLAN tag insert/strip */
  376. *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
  377. } else {
  378. /* disable VLAN tag insert/strip */
  379. *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
  380. }
  381. }
  382. static void atl1c_vlan_mode(struct net_device *netdev,
  383. netdev_features_t features)
  384. {
  385. struct atl1c_adapter *adapter = netdev_priv(netdev);
  386. struct pci_dev *pdev = adapter->pdev;
  387. u32 mac_ctrl_data = 0;
  388. if (netif_msg_pktdata(adapter))
  389. dev_dbg(&pdev->dev, "atl1c_vlan_mode\n");
  390. atl1c_irq_disable(adapter);
  391. AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
  392. __atl1c_vlan_mode(features, &mac_ctrl_data);
  393. AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
  394. atl1c_irq_enable(adapter);
  395. }
  396. static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
  397. {
  398. struct pci_dev *pdev = adapter->pdev;
  399. if (netif_msg_pktdata(adapter))
  400. dev_dbg(&pdev->dev, "atl1c_restore_vlan\n");
  401. atl1c_vlan_mode(adapter->netdev, adapter->netdev->features);
  402. }
  403. /**
  404. * atl1c_set_mac - Change the Ethernet Address of the NIC
  405. * @netdev: network interface device structure
  406. * @p: pointer to an address structure
  407. *
  408. * Returns 0 on success, negative on failure
  409. */
  410. static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
  411. {
  412. struct atl1c_adapter *adapter = netdev_priv(netdev);
  413. struct sockaddr *addr = p;
  414. if (!is_valid_ether_addr(addr->sa_data))
  415. return -EADDRNOTAVAIL;
  416. if (netif_running(netdev))
  417. return -EBUSY;
  418. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  419. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  420. atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr);
  421. return 0;
  422. }
  423. static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
  424. struct net_device *dev)
  425. {
  426. unsigned int head_size;
  427. int mtu = dev->mtu;
  428. adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
  429. roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
  430. head_size = SKB_DATA_ALIGN(adapter->rx_buffer_len + NET_SKB_PAD) +
  431. SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
  432. adapter->rx_frag_size = roundup_pow_of_two(head_size);
  433. }
  434. static netdev_features_t atl1c_fix_features(struct net_device *netdev,
  435. netdev_features_t features)
  436. {
  437. /*
  438. * Since there is no support for separate rx/tx vlan accel
  439. * enable/disable make sure tx flag is always in same state as rx.
  440. */
  441. if (features & NETIF_F_HW_VLAN_CTAG_RX)
  442. features |= NETIF_F_HW_VLAN_CTAG_TX;
  443. else
  444. features &= ~NETIF_F_HW_VLAN_CTAG_TX;
  445. if (netdev->mtu > MAX_TSO_FRAME_SIZE)
  446. features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
  447. return features;
  448. }
  449. static int atl1c_set_features(struct net_device *netdev,
  450. netdev_features_t features)
  451. {
  452. netdev_features_t changed = netdev->features ^ features;
  453. if (changed & NETIF_F_HW_VLAN_CTAG_RX)
  454. atl1c_vlan_mode(netdev, features);
  455. return 0;
  456. }
  457. /**
  458. * atl1c_change_mtu - Change the Maximum Transfer Unit
  459. * @netdev: network interface device structure
  460. * @new_mtu: new value for maximum frame size
  461. *
  462. * Returns 0 on success, negative on failure
  463. */
  464. static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
  465. {
  466. struct atl1c_adapter *adapter = netdev_priv(netdev);
  467. struct atl1c_hw *hw = &adapter->hw;
  468. int old_mtu = netdev->mtu;
  469. int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
  470. /* Fast Ethernet controller doesn't support jumbo packet */
  471. if (((hw->nic_type == athr_l2c ||
  472. hw->nic_type == athr_l2c_b ||
  473. hw->nic_type == athr_l2c_b2) && new_mtu > ETH_DATA_LEN) ||
  474. max_frame < ETH_ZLEN + ETH_FCS_LEN ||
  475. max_frame > MAX_JUMBO_FRAME_SIZE) {
  476. if (netif_msg_link(adapter))
  477. dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
  478. return -EINVAL;
  479. }
  480. /* set MTU */
  481. if (old_mtu != new_mtu && netif_running(netdev)) {
  482. while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
  483. msleep(1);
  484. netdev->mtu = new_mtu;
  485. adapter->hw.max_frame_size = new_mtu;
  486. atl1c_set_rxbufsize(adapter, netdev);
  487. atl1c_down(adapter);
  488. netdev_update_features(netdev);
  489. atl1c_up(adapter);
  490. clear_bit(__AT_RESETTING, &adapter->flags);
  491. }
  492. return 0;
  493. }
  494. /*
  495. * caller should hold mdio_lock
  496. */
  497. static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
  498. {
  499. struct atl1c_adapter *adapter = netdev_priv(netdev);
  500. u16 result;
  501. atl1c_read_phy_reg(&adapter->hw, reg_num, &result);
  502. return result;
  503. }
  504. static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
  505. int reg_num, int val)
  506. {
  507. struct atl1c_adapter *adapter = netdev_priv(netdev);
  508. atl1c_write_phy_reg(&adapter->hw, reg_num, val);
  509. }
  510. static int atl1c_mii_ioctl(struct net_device *netdev,
  511. struct ifreq *ifr, int cmd)
  512. {
  513. struct atl1c_adapter *adapter = netdev_priv(netdev);
  514. struct pci_dev *pdev = adapter->pdev;
  515. struct mii_ioctl_data *data = if_mii(ifr);
  516. unsigned long flags;
  517. int retval = 0;
  518. if (!netif_running(netdev))
  519. return -EINVAL;
  520. spin_lock_irqsave(&adapter->mdio_lock, flags);
  521. switch (cmd) {
  522. case SIOCGMIIPHY:
  523. data->phy_id = 0;
  524. break;
  525. case SIOCGMIIREG:
  526. if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  527. &data->val_out)) {
  528. retval = -EIO;
  529. goto out;
  530. }
  531. break;
  532. case SIOCSMIIREG:
  533. if (data->reg_num & ~(0x1F)) {
  534. retval = -EFAULT;
  535. goto out;
  536. }
  537. dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
  538. data->reg_num, data->val_in);
  539. if (atl1c_write_phy_reg(&adapter->hw,
  540. data->reg_num, data->val_in)) {
  541. retval = -EIO;
  542. goto out;
  543. }
  544. break;
  545. default:
  546. retval = -EOPNOTSUPP;
  547. break;
  548. }
  549. out:
  550. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  551. return retval;
  552. }
  553. static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  554. {
  555. switch (cmd) {
  556. case SIOCGMIIPHY:
  557. case SIOCGMIIREG:
  558. case SIOCSMIIREG:
  559. return atl1c_mii_ioctl(netdev, ifr, cmd);
  560. default:
  561. return -EOPNOTSUPP;
  562. }
  563. }
  564. /**
  565. * atl1c_alloc_queues - Allocate memory for all rings
  566. * @adapter: board private structure to initialize
  567. *
  568. */
  569. static int atl1c_alloc_queues(struct atl1c_adapter *adapter)
  570. {
  571. return 0;
  572. }
  573. static void atl1c_set_mac_type(struct atl1c_hw *hw)
  574. {
  575. switch (hw->device_id) {
  576. case PCI_DEVICE_ID_ATTANSIC_L2C:
  577. hw->nic_type = athr_l2c;
  578. break;
  579. case PCI_DEVICE_ID_ATTANSIC_L1C:
  580. hw->nic_type = athr_l1c;
  581. break;
  582. case PCI_DEVICE_ID_ATHEROS_L2C_B:
  583. hw->nic_type = athr_l2c_b;
  584. break;
  585. case PCI_DEVICE_ID_ATHEROS_L2C_B2:
  586. hw->nic_type = athr_l2c_b2;
  587. break;
  588. case PCI_DEVICE_ID_ATHEROS_L1D:
  589. hw->nic_type = athr_l1d;
  590. break;
  591. case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
  592. hw->nic_type = athr_l1d_2;
  593. break;
  594. default:
  595. break;
  596. }
  597. }
  598. static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
  599. {
  600. u32 link_ctrl_data;
  601. atl1c_set_mac_type(hw);
  602. AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
  603. hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE |
  604. ATL1C_TXQ_MODE_ENHANCE;
  605. hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT |
  606. ATL1C_ASPM_L1_SUPPORT;
  607. hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
  608. if (hw->nic_type == athr_l1c ||
  609. hw->nic_type == athr_l1d ||
  610. hw->nic_type == athr_l1d_2)
  611. hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
  612. return 0;
  613. }
  614. struct atl1c_platform_patch {
  615. u16 pci_did;
  616. u8 pci_revid;
  617. u16 subsystem_vid;
  618. u16 subsystem_did;
  619. u32 patch_flag;
  620. #define ATL1C_LINK_PATCH 0x1
  621. };
  622. static const struct atl1c_platform_patch plats[] = {
  623. {0x2060, 0xC1, 0x1019, 0x8152, 0x1},
  624. {0x2060, 0xC1, 0x1019, 0x2060, 0x1},
  625. {0x2060, 0xC1, 0x1019, 0xE000, 0x1},
  626. {0x2062, 0xC0, 0x1019, 0x8152, 0x1},
  627. {0x2062, 0xC0, 0x1019, 0x2062, 0x1},
  628. {0x2062, 0xC0, 0x1458, 0xE000, 0x1},
  629. {0x2062, 0xC1, 0x1019, 0x8152, 0x1},
  630. {0x2062, 0xC1, 0x1019, 0x2062, 0x1},
  631. {0x2062, 0xC1, 0x1458, 0xE000, 0x1},
  632. {0x2062, 0xC1, 0x1565, 0x2802, 0x1},
  633. {0x2062, 0xC1, 0x1565, 0x2801, 0x1},
  634. {0x1073, 0xC0, 0x1019, 0x8151, 0x1},
  635. {0x1073, 0xC0, 0x1019, 0x1073, 0x1},
  636. {0x1073, 0xC0, 0x1458, 0xE000, 0x1},
  637. {0x1083, 0xC0, 0x1458, 0xE000, 0x1},
  638. {0x1083, 0xC0, 0x1019, 0x8151, 0x1},
  639. {0x1083, 0xC0, 0x1019, 0x1083, 0x1},
  640. {0x1083, 0xC0, 0x1462, 0x7680, 0x1},
  641. {0x1083, 0xC0, 0x1565, 0x2803, 0x1},
  642. {0},
  643. };
  644. static void atl1c_patch_assign(struct atl1c_hw *hw)
  645. {
  646. struct pci_dev *pdev = hw->adapter->pdev;
  647. u32 misc_ctrl;
  648. int i = 0;
  649. hw->msi_lnkpatch = false;
  650. while (plats[i].pci_did != 0) {
  651. if (plats[i].pci_did == hw->device_id &&
  652. plats[i].pci_revid == hw->revision_id &&
  653. plats[i].subsystem_vid == hw->subsystem_vendor_id &&
  654. plats[i].subsystem_did == hw->subsystem_id) {
  655. if (plats[i].patch_flag & ATL1C_LINK_PATCH)
  656. hw->msi_lnkpatch = true;
  657. }
  658. i++;
  659. }
  660. if (hw->device_id == PCI_DEVICE_ID_ATHEROS_L2C_B2 &&
  661. hw->revision_id == L2CB_V21) {
  662. /* config acess mode */
  663. pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR,
  664. REG_PCIE_DEV_MISC_CTRL);
  665. pci_read_config_dword(pdev, REG_PCIE_IND_ACC_DATA, &misc_ctrl);
  666. misc_ctrl &= ~0x100;
  667. pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR,
  668. REG_PCIE_DEV_MISC_CTRL);
  669. pci_write_config_dword(pdev, REG_PCIE_IND_ACC_DATA, misc_ctrl);
  670. }
  671. }
  672. /**
  673. * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
  674. * @adapter: board private structure to initialize
  675. *
  676. * atl1c_sw_init initializes the Adapter private data structure.
  677. * Fields are initialized based on PCI device information and
  678. * OS network device settings (MTU size).
  679. */
  680. static int atl1c_sw_init(struct atl1c_adapter *adapter)
  681. {
  682. struct atl1c_hw *hw = &adapter->hw;
  683. struct pci_dev *pdev = adapter->pdev;
  684. u32 revision;
  685. adapter->wol = 0;
  686. device_set_wakeup_enable(&pdev->dev, false);
  687. adapter->link_speed = SPEED_0;
  688. adapter->link_duplex = FULL_DUPLEX;
  689. adapter->tpd_ring[0].count = 1024;
  690. adapter->rfd_ring.count = 512;
  691. hw->vendor_id = pdev->vendor;
  692. hw->device_id = pdev->device;
  693. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  694. hw->subsystem_id = pdev->subsystem_device;
  695. pci_read_config_dword(pdev, PCI_CLASS_REVISION, &revision);
  696. hw->revision_id = revision & 0xFF;
  697. /* before link up, we assume hibernate is true */
  698. hw->hibernate = true;
  699. hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
  700. if (atl1c_setup_mac_funcs(hw) != 0) {
  701. dev_err(&pdev->dev, "set mac function pointers failed\n");
  702. return -1;
  703. }
  704. atl1c_patch_assign(hw);
  705. hw->intr_mask = IMR_NORMAL_MASK;
  706. hw->phy_configured = false;
  707. hw->preamble_len = 7;
  708. hw->max_frame_size = adapter->netdev->mtu;
  709. hw->autoneg_advertised = ADVERTISED_Autoneg;
  710. hw->indirect_tab = 0xE4E4E4E4;
  711. hw->base_cpu = 0;
  712. hw->ict = 50000; /* 100ms */
  713. hw->smb_timer = 200000; /* 400ms */
  714. hw->rx_imt = 200;
  715. hw->tx_imt = 1000;
  716. hw->tpd_burst = 5;
  717. hw->rfd_burst = 8;
  718. hw->dma_order = atl1c_dma_ord_out;
  719. hw->dmar_block = atl1c_dma_req_1024;
  720. if (atl1c_alloc_queues(adapter)) {
  721. dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
  722. return -ENOMEM;
  723. }
  724. /* TODO */
  725. atl1c_set_rxbufsize(adapter, adapter->netdev);
  726. atomic_set(&adapter->irq_sem, 1);
  727. spin_lock_init(&adapter->mdio_lock);
  728. spin_lock_init(&adapter->tx_lock);
  729. set_bit(__AT_DOWN, &adapter->flags);
  730. return 0;
  731. }
  732. static inline void atl1c_clean_buffer(struct pci_dev *pdev,
  733. struct atl1c_buffer *buffer_info, int in_irq)
  734. {
  735. u16 pci_driection;
  736. if (buffer_info->flags & ATL1C_BUFFER_FREE)
  737. return;
  738. if (buffer_info->dma) {
  739. if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
  740. pci_driection = PCI_DMA_FROMDEVICE;
  741. else
  742. pci_driection = PCI_DMA_TODEVICE;
  743. if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
  744. pci_unmap_single(pdev, buffer_info->dma,
  745. buffer_info->length, pci_driection);
  746. else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
  747. pci_unmap_page(pdev, buffer_info->dma,
  748. buffer_info->length, pci_driection);
  749. }
  750. if (buffer_info->skb) {
  751. if (in_irq)
  752. dev_kfree_skb_irq(buffer_info->skb);
  753. else
  754. dev_kfree_skb(buffer_info->skb);
  755. }
  756. buffer_info->dma = 0;
  757. buffer_info->skb = NULL;
  758. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
  759. }
  760. /**
  761. * atl1c_clean_tx_ring - Free Tx-skb
  762. * @adapter: board private structure
  763. */
  764. static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
  765. enum atl1c_trans_queue type)
  766. {
  767. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  768. struct atl1c_buffer *buffer_info;
  769. struct pci_dev *pdev = adapter->pdev;
  770. u16 index, ring_count;
  771. ring_count = tpd_ring->count;
  772. for (index = 0; index < ring_count; index++) {
  773. buffer_info = &tpd_ring->buffer_info[index];
  774. atl1c_clean_buffer(pdev, buffer_info, 0);
  775. }
  776. /* Zero out Tx-buffers */
  777. memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
  778. ring_count);
  779. atomic_set(&tpd_ring->next_to_clean, 0);
  780. tpd_ring->next_to_use = 0;
  781. }
  782. /**
  783. * atl1c_clean_rx_ring - Free rx-reservation skbs
  784. * @adapter: board private structure
  785. */
  786. static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
  787. {
  788. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  789. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  790. struct atl1c_buffer *buffer_info;
  791. struct pci_dev *pdev = adapter->pdev;
  792. int j;
  793. for (j = 0; j < rfd_ring->count; j++) {
  794. buffer_info = &rfd_ring->buffer_info[j];
  795. atl1c_clean_buffer(pdev, buffer_info, 0);
  796. }
  797. /* zero out the descriptor ring */
  798. memset(rfd_ring->desc, 0, rfd_ring->size);
  799. rfd_ring->next_to_clean = 0;
  800. rfd_ring->next_to_use = 0;
  801. rrd_ring->next_to_use = 0;
  802. rrd_ring->next_to_clean = 0;
  803. }
  804. /*
  805. * Read / Write Ptr Initialize:
  806. */
  807. static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
  808. {
  809. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  810. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  811. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  812. struct atl1c_buffer *buffer_info;
  813. int i, j;
  814. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  815. tpd_ring[i].next_to_use = 0;
  816. atomic_set(&tpd_ring[i].next_to_clean, 0);
  817. buffer_info = tpd_ring[i].buffer_info;
  818. for (j = 0; j < tpd_ring->count; j++)
  819. ATL1C_SET_BUFFER_STATE(&buffer_info[i],
  820. ATL1C_BUFFER_FREE);
  821. }
  822. rfd_ring->next_to_use = 0;
  823. rfd_ring->next_to_clean = 0;
  824. rrd_ring->next_to_use = 0;
  825. rrd_ring->next_to_clean = 0;
  826. for (j = 0; j < rfd_ring->count; j++) {
  827. buffer_info = &rfd_ring->buffer_info[j];
  828. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
  829. }
  830. }
  831. /**
  832. * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
  833. * @adapter: board private structure
  834. *
  835. * Free all transmit software resources
  836. */
  837. static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
  838. {
  839. struct pci_dev *pdev = adapter->pdev;
  840. pci_free_consistent(pdev, adapter->ring_header.size,
  841. adapter->ring_header.desc,
  842. adapter->ring_header.dma);
  843. adapter->ring_header.desc = NULL;
  844. /* Note: just free tdp_ring.buffer_info,
  845. * it contain rfd_ring.buffer_info, do not double free */
  846. if (adapter->tpd_ring[0].buffer_info) {
  847. kfree(adapter->tpd_ring[0].buffer_info);
  848. adapter->tpd_ring[0].buffer_info = NULL;
  849. }
  850. if (adapter->rx_page) {
  851. put_page(adapter->rx_page);
  852. adapter->rx_page = NULL;
  853. }
  854. }
  855. /**
  856. * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
  857. * @adapter: board private structure
  858. *
  859. * Return 0 on success, negative on failure
  860. */
  861. static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
  862. {
  863. struct pci_dev *pdev = adapter->pdev;
  864. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  865. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  866. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  867. struct atl1c_ring_header *ring_header = &adapter->ring_header;
  868. int size;
  869. int i;
  870. int count = 0;
  871. int rx_desc_count = 0;
  872. u32 offset = 0;
  873. rrd_ring->count = rfd_ring->count;
  874. for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
  875. tpd_ring[i].count = tpd_ring[0].count;
  876. /* 2 tpd queue, one high priority queue,
  877. * another normal priority queue */
  878. size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
  879. rfd_ring->count);
  880. tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
  881. if (unlikely(!tpd_ring->buffer_info))
  882. goto err_nomem;
  883. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  884. tpd_ring[i].buffer_info =
  885. (tpd_ring->buffer_info + count);
  886. count += tpd_ring[i].count;
  887. }
  888. rfd_ring->buffer_info =
  889. (tpd_ring->buffer_info + count);
  890. count += rfd_ring->count;
  891. rx_desc_count += rfd_ring->count;
  892. /*
  893. * real ring DMA buffer
  894. * each ring/block may need up to 8 bytes for alignment, hence the
  895. * additional bytes tacked onto the end.
  896. */
  897. ring_header->size = size =
  898. sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
  899. sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
  900. sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
  901. 8 * 4;
  902. ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
  903. &ring_header->dma);
  904. if (unlikely(!ring_header->desc)) {
  905. dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
  906. goto err_nomem;
  907. }
  908. memset(ring_header->desc, 0, ring_header->size);
  909. /* init TPD ring */
  910. tpd_ring[0].dma = roundup(ring_header->dma, 8);
  911. offset = tpd_ring[0].dma - ring_header->dma;
  912. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  913. tpd_ring[i].dma = ring_header->dma + offset;
  914. tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
  915. tpd_ring[i].size =
  916. sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
  917. offset += roundup(tpd_ring[i].size, 8);
  918. }
  919. /* init RFD ring */
  920. rfd_ring->dma = ring_header->dma + offset;
  921. rfd_ring->desc = (u8 *) ring_header->desc + offset;
  922. rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count;
  923. offset += roundup(rfd_ring->size, 8);
  924. /* init RRD ring */
  925. rrd_ring->dma = ring_header->dma + offset;
  926. rrd_ring->desc = (u8 *) ring_header->desc + offset;
  927. rrd_ring->size = sizeof(struct atl1c_recv_ret_status) *
  928. rrd_ring->count;
  929. offset += roundup(rrd_ring->size, 8);
  930. return 0;
  931. err_nomem:
  932. kfree(tpd_ring->buffer_info);
  933. return -ENOMEM;
  934. }
  935. static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
  936. {
  937. struct atl1c_hw *hw = &adapter->hw;
  938. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  939. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  940. struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
  941. adapter->tpd_ring;
  942. /* TPD */
  943. AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
  944. (u32)((tpd_ring[atl1c_trans_normal].dma &
  945. AT_DMA_HI_ADDR_MASK) >> 32));
  946. /* just enable normal priority TX queue */
  947. AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO,
  948. (u32)(tpd_ring[atl1c_trans_normal].dma &
  949. AT_DMA_LO_ADDR_MASK));
  950. AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO,
  951. (u32)(tpd_ring[atl1c_trans_high].dma &
  952. AT_DMA_LO_ADDR_MASK));
  953. AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
  954. (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
  955. /* RFD */
  956. AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
  957. (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32));
  958. AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO,
  959. (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK));
  960. AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
  961. rfd_ring->count & RFD_RING_SIZE_MASK);
  962. AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
  963. adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
  964. /* RRD */
  965. AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO,
  966. (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK));
  967. AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
  968. (rrd_ring->count & RRD_RING_SIZE_MASK));
  969. if (hw->nic_type == athr_l2c_b) {
  970. AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
  971. AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
  972. AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L);
  973. AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L);
  974. AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L);
  975. AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L);
  976. AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/
  977. AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/
  978. }
  979. /* Load all of base address above */
  980. AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
  981. }
  982. static void atl1c_configure_tx(struct atl1c_adapter *adapter)
  983. {
  984. struct atl1c_hw *hw = &adapter->hw;
  985. int max_pay_load;
  986. u16 tx_offload_thresh;
  987. u32 txq_ctrl_data;
  988. tx_offload_thresh = MAX_TSO_FRAME_SIZE;
  989. AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
  990. (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
  991. max_pay_load = pcie_get_readrq(adapter->pdev) >> 8;
  992. hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
  993. /*
  994. * if BIOS had changed the dam-read-max-length to an invalid value,
  995. * restore it to default value
  996. */
  997. if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) {
  998. pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN);
  999. hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN;
  1000. }
  1001. txq_ctrl_data =
  1002. hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ?
  1003. L2CB_TXQ_CFGV : L1C_TXQ_CFGV;
  1004. AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
  1005. }
  1006. static void atl1c_configure_rx(struct atl1c_adapter *adapter)
  1007. {
  1008. struct atl1c_hw *hw = &adapter->hw;
  1009. u32 rxq_ctrl_data;
  1010. rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
  1011. RXQ_RFD_BURST_NUM_SHIFT;
  1012. if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
  1013. rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
  1014. /* aspm for gigabit */
  1015. if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0)
  1016. rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT,
  1017. ASPM_THRUPUT_LIMIT_100M);
  1018. AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
  1019. }
  1020. static void atl1c_configure_dma(struct atl1c_adapter *adapter)
  1021. {
  1022. struct atl1c_hw *hw = &adapter->hw;
  1023. u32 dma_ctrl_data;
  1024. dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) |
  1025. DMA_CTRL_RREQ_PRI_DATA |
  1026. FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) |
  1027. FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) |
  1028. FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF);
  1029. AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
  1030. }
  1031. /*
  1032. * Stop the mac, transmit and receive units
  1033. * hw - Struct containing variables accessed by shared code
  1034. * return : 0 or idle status (if error)
  1035. */
  1036. static int atl1c_stop_mac(struct atl1c_hw *hw)
  1037. {
  1038. u32 data;
  1039. AT_READ_REG(hw, REG_RXQ_CTRL, &data);
  1040. data &= ~RXQ_CTRL_EN;
  1041. AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
  1042. AT_READ_REG(hw, REG_TXQ_CTRL, &data);
  1043. data &= ~TXQ_CTRL_EN;
  1044. AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
  1045. atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY);
  1046. AT_READ_REG(hw, REG_MAC_CTRL, &data);
  1047. data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
  1048. AT_WRITE_REG(hw, REG_MAC_CTRL, data);
  1049. return (int)atl1c_wait_until_idle(hw,
  1050. IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY);
  1051. }
  1052. static void atl1c_start_mac(struct atl1c_adapter *adapter)
  1053. {
  1054. struct atl1c_hw *hw = &adapter->hw;
  1055. u32 mac, txq, rxq;
  1056. hw->mac_duplex = adapter->link_duplex == FULL_DUPLEX ? true : false;
  1057. hw->mac_speed = adapter->link_speed == SPEED_1000 ?
  1058. atl1c_mac_speed_1000 : atl1c_mac_speed_10_100;
  1059. AT_READ_REG(hw, REG_TXQ_CTRL, &txq);
  1060. AT_READ_REG(hw, REG_RXQ_CTRL, &rxq);
  1061. AT_READ_REG(hw, REG_MAC_CTRL, &mac);
  1062. txq |= TXQ_CTRL_EN;
  1063. rxq |= RXQ_CTRL_EN;
  1064. mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW |
  1065. MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW |
  1066. MAC_CTRL_ADD_CRC | MAC_CTRL_PAD |
  1067. MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN |
  1068. MAC_CTRL_HASH_ALG_CRC32;
  1069. if (hw->mac_duplex)
  1070. mac |= MAC_CTRL_DUPLX;
  1071. else
  1072. mac &= ~MAC_CTRL_DUPLX;
  1073. mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw->mac_speed);
  1074. mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw->preamble_len);
  1075. AT_WRITE_REG(hw, REG_TXQ_CTRL, txq);
  1076. AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq);
  1077. AT_WRITE_REG(hw, REG_MAC_CTRL, mac);
  1078. }
  1079. /*
  1080. * Reset the transmit and receive units; mask and clear all interrupts.
  1081. * hw - Struct containing variables accessed by shared code
  1082. * return : 0 or idle status (if error)
  1083. */
  1084. static int atl1c_reset_mac(struct atl1c_hw *hw)
  1085. {
  1086. struct atl1c_adapter *adapter = hw->adapter;
  1087. struct pci_dev *pdev = adapter->pdev;
  1088. u32 ctrl_data = 0;
  1089. atl1c_stop_mac(hw);
  1090. /*
  1091. * Issue Soft Reset to the MAC. This will reset the chip's
  1092. * transmit, receive, DMA. It will not effect
  1093. * the current PCI configuration. The global reset bit is self-
  1094. * clearing, and should clear within a microsecond.
  1095. */
  1096. AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data);
  1097. ctrl_data |= MASTER_CTRL_OOB_DIS;
  1098. AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST);
  1099. AT_WRITE_FLUSH(hw);
  1100. msleep(10);
  1101. /* Wait at least 10ms for All module to be Idle */
  1102. if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) {
  1103. dev_err(&pdev->dev,
  1104. "MAC state machine can't be idle since"
  1105. " disabled for 10ms second\n");
  1106. return -1;
  1107. }
  1108. AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data);
  1109. /* driver control speed/duplex */
  1110. AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data);
  1111. AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW);
  1112. /* clk switch setting */
  1113. AT_READ_REG(hw, REG_SERDES, &ctrl_data);
  1114. switch (hw->nic_type) {
  1115. case athr_l2c_b:
  1116. ctrl_data &= ~(SERDES_PHY_CLK_SLOWDOWN |
  1117. SERDES_MAC_CLK_SLOWDOWN);
  1118. AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
  1119. break;
  1120. case athr_l2c_b2:
  1121. case athr_l1d_2:
  1122. ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN;
  1123. AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
  1124. break;
  1125. default:
  1126. break;
  1127. }
  1128. return 0;
  1129. }
  1130. static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
  1131. {
  1132. u16 ctrl_flags = hw->ctrl_flags;
  1133. hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT);
  1134. atl1c_set_aspm(hw, SPEED_0);
  1135. hw->ctrl_flags = ctrl_flags;
  1136. }
  1137. /*
  1138. * Set ASPM state.
  1139. * Enable/disable L0s/L1 depend on link state.
  1140. */
  1141. static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed)
  1142. {
  1143. u32 pm_ctrl_data;
  1144. u32 link_l1_timer;
  1145. AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
  1146. pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN |
  1147. PM_CTRL_ASPM_L0S_EN |
  1148. PM_CTRL_MAC_ASPM_CHK);
  1149. /* L1 timer */
  1150. if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
  1151. pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S;
  1152. link_l1_timer =
  1153. link_speed == SPEED_1000 || link_speed == SPEED_100 ?
  1154. L1D_PMCTRL_L1_ENTRY_TM_16US : 1;
  1155. pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
  1156. L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer);
  1157. } else {
  1158. link_l1_timer = hw->nic_type == athr_l2c_b ?
  1159. L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM;
  1160. if (link_speed != SPEED_1000 && link_speed != SPEED_100)
  1161. link_l1_timer = 1;
  1162. pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
  1163. PM_CTRL_L1_ENTRY_TIMER, link_l1_timer);
  1164. }
  1165. /* L0S/L1 enable */
  1166. if ((hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) && link_speed != SPEED_0)
  1167. pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK;
  1168. if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
  1169. pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK;
  1170. /* l2cb & l1d & l2cb2 & l1d2 */
  1171. if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
  1172. hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
  1173. pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
  1174. PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF);
  1175. pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER |
  1176. PM_CTRL_SERDES_PD_EX_L1 |
  1177. PM_CTRL_CLK_SWH_L1;
  1178. pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
  1179. PM_CTRL_SERDES_PLL_L1_EN |
  1180. PM_CTRL_SERDES_BUFS_RX_L1_EN |
  1181. PM_CTRL_SA_DLY_EN |
  1182. PM_CTRL_HOTRST);
  1183. /* disable l0s if link down or l2cb */
  1184. if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b)
  1185. pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
  1186. } else { /* l1c */
  1187. pm_ctrl_data =
  1188. FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0);
  1189. if (link_speed != SPEED_0) {
  1190. pm_ctrl_data |= PM_CTRL_SERDES_L1_EN |
  1191. PM_CTRL_SERDES_PLL_L1_EN |
  1192. PM_CTRL_SERDES_BUFS_RX_L1_EN;
  1193. pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 |
  1194. PM_CTRL_CLK_SWH_L1 |
  1195. PM_CTRL_ASPM_L0S_EN |
  1196. PM_CTRL_ASPM_L1_EN);
  1197. } else { /* link down */
  1198. pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
  1199. pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
  1200. PM_CTRL_SERDES_PLL_L1_EN |
  1201. PM_CTRL_SERDES_BUFS_RX_L1_EN |
  1202. PM_CTRL_ASPM_L0S_EN);
  1203. }
  1204. }
  1205. AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
  1206. return;
  1207. }
  1208. /**
  1209. * atl1c_configure - Configure Transmit&Receive Unit after Reset
  1210. * @adapter: board private structure
  1211. *
  1212. * Configure the Tx /Rx unit of the MAC after a reset.
  1213. */
  1214. static int atl1c_configure_mac(struct atl1c_adapter *adapter)
  1215. {
  1216. struct atl1c_hw *hw = &adapter->hw;
  1217. u32 master_ctrl_data = 0;
  1218. u32 intr_modrt_data;
  1219. u32 data;
  1220. AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
  1221. master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN |
  1222. MASTER_CTRL_RX_ITIMER_EN |
  1223. MASTER_CTRL_INT_RDCLR);
  1224. /* clear interrupt status */
  1225. AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
  1226. /* Clear any WOL status */
  1227. AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
  1228. /* set Interrupt Clear Timer
  1229. * HW will enable self to assert interrupt event to system after
  1230. * waiting x-time for software to notify it accept interrupt.
  1231. */
  1232. data = CLK_GATING_EN_ALL;
  1233. if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) {
  1234. if (hw->nic_type == athr_l2c_b)
  1235. data &= ~CLK_GATING_RXMAC_EN;
  1236. } else
  1237. data = 0;
  1238. AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data);
  1239. AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
  1240. hw->ict & INT_RETRIG_TIMER_MASK);
  1241. atl1c_configure_des_ring(adapter);
  1242. if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
  1243. intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
  1244. IRQ_MODRT_TX_TIMER_SHIFT;
  1245. intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
  1246. IRQ_MODRT_RX_TIMER_SHIFT;
  1247. AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
  1248. master_ctrl_data |=
  1249. MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
  1250. }
  1251. if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
  1252. master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
  1253. master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
  1254. AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
  1255. AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
  1256. hw->smb_timer & SMB_STAT_TIMER_MASK);
  1257. /* set MTU */
  1258. AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
  1259. VLAN_HLEN + ETH_FCS_LEN);
  1260. atl1c_configure_tx(adapter);
  1261. atl1c_configure_rx(adapter);
  1262. atl1c_configure_dma(adapter);
  1263. return 0;
  1264. }
  1265. static int atl1c_configure(struct atl1c_adapter *adapter)
  1266. {
  1267. struct net_device *netdev = adapter->netdev;
  1268. int num;
  1269. atl1c_init_ring_ptrs(adapter);
  1270. atl1c_set_multi(netdev);
  1271. atl1c_restore_vlan(adapter);
  1272. num = atl1c_alloc_rx_buffer(adapter);
  1273. if (unlikely(num == 0))
  1274. return -ENOMEM;
  1275. if (atl1c_configure_mac(adapter))
  1276. return -EIO;
  1277. return 0;
  1278. }
  1279. static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
  1280. {
  1281. u16 hw_reg_addr = 0;
  1282. unsigned long *stats_item = NULL;
  1283. u32 data;
  1284. /* update rx status */
  1285. hw_reg_addr = REG_MAC_RX_STATUS_BIN;
  1286. stats_item = &adapter->hw_stats.rx_ok;
  1287. while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
  1288. AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
  1289. *stats_item += data;
  1290. stats_item++;
  1291. hw_reg_addr += 4;
  1292. }
  1293. /* update tx status */
  1294. hw_reg_addr = REG_MAC_TX_STATUS_BIN;
  1295. stats_item = &adapter->hw_stats.tx_ok;
  1296. while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
  1297. AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
  1298. *stats_item += data;
  1299. stats_item++;
  1300. hw_reg_addr += 4;
  1301. }
  1302. }
  1303. /**
  1304. * atl1c_get_stats - Get System Network Statistics
  1305. * @netdev: network interface device structure
  1306. *
  1307. * Returns the address of the device statistics structure.
  1308. * The statistics are actually updated from the timer callback.
  1309. */
  1310. static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
  1311. {
  1312. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1313. struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
  1314. struct net_device_stats *net_stats = &netdev->stats;
  1315. atl1c_update_hw_stats(adapter);
  1316. net_stats->rx_bytes = hw_stats->rx_byte_cnt;
  1317. net_stats->tx_bytes = hw_stats->tx_byte_cnt;
  1318. net_stats->multicast = hw_stats->rx_mcast;
  1319. net_stats->collisions = hw_stats->tx_1_col +
  1320. hw_stats->tx_2_col +
  1321. hw_stats->tx_late_col +
  1322. hw_stats->tx_abort_col;
  1323. net_stats->rx_errors = hw_stats->rx_frag +
  1324. hw_stats->rx_fcs_err +
  1325. hw_stats->rx_len_err +
  1326. hw_stats->rx_sz_ov +
  1327. hw_stats->rx_rrd_ov +
  1328. hw_stats->rx_align_err +
  1329. hw_stats->rx_rxf_ov;
  1330. net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
  1331. net_stats->rx_length_errors = hw_stats->rx_len_err;
  1332. net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
  1333. net_stats->rx_frame_errors = hw_stats->rx_align_err;
  1334. net_stats->rx_dropped = hw_stats->rx_rrd_ov;
  1335. net_stats->tx_errors = hw_stats->tx_late_col +
  1336. hw_stats->tx_abort_col +
  1337. hw_stats->tx_underrun +
  1338. hw_stats->tx_trunc;
  1339. net_stats->tx_fifo_errors = hw_stats->tx_underrun;
  1340. net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
  1341. net_stats->tx_window_errors = hw_stats->tx_late_col;
  1342. net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors;
  1343. net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors;
  1344. return net_stats;
  1345. }
  1346. static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
  1347. {
  1348. u16 phy_data;
  1349. spin_lock(&adapter->mdio_lock);
  1350. atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
  1351. spin_unlock(&adapter->mdio_lock);
  1352. }
  1353. static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
  1354. enum atl1c_trans_queue type)
  1355. {
  1356. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1357. struct atl1c_buffer *buffer_info;
  1358. struct pci_dev *pdev = adapter->pdev;
  1359. u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1360. u16 hw_next_to_clean;
  1361. u16 reg;
  1362. reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX;
  1363. AT_READ_REGW(&adapter->hw, reg, &hw_next_to_clean);
  1364. while (next_to_clean != hw_next_to_clean) {
  1365. buffer_info = &tpd_ring->buffer_info[next_to_clean];
  1366. atl1c_clean_buffer(pdev, buffer_info, 1);
  1367. if (++next_to_clean == tpd_ring->count)
  1368. next_to_clean = 0;
  1369. atomic_set(&tpd_ring->next_to_clean, next_to_clean);
  1370. }
  1371. if (netif_queue_stopped(adapter->netdev) &&
  1372. netif_carrier_ok(adapter->netdev)) {
  1373. netif_wake_queue(adapter->netdev);
  1374. }
  1375. return true;
  1376. }
  1377. /**
  1378. * atl1c_intr - Interrupt Handler
  1379. * @irq: interrupt number
  1380. * @data: pointer to a network interface device structure
  1381. */
  1382. static irqreturn_t atl1c_intr(int irq, void *data)
  1383. {
  1384. struct net_device *netdev = data;
  1385. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1386. struct pci_dev *pdev = adapter->pdev;
  1387. struct atl1c_hw *hw = &adapter->hw;
  1388. int max_ints = AT_MAX_INT_WORK;
  1389. int handled = IRQ_NONE;
  1390. u32 status;
  1391. u32 reg_data;
  1392. do {
  1393. AT_READ_REG(hw, REG_ISR, &reg_data);
  1394. status = reg_data & hw->intr_mask;
  1395. if (status == 0 || (status & ISR_DIS_INT) != 0) {
  1396. if (max_ints != AT_MAX_INT_WORK)
  1397. handled = IRQ_HANDLED;
  1398. break;
  1399. }
  1400. /* link event */
  1401. if (status & ISR_GPHY)
  1402. atl1c_clear_phy_int(adapter);
  1403. /* Ack ISR */
  1404. AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
  1405. if (status & ISR_RX_PKT) {
  1406. if (likely(napi_schedule_prep(&adapter->napi))) {
  1407. hw->intr_mask &= ~ISR_RX_PKT;
  1408. AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
  1409. __napi_schedule(&adapter->napi);
  1410. }
  1411. }
  1412. if (status & ISR_TX_PKT)
  1413. atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
  1414. handled = IRQ_HANDLED;
  1415. /* check if PCIE PHY Link down */
  1416. if (status & ISR_ERROR) {
  1417. if (netif_msg_hw(adapter))
  1418. dev_err(&pdev->dev,
  1419. "atl1c hardware error (status = 0x%x)\n",
  1420. status & ISR_ERROR);
  1421. /* reset MAC */
  1422. set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
  1423. schedule_work(&adapter->common_task);
  1424. return IRQ_HANDLED;
  1425. }
  1426. if (status & ISR_OVER)
  1427. if (netif_msg_intr(adapter))
  1428. dev_warn(&pdev->dev,
  1429. "TX/RX overflow (status = 0x%x)\n",
  1430. status & ISR_OVER);
  1431. /* link event */
  1432. if (status & (ISR_GPHY | ISR_MANUAL)) {
  1433. netdev->stats.tx_carrier_errors++;
  1434. atl1c_link_chg_event(adapter);
  1435. break;
  1436. }
  1437. } while (--max_ints > 0);
  1438. /* re-enable Interrupt*/
  1439. AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
  1440. return handled;
  1441. }
  1442. static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
  1443. struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
  1444. {
  1445. /*
  1446. * The pid field in RRS in not correct sometimes, so we
  1447. * cannot figure out if the packet is fragmented or not,
  1448. * so we tell the KERNEL CHECKSUM_NONE
  1449. */
  1450. skb_checksum_none_assert(skb);
  1451. }
  1452. static struct sk_buff *atl1c_alloc_skb(struct atl1c_adapter *adapter)
  1453. {
  1454. struct sk_buff *skb;
  1455. struct page *page;
  1456. if (adapter->rx_frag_size > PAGE_SIZE)
  1457. return netdev_alloc_skb(adapter->netdev,
  1458. adapter->rx_buffer_len);
  1459. page = adapter->rx_page;
  1460. if (!page) {
  1461. adapter->rx_page = page = alloc_page(GFP_ATOMIC);
  1462. if (unlikely(!page))
  1463. return NULL;
  1464. adapter->rx_page_offset = 0;
  1465. }
  1466. skb = build_skb(page_address(page) + adapter->rx_page_offset,
  1467. adapter->rx_frag_size);
  1468. if (likely(skb)) {
  1469. adapter->rx_page_offset += adapter->rx_frag_size;
  1470. if (adapter->rx_page_offset >= PAGE_SIZE)
  1471. adapter->rx_page = NULL;
  1472. else
  1473. get_page(page);
  1474. }
  1475. return skb;
  1476. }
  1477. static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter)
  1478. {
  1479. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1480. struct pci_dev *pdev = adapter->pdev;
  1481. struct atl1c_buffer *buffer_info, *next_info;
  1482. struct sk_buff *skb;
  1483. void *vir_addr = NULL;
  1484. u16 num_alloc = 0;
  1485. u16 rfd_next_to_use, next_next;
  1486. struct atl1c_rx_free_desc *rfd_desc;
  1487. dma_addr_t mapping;
  1488. next_next = rfd_next_to_use = rfd_ring->next_to_use;
  1489. if (++next_next == rfd_ring->count)
  1490. next_next = 0;
  1491. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  1492. next_info = &rfd_ring->buffer_info[next_next];
  1493. while (next_info->flags & ATL1C_BUFFER_FREE) {
  1494. rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
  1495. skb = atl1c_alloc_skb(adapter);
  1496. if (unlikely(!skb)) {
  1497. if (netif_msg_rx_err(adapter))
  1498. dev_warn(&pdev->dev, "alloc rx buffer failed\n");
  1499. break;
  1500. }
  1501. /*
  1502. * Make buffer alignment 2 beyond a 16 byte boundary
  1503. * this will result in a 16 byte aligned IP header after
  1504. * the 14 byte MAC header is removed
  1505. */
  1506. vir_addr = skb->data;
  1507. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1508. buffer_info->skb = skb;
  1509. buffer_info->length = adapter->rx_buffer_len;
  1510. mapping = pci_map_single(pdev, vir_addr,
  1511. buffer_info->length,
  1512. PCI_DMA_FROMDEVICE);
  1513. if (unlikely(pci_dma_mapping_error(pdev, mapping))) {
  1514. dev_kfree_skb(skb);
  1515. buffer_info->skb = NULL;
  1516. buffer_info->length = 0;
  1517. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
  1518. netif_warn(adapter, rx_err, adapter->netdev, "RX pci_map_single failed");
  1519. break;
  1520. }
  1521. buffer_info->dma = mapping;
  1522. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
  1523. ATL1C_PCIMAP_FROMDEVICE);
  1524. rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  1525. rfd_next_to_use = next_next;
  1526. if (++next_next == rfd_ring->count)
  1527. next_next = 0;
  1528. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  1529. next_info = &rfd_ring->buffer_info[next_next];
  1530. num_alloc++;
  1531. }
  1532. if (num_alloc) {
  1533. /* TODO: update mailbox here */
  1534. wmb();
  1535. rfd_ring->next_to_use = rfd_next_to_use;
  1536. AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX,
  1537. rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
  1538. }
  1539. return num_alloc;
  1540. }
  1541. static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
  1542. struct atl1c_recv_ret_status *rrs, u16 num)
  1543. {
  1544. u16 i;
  1545. /* the relationship between rrd and rfd is one map one */
  1546. for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
  1547. rrd_ring->next_to_clean)) {
  1548. rrs->word3 &= ~RRS_RXD_UPDATED;
  1549. if (++rrd_ring->next_to_clean == rrd_ring->count)
  1550. rrd_ring->next_to_clean = 0;
  1551. }
  1552. }
  1553. static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
  1554. struct atl1c_recv_ret_status *rrs, u16 num)
  1555. {
  1556. u16 i;
  1557. u16 rfd_index;
  1558. struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
  1559. rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
  1560. RRS_RX_RFD_INDEX_MASK;
  1561. for (i = 0; i < num; i++) {
  1562. buffer_info[rfd_index].skb = NULL;
  1563. ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
  1564. ATL1C_BUFFER_FREE);
  1565. if (++rfd_index == rfd_ring->count)
  1566. rfd_index = 0;
  1567. }
  1568. rfd_ring->next_to_clean = rfd_index;
  1569. }
  1570. static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
  1571. int *work_done, int work_to_do)
  1572. {
  1573. u16 rfd_num, rfd_index;
  1574. u16 count = 0;
  1575. u16 length;
  1576. struct pci_dev *pdev = adapter->pdev;
  1577. struct net_device *netdev = adapter->netdev;
  1578. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1579. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  1580. struct sk_buff *skb;
  1581. struct atl1c_recv_ret_status *rrs;
  1582. struct atl1c_buffer *buffer_info;
  1583. while (1) {
  1584. if (*work_done >= work_to_do)
  1585. break;
  1586. rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
  1587. if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
  1588. rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
  1589. RRS_RX_RFD_CNT_MASK;
  1590. if (unlikely(rfd_num != 1))
  1591. /* TODO support mul rfd*/
  1592. if (netif_msg_rx_err(adapter))
  1593. dev_warn(&pdev->dev,
  1594. "Multi rfd not support yet!\n");
  1595. goto rrs_checked;
  1596. } else {
  1597. break;
  1598. }
  1599. rrs_checked:
  1600. atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
  1601. if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
  1602. atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
  1603. if (netif_msg_rx_err(adapter))
  1604. dev_warn(&pdev->dev,
  1605. "wrong packet! rrs word3 is %x\n",
  1606. rrs->word3);
  1607. continue;
  1608. }
  1609. length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
  1610. RRS_PKT_SIZE_MASK);
  1611. /* Good Receive */
  1612. if (likely(rfd_num == 1)) {
  1613. rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
  1614. RRS_RX_RFD_INDEX_MASK;
  1615. buffer_info = &rfd_ring->buffer_info[rfd_index];
  1616. pci_unmap_single(pdev, buffer_info->dma,
  1617. buffer_info->length, PCI_DMA_FROMDEVICE);
  1618. skb = buffer_info->skb;
  1619. } else {
  1620. /* TODO */
  1621. if (netif_msg_rx_err(adapter))
  1622. dev_warn(&pdev->dev,
  1623. "Multi rfd not support yet!\n");
  1624. break;
  1625. }
  1626. atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
  1627. skb_put(skb, length - ETH_FCS_LEN);
  1628. skb->protocol = eth_type_trans(skb, netdev);
  1629. atl1c_rx_checksum(adapter, skb, rrs);
  1630. if (rrs->word3 & RRS_VLAN_INS) {
  1631. u16 vlan;
  1632. AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
  1633. vlan = le16_to_cpu(vlan);
  1634. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan);
  1635. }
  1636. netif_receive_skb(skb);
  1637. (*work_done)++;
  1638. count++;
  1639. }
  1640. if (count)
  1641. atl1c_alloc_rx_buffer(adapter);
  1642. }
  1643. /**
  1644. * atl1c_clean - NAPI Rx polling callback
  1645. */
  1646. static int atl1c_clean(struct napi_struct *napi, int budget)
  1647. {
  1648. struct atl1c_adapter *adapter =
  1649. container_of(napi, struct atl1c_adapter, napi);
  1650. int work_done = 0;
  1651. /* Keep link state information with original netdev */
  1652. if (!netif_carrier_ok(adapter->netdev))
  1653. goto quit_polling;
  1654. /* just enable one RXQ */
  1655. atl1c_clean_rx_irq(adapter, &work_done, budget);
  1656. if (work_done < budget) {
  1657. quit_polling:
  1658. napi_complete(napi);
  1659. adapter->hw.intr_mask |= ISR_RX_PKT;
  1660. AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
  1661. }
  1662. return work_done;
  1663. }
  1664. #ifdef CONFIG_NET_POLL_CONTROLLER
  1665. /*
  1666. * Polling 'interrupt' - used by things like netconsole to send skbs
  1667. * without having to re-enable interrupts. It's not called while
  1668. * the interrupt routine is executing.
  1669. */
  1670. static void atl1c_netpoll(struct net_device *netdev)
  1671. {
  1672. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1673. disable_irq(adapter->pdev->irq);
  1674. atl1c_intr(adapter->pdev->irq, netdev);
  1675. enable_irq(adapter->pdev->irq);
  1676. }
  1677. #endif
  1678. static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
  1679. {
  1680. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1681. u16 next_to_use = 0;
  1682. u16 next_to_clean = 0;
  1683. next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1684. next_to_use = tpd_ring->next_to_use;
  1685. return (u16)(next_to_clean > next_to_use) ?
  1686. (next_to_clean - next_to_use - 1) :
  1687. (tpd_ring->count + next_to_clean - next_to_use - 1);
  1688. }
  1689. /*
  1690. * get next usable tpd
  1691. * Note: should call atl1c_tdp_avail to make sure
  1692. * there is enough tpd to use
  1693. */
  1694. static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
  1695. enum atl1c_trans_queue type)
  1696. {
  1697. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1698. struct atl1c_tpd_desc *tpd_desc;
  1699. u16 next_to_use = 0;
  1700. next_to_use = tpd_ring->next_to_use;
  1701. if (++tpd_ring->next_to_use == tpd_ring->count)
  1702. tpd_ring->next_to_use = 0;
  1703. tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
  1704. memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
  1705. return tpd_desc;
  1706. }
  1707. static struct atl1c_buffer *
  1708. atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
  1709. {
  1710. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  1711. return &tpd_ring->buffer_info[tpd -
  1712. (struct atl1c_tpd_desc *)tpd_ring->desc];
  1713. }
  1714. /* Calculate the transmit packet descript needed*/
  1715. static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
  1716. {
  1717. u16 tpd_req;
  1718. u16 proto_hdr_len = 0;
  1719. tpd_req = skb_shinfo(skb)->nr_frags + 1;
  1720. if (skb_is_gso(skb)) {
  1721. proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1722. if (proto_hdr_len < skb_headlen(skb))
  1723. tpd_req++;
  1724. if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
  1725. tpd_req++;
  1726. }
  1727. return tpd_req;
  1728. }
  1729. static int atl1c_tso_csum(struct atl1c_adapter *adapter,
  1730. struct sk_buff *skb,
  1731. struct atl1c_tpd_desc **tpd,
  1732. enum atl1c_trans_queue type)
  1733. {
  1734. struct pci_dev *pdev = adapter->pdev;
  1735. u8 hdr_len;
  1736. u32 real_len;
  1737. unsigned short offload_type;
  1738. int err;
  1739. if (skb_is_gso(skb)) {
  1740. if (skb_header_cloned(skb)) {
  1741. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  1742. if (unlikely(err))
  1743. return -1;
  1744. }
  1745. offload_type = skb_shinfo(skb)->gso_type;
  1746. if (offload_type & SKB_GSO_TCPV4) {
  1747. real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
  1748. + ntohs(ip_hdr(skb)->tot_len));
  1749. if (real_len < skb->len)
  1750. pskb_trim(skb, real_len);
  1751. hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
  1752. if (unlikely(skb->len == hdr_len)) {
  1753. /* only xsum need */
  1754. if (netif_msg_tx_queued(adapter))
  1755. dev_warn(&pdev->dev,
  1756. "IPV4 tso with zero data??\n");
  1757. goto check_sum;
  1758. } else {
  1759. ip_hdr(skb)->check = 0;
  1760. tcp_hdr(skb)->check = ~csum_tcpudp_magic(
  1761. ip_hdr(skb)->saddr,
  1762. ip_hdr(skb)->daddr,
  1763. 0, IPPROTO_TCP, 0);
  1764. (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
  1765. }
  1766. }
  1767. if (offload_type & SKB_GSO_TCPV6) {
  1768. struct atl1c_tpd_ext_desc *etpd =
  1769. *(struct atl1c_tpd_ext_desc **)(tpd);
  1770. memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
  1771. *tpd = atl1c_get_tpd(adapter, type);
  1772. ipv6_hdr(skb)->payload_len = 0;
  1773. /* check payload == 0 byte ? */
  1774. hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
  1775. if (unlikely(skb->len == hdr_len)) {
  1776. /* only xsum need */
  1777. if (netif_msg_tx_queued(adapter))
  1778. dev_warn(&pdev->dev,
  1779. "IPV6 tso with zero data??\n");
  1780. goto check_sum;
  1781. } else
  1782. tcp_hdr(skb)->check = ~csum_ipv6_magic(
  1783. &ipv6_hdr(skb)->saddr,
  1784. &ipv6_hdr(skb)->daddr,
  1785. 0, IPPROTO_TCP, 0);
  1786. etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
  1787. etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
  1788. etpd->pkt_len = cpu_to_le32(skb->len);
  1789. (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
  1790. }
  1791. (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
  1792. (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
  1793. TPD_TCPHDR_OFFSET_SHIFT;
  1794. (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
  1795. TPD_MSS_SHIFT;
  1796. return 0;
  1797. }
  1798. check_sum:
  1799. if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  1800. u8 css, cso;
  1801. cso = skb_checksum_start_offset(skb);
  1802. if (unlikely(cso & 0x1)) {
  1803. if (netif_msg_tx_err(adapter))
  1804. dev_err(&adapter->pdev->dev,
  1805. "payload offset should not an event number\n");
  1806. return -1;
  1807. } else {
  1808. css = cso + skb->csum_offset;
  1809. (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
  1810. TPD_PLOADOFFSET_SHIFT;
  1811. (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
  1812. TPD_CCSUM_OFFSET_SHIFT;
  1813. (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
  1814. }
  1815. }
  1816. return 0;
  1817. }
  1818. static void atl1c_tx_rollback(struct atl1c_adapter *adpt,
  1819. struct atl1c_tpd_desc *first_tpd,
  1820. enum atl1c_trans_queue type)
  1821. {
  1822. struct atl1c_tpd_ring *tpd_ring = &adpt->tpd_ring[type];
  1823. struct atl1c_buffer *buffer_info;
  1824. struct atl1c_tpd_desc *tpd;
  1825. u16 first_index, index;
  1826. first_index = first_tpd - (struct atl1c_tpd_desc *)tpd_ring->desc;
  1827. index = first_index;
  1828. while (index != tpd_ring->next_to_use) {
  1829. tpd = ATL1C_TPD_DESC(tpd_ring, index);
  1830. buffer_info = &tpd_ring->buffer_info[index];
  1831. atl1c_clean_buffer(adpt->pdev, buffer_info, 0);
  1832. memset(tpd, 0, sizeof(struct atl1c_tpd_desc));
  1833. if (++index == tpd_ring->count)
  1834. index = 0;
  1835. }
  1836. tpd_ring->next_to_use = first_index;
  1837. }
  1838. static int atl1c_tx_map(struct atl1c_adapter *adapter,
  1839. struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
  1840. enum atl1c_trans_queue type)
  1841. {
  1842. struct atl1c_tpd_desc *use_tpd = NULL;
  1843. struct atl1c_buffer *buffer_info = NULL;
  1844. u16 buf_len = skb_headlen(skb);
  1845. u16 map_len = 0;
  1846. u16 mapped_len = 0;
  1847. u16 hdr_len = 0;
  1848. u16 nr_frags;
  1849. u16 f;
  1850. int tso;
  1851. nr_frags = skb_shinfo(skb)->nr_frags;
  1852. tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
  1853. if (tso) {
  1854. /* TSO */
  1855. map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1856. use_tpd = tpd;
  1857. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1858. buffer_info->length = map_len;
  1859. buffer_info->dma = pci_map_single(adapter->pdev,
  1860. skb->data, hdr_len, PCI_DMA_TODEVICE);
  1861. if (unlikely(pci_dma_mapping_error(adapter->pdev,
  1862. buffer_info->dma)))
  1863. goto err_dma;
  1864. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1865. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
  1866. ATL1C_PCIMAP_TODEVICE);
  1867. mapped_len += map_len;
  1868. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1869. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1870. }
  1871. if (mapped_len < buf_len) {
  1872. /* mapped_len == 0, means we should use the first tpd,
  1873. which is given by caller */
  1874. if (mapped_len == 0)
  1875. use_tpd = tpd;
  1876. else {
  1877. use_tpd = atl1c_get_tpd(adapter, type);
  1878. memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
  1879. }
  1880. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1881. buffer_info->length = buf_len - mapped_len;
  1882. buffer_info->dma =
  1883. pci_map_single(adapter->pdev, skb->data + mapped_len,
  1884. buffer_info->length, PCI_DMA_TODEVICE);
  1885. if (unlikely(pci_dma_mapping_error(adapter->pdev,
  1886. buffer_info->dma)))
  1887. goto err_dma;
  1888. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1889. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
  1890. ATL1C_PCIMAP_TODEVICE);
  1891. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1892. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1893. }
  1894. for (f = 0; f < nr_frags; f++) {
  1895. struct skb_frag_struct *frag;
  1896. frag = &skb_shinfo(skb)->frags[f];
  1897. use_tpd = atl1c_get_tpd(adapter, type);
  1898. memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
  1899. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1900. buffer_info->length = skb_frag_size(frag);
  1901. buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev,
  1902. frag, 0,
  1903. buffer_info->length,
  1904. DMA_TO_DEVICE);
  1905. if (dma_mapping_error(&adapter->pdev->dev, buffer_info->dma))
  1906. goto err_dma;
  1907. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1908. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
  1909. ATL1C_PCIMAP_TODEVICE);
  1910. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1911. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1912. }
  1913. /* The last tpd */
  1914. use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
  1915. /* The last buffer info contain the skb address,
  1916. so it will be free after unmap */
  1917. buffer_info->skb = skb;
  1918. return 0;
  1919. err_dma:
  1920. buffer_info->dma = 0;
  1921. buffer_info->length = 0;
  1922. return -1;
  1923. }
  1924. static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
  1925. struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
  1926. {
  1927. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1928. u16 reg;
  1929. reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX;
  1930. AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use);
  1931. }
  1932. static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
  1933. struct net_device *netdev)
  1934. {
  1935. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1936. unsigned long flags;
  1937. u16 tpd_req = 1;
  1938. struct atl1c_tpd_desc *tpd;
  1939. enum atl1c_trans_queue type = atl1c_trans_normal;
  1940. if (test_bit(__AT_DOWN, &adapter->flags)) {
  1941. dev_kfree_skb_any(skb);
  1942. return NETDEV_TX_OK;
  1943. }
  1944. tpd_req = atl1c_cal_tpd_req(skb);
  1945. if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
  1946. if (netif_msg_pktdata(adapter))
  1947. dev_info(&adapter->pdev->dev, "tx locked\n");
  1948. return NETDEV_TX_LOCKED;
  1949. }
  1950. if (atl1c_tpd_avail(adapter, type) < tpd_req) {
  1951. /* no enough descriptor, just stop queue */
  1952. netif_stop_queue(netdev);
  1953. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1954. return NETDEV_TX_BUSY;
  1955. }
  1956. tpd = atl1c_get_tpd(adapter, type);
  1957. /* do TSO and check sum */
  1958. if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
  1959. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1960. dev_kfree_skb_any(skb);
  1961. return NETDEV_TX_OK;
  1962. }
  1963. if (unlikely(vlan_tx_tag_present(skb))) {
  1964. u16 vlan = vlan_tx_tag_get(skb);
  1965. __le16 tag;
  1966. vlan = cpu_to_le16(vlan);
  1967. AT_VLAN_TO_TAG(vlan, tag);
  1968. tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
  1969. tpd->vlan_tag = tag;
  1970. }
  1971. if (skb_network_offset(skb) != ETH_HLEN)
  1972. tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
  1973. if (atl1c_tx_map(adapter, skb, tpd, type) < 0) {
  1974. netif_info(adapter, tx_done, adapter->netdev,
  1975. "tx-skb droppted due to dma error\n");
  1976. /* roll back tpd/buffer */
  1977. atl1c_tx_rollback(adapter, tpd, type);
  1978. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1979. dev_kfree_skb(skb);
  1980. } else {
  1981. atl1c_tx_queue(adapter, skb, tpd, type);
  1982. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1983. }
  1984. return NETDEV_TX_OK;
  1985. }
  1986. static void atl1c_free_irq(struct atl1c_adapter *adapter)
  1987. {
  1988. struct net_device *netdev = adapter->netdev;
  1989. free_irq(adapter->pdev->irq, netdev);
  1990. if (adapter->have_msi)
  1991. pci_disable_msi(adapter->pdev);
  1992. }
  1993. static int atl1c_request_irq(struct atl1c_adapter *adapter)
  1994. {
  1995. struct pci_dev *pdev = adapter->pdev;
  1996. struct net_device *netdev = adapter->netdev;
  1997. int flags = 0;
  1998. int err = 0;
  1999. adapter->have_msi = true;
  2000. err = pci_enable_msi(adapter->pdev);
  2001. if (err) {
  2002. if (netif_msg_ifup(adapter))
  2003. dev_err(&pdev->dev,
  2004. "Unable to allocate MSI interrupt Error: %d\n",
  2005. err);
  2006. adapter->have_msi = false;
  2007. }
  2008. if (!adapter->have_msi)
  2009. flags |= IRQF_SHARED;
  2010. err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
  2011. netdev->name, netdev);
  2012. if (err) {
  2013. if (netif_msg_ifup(adapter))
  2014. dev_err(&pdev->dev,
  2015. "Unable to allocate interrupt Error: %d\n",
  2016. err);
  2017. if (adapter->have_msi)
  2018. pci_disable_msi(adapter->pdev);
  2019. return err;
  2020. }
  2021. if (netif_msg_ifup(adapter))
  2022. dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
  2023. return err;
  2024. }
  2025. static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter)
  2026. {
  2027. /* release tx-pending skbs and reset tx/rx ring index */
  2028. atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
  2029. atl1c_clean_tx_ring(adapter, atl1c_trans_high);
  2030. atl1c_clean_rx_ring(adapter);
  2031. }
  2032. static int atl1c_up(struct atl1c_adapter *adapter)
  2033. {
  2034. struct net_device *netdev = adapter->netdev;
  2035. int err;
  2036. netif_carrier_off(netdev);
  2037. err = atl1c_configure(adapter);
  2038. if (unlikely(err))
  2039. goto err_up;
  2040. err = atl1c_request_irq(adapter);
  2041. if (unlikely(err))
  2042. goto err_up;
  2043. atl1c_check_link_status(adapter);
  2044. clear_bit(__AT_DOWN, &adapter->flags);
  2045. napi_enable(&adapter->napi);
  2046. atl1c_irq_enable(adapter);
  2047. netif_start_queue(netdev);
  2048. return err;
  2049. err_up:
  2050. atl1c_clean_rx_ring(adapter);
  2051. return err;
  2052. }
  2053. static void atl1c_down(struct atl1c_adapter *adapter)
  2054. {
  2055. struct net_device *netdev = adapter->netdev;
  2056. atl1c_del_timer(adapter);
  2057. adapter->work_event = 0; /* clear all event */
  2058. /* signal that we're down so the interrupt handler does not
  2059. * reschedule our watchdog timer */
  2060. set_bit(__AT_DOWN, &adapter->flags);
  2061. netif_carrier_off(netdev);
  2062. napi_disable(&adapter->napi);
  2063. atl1c_irq_disable(adapter);
  2064. atl1c_free_irq(adapter);
  2065. /* disable ASPM if device inactive */
  2066. atl1c_disable_l0s_l1(&adapter->hw);
  2067. /* reset MAC to disable all RX/TX */
  2068. atl1c_reset_mac(&adapter->hw);
  2069. msleep(1);
  2070. adapter->link_speed = SPEED_0;
  2071. adapter->link_duplex = -1;
  2072. atl1c_reset_dma_ring(adapter);
  2073. }
  2074. /**
  2075. * atl1c_open - Called when a network interface is made active
  2076. * @netdev: network interface device structure
  2077. *
  2078. * Returns 0 on success, negative value on failure
  2079. *
  2080. * The open entry point is called when a network interface is made
  2081. * active by the system (IFF_UP). At this point all resources needed
  2082. * for transmit and receive operations are allocated, the interrupt
  2083. * handler is registered with the OS, the watchdog timer is started,
  2084. * and the stack is notified that the interface is ready.
  2085. */
  2086. static int atl1c_open(struct net_device *netdev)
  2087. {
  2088. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2089. int err;
  2090. /* disallow open during test */
  2091. if (test_bit(__AT_TESTING, &adapter->flags))
  2092. return -EBUSY;
  2093. /* allocate rx/tx dma buffer & descriptors */
  2094. err = atl1c_setup_ring_resources(adapter);
  2095. if (unlikely(err))
  2096. return err;
  2097. err = atl1c_up(adapter);
  2098. if (unlikely(err))
  2099. goto err_up;
  2100. return 0;
  2101. err_up:
  2102. atl1c_free_irq(adapter);
  2103. atl1c_free_ring_resources(adapter);
  2104. atl1c_reset_mac(&adapter->hw);
  2105. return err;
  2106. }
  2107. /**
  2108. * atl1c_close - Disables a network interface
  2109. * @netdev: network interface device structure
  2110. *
  2111. * Returns 0, this is not allowed to fail
  2112. *
  2113. * The close entry point is called when an interface is de-activated
  2114. * by the OS. The hardware is still under the drivers control, but
  2115. * needs to be disabled. A global MAC reset is issued to stop the
  2116. * hardware, and all transmit and receive resources are freed.
  2117. */
  2118. static int atl1c_close(struct net_device *netdev)
  2119. {
  2120. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2121. WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
  2122. set_bit(__AT_DOWN, &adapter->flags);
  2123. cancel_work_sync(&adapter->common_task);
  2124. atl1c_down(adapter);
  2125. atl1c_free_ring_resources(adapter);
  2126. return 0;
  2127. }
  2128. static int atl1c_suspend(struct device *dev)
  2129. {
  2130. struct pci_dev *pdev = to_pci_dev(dev);
  2131. struct net_device *netdev = pci_get_drvdata(pdev);
  2132. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2133. struct atl1c_hw *hw = &adapter->hw;
  2134. u32 wufc = adapter->wol;
  2135. atl1c_disable_l0s_l1(hw);
  2136. if (netif_running(netdev)) {
  2137. WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
  2138. atl1c_down(adapter);
  2139. }
  2140. netif_device_detach(netdev);
  2141. if (wufc)
  2142. if (atl1c_phy_to_ps_link(hw) != 0)
  2143. dev_dbg(&pdev->dev, "phy power saving failed");
  2144. atl1c_power_saving(hw, wufc);
  2145. return 0;
  2146. }
  2147. #ifdef CONFIG_PM_SLEEP
  2148. static int atl1c_resume(struct device *dev)
  2149. {
  2150. struct pci_dev *pdev = to_pci_dev(dev);
  2151. struct net_device *netdev = pci_get_drvdata(pdev);
  2152. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2153. AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
  2154. atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
  2155. atl1c_phy_reset(&adapter->hw);
  2156. atl1c_reset_mac(&adapter->hw);
  2157. atl1c_phy_init(&adapter->hw);
  2158. #if 0
  2159. AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data);
  2160. pm_data &= ~PM_CTRLSTAT_PME_EN;
  2161. AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data);
  2162. #endif
  2163. netif_device_attach(netdev);
  2164. if (netif_running(netdev))
  2165. atl1c_up(adapter);
  2166. return 0;
  2167. }
  2168. #endif
  2169. static void atl1c_shutdown(struct pci_dev *pdev)
  2170. {
  2171. struct net_device *netdev = pci_get_drvdata(pdev);
  2172. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2173. atl1c_suspend(&pdev->dev);
  2174. pci_wake_from_d3(pdev, adapter->wol);
  2175. pci_set_power_state(pdev, PCI_D3hot);
  2176. }
  2177. static const struct net_device_ops atl1c_netdev_ops = {
  2178. .ndo_open = atl1c_open,
  2179. .ndo_stop = atl1c_close,
  2180. .ndo_validate_addr = eth_validate_addr,
  2181. .ndo_start_xmit = atl1c_xmit_frame,
  2182. .ndo_set_mac_address = atl1c_set_mac_addr,
  2183. .ndo_set_rx_mode = atl1c_set_multi,
  2184. .ndo_change_mtu = atl1c_change_mtu,
  2185. .ndo_fix_features = atl1c_fix_features,
  2186. .ndo_set_features = atl1c_set_features,
  2187. .ndo_do_ioctl = atl1c_ioctl,
  2188. .ndo_tx_timeout = atl1c_tx_timeout,
  2189. .ndo_get_stats = atl1c_get_stats,
  2190. #ifdef CONFIG_NET_POLL_CONTROLLER
  2191. .ndo_poll_controller = atl1c_netpoll,
  2192. #endif
  2193. };
  2194. static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
  2195. {
  2196. SET_NETDEV_DEV(netdev, &pdev->dev);
  2197. pci_set_drvdata(pdev, netdev);
  2198. netdev->netdev_ops = &atl1c_netdev_ops;
  2199. netdev->watchdog_timeo = AT_TX_WATCHDOG;
  2200. atl1c_set_ethtool_ops(netdev);
  2201. /* TODO: add when ready */
  2202. netdev->hw_features = NETIF_F_SG |
  2203. NETIF_F_HW_CSUM |
  2204. NETIF_F_HW_VLAN_CTAG_RX |
  2205. NETIF_F_TSO |
  2206. NETIF_F_TSO6;
  2207. netdev->features = netdev->hw_features |
  2208. NETIF_F_HW_VLAN_CTAG_TX;
  2209. return 0;
  2210. }
  2211. /**
  2212. * atl1c_probe - Device Initialization Routine
  2213. * @pdev: PCI device information struct
  2214. * @ent: entry in atl1c_pci_tbl
  2215. *
  2216. * Returns 0 on success, negative on failure
  2217. *
  2218. * atl1c_probe initializes an adapter identified by a pci_dev structure.
  2219. * The OS initialization, configuring of the adapter private structure,
  2220. * and a hardware reset occur.
  2221. */
  2222. static int atl1c_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  2223. {
  2224. struct net_device *netdev;
  2225. struct atl1c_adapter *adapter;
  2226. static int cards_found;
  2227. int err = 0;
  2228. /* enable device (incl. PCI PM wakeup and hotplug setup) */
  2229. err = pci_enable_device_mem(pdev);
  2230. if (err) {
  2231. dev_err(&pdev->dev, "cannot enable PCI device\n");
  2232. return err;
  2233. }
  2234. /*
  2235. * The atl1c chip can DMA to 64-bit addresses, but it uses a single
  2236. * shared register for the high 32 bits, so only a single, aligned,
  2237. * 4 GB physical address range can be used at a time.
  2238. *
  2239. * Supporting 64-bit DMA on this hardware is more trouble than it's
  2240. * worth. It is far easier to limit to 32-bit DMA than update
  2241. * various kernel subsystems to support the mechanics required by a
  2242. * fixed-high-32-bit system.
  2243. */
  2244. if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
  2245. (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
  2246. dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
  2247. goto err_dma;
  2248. }
  2249. err = pci_request_regions(pdev, atl1c_driver_name);
  2250. if (err) {
  2251. dev_err(&pdev->dev, "cannot obtain PCI resources\n");
  2252. goto err_pci_reg;
  2253. }
  2254. pci_set_master(pdev);
  2255. netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
  2256. if (netdev == NULL) {
  2257. err = -ENOMEM;
  2258. goto err_alloc_etherdev;
  2259. }
  2260. err = atl1c_init_netdev(netdev, pdev);
  2261. if (err) {
  2262. dev_err(&pdev->dev, "init netdevice failed\n");
  2263. goto err_init_netdev;
  2264. }
  2265. adapter = netdev_priv(netdev);
  2266. adapter->bd_number = cards_found;
  2267. adapter->netdev = netdev;
  2268. adapter->pdev = pdev;
  2269. adapter->hw.adapter = adapter;
  2270. adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
  2271. adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  2272. if (!adapter->hw.hw_addr) {
  2273. err = -EIO;
  2274. dev_err(&pdev->dev, "cannot map device registers\n");
  2275. goto err_ioremap;
  2276. }
  2277. /* init mii data */
  2278. adapter->mii.dev = netdev;
  2279. adapter->mii.mdio_read = atl1c_mdio_read;
  2280. adapter->mii.mdio_write = atl1c_mdio_write;
  2281. adapter->mii.phy_id_mask = 0x1f;
  2282. adapter->mii.reg_num_mask = MDIO_CTRL_REG_MASK;
  2283. netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
  2284. setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
  2285. (unsigned long)adapter);
  2286. /* setup the private structure */
  2287. err = atl1c_sw_init(adapter);
  2288. if (err) {
  2289. dev_err(&pdev->dev, "net device private data init failed\n");
  2290. goto err_sw_init;
  2291. }
  2292. atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
  2293. /* Init GPHY as early as possible due to power saving issue */
  2294. atl1c_phy_reset(&adapter->hw);
  2295. err = atl1c_reset_mac(&adapter->hw);
  2296. if (err) {
  2297. err = -EIO;
  2298. goto err_reset;
  2299. }
  2300. /* reset the controller to
  2301. * put the device in a known good starting state */
  2302. err = atl1c_phy_init(&adapter->hw);
  2303. if (err) {
  2304. err = -EIO;
  2305. goto err_reset;
  2306. }
  2307. if (atl1c_read_mac_addr(&adapter->hw)) {
  2308. /* got a random MAC address, set NET_ADDR_RANDOM to netdev */
  2309. netdev->addr_assign_type = NET_ADDR_RANDOM;
  2310. }
  2311. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  2312. if (netif_msg_probe(adapter))
  2313. dev_dbg(&pdev->dev, "mac address : %pM\n",
  2314. adapter->hw.mac_addr);
  2315. atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr);
  2316. INIT_WORK(&adapter->common_task, atl1c_common_task);
  2317. adapter->work_event = 0;
  2318. err = register_netdev(netdev);
  2319. if (err) {
  2320. dev_err(&pdev->dev, "register netdevice failed\n");
  2321. goto err_register;
  2322. }
  2323. if (netif_msg_probe(adapter))
  2324. dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
  2325. cards_found++;
  2326. return 0;
  2327. err_reset:
  2328. err_register:
  2329. err_sw_init:
  2330. iounmap(adapter->hw.hw_addr);
  2331. err_init_netdev:
  2332. err_ioremap:
  2333. free_netdev(netdev);
  2334. err_alloc_etherdev:
  2335. pci_release_regions(pdev);
  2336. err_pci_reg:
  2337. err_dma:
  2338. pci_disable_device(pdev);
  2339. return err;
  2340. }
  2341. /**
  2342. * atl1c_remove - Device Removal Routine
  2343. * @pdev: PCI device information struct
  2344. *
  2345. * atl1c_remove is called by the PCI subsystem to alert the driver
  2346. * that it should release a PCI device. The could be caused by a
  2347. * Hot-Plug event, or because the driver is going to be removed from
  2348. * memory.
  2349. */
  2350. static void atl1c_remove(struct pci_dev *pdev)
  2351. {
  2352. struct net_device *netdev = pci_get_drvdata(pdev);
  2353. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2354. unregister_netdev(netdev);
  2355. /* restore permanent address */
  2356. atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.perm_mac_addr);
  2357. atl1c_phy_disable(&adapter->hw);
  2358. iounmap(adapter->hw.hw_addr);
  2359. pci_release_regions(pdev);
  2360. pci_disable_device(pdev);
  2361. free_netdev(netdev);
  2362. }
  2363. /**
  2364. * atl1c_io_error_detected - called when PCI error is detected
  2365. * @pdev: Pointer to PCI device
  2366. * @state: The current pci connection state
  2367. *
  2368. * This function is called after a PCI bus error affecting
  2369. * this device has been detected.
  2370. */
  2371. static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
  2372. pci_channel_state_t state)
  2373. {
  2374. struct net_device *netdev = pci_get_drvdata(pdev);
  2375. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2376. netif_device_detach(netdev);
  2377. if (state == pci_channel_io_perm_failure)
  2378. return PCI_ERS_RESULT_DISCONNECT;
  2379. if (netif_running(netdev))
  2380. atl1c_down(adapter);
  2381. pci_disable_device(pdev);
  2382. /* Request a slot slot reset. */
  2383. return PCI_ERS_RESULT_NEED_RESET;
  2384. }
  2385. /**
  2386. * atl1c_io_slot_reset - called after the pci bus has been reset.
  2387. * @pdev: Pointer to PCI device
  2388. *
  2389. * Restart the card from scratch, as if from a cold-boot. Implementation
  2390. * resembles the first-half of the e1000_resume routine.
  2391. */
  2392. static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
  2393. {
  2394. struct net_device *netdev = pci_get_drvdata(pdev);
  2395. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2396. if (pci_enable_device(pdev)) {
  2397. if (netif_msg_hw(adapter))
  2398. dev_err(&pdev->dev,
  2399. "Cannot re-enable PCI device after reset\n");
  2400. return PCI_ERS_RESULT_DISCONNECT;
  2401. }
  2402. pci_set_master(pdev);
  2403. pci_enable_wake(pdev, PCI_D3hot, 0);
  2404. pci_enable_wake(pdev, PCI_D3cold, 0);
  2405. atl1c_reset_mac(&adapter->hw);
  2406. return PCI_ERS_RESULT_RECOVERED;
  2407. }
  2408. /**
  2409. * atl1c_io_resume - called when traffic can start flowing again.
  2410. * @pdev: Pointer to PCI device
  2411. *
  2412. * This callback is called when the error recovery driver tells us that
  2413. * its OK to resume normal operation. Implementation resembles the
  2414. * second-half of the atl1c_resume routine.
  2415. */
  2416. static void atl1c_io_resume(struct pci_dev *pdev)
  2417. {
  2418. struct net_device *netdev = pci_get_drvdata(pdev);
  2419. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2420. if (netif_running(netdev)) {
  2421. if (atl1c_up(adapter)) {
  2422. if (netif_msg_hw(adapter))
  2423. dev_err(&pdev->dev,
  2424. "Cannot bring device back up after reset\n");
  2425. return;
  2426. }
  2427. }
  2428. netif_device_attach(netdev);
  2429. }
  2430. static const struct pci_error_handlers atl1c_err_handler = {
  2431. .error_detected = atl1c_io_error_detected,
  2432. .slot_reset = atl1c_io_slot_reset,
  2433. .resume = atl1c_io_resume,
  2434. };
  2435. static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume);
  2436. static struct pci_driver atl1c_driver = {
  2437. .name = atl1c_driver_name,
  2438. .id_table = atl1c_pci_tbl,
  2439. .probe = atl1c_probe,
  2440. .remove = atl1c_remove,
  2441. .shutdown = atl1c_shutdown,
  2442. .err_handler = &atl1c_err_handler,
  2443. .driver.pm = &atl1c_pm_ops,
  2444. };
  2445. module_pci_driver(atl1c_driver);