sirfsoc-onkey.c 4.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164
  1. /*
  2. * Power key driver for SiRF PrimaII
  3. *
  4. * Copyright (c) 2013 Cambridge Silicon Radio Limited, a CSR plc group company.
  5. *
  6. * Licensed under GPLv2 or later.
  7. */
  8. #include <linux/module.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/delay.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/input.h>
  13. #include <linux/rtc/sirfsoc_rtciobrg.h>
  14. #include <linux/of.h>
  15. struct sirfsoc_pwrc_drvdata {
  16. u32 pwrc_base;
  17. struct input_dev *input;
  18. };
  19. #define PWRC_ON_KEY_BIT (1 << 0)
  20. #define PWRC_INT_STATUS 0xc
  21. #define PWRC_INT_MASK 0x10
  22. static irqreturn_t sirfsoc_pwrc_isr(int irq, void *dev_id)
  23. {
  24. struct sirfsoc_pwrc_drvdata *pwrcdrv = dev_id;
  25. u32 int_status;
  26. int_status = sirfsoc_rtc_iobrg_readl(pwrcdrv->pwrc_base +
  27. PWRC_INT_STATUS);
  28. sirfsoc_rtc_iobrg_writel(int_status & ~PWRC_ON_KEY_BIT,
  29. pwrcdrv->pwrc_base + PWRC_INT_STATUS);
  30. /*
  31. * For a typical Linux system, we report KEY_SUSPEND to trigger apm-power.c
  32. * to queue a SUSPEND APM event
  33. */
  34. input_event(pwrcdrv->input, EV_PWR, KEY_SUSPEND, 1);
  35. input_sync(pwrcdrv->input);
  36. /*
  37. * Todo: report KEY_POWER event for Android platforms, Android PowerManager
  38. * will handle the suspend and powerdown/hibernation
  39. */
  40. return IRQ_HANDLED;
  41. }
  42. static const struct of_device_id sirfsoc_pwrc_of_match[] = {
  43. { .compatible = "sirf,prima2-pwrc" },
  44. {},
  45. }
  46. MODULE_DEVICE_TABLE(of, sirfsoc_pwrc_of_match);
  47. static int sirfsoc_pwrc_probe(struct platform_device *pdev)
  48. {
  49. struct device_node *np = pdev->dev.of_node;
  50. struct sirfsoc_pwrc_drvdata *pwrcdrv;
  51. int irq;
  52. int error;
  53. pwrcdrv = devm_kzalloc(&pdev->dev, sizeof(struct sirfsoc_pwrc_drvdata),
  54. GFP_KERNEL);
  55. if (!pwrcdrv) {
  56. dev_info(&pdev->dev, "Not enough memory for the device data\n");
  57. return -ENOMEM;
  58. }
  59. /*
  60. * we can't use of_iomap because pwrc is not mapped in memory,
  61. * the so-called base address is only offset in rtciobrg
  62. */
  63. error = of_property_read_u32(np, "reg", &pwrcdrv->pwrc_base);
  64. if (error) {
  65. dev_err(&pdev->dev,
  66. "unable to find base address of pwrc node in dtb\n");
  67. return error;
  68. }
  69. pwrcdrv->input = devm_input_allocate_device(&pdev->dev);
  70. if (!pwrcdrv->input)
  71. return -ENOMEM;
  72. pwrcdrv->input->name = "sirfsoc pwrckey";
  73. pwrcdrv->input->phys = "pwrc/input0";
  74. pwrcdrv->input->evbit[0] = BIT_MASK(EV_PWR);
  75. irq = platform_get_irq(pdev, 0);
  76. error = devm_request_irq(&pdev->dev, irq,
  77. sirfsoc_pwrc_isr, IRQF_SHARED,
  78. "sirfsoc_pwrc_int", pwrcdrv);
  79. if (error) {
  80. dev_err(&pdev->dev, "unable to claim irq %d, error: %d\n",
  81. irq, error);
  82. return error;
  83. }
  84. sirfsoc_rtc_iobrg_writel(
  85. sirfsoc_rtc_iobrg_readl(pwrcdrv->pwrc_base + PWRC_INT_MASK) |
  86. PWRC_ON_KEY_BIT,
  87. pwrcdrv->pwrc_base + PWRC_INT_MASK);
  88. error = input_register_device(pwrcdrv->input);
  89. if (error) {
  90. dev_err(&pdev->dev,
  91. "unable to register input device, error: %d\n",
  92. error);
  93. return error;
  94. }
  95. platform_set_drvdata(pdev, pwrcdrv);
  96. device_init_wakeup(&pdev->dev, 1);
  97. return 0;
  98. }
  99. static int sirfsoc_pwrc_remove(struct platform_device *pdev)
  100. {
  101. device_init_wakeup(&pdev->dev, 0);
  102. return 0;
  103. }
  104. #ifdef CONFIG_PM_SLEEP
  105. static int pwrc_resume(struct device *dev)
  106. {
  107. struct platform_device *pdev = to_platform_device(dev);
  108. struct sirfsoc_pwrc_drvdata *pwrcdrv = platform_get_drvdata(pdev);
  109. /*
  110. * Do not mask pwrc interrupt as we want pwrc work as a wakeup source
  111. * if users touch X_ONKEY_B, see arch/arm/mach-prima2/pm.c
  112. */
  113. sirfsoc_rtc_iobrg_writel(
  114. sirfsoc_rtc_iobrg_readl(
  115. pwrcdrv->pwrc_base + PWRC_INT_MASK) | PWRC_ON_KEY_BIT,
  116. pwrcdrv->pwrc_base + PWRC_INT_MASK);
  117. return 0;
  118. }
  119. #endif
  120. static SIMPLE_DEV_PM_OPS(sirfsoc_pwrc_pm_ops, NULL, pwrc_resume);
  121. static struct platform_driver sirfsoc_pwrc_driver = {
  122. .probe = sirfsoc_pwrc_probe,
  123. .remove = sirfsoc_pwrc_remove,
  124. .driver = {
  125. .name = "sirfsoc-pwrc",
  126. .owner = THIS_MODULE,
  127. .pm = &sirfsoc_pwrc_pm_ops,
  128. .of_match_table = sirfsoc_pwrc_of_match,
  129. }
  130. };
  131. module_platform_driver(sirfsoc_pwrc_driver);
  132. MODULE_LICENSE("GPLv2");
  133. MODULE_AUTHOR("Binghua Duan <Binghua.Duan@csr.com>, Xianglong Du <Xianglong.Du@csr.com>");
  134. MODULE_DESCRIPTION("CSR Prima2 PWRC Driver");
  135. MODULE_ALIAS("platform:sirfsoc-pwrc");