ti_am335x_adc.c 14 KB

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  1. /*
  2. * TI ADC MFD driver
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation version 2.
  9. *
  10. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11. * kind, whether express or implied; without even the implied warranty
  12. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/kernel.h>
  17. #include <linux/err.h>
  18. #include <linux/module.h>
  19. #include <linux/slab.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/io.h>
  23. #include <linux/iio/iio.h>
  24. #include <linux/of.h>
  25. #include <linux/of_device.h>
  26. #include <linux/iio/machine.h>
  27. #include <linux/iio/driver.h>
  28. #include <linux/mfd/ti_am335x_tscadc.h>
  29. #include <linux/iio/buffer.h>
  30. #include <linux/iio/kfifo_buf.h>
  31. struct tiadc_device {
  32. struct ti_tscadc_dev *mfd_tscadc;
  33. int channels;
  34. u8 channel_line[8];
  35. u8 channel_step[8];
  36. int buffer_en_ch_steps;
  37. u16 data[8];
  38. };
  39. static unsigned int tiadc_readl(struct tiadc_device *adc, unsigned int reg)
  40. {
  41. return readl(adc->mfd_tscadc->tscadc_base + reg);
  42. }
  43. static void tiadc_writel(struct tiadc_device *adc, unsigned int reg,
  44. unsigned int val)
  45. {
  46. writel(val, adc->mfd_tscadc->tscadc_base + reg);
  47. }
  48. static u32 get_adc_step_mask(struct tiadc_device *adc_dev)
  49. {
  50. u32 step_en;
  51. step_en = ((1 << adc_dev->channels) - 1);
  52. step_en <<= TOTAL_STEPS - adc_dev->channels + 1;
  53. return step_en;
  54. }
  55. static u32 get_adc_chan_step_mask(struct tiadc_device *adc_dev,
  56. struct iio_chan_spec const *chan)
  57. {
  58. int i;
  59. for (i = 0; i < ARRAY_SIZE(adc_dev->channel_step); i++) {
  60. if (chan->channel == adc_dev->channel_line[i]) {
  61. u32 step;
  62. step = adc_dev->channel_step[i];
  63. /* +1 for the charger */
  64. return 1 << (step + 1);
  65. }
  66. }
  67. WARN_ON(1);
  68. return 0;
  69. }
  70. static u32 get_adc_step_bit(struct tiadc_device *adc_dev, int chan)
  71. {
  72. return 1 << adc_dev->channel_step[chan];
  73. }
  74. static void tiadc_step_config(struct iio_dev *indio_dev)
  75. {
  76. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  77. unsigned int stepconfig;
  78. int i, steps;
  79. /*
  80. * There are 16 configurable steps and 8 analog input
  81. * lines available which are shared between Touchscreen and ADC.
  82. *
  83. * Steps backwards i.e. from 16 towards 0 are used by ADC
  84. * depending on number of input lines needed.
  85. * Channel would represent which analog input
  86. * needs to be given to ADC to digitalize data.
  87. */
  88. steps = TOTAL_STEPS - adc_dev->channels;
  89. if (iio_buffer_enabled(indio_dev))
  90. stepconfig = STEPCONFIG_AVG_16 | STEPCONFIG_FIFO1
  91. | STEPCONFIG_MODE_SWCNT;
  92. else
  93. stepconfig = STEPCONFIG_AVG_16 | STEPCONFIG_FIFO1;
  94. for (i = 0; i < adc_dev->channels; i++) {
  95. int chan;
  96. chan = adc_dev->channel_line[i];
  97. tiadc_writel(adc_dev, REG_STEPCONFIG(steps),
  98. stepconfig | STEPCONFIG_INP(chan));
  99. tiadc_writel(adc_dev, REG_STEPDELAY(steps),
  100. STEPCONFIG_OPENDLY);
  101. adc_dev->channel_step[i] = steps;
  102. steps++;
  103. }
  104. }
  105. static irqreturn_t tiadc_irq_h(int irq, void *private)
  106. {
  107. struct iio_dev *indio_dev = private;
  108. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  109. unsigned int status, config;
  110. status = tiadc_readl(adc_dev, REG_IRQSTATUS);
  111. /*
  112. * ADC and touchscreen share the IRQ line.
  113. * FIFO0 interrupts are used by TSC. Handle FIFO1 IRQs here only
  114. */
  115. if (status & IRQENB_FIFO1OVRRUN) {
  116. /* FIFO Overrun. Clear flag. Disable/Enable ADC to recover */
  117. config = tiadc_readl(adc_dev, REG_CTRL);
  118. config &= ~(CNTRLREG_TSCSSENB);
  119. tiadc_writel(adc_dev, REG_CTRL, config);
  120. tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1OVRRUN
  121. | IRQENB_FIFO1UNDRFLW | IRQENB_FIFO1THRES);
  122. tiadc_writel(adc_dev, REG_CTRL, (config | CNTRLREG_TSCSSENB));
  123. return IRQ_HANDLED;
  124. } else if (status & IRQENB_FIFO1THRES) {
  125. /* Disable irq and wake worker thread */
  126. tiadc_writel(adc_dev, REG_IRQCLR, IRQENB_FIFO1THRES);
  127. return IRQ_WAKE_THREAD;
  128. }
  129. return IRQ_NONE;
  130. }
  131. static irqreturn_t tiadc_worker_h(int irq, void *private)
  132. {
  133. struct iio_dev *indio_dev = private;
  134. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  135. int i, k, fifo1count, read;
  136. u16 *data = adc_dev->data;
  137. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  138. for (k = 0; k < fifo1count; k = k + i) {
  139. for (i = 0; i < (indio_dev->scan_bytes)/2; i++) {
  140. read = tiadc_readl(adc_dev, REG_FIFO1);
  141. data[i] = read & FIFOREAD_DATA_MASK;
  142. }
  143. iio_push_to_buffers(indio_dev, (u8 *) data);
  144. }
  145. tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES);
  146. tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FIFO1THRES);
  147. return IRQ_HANDLED;
  148. }
  149. static int tiadc_buffer_preenable(struct iio_dev *indio_dev)
  150. {
  151. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  152. int i, fifo1count, read;
  153. tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
  154. IRQENB_FIFO1OVRRUN |
  155. IRQENB_FIFO1UNDRFLW));
  156. /* Flush FIFO. Needed in corner cases in simultaneous tsc/adc use */
  157. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  158. for (i = 0; i < fifo1count; i++)
  159. read = tiadc_readl(adc_dev, REG_FIFO1);
  160. return 0;
  161. }
  162. static int tiadc_buffer_postenable(struct iio_dev *indio_dev)
  163. {
  164. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  165. struct iio_buffer *buffer = indio_dev->buffer;
  166. unsigned int enb = 0;
  167. u8 bit;
  168. tiadc_step_config(indio_dev);
  169. for_each_set_bit(bit, buffer->scan_mask, adc_dev->channels)
  170. enb |= (get_adc_step_bit(adc_dev, bit) << 1);
  171. adc_dev->buffer_en_ch_steps = enb;
  172. am335x_tsc_se_set_cache(adc_dev->mfd_tscadc, enb);
  173. tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES
  174. | IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW);
  175. tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FIFO1THRES
  176. | IRQENB_FIFO1OVRRUN);
  177. return 0;
  178. }
  179. static int tiadc_buffer_predisable(struct iio_dev *indio_dev)
  180. {
  181. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  182. int fifo1count, i, read;
  183. tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
  184. IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW));
  185. am335x_tsc_se_clr(adc_dev->mfd_tscadc, adc_dev->buffer_en_ch_steps);
  186. adc_dev->buffer_en_ch_steps = 0;
  187. /* Flush FIFO of leftover data in the time it takes to disable adc */
  188. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  189. for (i = 0; i < fifo1count; i++)
  190. read = tiadc_readl(adc_dev, REG_FIFO1);
  191. return 0;
  192. }
  193. static int tiadc_buffer_postdisable(struct iio_dev *indio_dev)
  194. {
  195. tiadc_step_config(indio_dev);
  196. return 0;
  197. }
  198. static const struct iio_buffer_setup_ops tiadc_buffer_setup_ops = {
  199. .preenable = &tiadc_buffer_preenable,
  200. .postenable = &tiadc_buffer_postenable,
  201. .predisable = &tiadc_buffer_predisable,
  202. .postdisable = &tiadc_buffer_postdisable,
  203. };
  204. static int tiadc_iio_buffered_hardware_setup(struct iio_dev *indio_dev,
  205. irqreturn_t (*pollfunc_bh)(int irq, void *p),
  206. irqreturn_t (*pollfunc_th)(int irq, void *p),
  207. int irq,
  208. unsigned long flags,
  209. const struct iio_buffer_setup_ops *setup_ops)
  210. {
  211. struct iio_buffer *buffer;
  212. int ret;
  213. buffer = iio_kfifo_allocate(indio_dev);
  214. if (!buffer)
  215. return -ENOMEM;
  216. iio_device_attach_buffer(indio_dev, buffer);
  217. ret = request_threaded_irq(irq, pollfunc_th, pollfunc_bh,
  218. flags, indio_dev->name, indio_dev);
  219. if (ret)
  220. goto error_kfifo_free;
  221. indio_dev->setup_ops = setup_ops;
  222. indio_dev->modes |= INDIO_BUFFER_HARDWARE;
  223. ret = iio_buffer_register(indio_dev,
  224. indio_dev->channels,
  225. indio_dev->num_channels);
  226. if (ret)
  227. goto error_free_irq;
  228. return 0;
  229. error_free_irq:
  230. free_irq(irq, indio_dev);
  231. error_kfifo_free:
  232. iio_kfifo_free(indio_dev->buffer);
  233. return ret;
  234. }
  235. static void tiadc_iio_buffered_hardware_remove(struct iio_dev *indio_dev)
  236. {
  237. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  238. free_irq(adc_dev->mfd_tscadc->irq, indio_dev);
  239. iio_kfifo_free(indio_dev->buffer);
  240. iio_buffer_unregister(indio_dev);
  241. }
  242. static const char * const chan_name_ain[] = {
  243. "AIN0",
  244. "AIN1",
  245. "AIN2",
  246. "AIN3",
  247. "AIN4",
  248. "AIN5",
  249. "AIN6",
  250. "AIN7",
  251. };
  252. static int tiadc_channel_init(struct iio_dev *indio_dev, int channels)
  253. {
  254. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  255. struct iio_chan_spec *chan_array;
  256. struct iio_chan_spec *chan;
  257. int i;
  258. indio_dev->num_channels = channels;
  259. chan_array = kcalloc(channels,
  260. sizeof(struct iio_chan_spec), GFP_KERNEL);
  261. if (chan_array == NULL)
  262. return -ENOMEM;
  263. chan = chan_array;
  264. for (i = 0; i < channels; i++, chan++) {
  265. chan->type = IIO_VOLTAGE;
  266. chan->indexed = 1;
  267. chan->channel = adc_dev->channel_line[i];
  268. chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
  269. chan->datasheet_name = chan_name_ain[chan->channel];
  270. chan->scan_index = i;
  271. chan->scan_type.sign = 'u';
  272. chan->scan_type.realbits = 12;
  273. chan->scan_type.storagebits = 16;
  274. }
  275. indio_dev->channels = chan_array;
  276. return 0;
  277. }
  278. static void tiadc_channels_remove(struct iio_dev *indio_dev)
  279. {
  280. kfree(indio_dev->channels);
  281. }
  282. static int tiadc_read_raw(struct iio_dev *indio_dev,
  283. struct iio_chan_spec const *chan,
  284. int *val, int *val2, long mask)
  285. {
  286. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  287. int i, map_val;
  288. unsigned int fifo1count, read, stepid;
  289. bool found = false;
  290. u32 step_en;
  291. unsigned long timeout;
  292. if (iio_buffer_enabled(indio_dev))
  293. return -EBUSY;
  294. step_en = get_adc_chan_step_mask(adc_dev, chan);
  295. if (!step_en)
  296. return -EINVAL;
  297. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  298. while (fifo1count--)
  299. tiadc_readl(adc_dev, REG_FIFO1);
  300. am335x_tsc_se_set_once(adc_dev->mfd_tscadc, step_en);
  301. timeout = jiffies + usecs_to_jiffies
  302. (IDLE_TIMEOUT * adc_dev->channels);
  303. /* Wait for Fifo threshold interrupt */
  304. while (1) {
  305. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  306. if (fifo1count)
  307. break;
  308. if (time_after(jiffies, timeout)) {
  309. am335x_tsc_se_adc_done(adc_dev->mfd_tscadc);
  310. return -EAGAIN;
  311. }
  312. }
  313. map_val = chan->channel + TOTAL_CHANNELS;
  314. /*
  315. * We check the complete FIFO. We programmed just one entry but in case
  316. * something went wrong we left empty handed (-EAGAIN previously) and
  317. * then the value apeared somehow in the FIFO we would have two entries.
  318. * Therefore we read every item and keep only the latest version of the
  319. * requested channel.
  320. */
  321. for (i = 0; i < fifo1count; i++) {
  322. read = tiadc_readl(adc_dev, REG_FIFO1);
  323. stepid = read & FIFOREAD_CHNLID_MASK;
  324. stepid = stepid >> 0x10;
  325. if (stepid == map_val) {
  326. read = read & FIFOREAD_DATA_MASK;
  327. found = true;
  328. *val = (u16) read;
  329. }
  330. }
  331. am335x_tsc_se_adc_done(adc_dev->mfd_tscadc);
  332. if (found == false)
  333. return -EBUSY;
  334. return IIO_VAL_INT;
  335. }
  336. static const struct iio_info tiadc_info = {
  337. .read_raw = &tiadc_read_raw,
  338. .driver_module = THIS_MODULE,
  339. };
  340. static int tiadc_probe(struct platform_device *pdev)
  341. {
  342. struct iio_dev *indio_dev;
  343. struct tiadc_device *adc_dev;
  344. struct device_node *node = pdev->dev.of_node;
  345. struct property *prop;
  346. const __be32 *cur;
  347. int err;
  348. u32 val;
  349. int channels = 0;
  350. if (!node) {
  351. dev_err(&pdev->dev, "Could not find valid DT data.\n");
  352. return -EINVAL;
  353. }
  354. indio_dev = devm_iio_device_alloc(&pdev->dev,
  355. sizeof(struct tiadc_device));
  356. if (indio_dev == NULL) {
  357. dev_err(&pdev->dev, "failed to allocate iio device\n");
  358. return -ENOMEM;
  359. }
  360. adc_dev = iio_priv(indio_dev);
  361. adc_dev->mfd_tscadc = ti_tscadc_dev_get(pdev);
  362. of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
  363. adc_dev->channel_line[channels] = val;
  364. channels++;
  365. }
  366. adc_dev->channels = channels;
  367. indio_dev->dev.parent = &pdev->dev;
  368. indio_dev->name = dev_name(&pdev->dev);
  369. indio_dev->modes = INDIO_DIRECT_MODE;
  370. indio_dev->info = &tiadc_info;
  371. tiadc_step_config(indio_dev);
  372. tiadc_writel(adc_dev, REG_FIFO1THR, FIFO1_THRESHOLD);
  373. err = tiadc_channel_init(indio_dev, adc_dev->channels);
  374. if (err < 0)
  375. return err;
  376. err = tiadc_iio_buffered_hardware_setup(indio_dev,
  377. &tiadc_worker_h,
  378. &tiadc_irq_h,
  379. adc_dev->mfd_tscadc->irq,
  380. IRQF_SHARED,
  381. &tiadc_buffer_setup_ops);
  382. if (err)
  383. goto err_free_channels;
  384. err = iio_device_register(indio_dev);
  385. if (err)
  386. goto err_buffer_unregister;
  387. platform_set_drvdata(pdev, indio_dev);
  388. return 0;
  389. err_buffer_unregister:
  390. tiadc_iio_buffered_hardware_remove(indio_dev);
  391. err_free_channels:
  392. tiadc_channels_remove(indio_dev);
  393. return err;
  394. }
  395. static int tiadc_remove(struct platform_device *pdev)
  396. {
  397. struct iio_dev *indio_dev = platform_get_drvdata(pdev);
  398. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  399. u32 step_en;
  400. iio_device_unregister(indio_dev);
  401. tiadc_iio_buffered_hardware_remove(indio_dev);
  402. tiadc_channels_remove(indio_dev);
  403. step_en = get_adc_step_mask(adc_dev);
  404. am335x_tsc_se_clr(adc_dev->mfd_tscadc, step_en);
  405. return 0;
  406. }
  407. #ifdef CONFIG_PM
  408. static int tiadc_suspend(struct device *dev)
  409. {
  410. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  411. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  412. struct ti_tscadc_dev *tscadc_dev;
  413. unsigned int idle;
  414. tscadc_dev = ti_tscadc_dev_get(to_platform_device(dev));
  415. if (!device_may_wakeup(tscadc_dev->dev)) {
  416. idle = tiadc_readl(adc_dev, REG_CTRL);
  417. idle &= ~(CNTRLREG_TSCSSENB);
  418. tiadc_writel(adc_dev, REG_CTRL, (idle |
  419. CNTRLREG_POWERDOWN));
  420. }
  421. return 0;
  422. }
  423. static int tiadc_resume(struct device *dev)
  424. {
  425. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  426. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  427. unsigned int restore;
  428. /* Make sure ADC is powered up */
  429. restore = tiadc_readl(adc_dev, REG_CTRL);
  430. restore &= ~(CNTRLREG_POWERDOWN);
  431. tiadc_writel(adc_dev, REG_CTRL, restore);
  432. tiadc_step_config(indio_dev);
  433. am335x_tsc_se_set_cache(adc_dev->mfd_tscadc,
  434. adc_dev->buffer_en_ch_steps);
  435. return 0;
  436. }
  437. static const struct dev_pm_ops tiadc_pm_ops = {
  438. .suspend = tiadc_suspend,
  439. .resume = tiadc_resume,
  440. };
  441. #define TIADC_PM_OPS (&tiadc_pm_ops)
  442. #else
  443. #define TIADC_PM_OPS NULL
  444. #endif
  445. static const struct of_device_id ti_adc_dt_ids[] = {
  446. { .compatible = "ti,am3359-adc", },
  447. { }
  448. };
  449. MODULE_DEVICE_TABLE(of, ti_adc_dt_ids);
  450. static struct platform_driver tiadc_driver = {
  451. .driver = {
  452. .name = "TI-am335x-adc",
  453. .owner = THIS_MODULE,
  454. .pm = TIADC_PM_OPS,
  455. .of_match_table = ti_adc_dt_ids,
  456. },
  457. .probe = tiadc_probe,
  458. .remove = tiadc_remove,
  459. };
  460. module_platform_driver(tiadc_driver);
  461. MODULE_DESCRIPTION("TI ADC controller driver");
  462. MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
  463. MODULE_LICENSE("GPL");