vmwgfx_kms.c 55 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #include "vmwgfx_kms.h"
  28. /* Might need a hrtimer here? */
  29. #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
  30. struct vmw_clip_rect {
  31. int x1, x2, y1, y2;
  32. };
  33. /**
  34. * Clip @num_rects number of @rects against @clip storing the
  35. * results in @out_rects and the number of passed rects in @out_num.
  36. */
  37. static void vmw_clip_cliprects(struct drm_clip_rect *rects,
  38. int num_rects,
  39. struct vmw_clip_rect clip,
  40. SVGASignedRect *out_rects,
  41. int *out_num)
  42. {
  43. int i, k;
  44. for (i = 0, k = 0; i < num_rects; i++) {
  45. int x1 = max_t(int, clip.x1, rects[i].x1);
  46. int y1 = max_t(int, clip.y1, rects[i].y1);
  47. int x2 = min_t(int, clip.x2, rects[i].x2);
  48. int y2 = min_t(int, clip.y2, rects[i].y2);
  49. if (x1 >= x2)
  50. continue;
  51. if (y1 >= y2)
  52. continue;
  53. out_rects[k].left = x1;
  54. out_rects[k].top = y1;
  55. out_rects[k].right = x2;
  56. out_rects[k].bottom = y2;
  57. k++;
  58. }
  59. *out_num = k;
  60. }
  61. void vmw_display_unit_cleanup(struct vmw_display_unit *du)
  62. {
  63. if (du->cursor_surface)
  64. vmw_surface_unreference(&du->cursor_surface);
  65. if (du->cursor_dmabuf)
  66. vmw_dmabuf_unreference(&du->cursor_dmabuf);
  67. drm_sysfs_connector_remove(&du->connector);
  68. drm_crtc_cleanup(&du->crtc);
  69. drm_encoder_cleanup(&du->encoder);
  70. drm_connector_cleanup(&du->connector);
  71. }
  72. /*
  73. * Display Unit Cursor functions
  74. */
  75. int vmw_cursor_update_image(struct vmw_private *dev_priv,
  76. u32 *image, u32 width, u32 height,
  77. u32 hotspotX, u32 hotspotY)
  78. {
  79. struct {
  80. u32 cmd;
  81. SVGAFifoCmdDefineAlphaCursor cursor;
  82. } *cmd;
  83. u32 image_size = width * height * 4;
  84. u32 cmd_size = sizeof(*cmd) + image_size;
  85. if (!image)
  86. return -EINVAL;
  87. cmd = vmw_fifo_reserve(dev_priv, cmd_size);
  88. if (unlikely(cmd == NULL)) {
  89. DRM_ERROR("Fifo reserve failed.\n");
  90. return -ENOMEM;
  91. }
  92. memset(cmd, 0, sizeof(*cmd));
  93. memcpy(&cmd[1], image, image_size);
  94. cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
  95. cmd->cursor.id = cpu_to_le32(0);
  96. cmd->cursor.width = cpu_to_le32(width);
  97. cmd->cursor.height = cpu_to_le32(height);
  98. cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
  99. cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
  100. vmw_fifo_commit(dev_priv, cmd_size);
  101. return 0;
  102. }
  103. int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
  104. struct vmw_dma_buffer *dmabuf,
  105. u32 width, u32 height,
  106. u32 hotspotX, u32 hotspotY)
  107. {
  108. struct ttm_bo_kmap_obj map;
  109. unsigned long kmap_offset;
  110. unsigned long kmap_num;
  111. void *virtual;
  112. bool dummy;
  113. int ret;
  114. kmap_offset = 0;
  115. kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
  116. ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
  117. if (unlikely(ret != 0)) {
  118. DRM_ERROR("reserve failed\n");
  119. return -EINVAL;
  120. }
  121. ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
  122. if (unlikely(ret != 0))
  123. goto err_unreserve;
  124. virtual = ttm_kmap_obj_virtual(&map, &dummy);
  125. ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
  126. hotspotX, hotspotY);
  127. ttm_bo_kunmap(&map);
  128. err_unreserve:
  129. ttm_bo_unreserve(&dmabuf->base);
  130. return ret;
  131. }
  132. void vmw_cursor_update_position(struct vmw_private *dev_priv,
  133. bool show, int x, int y)
  134. {
  135. __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
  136. uint32_t count;
  137. iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
  138. iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
  139. iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
  140. count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  141. iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  142. }
  143. int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
  144. uint32_t handle, uint32_t width, uint32_t height)
  145. {
  146. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  147. struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
  148. struct vmw_surface *surface = NULL;
  149. struct vmw_dma_buffer *dmabuf = NULL;
  150. int ret;
  151. /*
  152. * FIXME: Unclear whether there's any global state touched by the
  153. * cursor_set function, especially vmw_cursor_update_position looks
  154. * suspicious. For now take the easy route and reacquire all locks. We
  155. * can do this since the caller in the drm core doesn't check anything
  156. * which is protected by any looks.
  157. */
  158. mutex_unlock(&crtc->mutex);
  159. drm_modeset_lock_all(dev_priv->dev);
  160. /* A lot of the code assumes this */
  161. if (handle && (width != 64 || height != 64)) {
  162. ret = -EINVAL;
  163. goto out;
  164. }
  165. if (handle) {
  166. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  167. ret = vmw_user_lookup_handle(dev_priv, tfile,
  168. handle, &surface, &dmabuf);
  169. if (ret) {
  170. DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
  171. ret = -EINVAL;
  172. goto out;
  173. }
  174. }
  175. /* need to do this before taking down old image */
  176. if (surface && !surface->snooper.image) {
  177. DRM_ERROR("surface not suitable for cursor\n");
  178. vmw_surface_unreference(&surface);
  179. ret = -EINVAL;
  180. goto out;
  181. }
  182. /* takedown old cursor */
  183. if (du->cursor_surface) {
  184. du->cursor_surface->snooper.crtc = NULL;
  185. vmw_surface_unreference(&du->cursor_surface);
  186. }
  187. if (du->cursor_dmabuf)
  188. vmw_dmabuf_unreference(&du->cursor_dmabuf);
  189. /* setup new image */
  190. if (surface) {
  191. /* vmw_user_surface_lookup takes one reference */
  192. du->cursor_surface = surface;
  193. du->cursor_surface->snooper.crtc = crtc;
  194. du->cursor_age = du->cursor_surface->snooper.age;
  195. vmw_cursor_update_image(dev_priv, surface->snooper.image,
  196. 64, 64, du->hotspot_x, du->hotspot_y);
  197. } else if (dmabuf) {
  198. /* vmw_user_surface_lookup takes one reference */
  199. du->cursor_dmabuf = dmabuf;
  200. ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
  201. du->hotspot_x, du->hotspot_y);
  202. } else {
  203. vmw_cursor_update_position(dev_priv, false, 0, 0);
  204. ret = 0;
  205. goto out;
  206. }
  207. vmw_cursor_update_position(dev_priv, true,
  208. du->cursor_x + du->hotspot_x,
  209. du->cursor_y + du->hotspot_y);
  210. ret = 0;
  211. out:
  212. drm_modeset_unlock_all(dev_priv->dev);
  213. mutex_lock(&crtc->mutex);
  214. return ret;
  215. }
  216. int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
  217. {
  218. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  219. struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
  220. bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
  221. du->cursor_x = x + crtc->x;
  222. du->cursor_y = y + crtc->y;
  223. /*
  224. * FIXME: Unclear whether there's any global state touched by the
  225. * cursor_set function, especially vmw_cursor_update_position looks
  226. * suspicious. For now take the easy route and reacquire all locks. We
  227. * can do this since the caller in the drm core doesn't check anything
  228. * which is protected by any looks.
  229. */
  230. mutex_unlock(&crtc->mutex);
  231. drm_modeset_lock_all(dev_priv->dev);
  232. vmw_cursor_update_position(dev_priv, shown,
  233. du->cursor_x + du->hotspot_x,
  234. du->cursor_y + du->hotspot_y);
  235. drm_modeset_unlock_all(dev_priv->dev);
  236. mutex_lock(&crtc->mutex);
  237. return 0;
  238. }
  239. void vmw_kms_cursor_snoop(struct vmw_surface *srf,
  240. struct ttm_object_file *tfile,
  241. struct ttm_buffer_object *bo,
  242. SVGA3dCmdHeader *header)
  243. {
  244. struct ttm_bo_kmap_obj map;
  245. unsigned long kmap_offset;
  246. unsigned long kmap_num;
  247. SVGA3dCopyBox *box;
  248. unsigned box_count;
  249. void *virtual;
  250. bool dummy;
  251. struct vmw_dma_cmd {
  252. SVGA3dCmdHeader header;
  253. SVGA3dCmdSurfaceDMA dma;
  254. } *cmd;
  255. int i, ret;
  256. cmd = container_of(header, struct vmw_dma_cmd, header);
  257. /* No snooper installed */
  258. if (!srf->snooper.image)
  259. return;
  260. if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
  261. DRM_ERROR("face and mipmap for cursors should never != 0\n");
  262. return;
  263. }
  264. if (cmd->header.size < 64) {
  265. DRM_ERROR("at least one full copy box must be given\n");
  266. return;
  267. }
  268. box = (SVGA3dCopyBox *)&cmd[1];
  269. box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
  270. sizeof(SVGA3dCopyBox);
  271. if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
  272. box->x != 0 || box->y != 0 || box->z != 0 ||
  273. box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
  274. box->d != 1 || box_count != 1) {
  275. /* TODO handle none page aligned offsets */
  276. /* TODO handle more dst & src != 0 */
  277. /* TODO handle more then one copy */
  278. DRM_ERROR("Cant snoop dma request for cursor!\n");
  279. DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
  280. box->srcx, box->srcy, box->srcz,
  281. box->x, box->y, box->z,
  282. box->w, box->h, box->d, box_count,
  283. cmd->dma.guest.ptr.offset);
  284. return;
  285. }
  286. kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
  287. kmap_num = (64*64*4) >> PAGE_SHIFT;
  288. ret = ttm_bo_reserve(bo, true, false, false, 0);
  289. if (unlikely(ret != 0)) {
  290. DRM_ERROR("reserve failed\n");
  291. return;
  292. }
  293. ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
  294. if (unlikely(ret != 0))
  295. goto err_unreserve;
  296. virtual = ttm_kmap_obj_virtual(&map, &dummy);
  297. if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
  298. memcpy(srf->snooper.image, virtual, 64*64*4);
  299. } else {
  300. /* Image is unsigned pointer. */
  301. for (i = 0; i < box->h; i++)
  302. memcpy(srf->snooper.image + i * 64,
  303. virtual + i * cmd->dma.guest.pitch,
  304. box->w * 4);
  305. }
  306. srf->snooper.age++;
  307. /* we can't call this function from this function since execbuf has
  308. * reserved fifo space.
  309. *
  310. * if (srf->snooper.crtc)
  311. * vmw_ldu_crtc_cursor_update_image(dev_priv,
  312. * srf->snooper.image, 64, 64,
  313. * du->hotspot_x, du->hotspot_y);
  314. */
  315. ttm_bo_kunmap(&map);
  316. err_unreserve:
  317. ttm_bo_unreserve(bo);
  318. }
  319. void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
  320. {
  321. struct drm_device *dev = dev_priv->dev;
  322. struct vmw_display_unit *du;
  323. struct drm_crtc *crtc;
  324. mutex_lock(&dev->mode_config.mutex);
  325. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  326. du = vmw_crtc_to_du(crtc);
  327. if (!du->cursor_surface ||
  328. du->cursor_age == du->cursor_surface->snooper.age)
  329. continue;
  330. du->cursor_age = du->cursor_surface->snooper.age;
  331. vmw_cursor_update_image(dev_priv,
  332. du->cursor_surface->snooper.image,
  333. 64, 64, du->hotspot_x, du->hotspot_y);
  334. }
  335. mutex_unlock(&dev->mode_config.mutex);
  336. }
  337. /*
  338. * Generic framebuffer code
  339. */
  340. /*
  341. * Surface framebuffer code
  342. */
  343. #define vmw_framebuffer_to_vfbs(x) \
  344. container_of(x, struct vmw_framebuffer_surface, base.base)
  345. struct vmw_framebuffer_surface {
  346. struct vmw_framebuffer base;
  347. struct vmw_surface *surface;
  348. struct vmw_dma_buffer *buffer;
  349. struct list_head head;
  350. struct drm_master *master;
  351. };
  352. static void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
  353. {
  354. struct vmw_framebuffer_surface *vfbs =
  355. vmw_framebuffer_to_vfbs(framebuffer);
  356. struct vmw_master *vmaster = vmw_master(vfbs->master);
  357. mutex_lock(&vmaster->fb_surf_mutex);
  358. list_del(&vfbs->head);
  359. mutex_unlock(&vmaster->fb_surf_mutex);
  360. drm_master_put(&vfbs->master);
  361. drm_framebuffer_cleanup(framebuffer);
  362. vmw_surface_unreference(&vfbs->surface);
  363. ttm_base_object_unref(&vfbs->base.user_obj);
  364. kfree(vfbs);
  365. }
  366. static int do_surface_dirty_sou(struct vmw_private *dev_priv,
  367. struct drm_file *file_priv,
  368. struct vmw_framebuffer *framebuffer,
  369. unsigned flags, unsigned color,
  370. struct drm_clip_rect *clips,
  371. unsigned num_clips, int inc,
  372. struct vmw_fence_obj **out_fence)
  373. {
  374. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  375. struct drm_clip_rect *clips_ptr;
  376. struct drm_clip_rect *tmp;
  377. struct drm_crtc *crtc;
  378. size_t fifo_size;
  379. int i, num_units;
  380. int ret = 0; /* silence warning */
  381. int left, right, top, bottom;
  382. struct {
  383. SVGA3dCmdHeader header;
  384. SVGA3dCmdBlitSurfaceToScreen body;
  385. } *cmd;
  386. SVGASignedRect *blits;
  387. num_units = 0;
  388. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
  389. head) {
  390. if (crtc->fb != &framebuffer->base)
  391. continue;
  392. units[num_units++] = vmw_crtc_to_du(crtc);
  393. }
  394. BUG_ON(!clips || !num_clips);
  395. tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
  396. if (unlikely(tmp == NULL)) {
  397. DRM_ERROR("Temporary cliprect memory alloc failed.\n");
  398. return -ENOMEM;
  399. }
  400. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
  401. cmd = kzalloc(fifo_size, GFP_KERNEL);
  402. if (unlikely(cmd == NULL)) {
  403. DRM_ERROR("Temporary fifo memory alloc failed.\n");
  404. ret = -ENOMEM;
  405. goto out_free_tmp;
  406. }
  407. /* setup blits pointer */
  408. blits = (SVGASignedRect *)&cmd[1];
  409. /* initial clip region */
  410. left = clips->x1;
  411. right = clips->x2;
  412. top = clips->y1;
  413. bottom = clips->y2;
  414. /* skip the first clip rect */
  415. for (i = 1, clips_ptr = clips + inc;
  416. i < num_clips; i++, clips_ptr += inc) {
  417. left = min_t(int, left, (int)clips_ptr->x1);
  418. right = max_t(int, right, (int)clips_ptr->x2);
  419. top = min_t(int, top, (int)clips_ptr->y1);
  420. bottom = max_t(int, bottom, (int)clips_ptr->y2);
  421. }
  422. /* only need to do this once */
  423. cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
  424. cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
  425. cmd->body.srcRect.left = left;
  426. cmd->body.srcRect.right = right;
  427. cmd->body.srcRect.top = top;
  428. cmd->body.srcRect.bottom = bottom;
  429. clips_ptr = clips;
  430. for (i = 0; i < num_clips; i++, clips_ptr += inc) {
  431. tmp[i].x1 = clips_ptr->x1 - left;
  432. tmp[i].x2 = clips_ptr->x2 - left;
  433. tmp[i].y1 = clips_ptr->y1 - top;
  434. tmp[i].y2 = clips_ptr->y2 - top;
  435. }
  436. /* do per unit writing, reuse fifo for each */
  437. for (i = 0; i < num_units; i++) {
  438. struct vmw_display_unit *unit = units[i];
  439. struct vmw_clip_rect clip;
  440. int num;
  441. clip.x1 = left - unit->crtc.x;
  442. clip.y1 = top - unit->crtc.y;
  443. clip.x2 = right - unit->crtc.x;
  444. clip.y2 = bottom - unit->crtc.y;
  445. /* skip any crtcs that misses the clip region */
  446. if (clip.x1 >= unit->crtc.mode.hdisplay ||
  447. clip.y1 >= unit->crtc.mode.vdisplay ||
  448. clip.x2 <= 0 || clip.y2 <= 0)
  449. continue;
  450. /*
  451. * In order for the clip rects to be correctly scaled
  452. * the src and dest rects needs to be the same size.
  453. */
  454. cmd->body.destRect.left = clip.x1;
  455. cmd->body.destRect.right = clip.x2;
  456. cmd->body.destRect.top = clip.y1;
  457. cmd->body.destRect.bottom = clip.y2;
  458. /* create a clip rect of the crtc in dest coords */
  459. clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
  460. clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
  461. clip.x1 = 0 - clip.x1;
  462. clip.y1 = 0 - clip.y1;
  463. /* need to reset sid as it is changed by execbuf */
  464. cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle);
  465. cmd->body.destScreenId = unit->unit;
  466. /* clip and write blits to cmd stream */
  467. vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
  468. /* if no cliprects hit skip this */
  469. if (num == 0)
  470. continue;
  471. /* only return the last fence */
  472. if (out_fence && *out_fence)
  473. vmw_fence_obj_unreference(out_fence);
  474. /* recalculate package length */
  475. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
  476. cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
  477. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  478. fifo_size, 0, NULL, out_fence);
  479. if (unlikely(ret != 0))
  480. break;
  481. }
  482. kfree(cmd);
  483. out_free_tmp:
  484. kfree(tmp);
  485. return ret;
  486. }
  487. static int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
  488. struct drm_file *file_priv,
  489. unsigned flags, unsigned color,
  490. struct drm_clip_rect *clips,
  491. unsigned num_clips)
  492. {
  493. struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
  494. struct vmw_master *vmaster = vmw_master(file_priv->master);
  495. struct vmw_framebuffer_surface *vfbs =
  496. vmw_framebuffer_to_vfbs(framebuffer);
  497. struct drm_clip_rect norect;
  498. int ret, inc = 1;
  499. if (unlikely(vfbs->master != file_priv->master))
  500. return -EINVAL;
  501. /* Require ScreenObject support for 3D */
  502. if (!dev_priv->sou_priv)
  503. return -EINVAL;
  504. drm_modeset_lock_all(dev_priv->dev);
  505. ret = ttm_read_lock(&vmaster->lock, true);
  506. if (unlikely(ret != 0)) {
  507. drm_modeset_unlock_all(dev_priv->dev);
  508. return ret;
  509. }
  510. if (!num_clips) {
  511. num_clips = 1;
  512. clips = &norect;
  513. norect.x1 = norect.y1 = 0;
  514. norect.x2 = framebuffer->width;
  515. norect.y2 = framebuffer->height;
  516. } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
  517. num_clips /= 2;
  518. inc = 2; /* skip source rects */
  519. }
  520. ret = do_surface_dirty_sou(dev_priv, file_priv, &vfbs->base,
  521. flags, color,
  522. clips, num_clips, inc, NULL);
  523. ttm_read_unlock(&vmaster->lock);
  524. drm_modeset_unlock_all(dev_priv->dev);
  525. return 0;
  526. }
  527. static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
  528. .destroy = vmw_framebuffer_surface_destroy,
  529. .dirty = vmw_framebuffer_surface_dirty,
  530. };
  531. static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
  532. struct drm_file *file_priv,
  533. struct vmw_surface *surface,
  534. struct vmw_framebuffer **out,
  535. const struct drm_mode_fb_cmd
  536. *mode_cmd)
  537. {
  538. struct drm_device *dev = dev_priv->dev;
  539. struct vmw_framebuffer_surface *vfbs;
  540. enum SVGA3dSurfaceFormat format;
  541. struct vmw_master *vmaster = vmw_master(file_priv->master);
  542. int ret;
  543. /* 3D is only supported on HWv8 hosts which supports screen objects */
  544. if (!dev_priv->sou_priv)
  545. return -ENOSYS;
  546. /*
  547. * Sanity checks.
  548. */
  549. /* Surface must be marked as a scanout. */
  550. if (unlikely(!surface->scanout))
  551. return -EINVAL;
  552. if (unlikely(surface->mip_levels[0] != 1 ||
  553. surface->num_sizes != 1 ||
  554. surface->base_size.width < mode_cmd->width ||
  555. surface->base_size.height < mode_cmd->height ||
  556. surface->base_size.depth != 1)) {
  557. DRM_ERROR("Incompatible surface dimensions "
  558. "for requested mode.\n");
  559. return -EINVAL;
  560. }
  561. switch (mode_cmd->depth) {
  562. case 32:
  563. format = SVGA3D_A8R8G8B8;
  564. break;
  565. case 24:
  566. format = SVGA3D_X8R8G8B8;
  567. break;
  568. case 16:
  569. format = SVGA3D_R5G6B5;
  570. break;
  571. case 15:
  572. format = SVGA3D_A1R5G5B5;
  573. break;
  574. case 8:
  575. format = SVGA3D_LUMINANCE8;
  576. break;
  577. default:
  578. DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
  579. return -EINVAL;
  580. }
  581. if (unlikely(format != surface->format)) {
  582. DRM_ERROR("Invalid surface format for requested mode.\n");
  583. return -EINVAL;
  584. }
  585. vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
  586. if (!vfbs) {
  587. ret = -ENOMEM;
  588. goto out_err1;
  589. }
  590. if (!vmw_surface_reference(surface)) {
  591. DRM_ERROR("failed to reference surface %p\n", surface);
  592. ret = -EINVAL;
  593. goto out_err2;
  594. }
  595. /* XXX get the first 3 from the surface info */
  596. vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
  597. vfbs->base.base.pitches[0] = mode_cmd->pitch;
  598. vfbs->base.base.depth = mode_cmd->depth;
  599. vfbs->base.base.width = mode_cmd->width;
  600. vfbs->base.base.height = mode_cmd->height;
  601. vfbs->surface = surface;
  602. vfbs->base.user_handle = mode_cmd->handle;
  603. vfbs->master = drm_master_get(file_priv->master);
  604. mutex_lock(&vmaster->fb_surf_mutex);
  605. list_add_tail(&vfbs->head, &vmaster->fb_surf);
  606. mutex_unlock(&vmaster->fb_surf_mutex);
  607. *out = &vfbs->base;
  608. ret = drm_framebuffer_init(dev, &vfbs->base.base,
  609. &vmw_framebuffer_surface_funcs);
  610. if (ret)
  611. goto out_err3;
  612. return 0;
  613. out_err3:
  614. vmw_surface_unreference(&surface);
  615. out_err2:
  616. kfree(vfbs);
  617. out_err1:
  618. return ret;
  619. }
  620. /*
  621. * Dmabuf framebuffer code
  622. */
  623. #define vmw_framebuffer_to_vfbd(x) \
  624. container_of(x, struct vmw_framebuffer_dmabuf, base.base)
  625. struct vmw_framebuffer_dmabuf {
  626. struct vmw_framebuffer base;
  627. struct vmw_dma_buffer *buffer;
  628. };
  629. static void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
  630. {
  631. struct vmw_framebuffer_dmabuf *vfbd =
  632. vmw_framebuffer_to_vfbd(framebuffer);
  633. drm_framebuffer_cleanup(framebuffer);
  634. vmw_dmabuf_unreference(&vfbd->buffer);
  635. ttm_base_object_unref(&vfbd->base.user_obj);
  636. kfree(vfbd);
  637. }
  638. static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv,
  639. struct vmw_framebuffer *framebuffer,
  640. unsigned flags, unsigned color,
  641. struct drm_clip_rect *clips,
  642. unsigned num_clips, int increment)
  643. {
  644. size_t fifo_size;
  645. int i;
  646. struct {
  647. uint32_t header;
  648. SVGAFifoCmdUpdate body;
  649. } *cmd;
  650. fifo_size = sizeof(*cmd) * num_clips;
  651. cmd = vmw_fifo_reserve(dev_priv, fifo_size);
  652. if (unlikely(cmd == NULL)) {
  653. DRM_ERROR("Fifo reserve failed.\n");
  654. return -ENOMEM;
  655. }
  656. memset(cmd, 0, fifo_size);
  657. for (i = 0; i < num_clips; i++, clips += increment) {
  658. cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
  659. cmd[i].body.x = cpu_to_le32(clips->x1);
  660. cmd[i].body.y = cpu_to_le32(clips->y1);
  661. cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
  662. cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
  663. }
  664. vmw_fifo_commit(dev_priv, fifo_size);
  665. return 0;
  666. }
  667. static int do_dmabuf_define_gmrfb(struct drm_file *file_priv,
  668. struct vmw_private *dev_priv,
  669. struct vmw_framebuffer *framebuffer)
  670. {
  671. int depth = framebuffer->base.depth;
  672. size_t fifo_size;
  673. int ret;
  674. struct {
  675. uint32_t header;
  676. SVGAFifoCmdDefineGMRFB body;
  677. } *cmd;
  678. /* Emulate RGBA support, contrary to svga_reg.h this is not
  679. * supported by hosts. This is only a problem if we are reading
  680. * this value later and expecting what we uploaded back.
  681. */
  682. if (depth == 32)
  683. depth = 24;
  684. fifo_size = sizeof(*cmd);
  685. cmd = kmalloc(fifo_size, GFP_KERNEL);
  686. if (unlikely(cmd == NULL)) {
  687. DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
  688. return -ENOMEM;
  689. }
  690. memset(cmd, 0, fifo_size);
  691. cmd->header = SVGA_CMD_DEFINE_GMRFB;
  692. cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel;
  693. cmd->body.format.colorDepth = depth;
  694. cmd->body.format.reserved = 0;
  695. cmd->body.bytesPerLine = framebuffer->base.pitches[0];
  696. cmd->body.ptr.gmrId = framebuffer->user_handle;
  697. cmd->body.ptr.offset = 0;
  698. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  699. fifo_size, 0, NULL, NULL);
  700. kfree(cmd);
  701. return ret;
  702. }
  703. static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
  704. struct vmw_private *dev_priv,
  705. struct vmw_framebuffer *framebuffer,
  706. unsigned flags, unsigned color,
  707. struct drm_clip_rect *clips,
  708. unsigned num_clips, int increment,
  709. struct vmw_fence_obj **out_fence)
  710. {
  711. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  712. struct drm_clip_rect *clips_ptr;
  713. int i, k, num_units, ret;
  714. struct drm_crtc *crtc;
  715. size_t fifo_size;
  716. struct {
  717. uint32_t header;
  718. SVGAFifoCmdBlitGMRFBToScreen body;
  719. } *blits;
  720. ret = do_dmabuf_define_gmrfb(file_priv, dev_priv, framebuffer);
  721. if (unlikely(ret != 0))
  722. return ret; /* define_gmrfb prints warnings */
  723. fifo_size = sizeof(*blits) * num_clips;
  724. blits = kmalloc(fifo_size, GFP_KERNEL);
  725. if (unlikely(blits == NULL)) {
  726. DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
  727. return -ENOMEM;
  728. }
  729. num_units = 0;
  730. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  731. if (crtc->fb != &framebuffer->base)
  732. continue;
  733. units[num_units++] = vmw_crtc_to_du(crtc);
  734. }
  735. for (k = 0; k < num_units; k++) {
  736. struct vmw_display_unit *unit = units[k];
  737. int hit_num = 0;
  738. clips_ptr = clips;
  739. for (i = 0; i < num_clips; i++, clips_ptr += increment) {
  740. int clip_x1 = clips_ptr->x1 - unit->crtc.x;
  741. int clip_y1 = clips_ptr->y1 - unit->crtc.y;
  742. int clip_x2 = clips_ptr->x2 - unit->crtc.x;
  743. int clip_y2 = clips_ptr->y2 - unit->crtc.y;
  744. int move_x, move_y;
  745. /* skip any crtcs that misses the clip region */
  746. if (clip_x1 >= unit->crtc.mode.hdisplay ||
  747. clip_y1 >= unit->crtc.mode.vdisplay ||
  748. clip_x2 <= 0 || clip_y2 <= 0)
  749. continue;
  750. /* clip size to crtc size */
  751. clip_x2 = min_t(int, clip_x2, unit->crtc.mode.hdisplay);
  752. clip_y2 = min_t(int, clip_y2, unit->crtc.mode.vdisplay);
  753. /* translate both src and dest to bring clip into screen */
  754. move_x = min_t(int, clip_x1, 0);
  755. move_y = min_t(int, clip_y1, 0);
  756. /* actual translate done here */
  757. blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
  758. blits[hit_num].body.destScreenId = unit->unit;
  759. blits[hit_num].body.srcOrigin.x = clips_ptr->x1 - move_x;
  760. blits[hit_num].body.srcOrigin.y = clips_ptr->y1 - move_y;
  761. blits[hit_num].body.destRect.left = clip_x1 - move_x;
  762. blits[hit_num].body.destRect.top = clip_y1 - move_y;
  763. blits[hit_num].body.destRect.right = clip_x2;
  764. blits[hit_num].body.destRect.bottom = clip_y2;
  765. hit_num++;
  766. }
  767. /* no clips hit the crtc */
  768. if (hit_num == 0)
  769. continue;
  770. /* only return the last fence */
  771. if (out_fence && *out_fence)
  772. vmw_fence_obj_unreference(out_fence);
  773. fifo_size = sizeof(*blits) * hit_num;
  774. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, blits,
  775. fifo_size, 0, NULL, out_fence);
  776. if (unlikely(ret != 0))
  777. break;
  778. }
  779. kfree(blits);
  780. return ret;
  781. }
  782. static int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
  783. struct drm_file *file_priv,
  784. unsigned flags, unsigned color,
  785. struct drm_clip_rect *clips,
  786. unsigned num_clips)
  787. {
  788. struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
  789. struct vmw_master *vmaster = vmw_master(file_priv->master);
  790. struct vmw_framebuffer_dmabuf *vfbd =
  791. vmw_framebuffer_to_vfbd(framebuffer);
  792. struct drm_clip_rect norect;
  793. int ret, increment = 1;
  794. drm_modeset_lock_all(dev_priv->dev);
  795. ret = ttm_read_lock(&vmaster->lock, true);
  796. if (unlikely(ret != 0)) {
  797. drm_modeset_unlock_all(dev_priv->dev);
  798. return ret;
  799. }
  800. if (!num_clips) {
  801. num_clips = 1;
  802. clips = &norect;
  803. norect.x1 = norect.y1 = 0;
  804. norect.x2 = framebuffer->width;
  805. norect.y2 = framebuffer->height;
  806. } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
  807. num_clips /= 2;
  808. increment = 2;
  809. }
  810. if (dev_priv->ldu_priv) {
  811. ret = do_dmabuf_dirty_ldu(dev_priv, &vfbd->base,
  812. flags, color,
  813. clips, num_clips, increment);
  814. } else {
  815. ret = do_dmabuf_dirty_sou(file_priv, dev_priv, &vfbd->base,
  816. flags, color,
  817. clips, num_clips, increment, NULL);
  818. }
  819. ttm_read_unlock(&vmaster->lock);
  820. drm_modeset_unlock_all(dev_priv->dev);
  821. return ret;
  822. }
  823. static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
  824. .destroy = vmw_framebuffer_dmabuf_destroy,
  825. .dirty = vmw_framebuffer_dmabuf_dirty,
  826. };
  827. /**
  828. * Pin the dmabuffer to the start of vram.
  829. */
  830. static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
  831. {
  832. struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
  833. struct vmw_framebuffer_dmabuf *vfbd =
  834. vmw_framebuffer_to_vfbd(&vfb->base);
  835. int ret;
  836. /* This code should not be used with screen objects */
  837. BUG_ON(dev_priv->sou_priv);
  838. vmw_overlay_pause_all(dev_priv);
  839. ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false);
  840. vmw_overlay_resume_all(dev_priv);
  841. WARN_ON(ret != 0);
  842. return 0;
  843. }
  844. static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
  845. {
  846. struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
  847. struct vmw_framebuffer_dmabuf *vfbd =
  848. vmw_framebuffer_to_vfbd(&vfb->base);
  849. if (!vfbd->buffer) {
  850. WARN_ON(!vfbd->buffer);
  851. return 0;
  852. }
  853. return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
  854. }
  855. static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
  856. struct vmw_dma_buffer *dmabuf,
  857. struct vmw_framebuffer **out,
  858. const struct drm_mode_fb_cmd
  859. *mode_cmd)
  860. {
  861. struct drm_device *dev = dev_priv->dev;
  862. struct vmw_framebuffer_dmabuf *vfbd;
  863. unsigned int requested_size;
  864. int ret;
  865. requested_size = mode_cmd->height * mode_cmd->pitch;
  866. if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
  867. DRM_ERROR("Screen buffer object size is too small "
  868. "for requested mode.\n");
  869. return -EINVAL;
  870. }
  871. /* Limited framebuffer color depth support for screen objects */
  872. if (dev_priv->sou_priv) {
  873. switch (mode_cmd->depth) {
  874. case 32:
  875. case 24:
  876. /* Only support 32 bpp for 32 and 24 depth fbs */
  877. if (mode_cmd->bpp == 32)
  878. break;
  879. DRM_ERROR("Invalid color depth/bbp: %d %d\n",
  880. mode_cmd->depth, mode_cmd->bpp);
  881. return -EINVAL;
  882. case 16:
  883. case 15:
  884. /* Only support 16 bpp for 16 and 15 depth fbs */
  885. if (mode_cmd->bpp == 16)
  886. break;
  887. DRM_ERROR("Invalid color depth/bbp: %d %d\n",
  888. mode_cmd->depth, mode_cmd->bpp);
  889. return -EINVAL;
  890. default:
  891. DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
  892. return -EINVAL;
  893. }
  894. }
  895. vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
  896. if (!vfbd) {
  897. ret = -ENOMEM;
  898. goto out_err1;
  899. }
  900. if (!vmw_dmabuf_reference(dmabuf)) {
  901. DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
  902. ret = -EINVAL;
  903. goto out_err2;
  904. }
  905. vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
  906. vfbd->base.base.pitches[0] = mode_cmd->pitch;
  907. vfbd->base.base.depth = mode_cmd->depth;
  908. vfbd->base.base.width = mode_cmd->width;
  909. vfbd->base.base.height = mode_cmd->height;
  910. if (!dev_priv->sou_priv) {
  911. vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
  912. vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
  913. }
  914. vfbd->base.dmabuf = true;
  915. vfbd->buffer = dmabuf;
  916. vfbd->base.user_handle = mode_cmd->handle;
  917. *out = &vfbd->base;
  918. ret = drm_framebuffer_init(dev, &vfbd->base.base,
  919. &vmw_framebuffer_dmabuf_funcs);
  920. if (ret)
  921. goto out_err3;
  922. return 0;
  923. out_err3:
  924. vmw_dmabuf_unreference(&dmabuf);
  925. out_err2:
  926. kfree(vfbd);
  927. out_err1:
  928. return ret;
  929. }
  930. /*
  931. * Generic Kernel modesetting functions
  932. */
  933. static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
  934. struct drm_file *file_priv,
  935. struct drm_mode_fb_cmd2 *mode_cmd2)
  936. {
  937. struct vmw_private *dev_priv = vmw_priv(dev);
  938. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  939. struct vmw_framebuffer *vfb = NULL;
  940. struct vmw_surface *surface = NULL;
  941. struct vmw_dma_buffer *bo = NULL;
  942. struct ttm_base_object *user_obj;
  943. struct drm_mode_fb_cmd mode_cmd;
  944. int ret;
  945. mode_cmd.width = mode_cmd2->width;
  946. mode_cmd.height = mode_cmd2->height;
  947. mode_cmd.pitch = mode_cmd2->pitches[0];
  948. mode_cmd.handle = mode_cmd2->handles[0];
  949. drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth,
  950. &mode_cmd.bpp);
  951. /**
  952. * This code should be conditioned on Screen Objects not being used.
  953. * If screen objects are used, we can allocate a GMR to hold the
  954. * requested framebuffer.
  955. */
  956. if (!vmw_kms_validate_mode_vram(dev_priv,
  957. mode_cmd.pitch,
  958. mode_cmd.height)) {
  959. DRM_ERROR("VRAM size is too small for requested mode.\n");
  960. return ERR_PTR(-ENOMEM);
  961. }
  962. /*
  963. * Take a reference on the user object of the resource
  964. * backing the kms fb. This ensures that user-space handle
  965. * lookups on that resource will always work as long as
  966. * it's registered with a kms framebuffer. This is important,
  967. * since vmw_execbuf_process identifies resources in the
  968. * command stream using user-space handles.
  969. */
  970. user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle);
  971. if (unlikely(user_obj == NULL)) {
  972. DRM_ERROR("Could not locate requested kms frame buffer.\n");
  973. return ERR_PTR(-ENOENT);
  974. }
  975. /**
  976. * End conditioned code.
  977. */
  978. /* returns either a dmabuf or surface */
  979. ret = vmw_user_lookup_handle(dev_priv, tfile,
  980. mode_cmd.handle,
  981. &surface, &bo);
  982. if (ret)
  983. goto err_out;
  984. /* Create the new framebuffer depending one what we got back */
  985. if (bo)
  986. ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
  987. &mode_cmd);
  988. else if (surface)
  989. ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv,
  990. surface, &vfb, &mode_cmd);
  991. else
  992. BUG();
  993. err_out:
  994. /* vmw_user_lookup_handle takes one ref so does new_fb */
  995. if (bo)
  996. vmw_dmabuf_unreference(&bo);
  997. if (surface)
  998. vmw_surface_unreference(&surface);
  999. if (ret) {
  1000. DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
  1001. ttm_base_object_unref(&user_obj);
  1002. return ERR_PTR(ret);
  1003. } else
  1004. vfb->user_obj = user_obj;
  1005. return &vfb->base;
  1006. }
  1007. static const struct drm_mode_config_funcs vmw_kms_funcs = {
  1008. .fb_create = vmw_kms_fb_create,
  1009. };
  1010. int vmw_kms_present(struct vmw_private *dev_priv,
  1011. struct drm_file *file_priv,
  1012. struct vmw_framebuffer *vfb,
  1013. struct vmw_surface *surface,
  1014. uint32_t sid,
  1015. int32_t destX, int32_t destY,
  1016. struct drm_vmw_rect *clips,
  1017. uint32_t num_clips)
  1018. {
  1019. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  1020. struct drm_clip_rect *tmp;
  1021. struct drm_crtc *crtc;
  1022. size_t fifo_size;
  1023. int i, k, num_units;
  1024. int ret = 0; /* silence warning */
  1025. int left, right, top, bottom;
  1026. struct {
  1027. SVGA3dCmdHeader header;
  1028. SVGA3dCmdBlitSurfaceToScreen body;
  1029. } *cmd;
  1030. SVGASignedRect *blits;
  1031. num_units = 0;
  1032. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  1033. if (crtc->fb != &vfb->base)
  1034. continue;
  1035. units[num_units++] = vmw_crtc_to_du(crtc);
  1036. }
  1037. BUG_ON(surface == NULL);
  1038. BUG_ON(!clips || !num_clips);
  1039. tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
  1040. if (unlikely(tmp == NULL)) {
  1041. DRM_ERROR("Temporary cliprect memory alloc failed.\n");
  1042. return -ENOMEM;
  1043. }
  1044. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
  1045. cmd = kmalloc(fifo_size, GFP_KERNEL);
  1046. if (unlikely(cmd == NULL)) {
  1047. DRM_ERROR("Failed to allocate temporary fifo memory.\n");
  1048. ret = -ENOMEM;
  1049. goto out_free_tmp;
  1050. }
  1051. left = clips->x;
  1052. right = clips->x + clips->w;
  1053. top = clips->y;
  1054. bottom = clips->y + clips->h;
  1055. for (i = 1; i < num_clips; i++) {
  1056. left = min_t(int, left, (int)clips[i].x);
  1057. right = max_t(int, right, (int)clips[i].x + clips[i].w);
  1058. top = min_t(int, top, (int)clips[i].y);
  1059. bottom = max_t(int, bottom, (int)clips[i].y + clips[i].h);
  1060. }
  1061. /* only need to do this once */
  1062. memset(cmd, 0, fifo_size);
  1063. cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
  1064. blits = (SVGASignedRect *)&cmd[1];
  1065. cmd->body.srcRect.left = left;
  1066. cmd->body.srcRect.right = right;
  1067. cmd->body.srcRect.top = top;
  1068. cmd->body.srcRect.bottom = bottom;
  1069. for (i = 0; i < num_clips; i++) {
  1070. tmp[i].x1 = clips[i].x - left;
  1071. tmp[i].x2 = clips[i].x + clips[i].w - left;
  1072. tmp[i].y1 = clips[i].y - top;
  1073. tmp[i].y2 = clips[i].y + clips[i].h - top;
  1074. }
  1075. for (k = 0; k < num_units; k++) {
  1076. struct vmw_display_unit *unit = units[k];
  1077. struct vmw_clip_rect clip;
  1078. int num;
  1079. clip.x1 = left + destX - unit->crtc.x;
  1080. clip.y1 = top + destY - unit->crtc.y;
  1081. clip.x2 = right + destX - unit->crtc.x;
  1082. clip.y2 = bottom + destY - unit->crtc.y;
  1083. /* skip any crtcs that misses the clip region */
  1084. if (clip.x1 >= unit->crtc.mode.hdisplay ||
  1085. clip.y1 >= unit->crtc.mode.vdisplay ||
  1086. clip.x2 <= 0 || clip.y2 <= 0)
  1087. continue;
  1088. /*
  1089. * In order for the clip rects to be correctly scaled
  1090. * the src and dest rects needs to be the same size.
  1091. */
  1092. cmd->body.destRect.left = clip.x1;
  1093. cmd->body.destRect.right = clip.x2;
  1094. cmd->body.destRect.top = clip.y1;
  1095. cmd->body.destRect.bottom = clip.y2;
  1096. /* create a clip rect of the crtc in dest coords */
  1097. clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
  1098. clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
  1099. clip.x1 = 0 - clip.x1;
  1100. clip.y1 = 0 - clip.y1;
  1101. /* need to reset sid as it is changed by execbuf */
  1102. cmd->body.srcImage.sid = sid;
  1103. cmd->body.destScreenId = unit->unit;
  1104. /* clip and write blits to cmd stream */
  1105. vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
  1106. /* if no cliprects hit skip this */
  1107. if (num == 0)
  1108. continue;
  1109. /* recalculate package length */
  1110. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
  1111. cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
  1112. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  1113. fifo_size, 0, NULL, NULL);
  1114. if (unlikely(ret != 0))
  1115. break;
  1116. }
  1117. kfree(cmd);
  1118. out_free_tmp:
  1119. kfree(tmp);
  1120. return ret;
  1121. }
  1122. int vmw_kms_readback(struct vmw_private *dev_priv,
  1123. struct drm_file *file_priv,
  1124. struct vmw_framebuffer *vfb,
  1125. struct drm_vmw_fence_rep __user *user_fence_rep,
  1126. struct drm_vmw_rect *clips,
  1127. uint32_t num_clips)
  1128. {
  1129. struct vmw_framebuffer_dmabuf *vfbd =
  1130. vmw_framebuffer_to_vfbd(&vfb->base);
  1131. struct vmw_dma_buffer *dmabuf = vfbd->buffer;
  1132. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  1133. struct drm_crtc *crtc;
  1134. size_t fifo_size;
  1135. int i, k, ret, num_units, blits_pos;
  1136. struct {
  1137. uint32_t header;
  1138. SVGAFifoCmdDefineGMRFB body;
  1139. } *cmd;
  1140. struct {
  1141. uint32_t header;
  1142. SVGAFifoCmdBlitScreenToGMRFB body;
  1143. } *blits;
  1144. num_units = 0;
  1145. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  1146. if (crtc->fb != &vfb->base)
  1147. continue;
  1148. units[num_units++] = vmw_crtc_to_du(crtc);
  1149. }
  1150. BUG_ON(dmabuf == NULL);
  1151. BUG_ON(!clips || !num_clips);
  1152. /* take a safe guess at fifo size */
  1153. fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
  1154. cmd = kmalloc(fifo_size, GFP_KERNEL);
  1155. if (unlikely(cmd == NULL)) {
  1156. DRM_ERROR("Failed to allocate temporary fifo memory.\n");
  1157. return -ENOMEM;
  1158. }
  1159. memset(cmd, 0, fifo_size);
  1160. cmd->header = SVGA_CMD_DEFINE_GMRFB;
  1161. cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
  1162. cmd->body.format.colorDepth = vfb->base.depth;
  1163. cmd->body.format.reserved = 0;
  1164. cmd->body.bytesPerLine = vfb->base.pitches[0];
  1165. cmd->body.ptr.gmrId = vfb->user_handle;
  1166. cmd->body.ptr.offset = 0;
  1167. blits = (void *)&cmd[1];
  1168. blits_pos = 0;
  1169. for (i = 0; i < num_units; i++) {
  1170. struct drm_vmw_rect *c = clips;
  1171. for (k = 0; k < num_clips; k++, c++) {
  1172. /* transform clip coords to crtc origin based coords */
  1173. int clip_x1 = c->x - units[i]->crtc.x;
  1174. int clip_x2 = c->x - units[i]->crtc.x + c->w;
  1175. int clip_y1 = c->y - units[i]->crtc.y;
  1176. int clip_y2 = c->y - units[i]->crtc.y + c->h;
  1177. int dest_x = c->x;
  1178. int dest_y = c->y;
  1179. /* compensate for clipping, we negate
  1180. * a negative number and add that.
  1181. */
  1182. if (clip_x1 < 0)
  1183. dest_x += -clip_x1;
  1184. if (clip_y1 < 0)
  1185. dest_y += -clip_y1;
  1186. /* clip */
  1187. clip_x1 = max(clip_x1, 0);
  1188. clip_y1 = max(clip_y1, 0);
  1189. clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
  1190. clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
  1191. /* and cull any rects that misses the crtc */
  1192. if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
  1193. clip_y1 >= units[i]->crtc.mode.vdisplay ||
  1194. clip_x2 <= 0 || clip_y2 <= 0)
  1195. continue;
  1196. blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
  1197. blits[blits_pos].body.srcScreenId = units[i]->unit;
  1198. blits[blits_pos].body.destOrigin.x = dest_x;
  1199. blits[blits_pos].body.destOrigin.y = dest_y;
  1200. blits[blits_pos].body.srcRect.left = clip_x1;
  1201. blits[blits_pos].body.srcRect.top = clip_y1;
  1202. blits[blits_pos].body.srcRect.right = clip_x2;
  1203. blits[blits_pos].body.srcRect.bottom = clip_y2;
  1204. blits_pos++;
  1205. }
  1206. }
  1207. /* reset size here and use calculated exact size from loops */
  1208. fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
  1209. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
  1210. 0, user_fence_rep, NULL);
  1211. kfree(cmd);
  1212. return ret;
  1213. }
  1214. int vmw_kms_init(struct vmw_private *dev_priv)
  1215. {
  1216. struct drm_device *dev = dev_priv->dev;
  1217. int ret;
  1218. drm_mode_config_init(dev);
  1219. dev->mode_config.funcs = &vmw_kms_funcs;
  1220. dev->mode_config.min_width = 1;
  1221. dev->mode_config.min_height = 1;
  1222. /* assumed largest fb size */
  1223. dev->mode_config.max_width = 8192;
  1224. dev->mode_config.max_height = 8192;
  1225. ret = vmw_kms_init_screen_object_display(dev_priv);
  1226. if (ret) /* Fallback */
  1227. (void)vmw_kms_init_legacy_display_system(dev_priv);
  1228. return 0;
  1229. }
  1230. int vmw_kms_close(struct vmw_private *dev_priv)
  1231. {
  1232. /*
  1233. * Docs says we should take the lock before calling this function
  1234. * but since it destroys encoders and our destructor calls
  1235. * drm_encoder_cleanup which takes the lock we deadlock.
  1236. */
  1237. drm_mode_config_cleanup(dev_priv->dev);
  1238. if (dev_priv->sou_priv)
  1239. vmw_kms_close_screen_object_display(dev_priv);
  1240. else
  1241. vmw_kms_close_legacy_display_system(dev_priv);
  1242. return 0;
  1243. }
  1244. int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
  1245. struct drm_file *file_priv)
  1246. {
  1247. struct drm_vmw_cursor_bypass_arg *arg = data;
  1248. struct vmw_display_unit *du;
  1249. struct drm_mode_object *obj;
  1250. struct drm_crtc *crtc;
  1251. int ret = 0;
  1252. mutex_lock(&dev->mode_config.mutex);
  1253. if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
  1254. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  1255. du = vmw_crtc_to_du(crtc);
  1256. du->hotspot_x = arg->xhot;
  1257. du->hotspot_y = arg->yhot;
  1258. }
  1259. mutex_unlock(&dev->mode_config.mutex);
  1260. return 0;
  1261. }
  1262. obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
  1263. if (!obj) {
  1264. ret = -ENOENT;
  1265. goto out;
  1266. }
  1267. crtc = obj_to_crtc(obj);
  1268. du = vmw_crtc_to_du(crtc);
  1269. du->hotspot_x = arg->xhot;
  1270. du->hotspot_y = arg->yhot;
  1271. out:
  1272. mutex_unlock(&dev->mode_config.mutex);
  1273. return ret;
  1274. }
  1275. int vmw_kms_write_svga(struct vmw_private *vmw_priv,
  1276. unsigned width, unsigned height, unsigned pitch,
  1277. unsigned bpp, unsigned depth)
  1278. {
  1279. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1280. vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
  1281. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1282. iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
  1283. vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
  1284. vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
  1285. vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
  1286. if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
  1287. DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
  1288. depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
  1289. return -EINVAL;
  1290. }
  1291. return 0;
  1292. }
  1293. int vmw_kms_save_vga(struct vmw_private *vmw_priv)
  1294. {
  1295. struct vmw_vga_topology_state *save;
  1296. uint32_t i;
  1297. vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
  1298. vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
  1299. vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
  1300. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1301. vmw_priv->vga_pitchlock =
  1302. vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
  1303. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1304. vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
  1305. SVGA_FIFO_PITCHLOCK);
  1306. if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
  1307. return 0;
  1308. vmw_priv->num_displays = vmw_read(vmw_priv,
  1309. SVGA_REG_NUM_GUEST_DISPLAYS);
  1310. if (vmw_priv->num_displays == 0)
  1311. vmw_priv->num_displays = 1;
  1312. for (i = 0; i < vmw_priv->num_displays; ++i) {
  1313. save = &vmw_priv->vga_save[i];
  1314. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
  1315. save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
  1316. save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
  1317. save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
  1318. save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
  1319. save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
  1320. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
  1321. if (i == 0 && vmw_priv->num_displays == 1 &&
  1322. save->width == 0 && save->height == 0) {
  1323. /*
  1324. * It should be fairly safe to assume that these
  1325. * values are uninitialized.
  1326. */
  1327. save->width = vmw_priv->vga_width - save->pos_x;
  1328. save->height = vmw_priv->vga_height - save->pos_y;
  1329. }
  1330. }
  1331. return 0;
  1332. }
  1333. int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
  1334. {
  1335. struct vmw_vga_topology_state *save;
  1336. uint32_t i;
  1337. vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
  1338. vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
  1339. vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
  1340. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1341. vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
  1342. vmw_priv->vga_pitchlock);
  1343. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1344. iowrite32(vmw_priv->vga_pitchlock,
  1345. vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
  1346. if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
  1347. return 0;
  1348. for (i = 0; i < vmw_priv->num_displays; ++i) {
  1349. save = &vmw_priv->vga_save[i];
  1350. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
  1351. vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
  1352. vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
  1353. vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
  1354. vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
  1355. vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
  1356. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
  1357. }
  1358. return 0;
  1359. }
  1360. bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
  1361. uint32_t pitch,
  1362. uint32_t height)
  1363. {
  1364. return ((u64) pitch * (u64) height) < (u64) dev_priv->prim_bb_mem;
  1365. }
  1366. /**
  1367. * Function called by DRM code called with vbl_lock held.
  1368. */
  1369. u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
  1370. {
  1371. return 0;
  1372. }
  1373. /**
  1374. * Function called by DRM code called with vbl_lock held.
  1375. */
  1376. int vmw_enable_vblank(struct drm_device *dev, int crtc)
  1377. {
  1378. return -ENOSYS;
  1379. }
  1380. /**
  1381. * Function called by DRM code called with vbl_lock held.
  1382. */
  1383. void vmw_disable_vblank(struct drm_device *dev, int crtc)
  1384. {
  1385. }
  1386. /*
  1387. * Small shared kms functions.
  1388. */
  1389. static int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
  1390. struct drm_vmw_rect *rects)
  1391. {
  1392. struct drm_device *dev = dev_priv->dev;
  1393. struct vmw_display_unit *du;
  1394. struct drm_connector *con;
  1395. mutex_lock(&dev->mode_config.mutex);
  1396. #if 0
  1397. {
  1398. unsigned int i;
  1399. DRM_INFO("%s: new layout ", __func__);
  1400. for (i = 0; i < num; i++)
  1401. DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
  1402. rects[i].w, rects[i].h);
  1403. DRM_INFO("\n");
  1404. }
  1405. #endif
  1406. list_for_each_entry(con, &dev->mode_config.connector_list, head) {
  1407. du = vmw_connector_to_du(con);
  1408. if (num > du->unit) {
  1409. du->pref_width = rects[du->unit].w;
  1410. du->pref_height = rects[du->unit].h;
  1411. du->pref_active = true;
  1412. du->gui_x = rects[du->unit].x;
  1413. du->gui_y = rects[du->unit].y;
  1414. } else {
  1415. du->pref_width = 800;
  1416. du->pref_height = 600;
  1417. du->pref_active = false;
  1418. }
  1419. con->status = vmw_du_connector_detect(con, true);
  1420. }
  1421. mutex_unlock(&dev->mode_config.mutex);
  1422. return 0;
  1423. }
  1424. int vmw_du_page_flip(struct drm_crtc *crtc,
  1425. struct drm_framebuffer *fb,
  1426. struct drm_pending_vblank_event *event,
  1427. uint32_t page_flip_flags)
  1428. {
  1429. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  1430. struct drm_framebuffer *old_fb = crtc->fb;
  1431. struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(fb);
  1432. struct drm_file *file_priv ;
  1433. struct vmw_fence_obj *fence = NULL;
  1434. struct drm_clip_rect clips;
  1435. int ret;
  1436. if (event == NULL)
  1437. return -EINVAL;
  1438. /* require ScreenObject support for page flipping */
  1439. if (!dev_priv->sou_priv)
  1440. return -ENOSYS;
  1441. file_priv = event->base.file_priv;
  1442. if (!vmw_kms_screen_object_flippable(dev_priv, crtc))
  1443. return -EINVAL;
  1444. crtc->fb = fb;
  1445. /* do a full screen dirty update */
  1446. clips.x1 = clips.y1 = 0;
  1447. clips.x2 = fb->width;
  1448. clips.y2 = fb->height;
  1449. if (vfb->dmabuf)
  1450. ret = do_dmabuf_dirty_sou(file_priv, dev_priv, vfb,
  1451. 0, 0, &clips, 1, 1, &fence);
  1452. else
  1453. ret = do_surface_dirty_sou(dev_priv, file_priv, vfb,
  1454. 0, 0, &clips, 1, 1, &fence);
  1455. if (ret != 0)
  1456. goto out_no_fence;
  1457. if (!fence) {
  1458. ret = -EINVAL;
  1459. goto out_no_fence;
  1460. }
  1461. ret = vmw_event_fence_action_queue(file_priv, fence,
  1462. &event->base,
  1463. &event->event.tv_sec,
  1464. &event->event.tv_usec,
  1465. true);
  1466. /*
  1467. * No need to hold on to this now. The only cleanup
  1468. * we need to do if we fail is unref the fence.
  1469. */
  1470. vmw_fence_obj_unreference(&fence);
  1471. if (vmw_crtc_to_du(crtc)->is_implicit)
  1472. vmw_kms_screen_object_update_implicit_fb(dev_priv, crtc);
  1473. return ret;
  1474. out_no_fence:
  1475. crtc->fb = old_fb;
  1476. return ret;
  1477. }
  1478. void vmw_du_crtc_save(struct drm_crtc *crtc)
  1479. {
  1480. }
  1481. void vmw_du_crtc_restore(struct drm_crtc *crtc)
  1482. {
  1483. }
  1484. void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
  1485. u16 *r, u16 *g, u16 *b,
  1486. uint32_t start, uint32_t size)
  1487. {
  1488. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  1489. int i;
  1490. for (i = 0; i < size; i++) {
  1491. DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
  1492. r[i], g[i], b[i]);
  1493. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
  1494. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
  1495. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
  1496. }
  1497. }
  1498. void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
  1499. {
  1500. }
  1501. void vmw_du_connector_save(struct drm_connector *connector)
  1502. {
  1503. }
  1504. void vmw_du_connector_restore(struct drm_connector *connector)
  1505. {
  1506. }
  1507. enum drm_connector_status
  1508. vmw_du_connector_detect(struct drm_connector *connector, bool force)
  1509. {
  1510. uint32_t num_displays;
  1511. struct drm_device *dev = connector->dev;
  1512. struct vmw_private *dev_priv = vmw_priv(dev);
  1513. struct vmw_display_unit *du = vmw_connector_to_du(connector);
  1514. mutex_lock(&dev_priv->hw_mutex);
  1515. num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
  1516. mutex_unlock(&dev_priv->hw_mutex);
  1517. return ((vmw_connector_to_du(connector)->unit < num_displays &&
  1518. du->pref_active) ?
  1519. connector_status_connected : connector_status_disconnected);
  1520. }
  1521. static struct drm_display_mode vmw_kms_connector_builtin[] = {
  1522. /* 640x480@60Hz */
  1523. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
  1524. 752, 800, 0, 480, 489, 492, 525, 0,
  1525. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1526. /* 800x600@60Hz */
  1527. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
  1528. 968, 1056, 0, 600, 601, 605, 628, 0,
  1529. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1530. /* 1024x768@60Hz */
  1531. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
  1532. 1184, 1344, 0, 768, 771, 777, 806, 0,
  1533. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1534. /* 1152x864@75Hz */
  1535. { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
  1536. 1344, 1600, 0, 864, 865, 868, 900, 0,
  1537. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1538. /* 1280x768@60Hz */
  1539. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
  1540. 1472, 1664, 0, 768, 771, 778, 798, 0,
  1541. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1542. /* 1280x800@60Hz */
  1543. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
  1544. 1480, 1680, 0, 800, 803, 809, 831, 0,
  1545. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1546. /* 1280x960@60Hz */
  1547. { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
  1548. 1488, 1800, 0, 960, 961, 964, 1000, 0,
  1549. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1550. /* 1280x1024@60Hz */
  1551. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
  1552. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  1553. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1554. /* 1360x768@60Hz */
  1555. { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
  1556. 1536, 1792, 0, 768, 771, 777, 795, 0,
  1557. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1558. /* 1440x1050@60Hz */
  1559. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
  1560. 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
  1561. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1562. /* 1440x900@60Hz */
  1563. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
  1564. 1672, 1904, 0, 900, 903, 909, 934, 0,
  1565. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1566. /* 1600x1200@60Hz */
  1567. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
  1568. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  1569. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1570. /* 1680x1050@60Hz */
  1571. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
  1572. 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
  1573. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1574. /* 1792x1344@60Hz */
  1575. { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
  1576. 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
  1577. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1578. /* 1853x1392@60Hz */
  1579. { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
  1580. 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
  1581. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1582. /* 1920x1200@60Hz */
  1583. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
  1584. 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
  1585. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1586. /* 1920x1440@60Hz */
  1587. { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
  1588. 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
  1589. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1590. /* 2560x1600@60Hz */
  1591. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
  1592. 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
  1593. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1594. /* Terminate */
  1595. { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
  1596. };
  1597. /**
  1598. * vmw_guess_mode_timing - Provide fake timings for a
  1599. * 60Hz vrefresh mode.
  1600. *
  1601. * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
  1602. * members filled in.
  1603. */
  1604. static void vmw_guess_mode_timing(struct drm_display_mode *mode)
  1605. {
  1606. mode->hsync_start = mode->hdisplay + 50;
  1607. mode->hsync_end = mode->hsync_start + 50;
  1608. mode->htotal = mode->hsync_end + 50;
  1609. mode->vsync_start = mode->vdisplay + 50;
  1610. mode->vsync_end = mode->vsync_start + 50;
  1611. mode->vtotal = mode->vsync_end + 50;
  1612. mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
  1613. mode->vrefresh = drm_mode_vrefresh(mode);
  1614. }
  1615. int vmw_du_connector_fill_modes(struct drm_connector *connector,
  1616. uint32_t max_width, uint32_t max_height)
  1617. {
  1618. struct vmw_display_unit *du = vmw_connector_to_du(connector);
  1619. struct drm_device *dev = connector->dev;
  1620. struct vmw_private *dev_priv = vmw_priv(dev);
  1621. struct drm_display_mode *mode = NULL;
  1622. struct drm_display_mode *bmode;
  1623. struct drm_display_mode prefmode = { DRM_MODE("preferred",
  1624. DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
  1625. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  1626. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
  1627. };
  1628. int i;
  1629. /* Add preferred mode */
  1630. {
  1631. mode = drm_mode_duplicate(dev, &prefmode);
  1632. if (!mode)
  1633. return 0;
  1634. mode->hdisplay = du->pref_width;
  1635. mode->vdisplay = du->pref_height;
  1636. vmw_guess_mode_timing(mode);
  1637. if (vmw_kms_validate_mode_vram(dev_priv, mode->hdisplay * 2,
  1638. mode->vdisplay)) {
  1639. drm_mode_probed_add(connector, mode);
  1640. } else {
  1641. drm_mode_destroy(dev, mode);
  1642. mode = NULL;
  1643. }
  1644. if (du->pref_mode) {
  1645. list_del_init(&du->pref_mode->head);
  1646. drm_mode_destroy(dev, du->pref_mode);
  1647. }
  1648. /* mode might be null here, this is intended */
  1649. du->pref_mode = mode;
  1650. }
  1651. for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
  1652. bmode = &vmw_kms_connector_builtin[i];
  1653. if (bmode->hdisplay > max_width ||
  1654. bmode->vdisplay > max_height)
  1655. continue;
  1656. if (!vmw_kms_validate_mode_vram(dev_priv, bmode->hdisplay * 2,
  1657. bmode->vdisplay))
  1658. continue;
  1659. mode = drm_mode_duplicate(dev, bmode);
  1660. if (!mode)
  1661. return 0;
  1662. mode->vrefresh = drm_mode_vrefresh(mode);
  1663. drm_mode_probed_add(connector, mode);
  1664. }
  1665. /* Move the prefered mode first, help apps pick the right mode. */
  1666. if (du->pref_mode)
  1667. list_move(&du->pref_mode->head, &connector->probed_modes);
  1668. drm_mode_connector_list_update(connector);
  1669. return 1;
  1670. }
  1671. int vmw_du_connector_set_property(struct drm_connector *connector,
  1672. struct drm_property *property,
  1673. uint64_t val)
  1674. {
  1675. return 0;
  1676. }
  1677. int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
  1678. struct drm_file *file_priv)
  1679. {
  1680. struct vmw_private *dev_priv = vmw_priv(dev);
  1681. struct drm_vmw_update_layout_arg *arg =
  1682. (struct drm_vmw_update_layout_arg *)data;
  1683. struct vmw_master *vmaster = vmw_master(file_priv->master);
  1684. void __user *user_rects;
  1685. struct drm_vmw_rect *rects;
  1686. unsigned rects_size;
  1687. int ret;
  1688. int i;
  1689. struct drm_mode_config *mode_config = &dev->mode_config;
  1690. ret = ttm_read_lock(&vmaster->lock, true);
  1691. if (unlikely(ret != 0))
  1692. return ret;
  1693. if (!arg->num_outputs) {
  1694. struct drm_vmw_rect def_rect = {0, 0, 800, 600};
  1695. vmw_du_update_layout(dev_priv, 1, &def_rect);
  1696. goto out_unlock;
  1697. }
  1698. rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
  1699. rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
  1700. GFP_KERNEL);
  1701. if (unlikely(!rects)) {
  1702. ret = -ENOMEM;
  1703. goto out_unlock;
  1704. }
  1705. user_rects = (void __user *)(unsigned long)arg->rects;
  1706. ret = copy_from_user(rects, user_rects, rects_size);
  1707. if (unlikely(ret != 0)) {
  1708. DRM_ERROR("Failed to get rects.\n");
  1709. ret = -EFAULT;
  1710. goto out_free;
  1711. }
  1712. for (i = 0; i < arg->num_outputs; ++i) {
  1713. if (rects[i].x < 0 ||
  1714. rects[i].y < 0 ||
  1715. rects[i].x + rects[i].w > mode_config->max_width ||
  1716. rects[i].y + rects[i].h > mode_config->max_height) {
  1717. DRM_ERROR("Invalid GUI layout.\n");
  1718. ret = -EINVAL;
  1719. goto out_free;
  1720. }
  1721. }
  1722. vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
  1723. out_free:
  1724. kfree(rects);
  1725. out_unlock:
  1726. ttm_read_unlock(&vmaster->lock);
  1727. return ret;
  1728. }