nouveau_display.c 22 KB

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  1. /*
  2. * Copyright (C) 2008 Maarten Maathuis.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #include <drm/drmP.h>
  27. #include <drm/drm_crtc_helper.h>
  28. #include "nouveau_fbcon.h"
  29. #include "dispnv04/hw.h"
  30. #include "nouveau_crtc.h"
  31. #include "nouveau_dma.h"
  32. #include "nouveau_gem.h"
  33. #include "nouveau_connector.h"
  34. #include "nv50_display.h"
  35. #include "nouveau_fence.h"
  36. #include <engine/disp.h>
  37. #include <core/class.h>
  38. static int
  39. nouveau_display_vblank_handler(void *data, int head)
  40. {
  41. struct nouveau_drm *drm = data;
  42. drm_handle_vblank(drm->dev, head);
  43. return NVKM_EVENT_KEEP;
  44. }
  45. int
  46. nouveau_display_vblank_enable(struct drm_device *dev, int head)
  47. {
  48. struct nouveau_display *disp = nouveau_display(dev);
  49. if (disp) {
  50. nouveau_event_get(disp->vblank[head]);
  51. return 0;
  52. }
  53. return -EIO;
  54. }
  55. void
  56. nouveau_display_vblank_disable(struct drm_device *dev, int head)
  57. {
  58. struct nouveau_display *disp = nouveau_display(dev);
  59. if (disp)
  60. nouveau_event_put(disp->vblank[head]);
  61. }
  62. static inline int
  63. calc(int blanks, int blanke, int total, int line)
  64. {
  65. if (blanke >= blanks) {
  66. if (line >= blanks)
  67. line -= total;
  68. } else {
  69. if (line >= blanks)
  70. line -= total;
  71. line -= blanke + 1;
  72. }
  73. return line;
  74. }
  75. int
  76. nouveau_display_scanoutpos_head(struct drm_crtc *crtc, int *vpos, int *hpos,
  77. ktime_t *stime, ktime_t *etime)
  78. {
  79. const u32 mthd = NV04_DISP_SCANOUTPOS + nouveau_crtc(crtc)->index;
  80. struct nouveau_display *disp = nouveau_display(crtc->dev);
  81. struct nv04_display_scanoutpos args;
  82. int ret, retry = 1;
  83. do {
  84. ret = nv_exec(disp->core, mthd, &args, sizeof(args));
  85. if (ret != 0)
  86. return 0;
  87. if (args.vline) {
  88. ret |= DRM_SCANOUTPOS_ACCURATE;
  89. ret |= DRM_SCANOUTPOS_VALID;
  90. break;
  91. }
  92. if (retry) ndelay(crtc->linedur_ns);
  93. } while (retry--);
  94. *hpos = calc(args.hblanks, args.hblanke, args.htotal, args.hline);
  95. *vpos = calc(args.vblanks, args.vblanke, args.vtotal, args.vline);
  96. if (stime) *stime = ns_to_ktime(args.time[0]);
  97. if (etime) *etime = ns_to_ktime(args.time[1]);
  98. if (*vpos < 0)
  99. ret |= DRM_SCANOUTPOS_INVBL;
  100. return ret;
  101. }
  102. int
  103. nouveau_display_scanoutpos(struct drm_device *dev, int head, unsigned int flags,
  104. int *vpos, int *hpos, ktime_t *stime, ktime_t *etime)
  105. {
  106. struct drm_crtc *crtc;
  107. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  108. if (nouveau_crtc(crtc)->index == head) {
  109. return nouveau_display_scanoutpos_head(crtc, vpos, hpos,
  110. stime, etime);
  111. }
  112. }
  113. return 0;
  114. }
  115. int
  116. nouveau_display_vblstamp(struct drm_device *dev, int head, int *max_error,
  117. struct timeval *time, unsigned flags)
  118. {
  119. struct drm_crtc *crtc;
  120. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  121. if (nouveau_crtc(crtc)->index == head) {
  122. return drm_calc_vbltimestamp_from_scanoutpos(dev,
  123. head, max_error, time, flags, crtc,
  124. &crtc->hwmode);
  125. }
  126. }
  127. return -EINVAL;
  128. }
  129. static void
  130. nouveau_display_vblank_fini(struct drm_device *dev)
  131. {
  132. struct nouveau_display *disp = nouveau_display(dev);
  133. int i;
  134. drm_vblank_cleanup(dev);
  135. if (disp->vblank) {
  136. for (i = 0; i < dev->mode_config.num_crtc; i++)
  137. nouveau_event_ref(NULL, &disp->vblank[i]);
  138. kfree(disp->vblank);
  139. disp->vblank = NULL;
  140. }
  141. }
  142. static int
  143. nouveau_display_vblank_init(struct drm_device *dev)
  144. {
  145. struct nouveau_display *disp = nouveau_display(dev);
  146. struct nouveau_drm *drm = nouveau_drm(dev);
  147. struct nouveau_disp *pdisp = nouveau_disp(drm->device);
  148. int ret, i;
  149. disp->vblank = kzalloc(dev->mode_config.num_crtc *
  150. sizeof(*disp->vblank), GFP_KERNEL);
  151. if (!disp->vblank)
  152. return -ENOMEM;
  153. for (i = 0; i < dev->mode_config.num_crtc; i++) {
  154. ret = nouveau_event_new(pdisp->vblank, i,
  155. nouveau_display_vblank_handler,
  156. drm, &disp->vblank[i]);
  157. if (ret) {
  158. nouveau_display_vblank_fini(dev);
  159. return ret;
  160. }
  161. }
  162. ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
  163. if (ret) {
  164. nouveau_display_vblank_fini(dev);
  165. return ret;
  166. }
  167. return 0;
  168. }
  169. static void
  170. nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
  171. {
  172. struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
  173. if (fb->nvbo)
  174. drm_gem_object_unreference_unlocked(&fb->nvbo->gem);
  175. drm_framebuffer_cleanup(drm_fb);
  176. kfree(fb);
  177. }
  178. static int
  179. nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
  180. struct drm_file *file_priv,
  181. unsigned int *handle)
  182. {
  183. struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
  184. return drm_gem_handle_create(file_priv, &fb->nvbo->gem, handle);
  185. }
  186. static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
  187. .destroy = nouveau_user_framebuffer_destroy,
  188. .create_handle = nouveau_user_framebuffer_create_handle,
  189. };
  190. int
  191. nouveau_framebuffer_init(struct drm_device *dev,
  192. struct nouveau_framebuffer *nv_fb,
  193. struct drm_mode_fb_cmd2 *mode_cmd,
  194. struct nouveau_bo *nvbo)
  195. {
  196. struct nouveau_drm *drm = nouveau_drm(dev);
  197. struct drm_framebuffer *fb = &nv_fb->base;
  198. int ret;
  199. drm_helper_mode_fill_fb_struct(fb, mode_cmd);
  200. nv_fb->nvbo = nvbo;
  201. if (nv_device(drm->device)->card_type >= NV_50) {
  202. u32 tile_flags = nouveau_bo_tile_layout(nvbo);
  203. if (tile_flags == 0x7a00 ||
  204. tile_flags == 0xfe00)
  205. nv_fb->r_dma = NvEvoFB32;
  206. else
  207. if (tile_flags == 0x7000)
  208. nv_fb->r_dma = NvEvoFB16;
  209. else
  210. nv_fb->r_dma = NvEvoVRAM_LP;
  211. switch (fb->depth) {
  212. case 8: nv_fb->r_format = 0x1e00; break;
  213. case 15: nv_fb->r_format = 0xe900; break;
  214. case 16: nv_fb->r_format = 0xe800; break;
  215. case 24:
  216. case 32: nv_fb->r_format = 0xcf00; break;
  217. case 30: nv_fb->r_format = 0xd100; break;
  218. default:
  219. NV_ERROR(drm, "unknown depth %d\n", fb->depth);
  220. return -EINVAL;
  221. }
  222. if (nvbo->tile_flags & NOUVEAU_GEM_TILE_NONCONTIG) {
  223. NV_ERROR(drm, "framebuffer requires contiguous bo\n");
  224. return -EINVAL;
  225. }
  226. if (nv_device(drm->device)->chipset == 0x50)
  227. nv_fb->r_format |= (tile_flags << 8);
  228. if (!tile_flags) {
  229. if (nv_device(drm->device)->card_type < NV_D0)
  230. nv_fb->r_pitch = 0x00100000 | fb->pitches[0];
  231. else
  232. nv_fb->r_pitch = 0x01000000 | fb->pitches[0];
  233. } else {
  234. u32 mode = nvbo->tile_mode;
  235. if (nv_device(drm->device)->card_type >= NV_C0)
  236. mode >>= 4;
  237. nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode;
  238. }
  239. }
  240. ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
  241. if (ret) {
  242. return ret;
  243. }
  244. return 0;
  245. }
  246. static struct drm_framebuffer *
  247. nouveau_user_framebuffer_create(struct drm_device *dev,
  248. struct drm_file *file_priv,
  249. struct drm_mode_fb_cmd2 *mode_cmd)
  250. {
  251. struct nouveau_framebuffer *nouveau_fb;
  252. struct drm_gem_object *gem;
  253. int ret = -ENOMEM;
  254. gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
  255. if (!gem)
  256. return ERR_PTR(-ENOENT);
  257. nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
  258. if (!nouveau_fb)
  259. goto err_unref;
  260. ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
  261. if (ret)
  262. goto err;
  263. return &nouveau_fb->base;
  264. err:
  265. kfree(nouveau_fb);
  266. err_unref:
  267. drm_gem_object_unreference(gem);
  268. return ERR_PTR(ret);
  269. }
  270. static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
  271. .fb_create = nouveau_user_framebuffer_create,
  272. .output_poll_changed = nouveau_fbcon_output_poll_changed,
  273. };
  274. struct nouveau_drm_prop_enum_list {
  275. u8 gen_mask;
  276. int type;
  277. char *name;
  278. };
  279. static struct nouveau_drm_prop_enum_list underscan[] = {
  280. { 6, UNDERSCAN_AUTO, "auto" },
  281. { 6, UNDERSCAN_OFF, "off" },
  282. { 6, UNDERSCAN_ON, "on" },
  283. {}
  284. };
  285. static struct nouveau_drm_prop_enum_list dither_mode[] = {
  286. { 7, DITHERING_MODE_AUTO, "auto" },
  287. { 7, DITHERING_MODE_OFF, "off" },
  288. { 1, DITHERING_MODE_ON, "on" },
  289. { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
  290. { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
  291. { 4, DITHERING_MODE_TEMPORAL, "temporal" },
  292. {}
  293. };
  294. static struct nouveau_drm_prop_enum_list dither_depth[] = {
  295. { 6, DITHERING_DEPTH_AUTO, "auto" },
  296. { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
  297. { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
  298. {}
  299. };
  300. #define PROP_ENUM(p,gen,n,list) do { \
  301. struct nouveau_drm_prop_enum_list *l = (list); \
  302. int c = 0; \
  303. while (l->gen_mask) { \
  304. if (l->gen_mask & (1 << (gen))) \
  305. c++; \
  306. l++; \
  307. } \
  308. if (c) { \
  309. p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
  310. l = (list); \
  311. c = 0; \
  312. while (p && l->gen_mask) { \
  313. if (l->gen_mask & (1 << (gen))) { \
  314. drm_property_add_enum(p, c, l->type, l->name); \
  315. c++; \
  316. } \
  317. l++; \
  318. } \
  319. } \
  320. } while(0)
  321. int
  322. nouveau_display_init(struct drm_device *dev)
  323. {
  324. struct nouveau_display *disp = nouveau_display(dev);
  325. struct drm_connector *connector;
  326. int ret;
  327. ret = disp->init(dev);
  328. if (ret)
  329. return ret;
  330. /* enable polling for external displays */
  331. drm_kms_helper_poll_enable(dev);
  332. /* enable hotplug interrupts */
  333. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  334. struct nouveau_connector *conn = nouveau_connector(connector);
  335. if (conn->hpd_func) nouveau_event_get(conn->hpd_func);
  336. }
  337. return ret;
  338. }
  339. void
  340. nouveau_display_fini(struct drm_device *dev)
  341. {
  342. struct nouveau_display *disp = nouveau_display(dev);
  343. struct drm_connector *connector;
  344. /* disable hotplug interrupts */
  345. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  346. struct nouveau_connector *conn = nouveau_connector(connector);
  347. if (conn->hpd_func) nouveau_event_put(conn->hpd_func);
  348. }
  349. drm_kms_helper_poll_disable(dev);
  350. disp->fini(dev);
  351. }
  352. int
  353. nouveau_display_create(struct drm_device *dev)
  354. {
  355. struct nouveau_drm *drm = nouveau_drm(dev);
  356. struct nouveau_display *disp;
  357. int ret, gen;
  358. disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL);
  359. if (!disp)
  360. return -ENOMEM;
  361. drm_mode_config_init(dev);
  362. drm_mode_create_scaling_mode_property(dev);
  363. drm_mode_create_dvi_i_properties(dev);
  364. if (nv_device(drm->device)->card_type < NV_50)
  365. gen = 0;
  366. else
  367. if (nv_device(drm->device)->card_type < NV_D0)
  368. gen = 1;
  369. else
  370. gen = 2;
  371. PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
  372. PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
  373. PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
  374. disp->underscan_hborder_property =
  375. drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
  376. disp->underscan_vborder_property =
  377. drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
  378. if (gen >= 1) {
  379. /* -90..+90 */
  380. disp->vibrant_hue_property =
  381. drm_property_create_range(dev, 0, "vibrant hue", 0, 180);
  382. /* -100..+100 */
  383. disp->color_vibrance_property =
  384. drm_property_create_range(dev, 0, "color vibrance", 0, 200);
  385. }
  386. dev->mode_config.funcs = &nouveau_mode_config_funcs;
  387. dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1);
  388. dev->mode_config.min_width = 0;
  389. dev->mode_config.min_height = 0;
  390. if (nv_device(drm->device)->card_type < NV_10) {
  391. dev->mode_config.max_width = 2048;
  392. dev->mode_config.max_height = 2048;
  393. } else
  394. if (nv_device(drm->device)->card_type < NV_50) {
  395. dev->mode_config.max_width = 4096;
  396. dev->mode_config.max_height = 4096;
  397. } else {
  398. dev->mode_config.max_width = 8192;
  399. dev->mode_config.max_height = 8192;
  400. }
  401. dev->mode_config.preferred_depth = 24;
  402. dev->mode_config.prefer_shadow = 1;
  403. if (nv_device(drm->device)->chipset < 0x11)
  404. dev->mode_config.async_page_flip = false;
  405. else
  406. dev->mode_config.async_page_flip = true;
  407. drm_kms_helper_poll_init(dev);
  408. drm_kms_helper_poll_disable(dev);
  409. if (drm->vbios.dcb.entries) {
  410. static const u16 oclass[] = {
  411. NVF0_DISP_CLASS,
  412. NVE0_DISP_CLASS,
  413. NVD0_DISP_CLASS,
  414. NVA3_DISP_CLASS,
  415. NV94_DISP_CLASS,
  416. NVA0_DISP_CLASS,
  417. NV84_DISP_CLASS,
  418. NV50_DISP_CLASS,
  419. NV04_DISP_CLASS,
  420. };
  421. int i;
  422. for (i = 0, ret = -ENODEV; ret && i < ARRAY_SIZE(oclass); i++) {
  423. ret = nouveau_object_new(nv_object(drm), NVDRM_DEVICE,
  424. NVDRM_DISPLAY, oclass[i],
  425. NULL, 0, &disp->core);
  426. }
  427. if (ret == 0) {
  428. if (nv_mclass(disp->core) < NV50_DISP_CLASS)
  429. ret = nv04_display_create(dev);
  430. else
  431. ret = nv50_display_create(dev);
  432. }
  433. } else {
  434. ret = 0;
  435. }
  436. if (ret)
  437. goto disp_create_err;
  438. if (dev->mode_config.num_crtc) {
  439. ret = nouveau_display_vblank_init(dev);
  440. if (ret)
  441. goto vblank_err;
  442. }
  443. nouveau_backlight_init(dev);
  444. return 0;
  445. vblank_err:
  446. disp->dtor(dev);
  447. disp_create_err:
  448. drm_kms_helper_poll_fini(dev);
  449. drm_mode_config_cleanup(dev);
  450. return ret;
  451. }
  452. void
  453. nouveau_display_destroy(struct drm_device *dev)
  454. {
  455. struct nouveau_display *disp = nouveau_display(dev);
  456. struct nouveau_drm *drm = nouveau_drm(dev);
  457. nouveau_backlight_exit(dev);
  458. nouveau_display_vblank_fini(dev);
  459. drm_kms_helper_poll_fini(dev);
  460. drm_mode_config_cleanup(dev);
  461. if (disp->dtor)
  462. disp->dtor(dev);
  463. nouveau_object_del(nv_object(drm), NVDRM_DEVICE, NVDRM_DISPLAY);
  464. nouveau_drm(dev)->display = NULL;
  465. kfree(disp);
  466. }
  467. int
  468. nouveau_display_suspend(struct drm_device *dev)
  469. {
  470. struct nouveau_drm *drm = nouveau_drm(dev);
  471. struct drm_crtc *crtc;
  472. nouveau_display_fini(dev);
  473. NV_INFO(drm, "unpinning framebuffer(s)...\n");
  474. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  475. struct nouveau_framebuffer *nouveau_fb;
  476. nouveau_fb = nouveau_framebuffer(crtc->fb);
  477. if (!nouveau_fb || !nouveau_fb->nvbo)
  478. continue;
  479. nouveau_bo_unpin(nouveau_fb->nvbo);
  480. }
  481. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  482. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  483. nouveau_bo_unmap(nv_crtc->cursor.nvbo);
  484. nouveau_bo_unpin(nv_crtc->cursor.nvbo);
  485. }
  486. return 0;
  487. }
  488. void
  489. nouveau_display_repin(struct drm_device *dev)
  490. {
  491. struct nouveau_drm *drm = nouveau_drm(dev);
  492. struct drm_crtc *crtc;
  493. int ret;
  494. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  495. struct nouveau_framebuffer *nouveau_fb;
  496. nouveau_fb = nouveau_framebuffer(crtc->fb);
  497. if (!nouveau_fb || !nouveau_fb->nvbo)
  498. continue;
  499. nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
  500. }
  501. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  502. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  503. ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
  504. if (!ret)
  505. ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
  506. if (ret)
  507. NV_ERROR(drm, "Could not pin/map cursor.\n");
  508. }
  509. }
  510. void
  511. nouveau_display_resume(struct drm_device *dev)
  512. {
  513. struct drm_crtc *crtc;
  514. nouveau_display_init(dev);
  515. /* Force CLUT to get re-loaded during modeset */
  516. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  517. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  518. nv_crtc->lut.depth = 0;
  519. }
  520. drm_helper_resume_force_mode(dev);
  521. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  522. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  523. u32 offset = nv_crtc->cursor.nvbo->bo.offset;
  524. nv_crtc->cursor.set_offset(nv_crtc, offset);
  525. nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
  526. nv_crtc->cursor_saved_y);
  527. }
  528. }
  529. static int
  530. nouveau_page_flip_emit(struct nouveau_channel *chan,
  531. struct nouveau_bo *old_bo,
  532. struct nouveau_bo *new_bo,
  533. struct nouveau_page_flip_state *s,
  534. struct nouveau_fence **pfence)
  535. {
  536. struct nouveau_fence_chan *fctx = chan->fence;
  537. struct nouveau_drm *drm = chan->drm;
  538. struct drm_device *dev = drm->dev;
  539. unsigned long flags;
  540. int ret;
  541. /* Queue it to the pending list */
  542. spin_lock_irqsave(&dev->event_lock, flags);
  543. list_add_tail(&s->head, &fctx->flip);
  544. spin_unlock_irqrestore(&dev->event_lock, flags);
  545. /* Synchronize with the old framebuffer */
  546. ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
  547. if (ret)
  548. goto fail;
  549. /* Emit the pageflip */
  550. ret = RING_SPACE(chan, 2);
  551. if (ret)
  552. goto fail;
  553. if (nv_device(drm->device)->card_type < NV_C0)
  554. BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
  555. else
  556. BEGIN_NVC0(chan, FermiSw, NV_SW_PAGE_FLIP, 1);
  557. OUT_RING (chan, 0x00000000);
  558. FIRE_RING (chan);
  559. ret = nouveau_fence_new(chan, false, pfence);
  560. if (ret)
  561. goto fail;
  562. return 0;
  563. fail:
  564. spin_lock_irqsave(&dev->event_lock, flags);
  565. list_del(&s->head);
  566. spin_unlock_irqrestore(&dev->event_lock, flags);
  567. return ret;
  568. }
  569. int
  570. nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
  571. struct drm_pending_vblank_event *event, u32 flags)
  572. {
  573. const int swap_interval = (flags & DRM_MODE_PAGE_FLIP_ASYNC) ? 0 : 1;
  574. struct drm_device *dev = crtc->dev;
  575. struct nouveau_drm *drm = nouveau_drm(dev);
  576. struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo;
  577. struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
  578. struct nouveau_page_flip_state *s;
  579. struct nouveau_channel *chan = drm->channel;
  580. struct nouveau_fence *fence;
  581. int ret;
  582. if (!drm->channel)
  583. return -ENODEV;
  584. s = kzalloc(sizeof(*s), GFP_KERNEL);
  585. if (!s)
  586. return -ENOMEM;
  587. if (new_bo != old_bo) {
  588. ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
  589. if (ret)
  590. goto fail_free;
  591. }
  592. mutex_lock(&chan->cli->mutex);
  593. /* synchronise rendering channel with the kernel's channel */
  594. spin_lock(&new_bo->bo.bdev->fence_lock);
  595. fence = nouveau_fence_ref(new_bo->bo.sync_obj);
  596. spin_unlock(&new_bo->bo.bdev->fence_lock);
  597. ret = nouveau_fence_sync(fence, chan);
  598. nouveau_fence_unref(&fence);
  599. if (ret)
  600. goto fail_unpin;
  601. ret = ttm_bo_reserve(&old_bo->bo, true, false, false, NULL);
  602. if (ret)
  603. goto fail_unpin;
  604. /* Initialize a page flip struct */
  605. *s = (struct nouveau_page_flip_state)
  606. { { }, event, nouveau_crtc(crtc)->index,
  607. fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
  608. new_bo->bo.offset };
  609. /* Emit a page flip */
  610. if (nv_device(drm->device)->card_type >= NV_50) {
  611. ret = nv50_display_flip_next(crtc, fb, chan, swap_interval);
  612. if (ret)
  613. goto fail_unreserve;
  614. } else {
  615. struct nv04_display *dispnv04 = nv04_display(dev);
  616. int head = nouveau_crtc(crtc)->index;
  617. if (swap_interval) {
  618. ret = RING_SPACE(chan, 8);
  619. if (ret)
  620. goto fail_unreserve;
  621. BEGIN_NV04(chan, NvSubImageBlit, 0x012c, 1);
  622. OUT_RING (chan, 0);
  623. BEGIN_NV04(chan, NvSubImageBlit, 0x0134, 1);
  624. OUT_RING (chan, head);
  625. BEGIN_NV04(chan, NvSubImageBlit, 0x0100, 1);
  626. OUT_RING (chan, 0);
  627. BEGIN_NV04(chan, NvSubImageBlit, 0x0130, 1);
  628. OUT_RING (chan, 0);
  629. }
  630. nouveau_bo_ref(new_bo, &dispnv04->image[head]);
  631. }
  632. ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
  633. mutex_unlock(&chan->cli->mutex);
  634. if (ret)
  635. goto fail_unreserve;
  636. /* Update the crtc struct and cleanup */
  637. crtc->fb = fb;
  638. nouveau_bo_fence(old_bo, fence);
  639. ttm_bo_unreserve(&old_bo->bo);
  640. if (old_bo != new_bo)
  641. nouveau_bo_unpin(old_bo);
  642. nouveau_fence_unref(&fence);
  643. return 0;
  644. fail_unreserve:
  645. ttm_bo_unreserve(&old_bo->bo);
  646. fail_unpin:
  647. mutex_unlock(&chan->cli->mutex);
  648. if (old_bo != new_bo)
  649. nouveau_bo_unpin(new_bo);
  650. fail_free:
  651. kfree(s);
  652. return ret;
  653. }
  654. int
  655. nouveau_finish_page_flip(struct nouveau_channel *chan,
  656. struct nouveau_page_flip_state *ps)
  657. {
  658. struct nouveau_fence_chan *fctx = chan->fence;
  659. struct nouveau_drm *drm = chan->drm;
  660. struct drm_device *dev = drm->dev;
  661. struct nouveau_page_flip_state *s;
  662. unsigned long flags;
  663. spin_lock_irqsave(&dev->event_lock, flags);
  664. if (list_empty(&fctx->flip)) {
  665. NV_ERROR(drm, "unexpected pageflip\n");
  666. spin_unlock_irqrestore(&dev->event_lock, flags);
  667. return -EINVAL;
  668. }
  669. s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
  670. if (s->event)
  671. drm_send_vblank_event(dev, s->crtc, s->event);
  672. list_del(&s->head);
  673. if (ps)
  674. *ps = *s;
  675. kfree(s);
  676. spin_unlock_irqrestore(&dev->event_lock, flags);
  677. return 0;
  678. }
  679. int
  680. nouveau_flip_complete(void *data)
  681. {
  682. struct nouveau_channel *chan = data;
  683. struct nouveau_drm *drm = chan->drm;
  684. struct nouveau_page_flip_state state;
  685. if (!nouveau_finish_page_flip(chan, &state)) {
  686. if (nv_device(drm->device)->card_type < NV_50) {
  687. nv_set_crtc_base(drm->dev, state.crtc, state.offset +
  688. state.y * state.pitch +
  689. state.x * state.bpp / 8);
  690. }
  691. }
  692. return 0;
  693. }
  694. int
  695. nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
  696. struct drm_mode_create_dumb *args)
  697. {
  698. struct nouveau_bo *bo;
  699. int ret;
  700. args->pitch = roundup(args->width * (args->bpp / 8), 256);
  701. args->size = args->pitch * args->height;
  702. args->size = roundup(args->size, PAGE_SIZE);
  703. ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo);
  704. if (ret)
  705. return ret;
  706. ret = drm_gem_handle_create(file_priv, &bo->gem, &args->handle);
  707. drm_gem_object_unreference_unlocked(&bo->gem);
  708. return ret;
  709. }
  710. int
  711. nouveau_display_dumb_map_offset(struct drm_file *file_priv,
  712. struct drm_device *dev,
  713. uint32_t handle, uint64_t *poffset)
  714. {
  715. struct drm_gem_object *gem;
  716. gem = drm_gem_object_lookup(dev, file_priv, handle);
  717. if (gem) {
  718. struct nouveau_bo *bo = nouveau_gem_object(gem);
  719. *poffset = drm_vma_node_offset_addr(&bo->bo.vma_node);
  720. drm_gem_object_unreference_unlocked(gem);
  721. return 0;
  722. }
  723. return -ENOENT;
  724. }