mdp5_kms.c 9.2 KB

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  1. /*
  2. * Copyright (C) 2013 Red Hat
  3. * Author: Rob Clark <robdclark@gmail.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #include "msm_drv.h"
  18. #include "msm_mmu.h"
  19. #include "mdp5_kms.h"
  20. static struct mdp5_platform_config *mdp5_get_config(struct platform_device *dev);
  21. static int mdp5_hw_init(struct msm_kms *kms)
  22. {
  23. struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
  24. struct drm_device *dev = mdp5_kms->dev;
  25. uint32_t version, major, minor;
  26. int ret = 0;
  27. pm_runtime_get_sync(dev->dev);
  28. mdp5_enable(mdp5_kms);
  29. version = mdp5_read(mdp5_kms, REG_MDP5_MDP_VERSION);
  30. mdp5_disable(mdp5_kms);
  31. major = FIELD(version, MDP5_MDP_VERSION_MAJOR);
  32. minor = FIELD(version, MDP5_MDP_VERSION_MINOR);
  33. DBG("found MDP5 version v%d.%d", major, minor);
  34. if ((major != 1) || ((minor != 0) && (minor != 2))) {
  35. dev_err(dev->dev, "unexpected MDP version: v%d.%d\n",
  36. major, minor);
  37. ret = -ENXIO;
  38. goto out;
  39. }
  40. mdp5_kms->rev = minor;
  41. /* Magic unknown register writes:
  42. *
  43. * W VBIF:0x004 00000001 (mdss_mdp.c:839)
  44. * W MDP5:0x2e0 0xe9 (mdss_mdp.c:839)
  45. * W MDP5:0x2e4 0x55 (mdss_mdp.c:839)
  46. * W MDP5:0x3ac 0xc0000ccc (mdss_mdp.c:839)
  47. * W MDP5:0x3b4 0xc0000ccc (mdss_mdp.c:839)
  48. * W MDP5:0x3bc 0xcccccc (mdss_mdp.c:839)
  49. * W MDP5:0x4a8 0xcccc0c0 (mdss_mdp.c:839)
  50. * W MDP5:0x4b0 0xccccc0c0 (mdss_mdp.c:839)
  51. * W MDP5:0x4b8 0xccccc000 (mdss_mdp.c:839)
  52. *
  53. * Downstream fbdev driver gets these register offsets/values
  54. * from DT.. not really sure what these registers are or if
  55. * different values for different boards/SoC's, etc. I guess
  56. * they are the golden registers.
  57. *
  58. * Not setting these does not seem to cause any problem. But
  59. * we may be getting lucky with the bootloader initializing
  60. * them for us. OTOH, if we can always count on the bootloader
  61. * setting the golden registers, then perhaps we don't need to
  62. * care.
  63. */
  64. mdp5_write(mdp5_kms, REG_MDP5_DISP_INTF_SEL, 0);
  65. mdp5_write(mdp5_kms, REG_MDP5_CTL_OP(0), 0);
  66. mdp5_write(mdp5_kms, REG_MDP5_CTL_OP(1), 0);
  67. mdp5_write(mdp5_kms, REG_MDP5_CTL_OP(2), 0);
  68. mdp5_write(mdp5_kms, REG_MDP5_CTL_OP(3), 0);
  69. out:
  70. pm_runtime_put_sync(dev->dev);
  71. return ret;
  72. }
  73. static long mdp5_round_pixclk(struct msm_kms *kms, unsigned long rate,
  74. struct drm_encoder *encoder)
  75. {
  76. return rate;
  77. }
  78. static void mdp5_preclose(struct msm_kms *kms, struct drm_file *file)
  79. {
  80. struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
  81. struct msm_drm_private *priv = mdp5_kms->dev->dev_private;
  82. unsigned i;
  83. for (i = 0; i < priv->num_crtcs; i++)
  84. mdp5_crtc_cancel_pending_flip(priv->crtcs[i], file);
  85. }
  86. static void mdp5_destroy(struct msm_kms *kms)
  87. {
  88. struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
  89. kfree(mdp5_kms);
  90. }
  91. static const struct mdp_kms_funcs kms_funcs = {
  92. .base = {
  93. .hw_init = mdp5_hw_init,
  94. .irq_preinstall = mdp5_irq_preinstall,
  95. .irq_postinstall = mdp5_irq_postinstall,
  96. .irq_uninstall = mdp5_irq_uninstall,
  97. .irq = mdp5_irq,
  98. .enable_vblank = mdp5_enable_vblank,
  99. .disable_vblank = mdp5_disable_vblank,
  100. .get_format = mdp_get_format,
  101. .round_pixclk = mdp5_round_pixclk,
  102. .preclose = mdp5_preclose,
  103. .destroy = mdp5_destroy,
  104. },
  105. .set_irqmask = mdp5_set_irqmask,
  106. };
  107. int mdp5_disable(struct mdp5_kms *mdp5_kms)
  108. {
  109. DBG("");
  110. clk_disable_unprepare(mdp5_kms->ahb_clk);
  111. clk_disable_unprepare(mdp5_kms->axi_clk);
  112. clk_disable_unprepare(mdp5_kms->core_clk);
  113. clk_disable_unprepare(mdp5_kms->lut_clk);
  114. return 0;
  115. }
  116. int mdp5_enable(struct mdp5_kms *mdp5_kms)
  117. {
  118. DBG("");
  119. clk_prepare_enable(mdp5_kms->ahb_clk);
  120. clk_prepare_enable(mdp5_kms->axi_clk);
  121. clk_prepare_enable(mdp5_kms->core_clk);
  122. clk_prepare_enable(mdp5_kms->lut_clk);
  123. return 0;
  124. }
  125. static int modeset_init(struct mdp5_kms *mdp5_kms)
  126. {
  127. static const enum mdp5_pipe crtcs[] = {
  128. SSPP_RGB0, SSPP_RGB1, SSPP_RGB2,
  129. };
  130. struct drm_device *dev = mdp5_kms->dev;
  131. struct msm_drm_private *priv = dev->dev_private;
  132. struct drm_encoder *encoder;
  133. int i, ret;
  134. /* construct CRTCs: */
  135. for (i = 0; i < ARRAY_SIZE(crtcs); i++) {
  136. struct drm_plane *plane;
  137. struct drm_crtc *crtc;
  138. plane = mdp5_plane_init(dev, crtcs[i], true);
  139. if (IS_ERR(plane)) {
  140. ret = PTR_ERR(plane);
  141. dev_err(dev->dev, "failed to construct plane for %s (%d)\n",
  142. pipe2name(crtcs[i]), ret);
  143. goto fail;
  144. }
  145. crtc = mdp5_crtc_init(dev, plane, i);
  146. if (IS_ERR(crtc)) {
  147. ret = PTR_ERR(crtc);
  148. dev_err(dev->dev, "failed to construct crtc for %s (%d)\n",
  149. pipe2name(crtcs[i]), ret);
  150. goto fail;
  151. }
  152. priv->crtcs[priv->num_crtcs++] = crtc;
  153. }
  154. /* Construct encoder for HDMI: */
  155. encoder = mdp5_encoder_init(dev, 3, INTF_HDMI);
  156. if (IS_ERR(encoder)) {
  157. dev_err(dev->dev, "failed to construct encoder\n");
  158. ret = PTR_ERR(encoder);
  159. goto fail;
  160. }
  161. /* NOTE: the vsync and error irq's are actually associated with
  162. * the INTF/encoder.. the easiest way to deal with this (ie. what
  163. * we do now) is assume a fixed relationship between crtc's and
  164. * encoders. I'm not sure if there is ever a need to more freely
  165. * assign crtcs to encoders, but if there is then we need to take
  166. * care of error and vblank irq's that the crtc has registered,
  167. * and also update user-requested vblank_mask.
  168. */
  169. encoder->possible_crtcs = BIT(0);
  170. mdp5_crtc_set_intf(priv->crtcs[0], 3, INTF_HDMI);
  171. priv->encoders[priv->num_encoders++] = encoder;
  172. /* Construct bridge/connector for HDMI: */
  173. mdp5_kms->hdmi = hdmi_init(dev, encoder);
  174. if (IS_ERR(mdp5_kms->hdmi)) {
  175. ret = PTR_ERR(mdp5_kms->hdmi);
  176. dev_err(dev->dev, "failed to initialize HDMI: %d\n", ret);
  177. goto fail;
  178. }
  179. return 0;
  180. fail:
  181. return ret;
  182. }
  183. static const char *iommu_ports[] = {
  184. "mdp_0",
  185. };
  186. static int get_clk(struct platform_device *pdev, struct clk **clkp,
  187. const char *name)
  188. {
  189. struct device *dev = &pdev->dev;
  190. struct clk *clk = devm_clk_get(dev, name);
  191. if (IS_ERR(clk)) {
  192. dev_err(dev, "failed to get %s (%ld)\n", name, PTR_ERR(clk));
  193. return PTR_ERR(clk);
  194. }
  195. *clkp = clk;
  196. return 0;
  197. }
  198. struct msm_kms *mdp5_kms_init(struct drm_device *dev)
  199. {
  200. struct platform_device *pdev = dev->platformdev;
  201. struct mdp5_platform_config *config = mdp5_get_config(pdev);
  202. struct mdp5_kms *mdp5_kms;
  203. struct msm_kms *kms = NULL;
  204. struct msm_mmu *mmu;
  205. int ret;
  206. mdp5_kms = kzalloc(sizeof(*mdp5_kms), GFP_KERNEL);
  207. if (!mdp5_kms) {
  208. dev_err(dev->dev, "failed to allocate kms\n");
  209. ret = -ENOMEM;
  210. goto fail;
  211. }
  212. mdp_kms_init(&mdp5_kms->base, &kms_funcs);
  213. kms = &mdp5_kms->base.base;
  214. mdp5_kms->dev = dev;
  215. mdp5_kms->smp_blk_cnt = config->smp_blk_cnt;
  216. mdp5_kms->mmio = msm_ioremap(pdev, "mdp_phys", "MDP5");
  217. if (IS_ERR(mdp5_kms->mmio)) {
  218. ret = PTR_ERR(mdp5_kms->mmio);
  219. goto fail;
  220. }
  221. mdp5_kms->vbif = msm_ioremap(pdev, "vbif_phys", "VBIF");
  222. if (IS_ERR(mdp5_kms->vbif)) {
  223. ret = PTR_ERR(mdp5_kms->vbif);
  224. goto fail;
  225. }
  226. mdp5_kms->vdd = devm_regulator_get(&pdev->dev, "vdd");
  227. if (IS_ERR(mdp5_kms->vdd)) {
  228. ret = PTR_ERR(mdp5_kms->vdd);
  229. goto fail;
  230. }
  231. ret = regulator_enable(mdp5_kms->vdd);
  232. if (ret) {
  233. dev_err(dev->dev, "failed to enable regulator vdd: %d\n", ret);
  234. goto fail;
  235. }
  236. ret = get_clk(pdev, &mdp5_kms->axi_clk, "bus_clk") ||
  237. get_clk(pdev, &mdp5_kms->ahb_clk, "iface_clk") ||
  238. get_clk(pdev, &mdp5_kms->src_clk, "core_clk_src") ||
  239. get_clk(pdev, &mdp5_kms->core_clk, "core_clk") ||
  240. get_clk(pdev, &mdp5_kms->lut_clk, "lut_clk") ||
  241. get_clk(pdev, &mdp5_kms->vsync_clk, "vsync_clk");
  242. if (ret)
  243. goto fail;
  244. ret = clk_set_rate(mdp5_kms->src_clk, config->max_clk);
  245. /* make sure things are off before attaching iommu (bootloader could
  246. * have left things on, in which case we'll start getting faults if
  247. * we don't disable):
  248. */
  249. mdp5_enable(mdp5_kms);
  250. mdp5_write(mdp5_kms, REG_MDP5_INTF_TIMING_ENGINE_EN(0), 0);
  251. mdp5_write(mdp5_kms, REG_MDP5_INTF_TIMING_ENGINE_EN(1), 0);
  252. mdp5_write(mdp5_kms, REG_MDP5_INTF_TIMING_ENGINE_EN(2), 0);
  253. mdp5_write(mdp5_kms, REG_MDP5_INTF_TIMING_ENGINE_EN(3), 0);
  254. mdp5_disable(mdp5_kms);
  255. mdelay(16);
  256. if (config->iommu) {
  257. mmu = msm_iommu_new(dev, config->iommu);
  258. if (IS_ERR(mmu)) {
  259. ret = PTR_ERR(mmu);
  260. goto fail;
  261. }
  262. ret = mmu->funcs->attach(mmu, iommu_ports,
  263. ARRAY_SIZE(iommu_ports));
  264. if (ret)
  265. goto fail;
  266. } else {
  267. dev_info(dev->dev, "no iommu, fallback to phys "
  268. "contig buffers for scanout\n");
  269. mmu = NULL;
  270. }
  271. mdp5_kms->id = msm_register_mmu(dev, mmu);
  272. if (mdp5_kms->id < 0) {
  273. ret = mdp5_kms->id;
  274. dev_err(dev->dev, "failed to register mdp5 iommu: %d\n", ret);
  275. goto fail;
  276. }
  277. ret = modeset_init(mdp5_kms);
  278. if (ret) {
  279. dev_err(dev->dev, "modeset_init failed: %d\n", ret);
  280. goto fail;
  281. }
  282. return kms;
  283. fail:
  284. if (kms)
  285. mdp5_destroy(kms);
  286. return ERR_PTR(ret);
  287. }
  288. static struct mdp5_platform_config *mdp5_get_config(struct platform_device *dev)
  289. {
  290. static struct mdp5_platform_config config = {};
  291. #ifdef CONFIG_OF
  292. /* TODO */
  293. #endif
  294. return &config;
  295. }