intel_lvds.c 32 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm_crtc.h>
  35. #include <drm/drm_edid.h>
  36. #include "intel_drv.h"
  37. #include <drm/i915_drm.h>
  38. #include "i915_drv.h"
  39. #include <linux/acpi.h>
  40. /* Private structure for the integrated LVDS support */
  41. struct intel_lvds_connector {
  42. struct intel_connector base;
  43. struct notifier_block lid_notifier;
  44. };
  45. struct intel_lvds_encoder {
  46. struct intel_encoder base;
  47. bool is_dual_link;
  48. u32 reg;
  49. struct intel_lvds_connector *attached_connector;
  50. };
  51. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  52. {
  53. return container_of(encoder, struct intel_lvds_encoder, base.base);
  54. }
  55. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  56. {
  57. return container_of(connector, struct intel_lvds_connector, base.base);
  58. }
  59. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  60. enum pipe *pipe)
  61. {
  62. struct drm_device *dev = encoder->base.dev;
  63. struct drm_i915_private *dev_priv = dev->dev_private;
  64. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  65. u32 tmp;
  66. tmp = I915_READ(lvds_encoder->reg);
  67. if (!(tmp & LVDS_PORT_EN))
  68. return false;
  69. if (HAS_PCH_CPT(dev))
  70. *pipe = PORT_TO_PIPE_CPT(tmp);
  71. else
  72. *pipe = PORT_TO_PIPE(tmp);
  73. return true;
  74. }
  75. static void intel_lvds_get_config(struct intel_encoder *encoder,
  76. struct intel_crtc_config *pipe_config)
  77. {
  78. struct drm_device *dev = encoder->base.dev;
  79. struct drm_i915_private *dev_priv = dev->dev_private;
  80. u32 lvds_reg, tmp, flags = 0;
  81. int dotclock;
  82. if (HAS_PCH_SPLIT(dev))
  83. lvds_reg = PCH_LVDS;
  84. else
  85. lvds_reg = LVDS;
  86. tmp = I915_READ(lvds_reg);
  87. if (tmp & LVDS_HSYNC_POLARITY)
  88. flags |= DRM_MODE_FLAG_NHSYNC;
  89. else
  90. flags |= DRM_MODE_FLAG_PHSYNC;
  91. if (tmp & LVDS_VSYNC_POLARITY)
  92. flags |= DRM_MODE_FLAG_NVSYNC;
  93. else
  94. flags |= DRM_MODE_FLAG_PVSYNC;
  95. pipe_config->adjusted_mode.flags |= flags;
  96. /* gen2/3 store dither state in pfit control, needs to match */
  97. if (INTEL_INFO(dev)->gen < 4) {
  98. tmp = I915_READ(PFIT_CONTROL);
  99. pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
  100. }
  101. dotclock = pipe_config->port_clock;
  102. if (HAS_PCH_SPLIT(dev_priv->dev))
  103. ironlake_check_encoder_dotclock(pipe_config, dotclock);
  104. pipe_config->adjusted_mode.crtc_clock = dotclock;
  105. }
  106. /* The LVDS pin pair needs to be on before the DPLLs are enabled.
  107. * This is an exception to the general rule that mode_set doesn't turn
  108. * things on.
  109. */
  110. static void intel_pre_enable_lvds(struct intel_encoder *encoder)
  111. {
  112. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  113. struct drm_device *dev = encoder->base.dev;
  114. struct drm_i915_private *dev_priv = dev->dev_private;
  115. struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  116. const struct drm_display_mode *adjusted_mode =
  117. &crtc->config.adjusted_mode;
  118. int pipe = crtc->pipe;
  119. u32 temp;
  120. if (HAS_PCH_SPLIT(dev)) {
  121. assert_fdi_rx_pll_disabled(dev_priv, pipe);
  122. assert_shared_dpll_disabled(dev_priv,
  123. intel_crtc_to_shared_dpll(crtc));
  124. } else {
  125. assert_pll_disabled(dev_priv, pipe);
  126. }
  127. temp = I915_READ(lvds_encoder->reg);
  128. temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
  129. if (HAS_PCH_CPT(dev)) {
  130. temp &= ~PORT_TRANS_SEL_MASK;
  131. temp |= PORT_TRANS_SEL_CPT(pipe);
  132. } else {
  133. if (pipe == 1) {
  134. temp |= LVDS_PIPEB_SELECT;
  135. } else {
  136. temp &= ~LVDS_PIPEB_SELECT;
  137. }
  138. }
  139. /* set the corresponsding LVDS_BORDER bit */
  140. temp &= ~LVDS_BORDER_ENABLE;
  141. temp |= crtc->config.gmch_pfit.lvds_border_bits;
  142. /* Set the B0-B3 data pairs corresponding to whether we're going to
  143. * set the DPLLs for dual-channel mode or not.
  144. */
  145. if (lvds_encoder->is_dual_link)
  146. temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
  147. else
  148. temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
  149. /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
  150. * appropriately here, but we need to look more thoroughly into how
  151. * panels behave in the two modes.
  152. */
  153. /* Set the dithering flag on LVDS as needed, note that there is no
  154. * special lvds dither control bit on pch-split platforms, dithering is
  155. * only controlled through the PIPECONF reg. */
  156. if (INTEL_INFO(dev)->gen == 4) {
  157. /* Bspec wording suggests that LVDS port dithering only exists
  158. * for 18bpp panels. */
  159. if (crtc->config.dither && crtc->config.pipe_bpp == 18)
  160. temp |= LVDS_ENABLE_DITHER;
  161. else
  162. temp &= ~LVDS_ENABLE_DITHER;
  163. }
  164. temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
  165. if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
  166. temp |= LVDS_HSYNC_POLARITY;
  167. if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
  168. temp |= LVDS_VSYNC_POLARITY;
  169. I915_WRITE(lvds_encoder->reg, temp);
  170. }
  171. /**
  172. * Sets the power state for the panel.
  173. */
  174. static void intel_enable_lvds(struct intel_encoder *encoder)
  175. {
  176. struct drm_device *dev = encoder->base.dev;
  177. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  178. struct intel_connector *intel_connector =
  179. &lvds_encoder->attached_connector->base;
  180. struct drm_i915_private *dev_priv = dev->dev_private;
  181. u32 ctl_reg, stat_reg;
  182. if (HAS_PCH_SPLIT(dev)) {
  183. ctl_reg = PCH_PP_CONTROL;
  184. stat_reg = PCH_PP_STATUS;
  185. } else {
  186. ctl_reg = PP_CONTROL;
  187. stat_reg = PP_STATUS;
  188. }
  189. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
  190. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  191. POSTING_READ(lvds_encoder->reg);
  192. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  193. DRM_ERROR("timed out waiting for panel to power on\n");
  194. intel_panel_enable_backlight(intel_connector);
  195. }
  196. static void intel_disable_lvds(struct intel_encoder *encoder)
  197. {
  198. struct drm_device *dev = encoder->base.dev;
  199. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  200. struct intel_connector *intel_connector =
  201. &lvds_encoder->attached_connector->base;
  202. struct drm_i915_private *dev_priv = dev->dev_private;
  203. u32 ctl_reg, stat_reg;
  204. if (HAS_PCH_SPLIT(dev)) {
  205. ctl_reg = PCH_PP_CONTROL;
  206. stat_reg = PCH_PP_STATUS;
  207. } else {
  208. ctl_reg = PP_CONTROL;
  209. stat_reg = PP_STATUS;
  210. }
  211. intel_panel_disable_backlight(intel_connector);
  212. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  213. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  214. DRM_ERROR("timed out waiting for panel to power off\n");
  215. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
  216. POSTING_READ(lvds_encoder->reg);
  217. }
  218. static enum drm_mode_status
  219. intel_lvds_mode_valid(struct drm_connector *connector,
  220. struct drm_display_mode *mode)
  221. {
  222. struct intel_connector *intel_connector = to_intel_connector(connector);
  223. struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
  224. if (mode->hdisplay > fixed_mode->hdisplay)
  225. return MODE_PANEL;
  226. if (mode->vdisplay > fixed_mode->vdisplay)
  227. return MODE_PANEL;
  228. return MODE_OK;
  229. }
  230. static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
  231. struct intel_crtc_config *pipe_config)
  232. {
  233. struct drm_device *dev = intel_encoder->base.dev;
  234. struct drm_i915_private *dev_priv = dev->dev_private;
  235. struct intel_lvds_encoder *lvds_encoder =
  236. to_lvds_encoder(&intel_encoder->base);
  237. struct intel_connector *intel_connector =
  238. &lvds_encoder->attached_connector->base;
  239. struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  240. struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
  241. unsigned int lvds_bpp;
  242. /* Should never happen!! */
  243. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  244. DRM_ERROR("Can't support LVDS on pipe A\n");
  245. return false;
  246. }
  247. if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
  248. LVDS_A3_POWER_UP)
  249. lvds_bpp = 8*3;
  250. else
  251. lvds_bpp = 6*3;
  252. if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
  253. DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
  254. pipe_config->pipe_bpp, lvds_bpp);
  255. pipe_config->pipe_bpp = lvds_bpp;
  256. }
  257. /*
  258. * We have timings from the BIOS for the panel, put them in
  259. * to the adjusted mode. The CRTC will be set up for this mode,
  260. * with the panel scaling set up to source from the H/VDisplay
  261. * of the original mode.
  262. */
  263. intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
  264. adjusted_mode);
  265. if (HAS_PCH_SPLIT(dev)) {
  266. pipe_config->has_pch_encoder = true;
  267. intel_pch_panel_fitting(intel_crtc, pipe_config,
  268. intel_connector->panel.fitting_mode);
  269. } else {
  270. intel_gmch_panel_fitting(intel_crtc, pipe_config,
  271. intel_connector->panel.fitting_mode);
  272. }
  273. /*
  274. * XXX: It would be nice to support lower refresh rates on the
  275. * panels to reduce power consumption, and perhaps match the
  276. * user's requested refresh rate.
  277. */
  278. return true;
  279. }
  280. static void intel_lvds_mode_set(struct intel_encoder *encoder)
  281. {
  282. /*
  283. * We don't do anything here, the LVDS port is fully set up in the pre
  284. * enable hook - the ordering constraints for enabling the lvds port vs.
  285. * enabling the display pll are too strict.
  286. */
  287. }
  288. /**
  289. * Detect the LVDS connection.
  290. *
  291. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  292. * connected and closed means disconnected. We also send hotplug events as
  293. * needed, using lid status notification from the input layer.
  294. */
  295. static enum drm_connector_status
  296. intel_lvds_detect(struct drm_connector *connector, bool force)
  297. {
  298. struct drm_device *dev = connector->dev;
  299. enum drm_connector_status status;
  300. DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
  301. connector->base.id, drm_get_connector_name(connector));
  302. status = intel_panel_detect(dev);
  303. if (status != connector_status_unknown)
  304. return status;
  305. return connector_status_connected;
  306. }
  307. /**
  308. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  309. */
  310. static int intel_lvds_get_modes(struct drm_connector *connector)
  311. {
  312. struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  313. struct drm_device *dev = connector->dev;
  314. struct drm_display_mode *mode;
  315. /* use cached edid if we have one */
  316. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  317. return drm_add_edid_modes(connector, lvds_connector->base.edid);
  318. mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
  319. if (mode == NULL)
  320. return 0;
  321. drm_mode_probed_add(connector, mode);
  322. return 1;
  323. }
  324. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  325. {
  326. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  327. return 1;
  328. }
  329. /* The GPU hangs up on these systems if modeset is performed on LID open */
  330. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  331. {
  332. .callback = intel_no_modeset_on_lid_dmi_callback,
  333. .ident = "Toshiba Tecra A11",
  334. .matches = {
  335. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  336. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  337. },
  338. },
  339. { } /* terminating entry */
  340. };
  341. /*
  342. * Lid events. Note the use of 'modeset':
  343. * - we set it to MODESET_ON_LID_OPEN on lid close,
  344. * and set it to MODESET_DONE on open
  345. * - we use it as a "only once" bit (ie we ignore
  346. * duplicate events where it was already properly set)
  347. * - the suspend/resume paths will set it to
  348. * MODESET_SUSPENDED and ignore the lid open event,
  349. * because they restore the mode ("lid open").
  350. */
  351. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  352. void *unused)
  353. {
  354. struct intel_lvds_connector *lvds_connector =
  355. container_of(nb, struct intel_lvds_connector, lid_notifier);
  356. struct drm_connector *connector = &lvds_connector->base.base;
  357. struct drm_device *dev = connector->dev;
  358. struct drm_i915_private *dev_priv = dev->dev_private;
  359. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  360. return NOTIFY_OK;
  361. mutex_lock(&dev_priv->modeset_restore_lock);
  362. if (dev_priv->modeset_restore == MODESET_SUSPENDED)
  363. goto exit;
  364. /*
  365. * check and update the status of LVDS connector after receiving
  366. * the LID nofication event.
  367. */
  368. connector->status = connector->funcs->detect(connector, false);
  369. /* Don't force modeset on machines where it causes a GPU lockup */
  370. if (dmi_check_system(intel_no_modeset_on_lid))
  371. goto exit;
  372. if (!acpi_lid_open()) {
  373. /* do modeset on next lid open event */
  374. dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
  375. goto exit;
  376. }
  377. if (dev_priv->modeset_restore == MODESET_DONE)
  378. goto exit;
  379. /*
  380. * Some old platform's BIOS love to wreak havoc while the lid is closed.
  381. * We try to detect this here and undo any damage. The split for PCH
  382. * platforms is rather conservative and a bit arbitrary expect that on
  383. * those platforms VGA disabling requires actual legacy VGA I/O access,
  384. * and as part of the cleanup in the hw state restore we also redisable
  385. * the vga plane.
  386. */
  387. if (!HAS_PCH_SPLIT(dev)) {
  388. drm_modeset_lock_all(dev);
  389. intel_modeset_setup_hw_state(dev, true);
  390. drm_modeset_unlock_all(dev);
  391. }
  392. dev_priv->modeset_restore = MODESET_DONE;
  393. exit:
  394. mutex_unlock(&dev_priv->modeset_restore_lock);
  395. return NOTIFY_OK;
  396. }
  397. /**
  398. * intel_lvds_destroy - unregister and free LVDS structures
  399. * @connector: connector to free
  400. *
  401. * Unregister the DDC bus for this connector then free the driver private
  402. * structure.
  403. */
  404. static void intel_lvds_destroy(struct drm_connector *connector)
  405. {
  406. struct intel_lvds_connector *lvds_connector =
  407. to_lvds_connector(connector);
  408. if (lvds_connector->lid_notifier.notifier_call)
  409. acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
  410. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  411. kfree(lvds_connector->base.edid);
  412. intel_panel_fini(&lvds_connector->base.panel);
  413. drm_connector_cleanup(connector);
  414. kfree(connector);
  415. }
  416. static int intel_lvds_set_property(struct drm_connector *connector,
  417. struct drm_property *property,
  418. uint64_t value)
  419. {
  420. struct intel_connector *intel_connector = to_intel_connector(connector);
  421. struct drm_device *dev = connector->dev;
  422. if (property == dev->mode_config.scaling_mode_property) {
  423. struct drm_crtc *crtc;
  424. if (value == DRM_MODE_SCALE_NONE) {
  425. DRM_DEBUG_KMS("no scaling not supported\n");
  426. return -EINVAL;
  427. }
  428. if (intel_connector->panel.fitting_mode == value) {
  429. /* the LVDS scaling property is not changed */
  430. return 0;
  431. }
  432. intel_connector->panel.fitting_mode = value;
  433. crtc = intel_attached_encoder(connector)->base.crtc;
  434. if (crtc && crtc->enabled) {
  435. /*
  436. * If the CRTC is enabled, the display will be changed
  437. * according to the new panel fitting mode.
  438. */
  439. intel_crtc_restore_mode(crtc);
  440. }
  441. }
  442. return 0;
  443. }
  444. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  445. .get_modes = intel_lvds_get_modes,
  446. .mode_valid = intel_lvds_mode_valid,
  447. .best_encoder = intel_best_encoder,
  448. };
  449. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  450. .dpms = intel_connector_dpms,
  451. .detect = intel_lvds_detect,
  452. .fill_modes = drm_helper_probe_single_connector_modes,
  453. .set_property = intel_lvds_set_property,
  454. .destroy = intel_lvds_destroy,
  455. };
  456. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  457. .destroy = intel_encoder_destroy,
  458. };
  459. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  460. {
  461. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  462. return 1;
  463. }
  464. /* These systems claim to have LVDS, but really don't */
  465. static const struct dmi_system_id intel_no_lvds[] = {
  466. {
  467. .callback = intel_no_lvds_dmi_callback,
  468. .ident = "Apple Mac Mini (Core series)",
  469. .matches = {
  470. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  471. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  472. },
  473. },
  474. {
  475. .callback = intel_no_lvds_dmi_callback,
  476. .ident = "Apple Mac Mini (Core 2 series)",
  477. .matches = {
  478. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  479. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  480. },
  481. },
  482. {
  483. .callback = intel_no_lvds_dmi_callback,
  484. .ident = "MSI IM-945GSE-A",
  485. .matches = {
  486. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  487. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  488. },
  489. },
  490. {
  491. .callback = intel_no_lvds_dmi_callback,
  492. .ident = "Dell Studio Hybrid",
  493. .matches = {
  494. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  495. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  496. },
  497. },
  498. {
  499. .callback = intel_no_lvds_dmi_callback,
  500. .ident = "Dell OptiPlex FX170",
  501. .matches = {
  502. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  503. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  504. },
  505. },
  506. {
  507. .callback = intel_no_lvds_dmi_callback,
  508. .ident = "AOpen Mini PC",
  509. .matches = {
  510. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  511. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  512. },
  513. },
  514. {
  515. .callback = intel_no_lvds_dmi_callback,
  516. .ident = "AOpen Mini PC MP915",
  517. .matches = {
  518. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  519. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  520. },
  521. },
  522. {
  523. .callback = intel_no_lvds_dmi_callback,
  524. .ident = "AOpen i915GMm-HFS",
  525. .matches = {
  526. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  527. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  528. },
  529. },
  530. {
  531. .callback = intel_no_lvds_dmi_callback,
  532. .ident = "AOpen i45GMx-I",
  533. .matches = {
  534. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  535. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  536. },
  537. },
  538. {
  539. .callback = intel_no_lvds_dmi_callback,
  540. .ident = "Aopen i945GTt-VFA",
  541. .matches = {
  542. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  543. },
  544. },
  545. {
  546. .callback = intel_no_lvds_dmi_callback,
  547. .ident = "Clientron U800",
  548. .matches = {
  549. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  550. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  551. },
  552. },
  553. {
  554. .callback = intel_no_lvds_dmi_callback,
  555. .ident = "Clientron E830",
  556. .matches = {
  557. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  558. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  559. },
  560. },
  561. {
  562. .callback = intel_no_lvds_dmi_callback,
  563. .ident = "Asus EeeBox PC EB1007",
  564. .matches = {
  565. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  566. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  567. },
  568. },
  569. {
  570. .callback = intel_no_lvds_dmi_callback,
  571. .ident = "Asus AT5NM10T-I",
  572. .matches = {
  573. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  574. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  575. },
  576. },
  577. {
  578. .callback = intel_no_lvds_dmi_callback,
  579. .ident = "Hewlett-Packard HP t5740",
  580. .matches = {
  581. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  582. DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
  583. },
  584. },
  585. {
  586. .callback = intel_no_lvds_dmi_callback,
  587. .ident = "Hewlett-Packard t5745",
  588. .matches = {
  589. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  590. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  591. },
  592. },
  593. {
  594. .callback = intel_no_lvds_dmi_callback,
  595. .ident = "Hewlett-Packard st5747",
  596. .matches = {
  597. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  598. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  599. },
  600. },
  601. {
  602. .callback = intel_no_lvds_dmi_callback,
  603. .ident = "MSI Wind Box DC500",
  604. .matches = {
  605. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  606. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  607. },
  608. },
  609. {
  610. .callback = intel_no_lvds_dmi_callback,
  611. .ident = "Gigabyte GA-D525TUD",
  612. .matches = {
  613. DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  614. DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  615. },
  616. },
  617. {
  618. .callback = intel_no_lvds_dmi_callback,
  619. .ident = "Supermicro X7SPA-H",
  620. .matches = {
  621. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  622. DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  623. },
  624. },
  625. {
  626. .callback = intel_no_lvds_dmi_callback,
  627. .ident = "Fujitsu Esprimo Q900",
  628. .matches = {
  629. DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
  630. DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
  631. },
  632. },
  633. {
  634. .callback = intel_no_lvds_dmi_callback,
  635. .ident = "Intel D410PT",
  636. .matches = {
  637. DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  638. DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
  639. },
  640. },
  641. {
  642. .callback = intel_no_lvds_dmi_callback,
  643. .ident = "Intel D425KT",
  644. .matches = {
  645. DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  646. DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
  647. },
  648. },
  649. {
  650. .callback = intel_no_lvds_dmi_callback,
  651. .ident = "Intel D510MO",
  652. .matches = {
  653. DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  654. DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
  655. },
  656. },
  657. {
  658. .callback = intel_no_lvds_dmi_callback,
  659. .ident = "Intel D525MW",
  660. .matches = {
  661. DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  662. DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
  663. },
  664. },
  665. { } /* terminating entry */
  666. };
  667. /*
  668. * Enumerate the child dev array parsed from VBT to check whether
  669. * the LVDS is present.
  670. * If it is present, return 1.
  671. * If it is not present, return false.
  672. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  673. */
  674. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  675. u8 *i2c_pin)
  676. {
  677. struct drm_i915_private *dev_priv = dev->dev_private;
  678. int i;
  679. if (!dev_priv->vbt.child_dev_num)
  680. return true;
  681. for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  682. union child_device_config *uchild = dev_priv->vbt.child_dev + i;
  683. struct old_child_dev_config *child = &uchild->old;
  684. /* If the device type is not LFP, continue.
  685. * We have to check both the new identifiers as well as the
  686. * old for compatibility with some BIOSes.
  687. */
  688. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  689. child->device_type != DEVICE_TYPE_LFP)
  690. continue;
  691. if (intel_gmbus_is_port_valid(child->i2c_pin))
  692. *i2c_pin = child->i2c_pin;
  693. /* However, we cannot trust the BIOS writers to populate
  694. * the VBT correctly. Since LVDS requires additional
  695. * information from AIM blocks, a non-zero addin offset is
  696. * a good indicator that the LVDS is actually present.
  697. */
  698. if (child->addin_offset)
  699. return true;
  700. /* But even then some BIOS writers perform some black magic
  701. * and instantiate the device without reference to any
  702. * additional data. Trust that if the VBT was written into
  703. * the OpRegion then they have validated the LVDS's existence.
  704. */
  705. if (dev_priv->opregion.vbt)
  706. return true;
  707. }
  708. return false;
  709. }
  710. static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
  711. {
  712. DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
  713. return 1;
  714. }
  715. static const struct dmi_system_id intel_dual_link_lvds[] = {
  716. {
  717. .callback = intel_dual_link_lvds_callback,
  718. .ident = "Apple MacBook Pro (Core i5/i7 Series)",
  719. .matches = {
  720. DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  721. DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
  722. },
  723. },
  724. { } /* terminating entry */
  725. };
  726. bool intel_is_dual_link_lvds(struct drm_device *dev)
  727. {
  728. struct intel_encoder *encoder;
  729. struct intel_lvds_encoder *lvds_encoder;
  730. list_for_each_entry(encoder, &dev->mode_config.encoder_list,
  731. base.head) {
  732. if (encoder->type == INTEL_OUTPUT_LVDS) {
  733. lvds_encoder = to_lvds_encoder(&encoder->base);
  734. return lvds_encoder->is_dual_link;
  735. }
  736. }
  737. return false;
  738. }
  739. static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
  740. {
  741. struct drm_device *dev = lvds_encoder->base.base.dev;
  742. unsigned int val;
  743. struct drm_i915_private *dev_priv = dev->dev_private;
  744. /* use the module option value if specified */
  745. if (i915_lvds_channel_mode > 0)
  746. return i915_lvds_channel_mode == 2;
  747. if (dmi_check_system(intel_dual_link_lvds))
  748. return true;
  749. /* BIOS should set the proper LVDS register value at boot, but
  750. * in reality, it doesn't set the value when the lid is closed;
  751. * we need to check "the value to be set" in VBT when LVDS
  752. * register is uninitialized.
  753. */
  754. val = I915_READ(lvds_encoder->reg);
  755. if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
  756. val = dev_priv->vbt.bios_lvds_val;
  757. return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
  758. }
  759. static bool intel_lvds_supported(struct drm_device *dev)
  760. {
  761. /* With the introduction of the PCH we gained a dedicated
  762. * LVDS presence pin, use it. */
  763. if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
  764. return true;
  765. /* Otherwise LVDS was only attached to mobile products,
  766. * except for the inglorious 830gm */
  767. if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
  768. return true;
  769. return false;
  770. }
  771. /**
  772. * intel_lvds_init - setup LVDS connectors on this device
  773. * @dev: drm device
  774. *
  775. * Create the connector, register the LVDS DDC bus, and try to figure out what
  776. * modes we can display on the LVDS panel (if present).
  777. */
  778. void intel_lvds_init(struct drm_device *dev)
  779. {
  780. struct drm_i915_private *dev_priv = dev->dev_private;
  781. struct intel_lvds_encoder *lvds_encoder;
  782. struct intel_encoder *intel_encoder;
  783. struct intel_lvds_connector *lvds_connector;
  784. struct intel_connector *intel_connector;
  785. struct drm_connector *connector;
  786. struct drm_encoder *encoder;
  787. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  788. struct drm_display_mode *fixed_mode = NULL;
  789. struct edid *edid;
  790. struct drm_crtc *crtc;
  791. u32 lvds;
  792. int pipe;
  793. u8 pin;
  794. if (!intel_lvds_supported(dev))
  795. return;
  796. /* Skip init on machines we know falsely report LVDS */
  797. if (dmi_check_system(intel_no_lvds))
  798. return;
  799. pin = GMBUS_PORT_PANEL;
  800. if (!lvds_is_present_in_vbt(dev, &pin)) {
  801. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  802. return;
  803. }
  804. if (HAS_PCH_SPLIT(dev)) {
  805. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  806. return;
  807. if (dev_priv->vbt.edp_support) {
  808. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  809. return;
  810. }
  811. }
  812. lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
  813. if (!lvds_encoder)
  814. return;
  815. lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
  816. if (!lvds_connector) {
  817. kfree(lvds_encoder);
  818. return;
  819. }
  820. lvds_encoder->attached_connector = lvds_connector;
  821. intel_encoder = &lvds_encoder->base;
  822. encoder = &intel_encoder->base;
  823. intel_connector = &lvds_connector->base;
  824. connector = &intel_connector->base;
  825. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  826. DRM_MODE_CONNECTOR_LVDS);
  827. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  828. DRM_MODE_ENCODER_LVDS);
  829. intel_encoder->enable = intel_enable_lvds;
  830. intel_encoder->pre_enable = intel_pre_enable_lvds;
  831. intel_encoder->compute_config = intel_lvds_compute_config;
  832. intel_encoder->mode_set = intel_lvds_mode_set;
  833. intel_encoder->disable = intel_disable_lvds;
  834. intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  835. intel_encoder->get_config = intel_lvds_get_config;
  836. intel_connector->get_hw_state = intel_connector_get_hw_state;
  837. intel_connector_attach_encoder(intel_connector, intel_encoder);
  838. intel_encoder->type = INTEL_OUTPUT_LVDS;
  839. intel_encoder->cloneable = false;
  840. if (HAS_PCH_SPLIT(dev))
  841. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  842. else if (IS_GEN4(dev))
  843. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  844. else
  845. intel_encoder->crtc_mask = (1 << 1);
  846. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  847. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  848. connector->interlace_allowed = false;
  849. connector->doublescan_allowed = false;
  850. if (HAS_PCH_SPLIT(dev)) {
  851. lvds_encoder->reg = PCH_LVDS;
  852. } else {
  853. lvds_encoder->reg = LVDS;
  854. }
  855. /* create the scaling mode property */
  856. drm_mode_create_scaling_mode_property(dev);
  857. drm_object_attach_property(&connector->base,
  858. dev->mode_config.scaling_mode_property,
  859. DRM_MODE_SCALE_ASPECT);
  860. intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
  861. /*
  862. * LVDS discovery:
  863. * 1) check for EDID on DDC
  864. * 2) check for VBT data
  865. * 3) check to see if LVDS is already on
  866. * if none of the above, no panel
  867. * 4) make sure lid is open
  868. * if closed, act like it's not there for now
  869. */
  870. /*
  871. * Attempt to get the fixed panel mode from DDC. Assume that the
  872. * preferred mode is the right one.
  873. */
  874. edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
  875. if (edid) {
  876. if (drm_add_edid_modes(connector, edid)) {
  877. drm_mode_connector_update_edid_property(connector,
  878. edid);
  879. } else {
  880. kfree(edid);
  881. edid = ERR_PTR(-EINVAL);
  882. }
  883. } else {
  884. edid = ERR_PTR(-ENOENT);
  885. }
  886. lvds_connector->base.edid = edid;
  887. if (IS_ERR_OR_NULL(edid)) {
  888. /* Didn't get an EDID, so
  889. * Set wide sync ranges so we get all modes
  890. * handed to valid_mode for checking
  891. */
  892. connector->display_info.min_vfreq = 0;
  893. connector->display_info.max_vfreq = 200;
  894. connector->display_info.min_hfreq = 0;
  895. connector->display_info.max_hfreq = 200;
  896. }
  897. list_for_each_entry(scan, &connector->probed_modes, head) {
  898. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  899. DRM_DEBUG_KMS("using preferred mode from EDID: ");
  900. drm_mode_debug_printmodeline(scan);
  901. fixed_mode = drm_mode_duplicate(dev, scan);
  902. if (fixed_mode) {
  903. intel_connector->panel.downclock_mode =
  904. intel_find_panel_downclock(dev,
  905. fixed_mode, connector);
  906. if (intel_connector->panel.downclock_mode !=
  907. NULL && i915_lvds_downclock) {
  908. /* We found the downclock for LVDS. */
  909. dev_priv->lvds_downclock_avail = true;
  910. dev_priv->lvds_downclock =
  911. intel_connector->panel.
  912. downclock_mode->clock;
  913. DRM_DEBUG_KMS("LVDS downclock is found"
  914. " in EDID. Normal clock %dKhz, "
  915. "downclock %dKhz\n",
  916. fixed_mode->clock,
  917. dev_priv->lvds_downclock);
  918. }
  919. goto out;
  920. }
  921. }
  922. }
  923. /* Failed to get EDID, what about VBT? */
  924. if (dev_priv->vbt.lfp_lvds_vbt_mode) {
  925. DRM_DEBUG_KMS("using mode from VBT: ");
  926. drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
  927. fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
  928. if (fixed_mode) {
  929. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  930. goto out;
  931. }
  932. }
  933. /*
  934. * If we didn't get EDID, try checking if the panel is already turned
  935. * on. If so, assume that whatever is currently programmed is the
  936. * correct mode.
  937. */
  938. /* Ironlake: FIXME if still fail, not try pipe mode now */
  939. if (HAS_PCH_SPLIT(dev))
  940. goto failed;
  941. lvds = I915_READ(LVDS);
  942. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  943. crtc = intel_get_crtc_for_pipe(dev, pipe);
  944. if (crtc && (lvds & LVDS_PORT_EN)) {
  945. fixed_mode = intel_crtc_mode_get(dev, crtc);
  946. if (fixed_mode) {
  947. DRM_DEBUG_KMS("using current (BIOS) mode: ");
  948. drm_mode_debug_printmodeline(fixed_mode);
  949. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  950. goto out;
  951. }
  952. }
  953. /* If we still don't have a mode after all that, give up. */
  954. if (!fixed_mode)
  955. goto failed;
  956. out:
  957. lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
  958. DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
  959. lvds_encoder->is_dual_link ? "dual" : "single");
  960. /*
  961. * Unlock registers and just
  962. * leave them unlocked
  963. */
  964. if (HAS_PCH_SPLIT(dev)) {
  965. I915_WRITE(PCH_PP_CONTROL,
  966. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  967. } else {
  968. I915_WRITE(PP_CONTROL,
  969. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  970. }
  971. lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
  972. if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
  973. DRM_DEBUG_KMS("lid notifier registration failed\n");
  974. lvds_connector->lid_notifier.notifier_call = NULL;
  975. }
  976. drm_sysfs_connector_add(connector);
  977. intel_panel_init(&intel_connector->panel, fixed_mode);
  978. intel_panel_setup_backlight(connector);
  979. return;
  980. failed:
  981. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  982. drm_connector_cleanup(connector);
  983. drm_encoder_cleanup(encoder);
  984. if (fixed_mode)
  985. drm_mode_destroy(dev, fixed_mode);
  986. kfree(lvds_encoder);
  987. kfree(lvds_connector);
  988. return;
  989. }