dvo_ns2501.c 14 KB

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  1. /*
  2. *
  3. * Copyright (c) 2012 Gilles Dartiguelongue, Thomas Richter
  4. *
  5. * All Rights Reserved.
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a
  8. * copy of this software and associated documentation files (the
  9. * "Software"), to deal in the Software without restriction, including
  10. * without limitation the rights to use, copy, modify, merge, publish,
  11. * distribute, sub license, and/or sell copies of the Software, and to
  12. * permit persons to whom the Software is furnished to do so, subject to
  13. * the following conditions:
  14. *
  15. * The above copyright notice and this permission notice (including the
  16. * next paragraph) shall be included in all copies or substantial portions
  17. * of the Software.
  18. *
  19. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20. * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  23. * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24. * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25. * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26. *
  27. */
  28. #include "dvo.h"
  29. #include "i915_reg.h"
  30. #include "i915_drv.h"
  31. #define NS2501_VID 0x1305
  32. #define NS2501_DID 0x6726
  33. #define NS2501_VID_LO 0x00
  34. #define NS2501_VID_HI 0x01
  35. #define NS2501_DID_LO 0x02
  36. #define NS2501_DID_HI 0x03
  37. #define NS2501_REV 0x04
  38. #define NS2501_RSVD 0x05
  39. #define NS2501_FREQ_LO 0x06
  40. #define NS2501_FREQ_HI 0x07
  41. #define NS2501_REG8 0x08
  42. #define NS2501_8_VEN (1<<5)
  43. #define NS2501_8_HEN (1<<4)
  44. #define NS2501_8_DSEL (1<<3)
  45. #define NS2501_8_BPAS (1<<2)
  46. #define NS2501_8_RSVD (1<<1)
  47. #define NS2501_8_PD (1<<0)
  48. #define NS2501_REG9 0x09
  49. #define NS2501_9_VLOW (1<<7)
  50. #define NS2501_9_MSEL_MASK (0x7<<4)
  51. #define NS2501_9_TSEL (1<<3)
  52. #define NS2501_9_RSEN (1<<2)
  53. #define NS2501_9_RSVD (1<<1)
  54. #define NS2501_9_MDI (1<<0)
  55. #define NS2501_REGC 0x0c
  56. struct ns2501_priv {
  57. //I2CDevRec d;
  58. bool quiet;
  59. int reg_8_shadow;
  60. int reg_8_set;
  61. // Shadow registers for i915
  62. int dvoc;
  63. int pll_a;
  64. int srcdim;
  65. int fw_blc;
  66. };
  67. #define NSPTR(d) ((NS2501Ptr)(d->DriverPrivate.ptr))
  68. /*
  69. * For reasons unclear to me, the ns2501 at least on the Fujitsu/Siemens
  70. * laptops does not react on the i2c bus unless
  71. * both the PLL is running and the display is configured in its native
  72. * resolution.
  73. * This function forces the DVO on, and stores the registers it touches.
  74. * Afterwards, registers are restored to regular values.
  75. *
  76. * This is pretty much a hack, though it works.
  77. * Without that, ns2501_readb and ns2501_writeb fail
  78. * when switching the resolution.
  79. */
  80. /*
  81. ** Read a register from the ns2501.
  82. ** Returns true if successful, false otherwise.
  83. ** If it returns false, it might be wise to enable the
  84. ** DVO with the above function.
  85. */
  86. static bool ns2501_readb(struct intel_dvo_device *dvo, int addr, uint8_t * ch)
  87. {
  88. struct ns2501_priv *ns = dvo->dev_priv;
  89. struct i2c_adapter *adapter = dvo->i2c_bus;
  90. u8 out_buf[2];
  91. u8 in_buf[2];
  92. struct i2c_msg msgs[] = {
  93. {
  94. .addr = dvo->slave_addr,
  95. .flags = 0,
  96. .len = 1,
  97. .buf = out_buf,
  98. },
  99. {
  100. .addr = dvo->slave_addr,
  101. .flags = I2C_M_RD,
  102. .len = 1,
  103. .buf = in_buf,
  104. }
  105. };
  106. out_buf[0] = addr;
  107. out_buf[1] = 0;
  108. if (i2c_transfer(adapter, msgs, 2) == 2) {
  109. *ch = in_buf[0];
  110. return true;
  111. };
  112. if (!ns->quiet) {
  113. DRM_DEBUG_KMS
  114. ("Unable to read register 0x%02x from %s:0x%02x.\n", addr,
  115. adapter->name, dvo->slave_addr);
  116. }
  117. return false;
  118. }
  119. /*
  120. ** Write a register to the ns2501.
  121. ** Returns true if successful, false otherwise.
  122. ** If it returns false, it might be wise to enable the
  123. ** DVO with the above function.
  124. */
  125. static bool ns2501_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
  126. {
  127. struct ns2501_priv *ns = dvo->dev_priv;
  128. struct i2c_adapter *adapter = dvo->i2c_bus;
  129. uint8_t out_buf[2];
  130. struct i2c_msg msg = {
  131. .addr = dvo->slave_addr,
  132. .flags = 0,
  133. .len = 2,
  134. .buf = out_buf,
  135. };
  136. out_buf[0] = addr;
  137. out_buf[1] = ch;
  138. if (i2c_transfer(adapter, &msg, 1) == 1) {
  139. return true;
  140. }
  141. if (!ns->quiet) {
  142. DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d\n",
  143. addr, adapter->name, dvo->slave_addr);
  144. }
  145. return false;
  146. }
  147. /* National Semiconductor 2501 driver for chip on i2c bus
  148. * scan for the chip on the bus.
  149. * Hope the VBIOS initialized the PLL correctly so we can
  150. * talk to it. If not, it will not be seen and not detected.
  151. * Bummer!
  152. */
  153. static bool ns2501_init(struct intel_dvo_device *dvo,
  154. struct i2c_adapter *adapter)
  155. {
  156. /* this will detect the NS2501 chip on the specified i2c bus */
  157. struct ns2501_priv *ns;
  158. unsigned char ch;
  159. ns = kzalloc(sizeof(struct ns2501_priv), GFP_KERNEL);
  160. if (ns == NULL)
  161. return false;
  162. dvo->i2c_bus = adapter;
  163. dvo->dev_priv = ns;
  164. ns->quiet = true;
  165. if (!ns2501_readb(dvo, NS2501_VID_LO, &ch))
  166. goto out;
  167. if (ch != (NS2501_VID & 0xff)) {
  168. DRM_DEBUG_KMS("ns2501 not detected got %d: from %s Slave %d.\n",
  169. ch, adapter->name, dvo->slave_addr);
  170. goto out;
  171. }
  172. if (!ns2501_readb(dvo, NS2501_DID_LO, &ch))
  173. goto out;
  174. if (ch != (NS2501_DID & 0xff)) {
  175. DRM_DEBUG_KMS("ns2501 not detected got %d: from %s Slave %d.\n",
  176. ch, adapter->name, dvo->slave_addr);
  177. goto out;
  178. }
  179. ns->quiet = false;
  180. ns->reg_8_set = 0;
  181. ns->reg_8_shadow =
  182. NS2501_8_PD | NS2501_8_BPAS | NS2501_8_VEN | NS2501_8_HEN;
  183. DRM_DEBUG_KMS("init ns2501 dvo controller successfully!\n");
  184. return true;
  185. out:
  186. kfree(ns);
  187. return false;
  188. }
  189. static enum drm_connector_status ns2501_detect(struct intel_dvo_device *dvo)
  190. {
  191. /*
  192. * This is a Laptop display, it doesn't have hotplugging.
  193. * Even if not, the detection bit of the 2501 is unreliable as
  194. * it only works for some display types.
  195. * It is even more unreliable as the PLL must be active for
  196. * allowing reading from the chiop.
  197. */
  198. return connector_status_connected;
  199. }
  200. static enum drm_mode_status ns2501_mode_valid(struct intel_dvo_device *dvo,
  201. struct drm_display_mode *mode)
  202. {
  203. DRM_DEBUG_KMS
  204. ("%s: is mode valid (hdisplay=%d,htotal=%d,vdisplay=%d,vtotal=%d)\n",
  205. __FUNCTION__, mode->hdisplay, mode->htotal, mode->vdisplay,
  206. mode->vtotal);
  207. /*
  208. * Currently, these are all the modes I have data from.
  209. * More might exist. Unclear how to find the native resolution
  210. * of the panel in here so we could always accept it
  211. * by disabling the scaler.
  212. */
  213. if ((mode->hdisplay == 800 && mode->vdisplay == 600) ||
  214. (mode->hdisplay == 640 && mode->vdisplay == 480) ||
  215. (mode->hdisplay == 1024 && mode->vdisplay == 768)) {
  216. return MODE_OK;
  217. } else {
  218. return MODE_ONE_SIZE; /* Is this a reasonable error? */
  219. }
  220. }
  221. static void ns2501_mode_set(struct intel_dvo_device *dvo,
  222. struct drm_display_mode *mode,
  223. struct drm_display_mode *adjusted_mode)
  224. {
  225. bool ok;
  226. int retries = 10;
  227. struct ns2501_priv *ns = (struct ns2501_priv *)(dvo->dev_priv);
  228. DRM_DEBUG_KMS
  229. ("%s: set mode (hdisplay=%d,htotal=%d,vdisplay=%d,vtotal=%d).\n",
  230. __FUNCTION__, mode->hdisplay, mode->htotal, mode->vdisplay,
  231. mode->vtotal);
  232. /*
  233. * Where do I find the native resolution for which scaling is not required???
  234. *
  235. * First trigger the DVO on as otherwise the chip does not appear on the i2c
  236. * bus.
  237. */
  238. do {
  239. ok = true;
  240. if (mode->hdisplay == 800 && mode->vdisplay == 600) {
  241. /* mode 277 */
  242. ns->reg_8_shadow &= ~NS2501_8_BPAS;
  243. DRM_DEBUG_KMS("%s: switching to 800x600\n",
  244. __FUNCTION__);
  245. /*
  246. * No, I do not know where this data comes from.
  247. * It is just what the video bios left in the DVO, so
  248. * I'm just copying it here over.
  249. * This also means that I cannot support any other modes
  250. * except the ones supported by the bios.
  251. */
  252. ok &= ns2501_writeb(dvo, 0x11, 0xc8); // 0xc7 also works.
  253. ok &= ns2501_writeb(dvo, 0x1b, 0x19);
  254. ok &= ns2501_writeb(dvo, 0x1c, 0x62); // VBIOS left 0x64 here, but 0x62 works nicer
  255. ok &= ns2501_writeb(dvo, 0x1d, 0x02);
  256. ok &= ns2501_writeb(dvo, 0x34, 0x03);
  257. ok &= ns2501_writeb(dvo, 0x35, 0xff);
  258. ok &= ns2501_writeb(dvo, 0x80, 0x27);
  259. ok &= ns2501_writeb(dvo, 0x81, 0x03);
  260. ok &= ns2501_writeb(dvo, 0x82, 0x41);
  261. ok &= ns2501_writeb(dvo, 0x83, 0x05);
  262. ok &= ns2501_writeb(dvo, 0x8d, 0x02);
  263. ok &= ns2501_writeb(dvo, 0x8e, 0x04);
  264. ok &= ns2501_writeb(dvo, 0x8f, 0x00);
  265. ok &= ns2501_writeb(dvo, 0x90, 0xfe); /* vertical. VBIOS left 0xff here, but 0xfe works better */
  266. ok &= ns2501_writeb(dvo, 0x91, 0x07);
  267. ok &= ns2501_writeb(dvo, 0x94, 0x00);
  268. ok &= ns2501_writeb(dvo, 0x95, 0x00);
  269. ok &= ns2501_writeb(dvo, 0x96, 0x00);
  270. ok &= ns2501_writeb(dvo, 0x99, 0x00);
  271. ok &= ns2501_writeb(dvo, 0x9a, 0x88);
  272. ok &= ns2501_writeb(dvo, 0x9c, 0x23); /* Looks like first and last line of the image. */
  273. ok &= ns2501_writeb(dvo, 0x9d, 0x00);
  274. ok &= ns2501_writeb(dvo, 0x9e, 0x25);
  275. ok &= ns2501_writeb(dvo, 0x9f, 0x03);
  276. ok &= ns2501_writeb(dvo, 0xa4, 0x80);
  277. ok &= ns2501_writeb(dvo, 0xb6, 0x00);
  278. ok &= ns2501_writeb(dvo, 0xb9, 0xc8); /* horizontal? */
  279. ok &= ns2501_writeb(dvo, 0xba, 0x00); /* horizontal? */
  280. ok &= ns2501_writeb(dvo, 0xc0, 0x05); /* horizontal? */
  281. ok &= ns2501_writeb(dvo, 0xc1, 0xd7);
  282. ok &= ns2501_writeb(dvo, 0xc2, 0x00);
  283. ok &= ns2501_writeb(dvo, 0xc3, 0xf8);
  284. ok &= ns2501_writeb(dvo, 0xc4, 0x03);
  285. ok &= ns2501_writeb(dvo, 0xc5, 0x1a);
  286. ok &= ns2501_writeb(dvo, 0xc6, 0x00);
  287. ok &= ns2501_writeb(dvo, 0xc7, 0x73);
  288. ok &= ns2501_writeb(dvo, 0xc8, 0x02);
  289. } else if (mode->hdisplay == 640 && mode->vdisplay == 480) {
  290. /* mode 274 */
  291. DRM_DEBUG_KMS("%s: switching to 640x480\n",
  292. __FUNCTION__);
  293. /*
  294. * No, I do not know where this data comes from.
  295. * It is just what the video bios left in the DVO, so
  296. * I'm just copying it here over.
  297. * This also means that I cannot support any other modes
  298. * except the ones supported by the bios.
  299. */
  300. ns->reg_8_shadow &= ~NS2501_8_BPAS;
  301. ok &= ns2501_writeb(dvo, 0x11, 0xa0);
  302. ok &= ns2501_writeb(dvo, 0x1b, 0x11);
  303. ok &= ns2501_writeb(dvo, 0x1c, 0x54);
  304. ok &= ns2501_writeb(dvo, 0x1d, 0x03);
  305. ok &= ns2501_writeb(dvo, 0x34, 0x03);
  306. ok &= ns2501_writeb(dvo, 0x35, 0xff);
  307. ok &= ns2501_writeb(dvo, 0x80, 0xff);
  308. ok &= ns2501_writeb(dvo, 0x81, 0x07);
  309. ok &= ns2501_writeb(dvo, 0x82, 0x3d);
  310. ok &= ns2501_writeb(dvo, 0x83, 0x05);
  311. ok &= ns2501_writeb(dvo, 0x8d, 0x02);
  312. ok &= ns2501_writeb(dvo, 0x8e, 0x10);
  313. ok &= ns2501_writeb(dvo, 0x8f, 0x00);
  314. ok &= ns2501_writeb(dvo, 0x90, 0xff); /* vertical */
  315. ok &= ns2501_writeb(dvo, 0x91, 0x07);
  316. ok &= ns2501_writeb(dvo, 0x94, 0x00);
  317. ok &= ns2501_writeb(dvo, 0x95, 0x00);
  318. ok &= ns2501_writeb(dvo, 0x96, 0x05);
  319. ok &= ns2501_writeb(dvo, 0x99, 0x00);
  320. ok &= ns2501_writeb(dvo, 0x9a, 0x88);
  321. ok &= ns2501_writeb(dvo, 0x9c, 0x24);
  322. ok &= ns2501_writeb(dvo, 0x9d, 0x00);
  323. ok &= ns2501_writeb(dvo, 0x9e, 0x25);
  324. ok &= ns2501_writeb(dvo, 0x9f, 0x03);
  325. ok &= ns2501_writeb(dvo, 0xa4, 0x84);
  326. ok &= ns2501_writeb(dvo, 0xb6, 0x09);
  327. ok &= ns2501_writeb(dvo, 0xb9, 0xa0); /* horizontal? */
  328. ok &= ns2501_writeb(dvo, 0xba, 0x00); /* horizontal? */
  329. ok &= ns2501_writeb(dvo, 0xc0, 0x05); /* horizontal? */
  330. ok &= ns2501_writeb(dvo, 0xc1, 0x90);
  331. ok &= ns2501_writeb(dvo, 0xc2, 0x00);
  332. ok &= ns2501_writeb(dvo, 0xc3, 0x0f);
  333. ok &= ns2501_writeb(dvo, 0xc4, 0x03);
  334. ok &= ns2501_writeb(dvo, 0xc5, 0x16);
  335. ok &= ns2501_writeb(dvo, 0xc6, 0x00);
  336. ok &= ns2501_writeb(dvo, 0xc7, 0x02);
  337. ok &= ns2501_writeb(dvo, 0xc8, 0x02);
  338. } else if (mode->hdisplay == 1024 && mode->vdisplay == 768) {
  339. /* mode 280 */
  340. DRM_DEBUG_KMS("%s: switching to 1024x768\n",
  341. __FUNCTION__);
  342. /*
  343. * This might or might not work, actually. I'm silently
  344. * assuming here that the native panel resolution is
  345. * 1024x768. If not, then this leaves the scaler disabled
  346. * generating a picture that is likely not the expected.
  347. *
  348. * Problem is that I do not know where to take the panel
  349. * dimensions from.
  350. *
  351. * Enable the bypass, scaling not required.
  352. *
  353. * The scaler registers are irrelevant here....
  354. *
  355. */
  356. ns->reg_8_shadow |= NS2501_8_BPAS;
  357. ok &= ns2501_writeb(dvo, 0x37, 0x44);
  358. } else {
  359. /*
  360. * Data not known. Bummer!
  361. * Hopefully, the code should not go here
  362. * as mode_OK delivered no other modes.
  363. */
  364. ns->reg_8_shadow |= NS2501_8_BPAS;
  365. }
  366. ok &= ns2501_writeb(dvo, NS2501_REG8, ns->reg_8_shadow);
  367. } while (!ok && retries--);
  368. }
  369. /* set the NS2501 power state */
  370. static bool ns2501_get_hw_state(struct intel_dvo_device *dvo)
  371. {
  372. unsigned char ch;
  373. if (!ns2501_readb(dvo, NS2501_REG8, &ch))
  374. return false;
  375. if (ch & NS2501_8_PD)
  376. return true;
  377. else
  378. return false;
  379. }
  380. /* set the NS2501 power state */
  381. static void ns2501_dpms(struct intel_dvo_device *dvo, bool enable)
  382. {
  383. bool ok;
  384. int retries = 10;
  385. struct ns2501_priv *ns = (struct ns2501_priv *)(dvo->dev_priv);
  386. unsigned char ch;
  387. DRM_DEBUG_KMS("%s: Trying set the dpms of the DVO to %i\n",
  388. __FUNCTION__, enable);
  389. ch = ns->reg_8_shadow;
  390. if (enable)
  391. ch |= NS2501_8_PD;
  392. else
  393. ch &= ~NS2501_8_PD;
  394. if (ns->reg_8_set == 0 || ns->reg_8_shadow != ch) {
  395. ns->reg_8_set = 1;
  396. ns->reg_8_shadow = ch;
  397. do {
  398. ok = true;
  399. ok &= ns2501_writeb(dvo, NS2501_REG8, ch);
  400. ok &=
  401. ns2501_writeb(dvo, 0x34,
  402. enable ? 0x03 : 0x00);
  403. ok &=
  404. ns2501_writeb(dvo, 0x35,
  405. enable ? 0xff : 0x00);
  406. } while (!ok && retries--);
  407. }
  408. }
  409. static void ns2501_dump_regs(struct intel_dvo_device *dvo)
  410. {
  411. uint8_t val;
  412. ns2501_readb(dvo, NS2501_FREQ_LO, &val);
  413. DRM_LOG_KMS("NS2501_FREQ_LO: 0x%02x\n", val);
  414. ns2501_readb(dvo, NS2501_FREQ_HI, &val);
  415. DRM_LOG_KMS("NS2501_FREQ_HI: 0x%02x\n", val);
  416. ns2501_readb(dvo, NS2501_REG8, &val);
  417. DRM_LOG_KMS("NS2501_REG8: 0x%02x\n", val);
  418. ns2501_readb(dvo, NS2501_REG9, &val);
  419. DRM_LOG_KMS("NS2501_REG9: 0x%02x\n", val);
  420. ns2501_readb(dvo, NS2501_REGC, &val);
  421. DRM_LOG_KMS("NS2501_REGC: 0x%02x\n", val);
  422. }
  423. static void ns2501_destroy(struct intel_dvo_device *dvo)
  424. {
  425. struct ns2501_priv *ns = dvo->dev_priv;
  426. if (ns) {
  427. kfree(ns);
  428. dvo->dev_priv = NULL;
  429. }
  430. }
  431. struct intel_dvo_dev_ops ns2501_ops = {
  432. .init = ns2501_init,
  433. .detect = ns2501_detect,
  434. .mode_valid = ns2501_mode_valid,
  435. .mode_set = ns2501_mode_set,
  436. .dpms = ns2501_dpms,
  437. .get_hw_state = ns2501_get_hw_state,
  438. .dump_regs = ns2501_dump_regs,
  439. .destroy = ns2501_destroy,
  440. };