acpi-cpufreq.c 24 KB

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  1. /*
  2. * acpi-cpufreq.c - ACPI Processor P-States Driver
  3. *
  4. * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  5. * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
  6. * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
  7. * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
  8. *
  9. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or (at
  14. * your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License along
  22. * with this program; if not, write to the Free Software Foundation, Inc.,
  23. * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  24. *
  25. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  26. */
  27. #include <linux/kernel.h>
  28. #include <linux/module.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/sched.h>
  32. #include <linux/cpufreq.h>
  33. #include <linux/compiler.h>
  34. #include <linux/dmi.h>
  35. #include <linux/slab.h>
  36. #include <linux/acpi.h>
  37. #include <linux/io.h>
  38. #include <linux/delay.h>
  39. #include <linux/uaccess.h>
  40. #include <acpi/processor.h>
  41. #include <asm/msr.h>
  42. #include <asm/processor.h>
  43. #include <asm/cpufeature.h>
  44. MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
  45. MODULE_DESCRIPTION("ACPI Processor P-States Driver");
  46. MODULE_LICENSE("GPL");
  47. #define PFX "acpi-cpufreq: "
  48. enum {
  49. UNDEFINED_CAPABLE = 0,
  50. SYSTEM_INTEL_MSR_CAPABLE,
  51. SYSTEM_AMD_MSR_CAPABLE,
  52. SYSTEM_IO_CAPABLE,
  53. };
  54. #define INTEL_MSR_RANGE (0xffff)
  55. #define AMD_MSR_RANGE (0x7)
  56. #define MSR_K7_HWCR_CPB_DIS (1ULL << 25)
  57. struct acpi_cpufreq_data {
  58. struct acpi_processor_performance *acpi_data;
  59. struct cpufreq_frequency_table *freq_table;
  60. unsigned int resume;
  61. unsigned int cpu_feature;
  62. cpumask_var_t freqdomain_cpus;
  63. };
  64. static DEFINE_PER_CPU(struct acpi_cpufreq_data *, acfreq_data);
  65. /* acpi_perf_data is a pointer to percpu data. */
  66. static struct acpi_processor_performance __percpu *acpi_perf_data;
  67. static struct cpufreq_driver acpi_cpufreq_driver;
  68. static unsigned int acpi_pstate_strict;
  69. static struct msr __percpu *msrs;
  70. static bool boost_state(unsigned int cpu)
  71. {
  72. u32 lo, hi;
  73. u64 msr;
  74. switch (boot_cpu_data.x86_vendor) {
  75. case X86_VENDOR_INTEL:
  76. rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
  77. msr = lo | ((u64)hi << 32);
  78. return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
  79. case X86_VENDOR_AMD:
  80. rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
  81. msr = lo | ((u64)hi << 32);
  82. return !(msr & MSR_K7_HWCR_CPB_DIS);
  83. }
  84. return false;
  85. }
  86. static void boost_set_msrs(bool enable, const struct cpumask *cpumask)
  87. {
  88. u32 cpu;
  89. u32 msr_addr;
  90. u64 msr_mask;
  91. switch (boot_cpu_data.x86_vendor) {
  92. case X86_VENDOR_INTEL:
  93. msr_addr = MSR_IA32_MISC_ENABLE;
  94. msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
  95. break;
  96. case X86_VENDOR_AMD:
  97. msr_addr = MSR_K7_HWCR;
  98. msr_mask = MSR_K7_HWCR_CPB_DIS;
  99. break;
  100. default:
  101. return;
  102. }
  103. rdmsr_on_cpus(cpumask, msr_addr, msrs);
  104. for_each_cpu(cpu, cpumask) {
  105. struct msr *reg = per_cpu_ptr(msrs, cpu);
  106. if (enable)
  107. reg->q &= ~msr_mask;
  108. else
  109. reg->q |= msr_mask;
  110. }
  111. wrmsr_on_cpus(cpumask, msr_addr, msrs);
  112. }
  113. static int _store_boost(int val)
  114. {
  115. get_online_cpus();
  116. boost_set_msrs(val, cpu_online_mask);
  117. put_online_cpus();
  118. pr_debug("Core Boosting %sabled.\n", val ? "en" : "dis");
  119. return 0;
  120. }
  121. static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)
  122. {
  123. struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
  124. return cpufreq_show_cpus(data->freqdomain_cpus, buf);
  125. }
  126. cpufreq_freq_attr_ro(freqdomain_cpus);
  127. #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
  128. static ssize_t store_boost(const char *buf, size_t count)
  129. {
  130. int ret;
  131. unsigned long val = 0;
  132. if (!acpi_cpufreq_driver.boost_supported)
  133. return -EINVAL;
  134. ret = kstrtoul(buf, 10, &val);
  135. if (ret || (val > 1))
  136. return -EINVAL;
  137. _store_boost((int) val);
  138. return count;
  139. }
  140. static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
  141. size_t count)
  142. {
  143. return store_boost(buf, count);
  144. }
  145. static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
  146. {
  147. return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled);
  148. }
  149. cpufreq_freq_attr_rw(cpb);
  150. #endif
  151. static int check_est_cpu(unsigned int cpuid)
  152. {
  153. struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
  154. return cpu_has(cpu, X86_FEATURE_EST);
  155. }
  156. static int check_amd_hwpstate_cpu(unsigned int cpuid)
  157. {
  158. struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
  159. return cpu_has(cpu, X86_FEATURE_HW_PSTATE);
  160. }
  161. static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
  162. {
  163. struct acpi_processor_performance *perf;
  164. int i;
  165. perf = data->acpi_data;
  166. for (i = 0; i < perf->state_count; i++) {
  167. if (value == perf->states[i].status)
  168. return data->freq_table[i].frequency;
  169. }
  170. return 0;
  171. }
  172. static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
  173. {
  174. int i;
  175. struct acpi_processor_performance *perf;
  176. if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
  177. msr &= AMD_MSR_RANGE;
  178. else
  179. msr &= INTEL_MSR_RANGE;
  180. perf = data->acpi_data;
  181. for (i = 0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
  182. if (msr == perf->states[data->freq_table[i].driver_data].status)
  183. return data->freq_table[i].frequency;
  184. }
  185. return data->freq_table[0].frequency;
  186. }
  187. static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data)
  188. {
  189. switch (data->cpu_feature) {
  190. case SYSTEM_INTEL_MSR_CAPABLE:
  191. case SYSTEM_AMD_MSR_CAPABLE:
  192. return extract_msr(val, data);
  193. case SYSTEM_IO_CAPABLE:
  194. return extract_io(val, data);
  195. default:
  196. return 0;
  197. }
  198. }
  199. struct msr_addr {
  200. u32 reg;
  201. };
  202. struct io_addr {
  203. u16 port;
  204. u8 bit_width;
  205. };
  206. struct drv_cmd {
  207. unsigned int type;
  208. const struct cpumask *mask;
  209. union {
  210. struct msr_addr msr;
  211. struct io_addr io;
  212. } addr;
  213. u32 val;
  214. };
  215. /* Called via smp_call_function_single(), on the target CPU */
  216. static void do_drv_read(void *_cmd)
  217. {
  218. struct drv_cmd *cmd = _cmd;
  219. u32 h;
  220. switch (cmd->type) {
  221. case SYSTEM_INTEL_MSR_CAPABLE:
  222. case SYSTEM_AMD_MSR_CAPABLE:
  223. rdmsr(cmd->addr.msr.reg, cmd->val, h);
  224. break;
  225. case SYSTEM_IO_CAPABLE:
  226. acpi_os_read_port((acpi_io_address)cmd->addr.io.port,
  227. &cmd->val,
  228. (u32)cmd->addr.io.bit_width);
  229. break;
  230. default:
  231. break;
  232. }
  233. }
  234. /* Called via smp_call_function_many(), on the target CPUs */
  235. static void do_drv_write(void *_cmd)
  236. {
  237. struct drv_cmd *cmd = _cmd;
  238. u32 lo, hi;
  239. switch (cmd->type) {
  240. case SYSTEM_INTEL_MSR_CAPABLE:
  241. rdmsr(cmd->addr.msr.reg, lo, hi);
  242. lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE);
  243. wrmsr(cmd->addr.msr.reg, lo, hi);
  244. break;
  245. case SYSTEM_AMD_MSR_CAPABLE:
  246. wrmsr(cmd->addr.msr.reg, cmd->val, 0);
  247. break;
  248. case SYSTEM_IO_CAPABLE:
  249. acpi_os_write_port((acpi_io_address)cmd->addr.io.port,
  250. cmd->val,
  251. (u32)cmd->addr.io.bit_width);
  252. break;
  253. default:
  254. break;
  255. }
  256. }
  257. static void drv_read(struct drv_cmd *cmd)
  258. {
  259. int err;
  260. cmd->val = 0;
  261. err = smp_call_function_any(cmd->mask, do_drv_read, cmd, 1);
  262. WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */
  263. }
  264. static void drv_write(struct drv_cmd *cmd)
  265. {
  266. int this_cpu;
  267. this_cpu = get_cpu();
  268. if (cpumask_test_cpu(this_cpu, cmd->mask))
  269. do_drv_write(cmd);
  270. smp_call_function_many(cmd->mask, do_drv_write, cmd, 1);
  271. put_cpu();
  272. }
  273. static u32 get_cur_val(const struct cpumask *mask)
  274. {
  275. struct acpi_processor_performance *perf;
  276. struct drv_cmd cmd;
  277. if (unlikely(cpumask_empty(mask)))
  278. return 0;
  279. switch (per_cpu(acfreq_data, cpumask_first(mask))->cpu_feature) {
  280. case SYSTEM_INTEL_MSR_CAPABLE:
  281. cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
  282. cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
  283. break;
  284. case SYSTEM_AMD_MSR_CAPABLE:
  285. cmd.type = SYSTEM_AMD_MSR_CAPABLE;
  286. cmd.addr.msr.reg = MSR_AMD_PERF_CTL;
  287. break;
  288. case SYSTEM_IO_CAPABLE:
  289. cmd.type = SYSTEM_IO_CAPABLE;
  290. perf = per_cpu(acfreq_data, cpumask_first(mask))->acpi_data;
  291. cmd.addr.io.port = perf->control_register.address;
  292. cmd.addr.io.bit_width = perf->control_register.bit_width;
  293. break;
  294. default:
  295. return 0;
  296. }
  297. cmd.mask = mask;
  298. drv_read(&cmd);
  299. pr_debug("get_cur_val = %u\n", cmd.val);
  300. return cmd.val;
  301. }
  302. static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
  303. {
  304. struct acpi_cpufreq_data *data = per_cpu(acfreq_data, cpu);
  305. unsigned int freq;
  306. unsigned int cached_freq;
  307. pr_debug("get_cur_freq_on_cpu (%d)\n", cpu);
  308. if (unlikely(data == NULL ||
  309. data->acpi_data == NULL || data->freq_table == NULL)) {
  310. return 0;
  311. }
  312. cached_freq = data->freq_table[data->acpi_data->state].frequency;
  313. freq = extract_freq(get_cur_val(cpumask_of(cpu)), data);
  314. if (freq != cached_freq) {
  315. /*
  316. * The dreaded BIOS frequency change behind our back.
  317. * Force set the frequency on next target call.
  318. */
  319. data->resume = 1;
  320. }
  321. pr_debug("cur freq = %u\n", freq);
  322. return freq;
  323. }
  324. static unsigned int check_freqs(const struct cpumask *mask, unsigned int freq,
  325. struct acpi_cpufreq_data *data)
  326. {
  327. unsigned int cur_freq;
  328. unsigned int i;
  329. for (i = 0; i < 100; i++) {
  330. cur_freq = extract_freq(get_cur_val(mask), data);
  331. if (cur_freq == freq)
  332. return 1;
  333. udelay(10);
  334. }
  335. return 0;
  336. }
  337. static int acpi_cpufreq_target(struct cpufreq_policy *policy,
  338. unsigned int index)
  339. {
  340. struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
  341. struct acpi_processor_performance *perf;
  342. struct drv_cmd cmd;
  343. unsigned int next_perf_state = 0; /* Index into perf table */
  344. int result = 0;
  345. if (unlikely(data == NULL ||
  346. data->acpi_data == NULL || data->freq_table == NULL)) {
  347. return -ENODEV;
  348. }
  349. perf = data->acpi_data;
  350. next_perf_state = data->freq_table[index].driver_data;
  351. if (perf->state == next_perf_state) {
  352. if (unlikely(data->resume)) {
  353. pr_debug("Called after resume, resetting to P%d\n",
  354. next_perf_state);
  355. data->resume = 0;
  356. } else {
  357. pr_debug("Already at target state (P%d)\n",
  358. next_perf_state);
  359. goto out;
  360. }
  361. }
  362. switch (data->cpu_feature) {
  363. case SYSTEM_INTEL_MSR_CAPABLE:
  364. cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
  365. cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
  366. cmd.val = (u32) perf->states[next_perf_state].control;
  367. break;
  368. case SYSTEM_AMD_MSR_CAPABLE:
  369. cmd.type = SYSTEM_AMD_MSR_CAPABLE;
  370. cmd.addr.msr.reg = MSR_AMD_PERF_CTL;
  371. cmd.val = (u32) perf->states[next_perf_state].control;
  372. break;
  373. case SYSTEM_IO_CAPABLE:
  374. cmd.type = SYSTEM_IO_CAPABLE;
  375. cmd.addr.io.port = perf->control_register.address;
  376. cmd.addr.io.bit_width = perf->control_register.bit_width;
  377. cmd.val = (u32) perf->states[next_perf_state].control;
  378. break;
  379. default:
  380. result = -ENODEV;
  381. goto out;
  382. }
  383. /* cpufreq holds the hotplug lock, so we are safe from here on */
  384. if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY)
  385. cmd.mask = policy->cpus;
  386. else
  387. cmd.mask = cpumask_of(policy->cpu);
  388. drv_write(&cmd);
  389. if (acpi_pstate_strict) {
  390. if (!check_freqs(cmd.mask, data->freq_table[index].frequency,
  391. data)) {
  392. pr_debug("acpi_cpufreq_target failed (%d)\n",
  393. policy->cpu);
  394. result = -EAGAIN;
  395. }
  396. }
  397. if (!result)
  398. perf->state = next_perf_state;
  399. out:
  400. return result;
  401. }
  402. static unsigned long
  403. acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
  404. {
  405. struct acpi_processor_performance *perf = data->acpi_data;
  406. if (cpu_khz) {
  407. /* search the closest match to cpu_khz */
  408. unsigned int i;
  409. unsigned long freq;
  410. unsigned long freqn = perf->states[0].core_frequency * 1000;
  411. for (i = 0; i < (perf->state_count-1); i++) {
  412. freq = freqn;
  413. freqn = perf->states[i+1].core_frequency * 1000;
  414. if ((2 * cpu_khz) > (freqn + freq)) {
  415. perf->state = i;
  416. return freq;
  417. }
  418. }
  419. perf->state = perf->state_count-1;
  420. return freqn;
  421. } else {
  422. /* assume CPU is at P0... */
  423. perf->state = 0;
  424. return perf->states[0].core_frequency * 1000;
  425. }
  426. }
  427. static void free_acpi_perf_data(void)
  428. {
  429. unsigned int i;
  430. /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
  431. for_each_possible_cpu(i)
  432. free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
  433. ->shared_cpu_map);
  434. free_percpu(acpi_perf_data);
  435. }
  436. static int boost_notify(struct notifier_block *nb, unsigned long action,
  437. void *hcpu)
  438. {
  439. unsigned cpu = (long)hcpu;
  440. const struct cpumask *cpumask;
  441. cpumask = get_cpu_mask(cpu);
  442. /*
  443. * Clear the boost-disable bit on the CPU_DOWN path so that
  444. * this cpu cannot block the remaining ones from boosting. On
  445. * the CPU_UP path we simply keep the boost-disable flag in
  446. * sync with the current global state.
  447. */
  448. switch (action) {
  449. case CPU_UP_PREPARE:
  450. case CPU_UP_PREPARE_FROZEN:
  451. boost_set_msrs(acpi_cpufreq_driver.boost_enabled, cpumask);
  452. break;
  453. case CPU_DOWN_PREPARE:
  454. case CPU_DOWN_PREPARE_FROZEN:
  455. boost_set_msrs(1, cpumask);
  456. break;
  457. default:
  458. break;
  459. }
  460. return NOTIFY_OK;
  461. }
  462. static struct notifier_block boost_nb = {
  463. .notifier_call = boost_notify,
  464. };
  465. /*
  466. * acpi_cpufreq_early_init - initialize ACPI P-States library
  467. *
  468. * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
  469. * in order to determine correct frequency and voltage pairings. We can
  470. * do _PDC and _PSD and find out the processor dependency for the
  471. * actual init that will happen later...
  472. */
  473. static int __init acpi_cpufreq_early_init(void)
  474. {
  475. unsigned int i;
  476. pr_debug("acpi_cpufreq_early_init\n");
  477. acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
  478. if (!acpi_perf_data) {
  479. pr_debug("Memory allocation error for acpi_perf_data.\n");
  480. return -ENOMEM;
  481. }
  482. for_each_possible_cpu(i) {
  483. if (!zalloc_cpumask_var_node(
  484. &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
  485. GFP_KERNEL, cpu_to_node(i))) {
  486. /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
  487. free_acpi_perf_data();
  488. return -ENOMEM;
  489. }
  490. }
  491. /* Do initialization in ACPI core */
  492. acpi_processor_preregister_performance(acpi_perf_data);
  493. return 0;
  494. }
  495. #ifdef CONFIG_SMP
  496. /*
  497. * Some BIOSes do SW_ANY coordination internally, either set it up in hw
  498. * or do it in BIOS firmware and won't inform about it to OS. If not
  499. * detected, this has a side effect of making CPU run at a different speed
  500. * than OS intended it to run at. Detect it and handle it cleanly.
  501. */
  502. static int bios_with_sw_any_bug;
  503. static int sw_any_bug_found(const struct dmi_system_id *d)
  504. {
  505. bios_with_sw_any_bug = 1;
  506. return 0;
  507. }
  508. static const struct dmi_system_id sw_any_bug_dmi_table[] = {
  509. {
  510. .callback = sw_any_bug_found,
  511. .ident = "Supermicro Server X6DLP",
  512. .matches = {
  513. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  514. DMI_MATCH(DMI_BIOS_VERSION, "080010"),
  515. DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
  516. },
  517. },
  518. { }
  519. };
  520. static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
  521. {
  522. /* Intel Xeon Processor 7100 Series Specification Update
  523. * http://www.intel.com/Assets/PDF/specupdate/314554.pdf
  524. * AL30: A Machine Check Exception (MCE) Occurring during an
  525. * Enhanced Intel SpeedStep Technology Ratio Change May Cause
  526. * Both Processor Cores to Lock Up. */
  527. if (c->x86_vendor == X86_VENDOR_INTEL) {
  528. if ((c->x86 == 15) &&
  529. (c->x86_model == 6) &&
  530. (c->x86_mask == 8)) {
  531. printk(KERN_INFO "acpi-cpufreq: Intel(R) "
  532. "Xeon(R) 7100 Errata AL30, processors may "
  533. "lock up on frequency changes: disabling "
  534. "acpi-cpufreq.\n");
  535. return -ENODEV;
  536. }
  537. }
  538. return 0;
  539. }
  540. #endif
  541. static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
  542. {
  543. unsigned int i;
  544. unsigned int valid_states = 0;
  545. unsigned int cpu = policy->cpu;
  546. struct acpi_cpufreq_data *data;
  547. unsigned int result = 0;
  548. struct cpuinfo_x86 *c = &cpu_data(policy->cpu);
  549. struct acpi_processor_performance *perf;
  550. #ifdef CONFIG_SMP
  551. static int blacklisted;
  552. #endif
  553. pr_debug("acpi_cpufreq_cpu_init\n");
  554. #ifdef CONFIG_SMP
  555. if (blacklisted)
  556. return blacklisted;
  557. blacklisted = acpi_cpufreq_blacklist(c);
  558. if (blacklisted)
  559. return blacklisted;
  560. #endif
  561. data = kzalloc(sizeof(*data), GFP_KERNEL);
  562. if (!data)
  563. return -ENOMEM;
  564. if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) {
  565. result = -ENOMEM;
  566. goto err_free;
  567. }
  568. data->acpi_data = per_cpu_ptr(acpi_perf_data, cpu);
  569. per_cpu(acfreq_data, cpu) = data;
  570. if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
  571. acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
  572. result = acpi_processor_register_performance(data->acpi_data, cpu);
  573. if (result)
  574. goto err_free_mask;
  575. perf = data->acpi_data;
  576. policy->shared_type = perf->shared_type;
  577. /*
  578. * Will let policy->cpus know about dependency only when software
  579. * coordination is required.
  580. */
  581. if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
  582. policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
  583. cpumask_copy(policy->cpus, perf->shared_cpu_map);
  584. }
  585. cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map);
  586. #ifdef CONFIG_SMP
  587. dmi_check_system(sw_any_bug_dmi_table);
  588. if (bios_with_sw_any_bug && !policy_is_shared(policy)) {
  589. policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
  590. cpumask_copy(policy->cpus, cpu_core_mask(cpu));
  591. }
  592. if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) {
  593. cpumask_clear(policy->cpus);
  594. cpumask_set_cpu(cpu, policy->cpus);
  595. cpumask_copy(data->freqdomain_cpus, cpu_sibling_mask(cpu));
  596. policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
  597. pr_info_once(PFX "overriding BIOS provided _PSD data\n");
  598. }
  599. #endif
  600. /* capability check */
  601. if (perf->state_count <= 1) {
  602. pr_debug("No P-States\n");
  603. result = -ENODEV;
  604. goto err_unreg;
  605. }
  606. if (perf->control_register.space_id != perf->status_register.space_id) {
  607. result = -ENODEV;
  608. goto err_unreg;
  609. }
  610. switch (perf->control_register.space_id) {
  611. case ACPI_ADR_SPACE_SYSTEM_IO:
  612. if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
  613. boot_cpu_data.x86 == 0xf) {
  614. pr_debug("AMD K8 systems must use native drivers.\n");
  615. result = -ENODEV;
  616. goto err_unreg;
  617. }
  618. pr_debug("SYSTEM IO addr space\n");
  619. data->cpu_feature = SYSTEM_IO_CAPABLE;
  620. break;
  621. case ACPI_ADR_SPACE_FIXED_HARDWARE:
  622. pr_debug("HARDWARE addr space\n");
  623. if (check_est_cpu(cpu)) {
  624. data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
  625. break;
  626. }
  627. if (check_amd_hwpstate_cpu(cpu)) {
  628. data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE;
  629. break;
  630. }
  631. result = -ENODEV;
  632. goto err_unreg;
  633. default:
  634. pr_debug("Unknown addr space %d\n",
  635. (u32) (perf->control_register.space_id));
  636. result = -ENODEV;
  637. goto err_unreg;
  638. }
  639. data->freq_table = kmalloc(sizeof(*data->freq_table) *
  640. (perf->state_count+1), GFP_KERNEL);
  641. if (!data->freq_table) {
  642. result = -ENOMEM;
  643. goto err_unreg;
  644. }
  645. /* detect transition latency */
  646. policy->cpuinfo.transition_latency = 0;
  647. for (i = 0; i < perf->state_count; i++) {
  648. if ((perf->states[i].transition_latency * 1000) >
  649. policy->cpuinfo.transition_latency)
  650. policy->cpuinfo.transition_latency =
  651. perf->states[i].transition_latency * 1000;
  652. }
  653. /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
  654. if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
  655. policy->cpuinfo.transition_latency > 20 * 1000) {
  656. policy->cpuinfo.transition_latency = 20 * 1000;
  657. printk_once(KERN_INFO
  658. "P-state transition latency capped at 20 uS\n");
  659. }
  660. /* table init */
  661. for (i = 0; i < perf->state_count; i++) {
  662. if (i > 0 && perf->states[i].core_frequency >=
  663. data->freq_table[valid_states-1].frequency / 1000)
  664. continue;
  665. data->freq_table[valid_states].driver_data = i;
  666. data->freq_table[valid_states].frequency =
  667. perf->states[i].core_frequency * 1000;
  668. valid_states++;
  669. }
  670. data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
  671. perf->state = 0;
  672. result = cpufreq_table_validate_and_show(policy, data->freq_table);
  673. if (result)
  674. goto err_freqfree;
  675. if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq)
  676. printk(KERN_WARNING FW_WARN "P-state 0 is not max freq\n");
  677. switch (perf->control_register.space_id) {
  678. case ACPI_ADR_SPACE_SYSTEM_IO:
  679. /*
  680. * The core will not set policy->cur, because
  681. * cpufreq_driver->get is NULL, so we need to set it here.
  682. * However, we have to guess it, because the current speed is
  683. * unknown and not detectable via IO ports.
  684. */
  685. policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
  686. break;
  687. case ACPI_ADR_SPACE_FIXED_HARDWARE:
  688. acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
  689. break;
  690. default:
  691. break;
  692. }
  693. /* notify BIOS that we exist */
  694. acpi_processor_notify_smm(THIS_MODULE);
  695. pr_debug("CPU%u - ACPI performance management activated.\n", cpu);
  696. for (i = 0; i < perf->state_count; i++)
  697. pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n",
  698. (i == perf->state ? '*' : ' '), i,
  699. (u32) perf->states[i].core_frequency,
  700. (u32) perf->states[i].power,
  701. (u32) perf->states[i].transition_latency);
  702. /*
  703. * the first call to ->target() should result in us actually
  704. * writing something to the appropriate registers.
  705. */
  706. data->resume = 1;
  707. return result;
  708. err_freqfree:
  709. kfree(data->freq_table);
  710. err_unreg:
  711. acpi_processor_unregister_performance(perf, cpu);
  712. err_free_mask:
  713. free_cpumask_var(data->freqdomain_cpus);
  714. err_free:
  715. kfree(data);
  716. per_cpu(acfreq_data, cpu) = NULL;
  717. return result;
  718. }
  719. static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
  720. {
  721. struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
  722. pr_debug("acpi_cpufreq_cpu_exit\n");
  723. if (data) {
  724. cpufreq_frequency_table_put_attr(policy->cpu);
  725. per_cpu(acfreq_data, policy->cpu) = NULL;
  726. acpi_processor_unregister_performance(data->acpi_data,
  727. policy->cpu);
  728. free_cpumask_var(data->freqdomain_cpus);
  729. kfree(data->freq_table);
  730. kfree(data);
  731. }
  732. return 0;
  733. }
  734. static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
  735. {
  736. struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
  737. pr_debug("acpi_cpufreq_resume\n");
  738. data->resume = 1;
  739. return 0;
  740. }
  741. static struct freq_attr *acpi_cpufreq_attr[] = {
  742. &cpufreq_freq_attr_scaling_available_freqs,
  743. &freqdomain_cpus,
  744. NULL, /* this is a placeholder for cpb, do not remove */
  745. NULL,
  746. };
  747. static struct cpufreq_driver acpi_cpufreq_driver = {
  748. .verify = cpufreq_generic_frequency_table_verify,
  749. .target_index = acpi_cpufreq_target,
  750. .bios_limit = acpi_processor_get_bios_limit,
  751. .init = acpi_cpufreq_cpu_init,
  752. .exit = acpi_cpufreq_cpu_exit,
  753. .resume = acpi_cpufreq_resume,
  754. .name = "acpi-cpufreq",
  755. .attr = acpi_cpufreq_attr,
  756. .set_boost = _store_boost,
  757. };
  758. static void __init acpi_cpufreq_boost_init(void)
  759. {
  760. if (boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA)) {
  761. msrs = msrs_alloc();
  762. if (!msrs)
  763. return;
  764. acpi_cpufreq_driver.boost_supported = true;
  765. acpi_cpufreq_driver.boost_enabled = boost_state(0);
  766. get_online_cpus();
  767. /* Force all MSRs to the same value */
  768. boost_set_msrs(acpi_cpufreq_driver.boost_enabled,
  769. cpu_online_mask);
  770. register_cpu_notifier(&boost_nb);
  771. put_online_cpus();
  772. }
  773. }
  774. static void acpi_cpufreq_boost_exit(void)
  775. {
  776. if (msrs) {
  777. unregister_cpu_notifier(&boost_nb);
  778. msrs_free(msrs);
  779. msrs = NULL;
  780. }
  781. }
  782. static int __init acpi_cpufreq_init(void)
  783. {
  784. int ret;
  785. if (acpi_disabled)
  786. return -ENODEV;
  787. /* don't keep reloading if cpufreq_driver exists */
  788. if (cpufreq_get_current_driver())
  789. return -EEXIST;
  790. pr_debug("acpi_cpufreq_init\n");
  791. ret = acpi_cpufreq_early_init();
  792. if (ret)
  793. return ret;
  794. #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
  795. /* this is a sysfs file with a strange name and an even stranger
  796. * semantic - per CPU instantiation, but system global effect.
  797. * Lets enable it only on AMD CPUs for compatibility reasons and
  798. * only if configured. This is considered legacy code, which
  799. * will probably be removed at some point in the future.
  800. */
  801. if (check_amd_hwpstate_cpu(0)) {
  802. struct freq_attr **iter;
  803. pr_debug("adding sysfs entry for cpb\n");
  804. for (iter = acpi_cpufreq_attr; *iter != NULL; iter++)
  805. ;
  806. /* make sure there is a terminator behind it */
  807. if (iter[1] == NULL)
  808. *iter = &cpb;
  809. }
  810. #endif
  811. acpi_cpufreq_boost_init();
  812. ret = cpufreq_register_driver(&acpi_cpufreq_driver);
  813. if (ret) {
  814. free_acpi_perf_data();
  815. acpi_cpufreq_boost_exit();
  816. }
  817. return ret;
  818. }
  819. static void __exit acpi_cpufreq_exit(void)
  820. {
  821. pr_debug("acpi_cpufreq_exit\n");
  822. acpi_cpufreq_boost_exit();
  823. cpufreq_unregister_driver(&acpi_cpufreq_driver);
  824. free_acpi_perf_data();
  825. }
  826. module_param(acpi_pstate_strict, uint, 0644);
  827. MODULE_PARM_DESC(acpi_pstate_strict,
  828. "value 0 or non-zero. non-zero -> strict ACPI checks are "
  829. "performed during frequency changes.");
  830. late_initcall(acpi_cpufreq_init);
  831. module_exit(acpi_cpufreq_exit);
  832. static const struct x86_cpu_id acpi_cpufreq_ids[] = {
  833. X86_FEATURE_MATCH(X86_FEATURE_ACPI),
  834. X86_FEATURE_MATCH(X86_FEATURE_HW_PSTATE),
  835. {}
  836. };
  837. MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids);
  838. static const struct acpi_device_id processor_device_ids[] = {
  839. {ACPI_PROCESSOR_OBJECT_HID, },
  840. {ACPI_PROCESSOR_DEVICE_HID, },
  841. {},
  842. };
  843. MODULE_DEVICE_TABLE(acpi, processor_device_ids);
  844. MODULE_ALIAS("acpi");