clk-programmable.c 8.4 KB

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  1. /*
  2. * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. */
  10. #include <linux/clk-provider.h>
  11. #include <linux/clkdev.h>
  12. #include <linux/clk/at91_pmc.h>
  13. #include <linux/of.h>
  14. #include <linux/of_address.h>
  15. #include <linux/of_irq.h>
  16. #include <linux/io.h>
  17. #include <linux/wait.h>
  18. #include <linux/sched.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/irq.h>
  21. #include "pmc.h"
  22. #define PROG_SOURCE_MAX 5
  23. #define PROG_ID_MAX 7
  24. #define PROG_STATUS_MASK(id) (1 << ((id) + 8))
  25. #define PROG_PRES_MASK 0x7
  26. #define PROG_MAX_RM9200_CSS 3
  27. struct clk_programmable_layout {
  28. u8 pres_shift;
  29. u8 css_mask;
  30. u8 have_slck_mck;
  31. };
  32. struct clk_programmable {
  33. struct clk_hw hw;
  34. struct at91_pmc *pmc;
  35. unsigned int irq;
  36. wait_queue_head_t wait;
  37. u8 id;
  38. u8 css;
  39. u8 pres;
  40. u8 slckmck;
  41. const struct clk_programmable_layout *layout;
  42. };
  43. #define to_clk_programmable(hw) container_of(hw, struct clk_programmable, hw)
  44. static irqreturn_t clk_programmable_irq_handler(int irq, void *dev_id)
  45. {
  46. struct clk_programmable *prog = (struct clk_programmable *)dev_id;
  47. wake_up(&prog->wait);
  48. return IRQ_HANDLED;
  49. }
  50. static int clk_programmable_prepare(struct clk_hw *hw)
  51. {
  52. u32 tmp;
  53. struct clk_programmable *prog = to_clk_programmable(hw);
  54. struct at91_pmc *pmc = prog->pmc;
  55. const struct clk_programmable_layout *layout = prog->layout;
  56. u8 id = prog->id;
  57. u32 mask = PROG_STATUS_MASK(id);
  58. tmp = prog->css | (prog->pres << layout->pres_shift);
  59. if (layout->have_slck_mck && prog->slckmck)
  60. tmp |= AT91_PMC_CSSMCK_MCK;
  61. pmc_write(pmc, AT91_PMC_PCKR(id), tmp);
  62. while (!(pmc_read(pmc, AT91_PMC_SR) & mask))
  63. wait_event(prog->wait, pmc_read(pmc, AT91_PMC_SR) & mask);
  64. return 0;
  65. }
  66. static int clk_programmable_is_ready(struct clk_hw *hw)
  67. {
  68. struct clk_programmable *prog = to_clk_programmable(hw);
  69. struct at91_pmc *pmc = prog->pmc;
  70. return !!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_PCKR(prog->id));
  71. }
  72. static unsigned long clk_programmable_recalc_rate(struct clk_hw *hw,
  73. unsigned long parent_rate)
  74. {
  75. u32 tmp;
  76. struct clk_programmable *prog = to_clk_programmable(hw);
  77. struct at91_pmc *pmc = prog->pmc;
  78. const struct clk_programmable_layout *layout = prog->layout;
  79. tmp = pmc_read(pmc, AT91_PMC_PCKR(prog->id));
  80. prog->pres = (tmp >> layout->pres_shift) & PROG_PRES_MASK;
  81. return parent_rate >> prog->pres;
  82. }
  83. static long clk_programmable_round_rate(struct clk_hw *hw, unsigned long rate,
  84. unsigned long *parent_rate)
  85. {
  86. unsigned long best_rate = *parent_rate;
  87. unsigned long best_diff;
  88. unsigned long new_diff;
  89. unsigned long cur_rate;
  90. int shift = shift;
  91. if (rate > *parent_rate)
  92. return *parent_rate;
  93. else
  94. best_diff = *parent_rate - rate;
  95. if (!best_diff)
  96. return best_rate;
  97. for (shift = 1; shift < PROG_PRES_MASK; shift++) {
  98. cur_rate = *parent_rate >> shift;
  99. if (cur_rate > rate)
  100. new_diff = cur_rate - rate;
  101. else
  102. new_diff = rate - cur_rate;
  103. if (!new_diff)
  104. return cur_rate;
  105. if (new_diff < best_diff) {
  106. best_diff = new_diff;
  107. best_rate = cur_rate;
  108. }
  109. if (rate > cur_rate)
  110. break;
  111. }
  112. return best_rate;
  113. }
  114. static int clk_programmable_set_parent(struct clk_hw *hw, u8 index)
  115. {
  116. struct clk_programmable *prog = to_clk_programmable(hw);
  117. const struct clk_programmable_layout *layout = prog->layout;
  118. if (index > layout->css_mask) {
  119. if (index > PROG_MAX_RM9200_CSS && layout->have_slck_mck) {
  120. prog->css = 0;
  121. prog->slckmck = 1;
  122. return 0;
  123. } else {
  124. return -EINVAL;
  125. }
  126. }
  127. prog->css = index;
  128. return 0;
  129. }
  130. static u8 clk_programmable_get_parent(struct clk_hw *hw)
  131. {
  132. u32 tmp;
  133. u8 ret;
  134. struct clk_programmable *prog = to_clk_programmable(hw);
  135. struct at91_pmc *pmc = prog->pmc;
  136. const struct clk_programmable_layout *layout = prog->layout;
  137. tmp = pmc_read(pmc, AT91_PMC_PCKR(prog->id));
  138. prog->css = tmp & layout->css_mask;
  139. ret = prog->css;
  140. if (layout->have_slck_mck) {
  141. prog->slckmck = !!(tmp & AT91_PMC_CSSMCK_MCK);
  142. if (prog->slckmck && !ret)
  143. ret = PROG_MAX_RM9200_CSS + 1;
  144. }
  145. return ret;
  146. }
  147. static int clk_programmable_set_rate(struct clk_hw *hw, unsigned long rate,
  148. unsigned long parent_rate)
  149. {
  150. struct clk_programmable *prog = to_clk_programmable(hw);
  151. unsigned long best_rate = parent_rate;
  152. unsigned long best_diff;
  153. unsigned long new_diff;
  154. unsigned long cur_rate;
  155. int shift = 0;
  156. if (rate > parent_rate)
  157. return parent_rate;
  158. else
  159. best_diff = parent_rate - rate;
  160. if (!best_diff) {
  161. prog->pres = shift;
  162. return 0;
  163. }
  164. for (shift = 1; shift < PROG_PRES_MASK; shift++) {
  165. cur_rate = parent_rate >> shift;
  166. if (cur_rate > rate)
  167. new_diff = cur_rate - rate;
  168. else
  169. new_diff = rate - cur_rate;
  170. if (!new_diff)
  171. break;
  172. if (new_diff < best_diff) {
  173. best_diff = new_diff;
  174. best_rate = cur_rate;
  175. }
  176. if (rate > cur_rate)
  177. break;
  178. }
  179. prog->pres = shift;
  180. return 0;
  181. }
  182. static const struct clk_ops programmable_ops = {
  183. .prepare = clk_programmable_prepare,
  184. .is_prepared = clk_programmable_is_ready,
  185. .recalc_rate = clk_programmable_recalc_rate,
  186. .round_rate = clk_programmable_round_rate,
  187. .get_parent = clk_programmable_get_parent,
  188. .set_parent = clk_programmable_set_parent,
  189. .set_rate = clk_programmable_set_rate,
  190. };
  191. static struct clk * __init
  192. at91_clk_register_programmable(struct at91_pmc *pmc, unsigned int irq,
  193. const char *name, const char **parent_names,
  194. u8 num_parents, u8 id,
  195. const struct clk_programmable_layout *layout)
  196. {
  197. int ret;
  198. struct clk_programmable *prog;
  199. struct clk *clk = NULL;
  200. struct clk_init_data init;
  201. char irq_name[11];
  202. if (id > PROG_ID_MAX)
  203. return ERR_PTR(-EINVAL);
  204. prog = kzalloc(sizeof(*prog), GFP_KERNEL);
  205. if (!prog)
  206. return ERR_PTR(-ENOMEM);
  207. init.name = name;
  208. init.ops = &programmable_ops;
  209. init.parent_names = parent_names;
  210. init.num_parents = num_parents;
  211. init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
  212. prog->id = id;
  213. prog->layout = layout;
  214. prog->hw.init = &init;
  215. prog->pmc = pmc;
  216. prog->irq = irq;
  217. init_waitqueue_head(&prog->wait);
  218. irq_set_status_flags(prog->irq, IRQ_NOAUTOEN);
  219. snprintf(irq_name, sizeof(irq_name), "clk-prog%d", id);
  220. ret = request_irq(prog->irq, clk_programmable_irq_handler,
  221. IRQF_TRIGGER_HIGH, irq_name, prog);
  222. if (ret)
  223. return ERR_PTR(ret);
  224. clk = clk_register(NULL, &prog->hw);
  225. if (IS_ERR(clk))
  226. kfree(prog);
  227. return clk;
  228. }
  229. static const struct clk_programmable_layout at91rm9200_programmable_layout = {
  230. .pres_shift = 2,
  231. .css_mask = 0x3,
  232. .have_slck_mck = 0,
  233. };
  234. static const struct clk_programmable_layout at91sam9g45_programmable_layout = {
  235. .pres_shift = 2,
  236. .css_mask = 0x3,
  237. .have_slck_mck = 1,
  238. };
  239. static const struct clk_programmable_layout at91sam9x5_programmable_layout = {
  240. .pres_shift = 4,
  241. .css_mask = 0x7,
  242. .have_slck_mck = 0,
  243. };
  244. static void __init
  245. of_at91_clk_prog_setup(struct device_node *np, struct at91_pmc *pmc,
  246. const struct clk_programmable_layout *layout)
  247. {
  248. int num;
  249. u32 id;
  250. int i;
  251. unsigned int irq;
  252. struct clk *clk;
  253. int num_parents;
  254. const char *parent_names[PROG_SOURCE_MAX];
  255. const char *name;
  256. struct device_node *progclknp;
  257. num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells");
  258. if (num_parents <= 0 || num_parents > PROG_SOURCE_MAX)
  259. return;
  260. for (i = 0; i < num_parents; ++i) {
  261. parent_names[i] = of_clk_get_parent_name(np, i);
  262. if (!parent_names[i])
  263. return;
  264. }
  265. num = of_get_child_count(np);
  266. if (!num || num > (PROG_ID_MAX + 1))
  267. return;
  268. for_each_child_of_node(np, progclknp) {
  269. if (of_property_read_u32(progclknp, "reg", &id))
  270. continue;
  271. if (of_property_read_string(np, "clock-output-names", &name))
  272. name = progclknp->name;
  273. irq = irq_of_parse_and_map(progclknp, 0);
  274. if (!irq)
  275. continue;
  276. clk = at91_clk_register_programmable(pmc, irq, name,
  277. parent_names, num_parents,
  278. id, layout);
  279. if (IS_ERR(clk))
  280. continue;
  281. of_clk_add_provider(progclknp, of_clk_src_simple_get, clk);
  282. }
  283. }
  284. void __init of_at91rm9200_clk_prog_setup(struct device_node *np,
  285. struct at91_pmc *pmc)
  286. {
  287. of_at91_clk_prog_setup(np, pmc, &at91rm9200_programmable_layout);
  288. }
  289. void __init of_at91sam9g45_clk_prog_setup(struct device_node *np,
  290. struct at91_pmc *pmc)
  291. {
  292. of_at91_clk_prog_setup(np, pmc, &at91sam9g45_programmable_layout);
  293. }
  294. void __init of_at91sam9x5_clk_prog_setup(struct device_node *np,
  295. struct at91_pmc *pmc)
  296. {
  297. of_at91_clk_prog_setup(np, pmc, &at91sam9x5_programmable_layout);
  298. }