setup-r7s72100.c 3.5 KB

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  1. /*
  2. * r7s72100 processor support
  3. *
  4. * Copyright (C) 2013 Renesas Solutions Corp.
  5. * Copyright (C) 2013 Magnus Damm
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/irq.h>
  21. #include <linux/kernel.h>
  22. #include <linux/of_platform.h>
  23. #include <linux/serial_sci.h>
  24. #include <linux/sh_timer.h>
  25. #include <mach/common.h>
  26. #include <mach/irqs.h>
  27. #include <mach/r7s72100.h>
  28. #include <asm/mach/arch.h>
  29. #define R7S72100_SCIF(index, baseaddr, irq) \
  30. static const struct plat_sci_port scif##index##_platform_data = { \
  31. .type = PORT_SCIF, \
  32. .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, \
  33. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
  34. .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | \
  35. SCSCR_REIE, \
  36. }; \
  37. \
  38. static struct resource scif##index##_resources[] = { \
  39. DEFINE_RES_MEM(baseaddr, 0x100), \
  40. DEFINE_RES_IRQ(irq + 1), \
  41. DEFINE_RES_IRQ(irq + 2), \
  42. DEFINE_RES_IRQ(irq + 3), \
  43. DEFINE_RES_IRQ(irq), \
  44. } \
  45. R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
  46. R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
  47. R7S72100_SCIF(2, 0xe8008000, gic_iid(229));
  48. R7S72100_SCIF(3, 0xe8008800, gic_iid(233));
  49. R7S72100_SCIF(4, 0xe8009000, gic_iid(237));
  50. R7S72100_SCIF(5, 0xe8009800, gic_iid(241));
  51. R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
  52. R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
  53. #define r7s72100_register_scif(index) \
  54. platform_device_register_resndata(&platform_bus, "sh-sci", index, \
  55. scif##index##_resources, \
  56. ARRAY_SIZE(scif##index##_resources), \
  57. &scif##index##_platform_data, \
  58. sizeof(scif##index##_platform_data))
  59. static struct sh_timer_config mtu2_0_platform_data __initdata = {
  60. .name = "MTU2_0",
  61. .timer_bit = 0,
  62. .channel_offset = -0x80,
  63. .clockevent_rating = 200,
  64. };
  65. static struct resource mtu2_0_resources[] __initdata = {
  66. DEFINE_RES_MEM(0xfcff0300, 0x27),
  67. DEFINE_RES_IRQ(gic_iid(139)), /* MTU2 TGI0A */
  68. };
  69. #define r7s72100_register_mtu2(idx) \
  70. platform_device_register_resndata(&platform_bus, "sh_mtu2", \
  71. idx, mtu2_##idx##_resources, \
  72. ARRAY_SIZE(mtu2_##idx##_resources), \
  73. &mtu2_##idx##_platform_data, \
  74. sizeof(struct sh_timer_config))
  75. void __init r7s72100_add_dt_devices(void)
  76. {
  77. r7s72100_register_scif(0);
  78. r7s72100_register_scif(1);
  79. r7s72100_register_scif(2);
  80. r7s72100_register_scif(3);
  81. r7s72100_register_scif(4);
  82. r7s72100_register_scif(5);
  83. r7s72100_register_scif(6);
  84. r7s72100_register_scif(7);
  85. r7s72100_register_mtu2(0);
  86. }
  87. void __init r7s72100_init_early(void)
  88. {
  89. shmobile_setup_delay(400, 1, 3); /* Cortex-A9 @ 400MHz */
  90. }
  91. #ifdef CONFIG_USE_OF
  92. static const char *r7s72100_boards_compat_dt[] __initdata = {
  93. "renesas,r7s72100",
  94. NULL,
  95. };
  96. DT_MACHINE_START(R7S72100_DT, "Generic R7S72100 (Flattened Device Tree)")
  97. .init_early = r7s72100_init_early,
  98. .dt_compat = r7s72100_boards_compat_dt,
  99. MACHINE_END
  100. #endif /* CONFIG_USE_OF */