core.c 90 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623
  1. /*
  2. * NVM Express device driver
  3. * Copyright (c) 2011-2014, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #include <linux/blkdev.h>
  15. #include <linux/blk-mq.h>
  16. #include <linux/delay.h>
  17. #include <linux/errno.h>
  18. #include <linux/hdreg.h>
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/list_sort.h>
  22. #include <linux/slab.h>
  23. #include <linux/types.h>
  24. #include <linux/pr.h>
  25. #include <linux/ptrace.h>
  26. #include <linux/nvme_ioctl.h>
  27. #include <linux/t10-pi.h>
  28. #include <linux/pm_qos.h>
  29. #include <asm/unaligned.h>
  30. #define CREATE_TRACE_POINTS
  31. #include "trace.h"
  32. #include "nvme.h"
  33. #include "fabrics.h"
  34. #define NVME_MINORS (1U << MINORBITS)
  35. unsigned int admin_timeout = 60;
  36. module_param(admin_timeout, uint, 0644);
  37. MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  38. EXPORT_SYMBOL_GPL(admin_timeout);
  39. unsigned int nvme_io_timeout = 30;
  40. module_param_named(io_timeout, nvme_io_timeout, uint, 0644);
  41. MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  42. EXPORT_SYMBOL_GPL(nvme_io_timeout);
  43. static unsigned char shutdown_timeout = 5;
  44. module_param(shutdown_timeout, byte, 0644);
  45. MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
  46. static u8 nvme_max_retries = 5;
  47. module_param_named(max_retries, nvme_max_retries, byte, 0644);
  48. MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
  49. static unsigned long default_ps_max_latency_us = 100000;
  50. module_param(default_ps_max_latency_us, ulong, 0644);
  51. MODULE_PARM_DESC(default_ps_max_latency_us,
  52. "max power saving latency for new devices; use PM QOS to change per device");
  53. static bool force_apst;
  54. module_param(force_apst, bool, 0644);
  55. MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
  56. static bool streams;
  57. module_param(streams, bool, 0644);
  58. MODULE_PARM_DESC(streams, "turn on support for Streams write directives");
  59. /*
  60. * nvme_wq - hosts nvme related works that are not reset or delete
  61. * nvme_reset_wq - hosts nvme reset works
  62. * nvme_delete_wq - hosts nvme delete works
  63. *
  64. * nvme_wq will host works such are scan, aen handling, fw activation,
  65. * keep-alive error recovery, periodic reconnects etc. nvme_reset_wq
  66. * runs reset works which also flush works hosted on nvme_wq for
  67. * serialization purposes. nvme_delete_wq host controller deletion
  68. * works which flush reset works for serialization.
  69. */
  70. struct workqueue_struct *nvme_wq;
  71. EXPORT_SYMBOL_GPL(nvme_wq);
  72. struct workqueue_struct *nvme_reset_wq;
  73. EXPORT_SYMBOL_GPL(nvme_reset_wq);
  74. struct workqueue_struct *nvme_delete_wq;
  75. EXPORT_SYMBOL_GPL(nvme_delete_wq);
  76. static DEFINE_IDA(nvme_subsystems_ida);
  77. static LIST_HEAD(nvme_subsystems);
  78. static DEFINE_MUTEX(nvme_subsystems_lock);
  79. static DEFINE_IDA(nvme_instance_ida);
  80. static dev_t nvme_chr_devt;
  81. static struct class *nvme_class;
  82. static struct class *nvme_subsys_class;
  83. static void nvme_ns_remove(struct nvme_ns *ns);
  84. static int nvme_revalidate_disk(struct gendisk *disk);
  85. static __le32 nvme_get_log_dw10(u8 lid, size_t size)
  86. {
  87. return cpu_to_le32((((size / 4) - 1) << 16) | lid);
  88. }
  89. int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
  90. {
  91. if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
  92. return -EBUSY;
  93. if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
  94. return -EBUSY;
  95. return 0;
  96. }
  97. EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
  98. int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
  99. {
  100. int ret;
  101. ret = nvme_reset_ctrl(ctrl);
  102. if (!ret)
  103. flush_work(&ctrl->reset_work);
  104. return ret;
  105. }
  106. EXPORT_SYMBOL_GPL(nvme_reset_ctrl_sync);
  107. static void nvme_delete_ctrl_work(struct work_struct *work)
  108. {
  109. struct nvme_ctrl *ctrl =
  110. container_of(work, struct nvme_ctrl, delete_work);
  111. flush_work(&ctrl->reset_work);
  112. nvme_stop_ctrl(ctrl);
  113. nvme_remove_namespaces(ctrl);
  114. ctrl->ops->delete_ctrl(ctrl);
  115. nvme_uninit_ctrl(ctrl);
  116. nvme_put_ctrl(ctrl);
  117. }
  118. int nvme_delete_ctrl(struct nvme_ctrl *ctrl)
  119. {
  120. if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
  121. return -EBUSY;
  122. if (!queue_work(nvme_delete_wq, &ctrl->delete_work))
  123. return -EBUSY;
  124. return 0;
  125. }
  126. EXPORT_SYMBOL_GPL(nvme_delete_ctrl);
  127. int nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl)
  128. {
  129. int ret = 0;
  130. /*
  131. * Keep a reference until the work is flushed since ->delete_ctrl
  132. * can free the controller.
  133. */
  134. nvme_get_ctrl(ctrl);
  135. ret = nvme_delete_ctrl(ctrl);
  136. if (!ret)
  137. flush_work(&ctrl->delete_work);
  138. nvme_put_ctrl(ctrl);
  139. return ret;
  140. }
  141. EXPORT_SYMBOL_GPL(nvme_delete_ctrl_sync);
  142. static inline bool nvme_ns_has_pi(struct nvme_ns *ns)
  143. {
  144. return ns->pi_type && ns->ms == sizeof(struct t10_pi_tuple);
  145. }
  146. static blk_status_t nvme_error_status(struct request *req)
  147. {
  148. switch (nvme_req(req)->status & 0x7ff) {
  149. case NVME_SC_SUCCESS:
  150. return BLK_STS_OK;
  151. case NVME_SC_CAP_EXCEEDED:
  152. return BLK_STS_NOSPC;
  153. case NVME_SC_LBA_RANGE:
  154. return BLK_STS_TARGET;
  155. case NVME_SC_BAD_ATTRIBUTES:
  156. case NVME_SC_ONCS_NOT_SUPPORTED:
  157. case NVME_SC_INVALID_OPCODE:
  158. case NVME_SC_INVALID_FIELD:
  159. case NVME_SC_INVALID_NS:
  160. return BLK_STS_NOTSUPP;
  161. case NVME_SC_WRITE_FAULT:
  162. case NVME_SC_READ_ERROR:
  163. case NVME_SC_UNWRITTEN_BLOCK:
  164. case NVME_SC_ACCESS_DENIED:
  165. case NVME_SC_READ_ONLY:
  166. case NVME_SC_COMPARE_FAILED:
  167. return BLK_STS_MEDIUM;
  168. case NVME_SC_GUARD_CHECK:
  169. case NVME_SC_APPTAG_CHECK:
  170. case NVME_SC_REFTAG_CHECK:
  171. case NVME_SC_INVALID_PI:
  172. return BLK_STS_PROTECTION;
  173. case NVME_SC_RESERVATION_CONFLICT:
  174. return BLK_STS_NEXUS;
  175. default:
  176. return BLK_STS_IOERR;
  177. }
  178. }
  179. static inline bool nvme_req_needs_retry(struct request *req)
  180. {
  181. if (blk_noretry_request(req))
  182. return false;
  183. if (nvme_req(req)->status & NVME_SC_DNR)
  184. return false;
  185. if (nvme_req(req)->retries >= nvme_max_retries)
  186. return false;
  187. return true;
  188. }
  189. void nvme_complete_rq(struct request *req)
  190. {
  191. blk_status_t status = nvme_error_status(req);
  192. trace_nvme_complete_rq(req);
  193. if (unlikely(status != BLK_STS_OK && nvme_req_needs_retry(req))) {
  194. if (nvme_req_needs_failover(req, status)) {
  195. nvme_failover_req(req);
  196. return;
  197. }
  198. if (!blk_queue_dying(req->q)) {
  199. nvme_req(req)->retries++;
  200. blk_mq_requeue_request(req, true);
  201. return;
  202. }
  203. }
  204. blk_mq_end_request(req, status);
  205. }
  206. EXPORT_SYMBOL_GPL(nvme_complete_rq);
  207. void nvme_cancel_request(struct request *req, void *data, bool reserved)
  208. {
  209. if (!blk_mq_request_started(req))
  210. return;
  211. dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
  212. "Cancelling I/O %d", req->tag);
  213. nvme_req(req)->status = NVME_SC_ABORT_REQ;
  214. blk_mq_complete_request(req);
  215. }
  216. EXPORT_SYMBOL_GPL(nvme_cancel_request);
  217. bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
  218. enum nvme_ctrl_state new_state)
  219. {
  220. enum nvme_ctrl_state old_state;
  221. unsigned long flags;
  222. bool changed = false;
  223. spin_lock_irqsave(&ctrl->lock, flags);
  224. old_state = ctrl->state;
  225. switch (new_state) {
  226. case NVME_CTRL_ADMIN_ONLY:
  227. switch (old_state) {
  228. case NVME_CTRL_RECONNECTING:
  229. changed = true;
  230. /* FALLTHRU */
  231. default:
  232. break;
  233. }
  234. break;
  235. case NVME_CTRL_LIVE:
  236. switch (old_state) {
  237. case NVME_CTRL_NEW:
  238. case NVME_CTRL_RESETTING:
  239. case NVME_CTRL_RECONNECTING:
  240. changed = true;
  241. /* FALLTHRU */
  242. default:
  243. break;
  244. }
  245. break;
  246. case NVME_CTRL_RESETTING:
  247. switch (old_state) {
  248. case NVME_CTRL_NEW:
  249. case NVME_CTRL_LIVE:
  250. case NVME_CTRL_ADMIN_ONLY:
  251. changed = true;
  252. /* FALLTHRU */
  253. default:
  254. break;
  255. }
  256. break;
  257. case NVME_CTRL_RECONNECTING:
  258. switch (old_state) {
  259. case NVME_CTRL_LIVE:
  260. case NVME_CTRL_RESETTING:
  261. changed = true;
  262. /* FALLTHRU */
  263. default:
  264. break;
  265. }
  266. break;
  267. case NVME_CTRL_DELETING:
  268. switch (old_state) {
  269. case NVME_CTRL_LIVE:
  270. case NVME_CTRL_ADMIN_ONLY:
  271. case NVME_CTRL_RESETTING:
  272. case NVME_CTRL_RECONNECTING:
  273. changed = true;
  274. /* FALLTHRU */
  275. default:
  276. break;
  277. }
  278. break;
  279. case NVME_CTRL_DEAD:
  280. switch (old_state) {
  281. case NVME_CTRL_DELETING:
  282. changed = true;
  283. /* FALLTHRU */
  284. default:
  285. break;
  286. }
  287. break;
  288. default:
  289. break;
  290. }
  291. if (changed)
  292. ctrl->state = new_state;
  293. spin_unlock_irqrestore(&ctrl->lock, flags);
  294. if (changed && ctrl->state == NVME_CTRL_LIVE)
  295. nvme_kick_requeue_lists(ctrl);
  296. return changed;
  297. }
  298. EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
  299. static void nvme_free_ns_head(struct kref *ref)
  300. {
  301. struct nvme_ns_head *head =
  302. container_of(ref, struct nvme_ns_head, ref);
  303. nvme_mpath_remove_disk(head);
  304. ida_simple_remove(&head->subsys->ns_ida, head->instance);
  305. list_del_init(&head->entry);
  306. cleanup_srcu_struct(&head->srcu);
  307. kfree(head);
  308. }
  309. static void nvme_put_ns_head(struct nvme_ns_head *head)
  310. {
  311. kref_put(&head->ref, nvme_free_ns_head);
  312. }
  313. static void nvme_free_ns(struct kref *kref)
  314. {
  315. struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
  316. if (ns->ndev)
  317. nvme_nvm_unregister(ns);
  318. put_disk(ns->disk);
  319. nvme_put_ns_head(ns->head);
  320. nvme_put_ctrl(ns->ctrl);
  321. kfree(ns);
  322. }
  323. static void nvme_put_ns(struct nvme_ns *ns)
  324. {
  325. kref_put(&ns->kref, nvme_free_ns);
  326. }
  327. struct request *nvme_alloc_request(struct request_queue *q,
  328. struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid)
  329. {
  330. unsigned op = nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
  331. struct request *req;
  332. if (qid == NVME_QID_ANY) {
  333. req = blk_mq_alloc_request(q, op, flags);
  334. } else {
  335. req = blk_mq_alloc_request_hctx(q, op, flags,
  336. qid ? qid - 1 : 0);
  337. }
  338. if (IS_ERR(req))
  339. return req;
  340. req->cmd_flags |= REQ_FAILFAST_DRIVER;
  341. nvme_req(req)->cmd = cmd;
  342. return req;
  343. }
  344. EXPORT_SYMBOL_GPL(nvme_alloc_request);
  345. static int nvme_toggle_streams(struct nvme_ctrl *ctrl, bool enable)
  346. {
  347. struct nvme_command c;
  348. memset(&c, 0, sizeof(c));
  349. c.directive.opcode = nvme_admin_directive_send;
  350. c.directive.nsid = cpu_to_le32(NVME_NSID_ALL);
  351. c.directive.doper = NVME_DIR_SND_ID_OP_ENABLE;
  352. c.directive.dtype = NVME_DIR_IDENTIFY;
  353. c.directive.tdtype = NVME_DIR_STREAMS;
  354. c.directive.endir = enable ? NVME_DIR_ENDIR : 0;
  355. return nvme_submit_sync_cmd(ctrl->admin_q, &c, NULL, 0);
  356. }
  357. static int nvme_disable_streams(struct nvme_ctrl *ctrl)
  358. {
  359. return nvme_toggle_streams(ctrl, false);
  360. }
  361. static int nvme_enable_streams(struct nvme_ctrl *ctrl)
  362. {
  363. return nvme_toggle_streams(ctrl, true);
  364. }
  365. static int nvme_get_stream_params(struct nvme_ctrl *ctrl,
  366. struct streams_directive_params *s, u32 nsid)
  367. {
  368. struct nvme_command c;
  369. memset(&c, 0, sizeof(c));
  370. memset(s, 0, sizeof(*s));
  371. c.directive.opcode = nvme_admin_directive_recv;
  372. c.directive.nsid = cpu_to_le32(nsid);
  373. c.directive.numd = cpu_to_le32((sizeof(*s) >> 2) - 1);
  374. c.directive.doper = NVME_DIR_RCV_ST_OP_PARAM;
  375. c.directive.dtype = NVME_DIR_STREAMS;
  376. return nvme_submit_sync_cmd(ctrl->admin_q, &c, s, sizeof(*s));
  377. }
  378. static int nvme_configure_directives(struct nvme_ctrl *ctrl)
  379. {
  380. struct streams_directive_params s;
  381. int ret;
  382. if (!(ctrl->oacs & NVME_CTRL_OACS_DIRECTIVES))
  383. return 0;
  384. if (!streams)
  385. return 0;
  386. ret = nvme_enable_streams(ctrl);
  387. if (ret)
  388. return ret;
  389. ret = nvme_get_stream_params(ctrl, &s, NVME_NSID_ALL);
  390. if (ret)
  391. return ret;
  392. ctrl->nssa = le16_to_cpu(s.nssa);
  393. if (ctrl->nssa < BLK_MAX_WRITE_HINTS - 1) {
  394. dev_info(ctrl->device, "too few streams (%u) available\n",
  395. ctrl->nssa);
  396. nvme_disable_streams(ctrl);
  397. return 0;
  398. }
  399. ctrl->nr_streams = min_t(unsigned, ctrl->nssa, BLK_MAX_WRITE_HINTS - 1);
  400. dev_info(ctrl->device, "Using %u streams\n", ctrl->nr_streams);
  401. return 0;
  402. }
  403. /*
  404. * Check if 'req' has a write hint associated with it. If it does, assign
  405. * a valid namespace stream to the write.
  406. */
  407. static void nvme_assign_write_stream(struct nvme_ctrl *ctrl,
  408. struct request *req, u16 *control,
  409. u32 *dsmgmt)
  410. {
  411. enum rw_hint streamid = req->write_hint;
  412. if (streamid == WRITE_LIFE_NOT_SET || streamid == WRITE_LIFE_NONE)
  413. streamid = 0;
  414. else {
  415. streamid--;
  416. if (WARN_ON_ONCE(streamid > ctrl->nr_streams))
  417. return;
  418. *control |= NVME_RW_DTYPE_STREAMS;
  419. *dsmgmt |= streamid << 16;
  420. }
  421. if (streamid < ARRAY_SIZE(req->q->write_hints))
  422. req->q->write_hints[streamid] += blk_rq_bytes(req) >> 9;
  423. }
  424. static inline void nvme_setup_flush(struct nvme_ns *ns,
  425. struct nvme_command *cmnd)
  426. {
  427. memset(cmnd, 0, sizeof(*cmnd));
  428. cmnd->common.opcode = nvme_cmd_flush;
  429. cmnd->common.nsid = cpu_to_le32(ns->head->ns_id);
  430. }
  431. static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
  432. struct nvme_command *cmnd)
  433. {
  434. unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
  435. struct nvme_dsm_range *range;
  436. struct bio *bio;
  437. range = kmalloc_array(segments, sizeof(*range), GFP_ATOMIC);
  438. if (!range)
  439. return BLK_STS_RESOURCE;
  440. __rq_for_each_bio(bio, req) {
  441. u64 slba = nvme_block_nr(ns, bio->bi_iter.bi_sector);
  442. u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift;
  443. range[n].cattr = cpu_to_le32(0);
  444. range[n].nlb = cpu_to_le32(nlb);
  445. range[n].slba = cpu_to_le64(slba);
  446. n++;
  447. }
  448. if (WARN_ON_ONCE(n != segments)) {
  449. kfree(range);
  450. return BLK_STS_IOERR;
  451. }
  452. memset(cmnd, 0, sizeof(*cmnd));
  453. cmnd->dsm.opcode = nvme_cmd_dsm;
  454. cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id);
  455. cmnd->dsm.nr = cpu_to_le32(segments - 1);
  456. cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
  457. req->special_vec.bv_page = virt_to_page(range);
  458. req->special_vec.bv_offset = offset_in_page(range);
  459. req->special_vec.bv_len = sizeof(*range) * segments;
  460. req->rq_flags |= RQF_SPECIAL_PAYLOAD;
  461. return BLK_STS_OK;
  462. }
  463. static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
  464. struct request *req, struct nvme_command *cmnd)
  465. {
  466. struct nvme_ctrl *ctrl = ns->ctrl;
  467. u16 control = 0;
  468. u32 dsmgmt = 0;
  469. if (req->cmd_flags & REQ_FUA)
  470. control |= NVME_RW_FUA;
  471. if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
  472. control |= NVME_RW_LR;
  473. if (req->cmd_flags & REQ_RAHEAD)
  474. dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
  475. memset(cmnd, 0, sizeof(*cmnd));
  476. cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
  477. cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id);
  478. cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
  479. cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
  480. if (req_op(req) == REQ_OP_WRITE && ctrl->nr_streams)
  481. nvme_assign_write_stream(ctrl, req, &control, &dsmgmt);
  482. if (ns->ms) {
  483. /*
  484. * If formated with metadata, the block layer always provides a
  485. * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else
  486. * we enable the PRACT bit for protection information or set the
  487. * namespace capacity to zero to prevent any I/O.
  488. */
  489. if (!blk_integrity_rq(req)) {
  490. if (WARN_ON_ONCE(!nvme_ns_has_pi(ns)))
  491. return BLK_STS_NOTSUPP;
  492. control |= NVME_RW_PRINFO_PRACT;
  493. }
  494. switch (ns->pi_type) {
  495. case NVME_NS_DPS_PI_TYPE3:
  496. control |= NVME_RW_PRINFO_PRCHK_GUARD;
  497. break;
  498. case NVME_NS_DPS_PI_TYPE1:
  499. case NVME_NS_DPS_PI_TYPE2:
  500. control |= NVME_RW_PRINFO_PRCHK_GUARD |
  501. NVME_RW_PRINFO_PRCHK_REF;
  502. cmnd->rw.reftag = cpu_to_le32(
  503. nvme_block_nr(ns, blk_rq_pos(req)));
  504. break;
  505. }
  506. }
  507. cmnd->rw.control = cpu_to_le16(control);
  508. cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
  509. return 0;
  510. }
  511. blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
  512. struct nvme_command *cmd)
  513. {
  514. blk_status_t ret = BLK_STS_OK;
  515. if (!(req->rq_flags & RQF_DONTPREP)) {
  516. nvme_req(req)->retries = 0;
  517. nvme_req(req)->flags = 0;
  518. req->rq_flags |= RQF_DONTPREP;
  519. }
  520. switch (req_op(req)) {
  521. case REQ_OP_DRV_IN:
  522. case REQ_OP_DRV_OUT:
  523. memcpy(cmd, nvme_req(req)->cmd, sizeof(*cmd));
  524. break;
  525. case REQ_OP_FLUSH:
  526. nvme_setup_flush(ns, cmd);
  527. break;
  528. case REQ_OP_WRITE_ZEROES:
  529. /* currently only aliased to deallocate for a few ctrls: */
  530. case REQ_OP_DISCARD:
  531. ret = nvme_setup_discard(ns, req, cmd);
  532. break;
  533. case REQ_OP_READ:
  534. case REQ_OP_WRITE:
  535. ret = nvme_setup_rw(ns, req, cmd);
  536. break;
  537. default:
  538. WARN_ON_ONCE(1);
  539. return BLK_STS_IOERR;
  540. }
  541. cmd->common.command_id = req->tag;
  542. if (ns)
  543. trace_nvme_setup_nvm_cmd(req->q->id, cmd);
  544. else
  545. trace_nvme_setup_admin_cmd(cmd);
  546. return ret;
  547. }
  548. EXPORT_SYMBOL_GPL(nvme_setup_cmd);
  549. /*
  550. * Returns 0 on success. If the result is negative, it's a Linux error code;
  551. * if the result is positive, it's an NVM Express status code
  552. */
  553. int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
  554. union nvme_result *result, void *buffer, unsigned bufflen,
  555. unsigned timeout, int qid, int at_head,
  556. blk_mq_req_flags_t flags)
  557. {
  558. struct request *req;
  559. int ret;
  560. req = nvme_alloc_request(q, cmd, flags, qid);
  561. if (IS_ERR(req))
  562. return PTR_ERR(req);
  563. req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
  564. if (buffer && bufflen) {
  565. ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
  566. if (ret)
  567. goto out;
  568. }
  569. blk_execute_rq(req->q, NULL, req, at_head);
  570. if (result)
  571. *result = nvme_req(req)->result;
  572. if (nvme_req(req)->flags & NVME_REQ_CANCELLED)
  573. ret = -EINTR;
  574. else
  575. ret = nvme_req(req)->status;
  576. out:
  577. blk_mq_free_request(req);
  578. return ret;
  579. }
  580. EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
  581. int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
  582. void *buffer, unsigned bufflen)
  583. {
  584. return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0,
  585. NVME_QID_ANY, 0, 0);
  586. }
  587. EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
  588. static void *nvme_add_user_metadata(struct bio *bio, void __user *ubuf,
  589. unsigned len, u32 seed, bool write)
  590. {
  591. struct bio_integrity_payload *bip;
  592. int ret = -ENOMEM;
  593. void *buf;
  594. buf = kmalloc(len, GFP_KERNEL);
  595. if (!buf)
  596. goto out;
  597. ret = -EFAULT;
  598. if (write && copy_from_user(buf, ubuf, len))
  599. goto out_free_meta;
  600. bip = bio_integrity_alloc(bio, GFP_KERNEL, 1);
  601. if (IS_ERR(bip)) {
  602. ret = PTR_ERR(bip);
  603. goto out_free_meta;
  604. }
  605. bip->bip_iter.bi_size = len;
  606. bip->bip_iter.bi_sector = seed;
  607. ret = bio_integrity_add_page(bio, virt_to_page(buf), len,
  608. offset_in_page(buf));
  609. if (ret == len)
  610. return buf;
  611. ret = -ENOMEM;
  612. out_free_meta:
  613. kfree(buf);
  614. out:
  615. return ERR_PTR(ret);
  616. }
  617. static int nvme_submit_user_cmd(struct request_queue *q,
  618. struct nvme_command *cmd, void __user *ubuffer,
  619. unsigned bufflen, void __user *meta_buffer, unsigned meta_len,
  620. u32 meta_seed, u32 *result, unsigned timeout)
  621. {
  622. bool write = nvme_is_write(cmd);
  623. struct nvme_ns *ns = q->queuedata;
  624. struct gendisk *disk = ns ? ns->disk : NULL;
  625. struct request *req;
  626. struct bio *bio = NULL;
  627. void *meta = NULL;
  628. int ret;
  629. req = nvme_alloc_request(q, cmd, 0, NVME_QID_ANY);
  630. if (IS_ERR(req))
  631. return PTR_ERR(req);
  632. req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
  633. if (ubuffer && bufflen) {
  634. ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen,
  635. GFP_KERNEL);
  636. if (ret)
  637. goto out;
  638. bio = req->bio;
  639. bio->bi_disk = disk;
  640. if (disk && meta_buffer && meta_len) {
  641. meta = nvme_add_user_metadata(bio, meta_buffer, meta_len,
  642. meta_seed, write);
  643. if (IS_ERR(meta)) {
  644. ret = PTR_ERR(meta);
  645. goto out_unmap;
  646. }
  647. }
  648. }
  649. blk_execute_rq(req->q, disk, req, 0);
  650. if (nvme_req(req)->flags & NVME_REQ_CANCELLED)
  651. ret = -EINTR;
  652. else
  653. ret = nvme_req(req)->status;
  654. if (result)
  655. *result = le32_to_cpu(nvme_req(req)->result.u32);
  656. if (meta && !ret && !write) {
  657. if (copy_to_user(meta_buffer, meta, meta_len))
  658. ret = -EFAULT;
  659. }
  660. kfree(meta);
  661. out_unmap:
  662. if (bio)
  663. blk_rq_unmap_user(bio);
  664. out:
  665. blk_mq_free_request(req);
  666. return ret;
  667. }
  668. static void nvme_keep_alive_end_io(struct request *rq, blk_status_t status)
  669. {
  670. struct nvme_ctrl *ctrl = rq->end_io_data;
  671. blk_mq_free_request(rq);
  672. if (status) {
  673. dev_err(ctrl->device,
  674. "failed nvme_keep_alive_end_io error=%d\n",
  675. status);
  676. return;
  677. }
  678. schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
  679. }
  680. static int nvme_keep_alive(struct nvme_ctrl *ctrl)
  681. {
  682. struct nvme_command c;
  683. struct request *rq;
  684. memset(&c, 0, sizeof(c));
  685. c.common.opcode = nvme_admin_keep_alive;
  686. rq = nvme_alloc_request(ctrl->admin_q, &c, BLK_MQ_REQ_RESERVED,
  687. NVME_QID_ANY);
  688. if (IS_ERR(rq))
  689. return PTR_ERR(rq);
  690. rq->timeout = ctrl->kato * HZ;
  691. rq->end_io_data = ctrl;
  692. blk_execute_rq_nowait(rq->q, NULL, rq, 0, nvme_keep_alive_end_io);
  693. return 0;
  694. }
  695. static void nvme_keep_alive_work(struct work_struct *work)
  696. {
  697. struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
  698. struct nvme_ctrl, ka_work);
  699. if (nvme_keep_alive(ctrl)) {
  700. /* allocation failure, reset the controller */
  701. dev_err(ctrl->device, "keep-alive failed\n");
  702. nvme_reset_ctrl(ctrl);
  703. return;
  704. }
  705. }
  706. void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
  707. {
  708. if (unlikely(ctrl->kato == 0))
  709. return;
  710. INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
  711. schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
  712. }
  713. EXPORT_SYMBOL_GPL(nvme_start_keep_alive);
  714. void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
  715. {
  716. if (unlikely(ctrl->kato == 0))
  717. return;
  718. cancel_delayed_work_sync(&ctrl->ka_work);
  719. }
  720. EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
  721. static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
  722. {
  723. struct nvme_command c = { };
  724. int error;
  725. /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
  726. c.identify.opcode = nvme_admin_identify;
  727. c.identify.cns = NVME_ID_CNS_CTRL;
  728. *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
  729. if (!*id)
  730. return -ENOMEM;
  731. error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
  732. sizeof(struct nvme_id_ctrl));
  733. if (error)
  734. kfree(*id);
  735. return error;
  736. }
  737. static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, unsigned nsid,
  738. struct nvme_ns_ids *ids)
  739. {
  740. struct nvme_command c = { };
  741. int status;
  742. void *data;
  743. int pos;
  744. int len;
  745. c.identify.opcode = nvme_admin_identify;
  746. c.identify.nsid = cpu_to_le32(nsid);
  747. c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
  748. data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
  749. if (!data)
  750. return -ENOMEM;
  751. status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
  752. NVME_IDENTIFY_DATA_SIZE);
  753. if (status)
  754. goto free_data;
  755. for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
  756. struct nvme_ns_id_desc *cur = data + pos;
  757. if (cur->nidl == 0)
  758. break;
  759. switch (cur->nidt) {
  760. case NVME_NIDT_EUI64:
  761. if (cur->nidl != NVME_NIDT_EUI64_LEN) {
  762. dev_warn(ctrl->device,
  763. "ctrl returned bogus length: %d for NVME_NIDT_EUI64\n",
  764. cur->nidl);
  765. goto free_data;
  766. }
  767. len = NVME_NIDT_EUI64_LEN;
  768. memcpy(ids->eui64, data + pos + sizeof(*cur), len);
  769. break;
  770. case NVME_NIDT_NGUID:
  771. if (cur->nidl != NVME_NIDT_NGUID_LEN) {
  772. dev_warn(ctrl->device,
  773. "ctrl returned bogus length: %d for NVME_NIDT_NGUID\n",
  774. cur->nidl);
  775. goto free_data;
  776. }
  777. len = NVME_NIDT_NGUID_LEN;
  778. memcpy(ids->nguid, data + pos + sizeof(*cur), len);
  779. break;
  780. case NVME_NIDT_UUID:
  781. if (cur->nidl != NVME_NIDT_UUID_LEN) {
  782. dev_warn(ctrl->device,
  783. "ctrl returned bogus length: %d for NVME_NIDT_UUID\n",
  784. cur->nidl);
  785. goto free_data;
  786. }
  787. len = NVME_NIDT_UUID_LEN;
  788. uuid_copy(&ids->uuid, data + pos + sizeof(*cur));
  789. break;
  790. default:
  791. /* Skip unnkown types */
  792. len = cur->nidl;
  793. break;
  794. }
  795. len += sizeof(*cur);
  796. }
  797. free_data:
  798. kfree(data);
  799. return status;
  800. }
  801. static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list)
  802. {
  803. struct nvme_command c = { };
  804. c.identify.opcode = nvme_admin_identify;
  805. c.identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST;
  806. c.identify.nsid = cpu_to_le32(nsid);
  807. return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 0x1000);
  808. }
  809. static struct nvme_id_ns *nvme_identify_ns(struct nvme_ctrl *ctrl,
  810. unsigned nsid)
  811. {
  812. struct nvme_id_ns *id;
  813. struct nvme_command c = { };
  814. int error;
  815. /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
  816. c.identify.opcode = nvme_admin_identify;
  817. c.identify.nsid = cpu_to_le32(nsid);
  818. c.identify.cns = NVME_ID_CNS_NS;
  819. id = kmalloc(sizeof(*id), GFP_KERNEL);
  820. if (!id)
  821. return NULL;
  822. error = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
  823. if (error) {
  824. dev_warn(ctrl->device, "Identify namespace failed\n");
  825. kfree(id);
  826. return NULL;
  827. }
  828. return id;
  829. }
  830. static int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
  831. void *buffer, size_t buflen, u32 *result)
  832. {
  833. struct nvme_command c;
  834. union nvme_result res;
  835. int ret;
  836. memset(&c, 0, sizeof(c));
  837. c.features.opcode = nvme_admin_set_features;
  838. c.features.fid = cpu_to_le32(fid);
  839. c.features.dword11 = cpu_to_le32(dword11);
  840. ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
  841. buffer, buflen, 0, NVME_QID_ANY, 0, 0);
  842. if (ret >= 0 && result)
  843. *result = le32_to_cpu(res.u32);
  844. return ret;
  845. }
  846. int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
  847. {
  848. u32 q_count = (*count - 1) | ((*count - 1) << 16);
  849. u32 result;
  850. int status, nr_io_queues;
  851. status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
  852. &result);
  853. if (status < 0)
  854. return status;
  855. /*
  856. * Degraded controllers might return an error when setting the queue
  857. * count. We still want to be able to bring them online and offer
  858. * access to the admin queue, as that might be only way to fix them up.
  859. */
  860. if (status > 0) {
  861. dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
  862. *count = 0;
  863. } else {
  864. nr_io_queues = min(result & 0xffff, result >> 16) + 1;
  865. *count = min(*count, nr_io_queues);
  866. }
  867. return 0;
  868. }
  869. EXPORT_SYMBOL_GPL(nvme_set_queue_count);
  870. static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
  871. {
  872. struct nvme_user_io io;
  873. struct nvme_command c;
  874. unsigned length, meta_len;
  875. void __user *metadata;
  876. if (copy_from_user(&io, uio, sizeof(io)))
  877. return -EFAULT;
  878. if (io.flags)
  879. return -EINVAL;
  880. switch (io.opcode) {
  881. case nvme_cmd_write:
  882. case nvme_cmd_read:
  883. case nvme_cmd_compare:
  884. break;
  885. default:
  886. return -EINVAL;
  887. }
  888. length = (io.nblocks + 1) << ns->lba_shift;
  889. meta_len = (io.nblocks + 1) * ns->ms;
  890. metadata = (void __user *)(uintptr_t)io.metadata;
  891. if (ns->ext) {
  892. length += meta_len;
  893. meta_len = 0;
  894. } else if (meta_len) {
  895. if ((io.metadata & 3) || !io.metadata)
  896. return -EINVAL;
  897. }
  898. memset(&c, 0, sizeof(c));
  899. c.rw.opcode = io.opcode;
  900. c.rw.flags = io.flags;
  901. c.rw.nsid = cpu_to_le32(ns->head->ns_id);
  902. c.rw.slba = cpu_to_le64(io.slba);
  903. c.rw.length = cpu_to_le16(io.nblocks);
  904. c.rw.control = cpu_to_le16(io.control);
  905. c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
  906. c.rw.reftag = cpu_to_le32(io.reftag);
  907. c.rw.apptag = cpu_to_le16(io.apptag);
  908. c.rw.appmask = cpu_to_le16(io.appmask);
  909. return nvme_submit_user_cmd(ns->queue, &c,
  910. (void __user *)(uintptr_t)io.addr, length,
  911. metadata, meta_len, io.slba, NULL, 0);
  912. }
  913. static u32 nvme_known_admin_effects(u8 opcode)
  914. {
  915. switch (opcode) {
  916. case nvme_admin_format_nvm:
  917. return NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC |
  918. NVME_CMD_EFFECTS_CSE_MASK;
  919. case nvme_admin_sanitize_nvm:
  920. return NVME_CMD_EFFECTS_CSE_MASK;
  921. default:
  922. break;
  923. }
  924. return 0;
  925. }
  926. static u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
  927. u8 opcode)
  928. {
  929. u32 effects = 0;
  930. if (ns) {
  931. if (ctrl->effects)
  932. effects = le32_to_cpu(ctrl->effects->iocs[opcode]);
  933. if (effects & ~NVME_CMD_EFFECTS_CSUPP)
  934. dev_warn(ctrl->device,
  935. "IO command:%02x has unhandled effects:%08x\n",
  936. opcode, effects);
  937. return 0;
  938. }
  939. if (ctrl->effects)
  940. effects = le32_to_cpu(ctrl->effects->iocs[opcode]);
  941. else
  942. effects = nvme_known_admin_effects(opcode);
  943. /*
  944. * For simplicity, IO to all namespaces is quiesced even if the command
  945. * effects say only one namespace is affected.
  946. */
  947. if (effects & (NVME_CMD_EFFECTS_LBCC | NVME_CMD_EFFECTS_CSE_MASK)) {
  948. nvme_start_freeze(ctrl);
  949. nvme_wait_freeze(ctrl);
  950. }
  951. return effects;
  952. }
  953. static void nvme_update_formats(struct nvme_ctrl *ctrl)
  954. {
  955. struct nvme_ns *ns;
  956. mutex_lock(&ctrl->namespaces_mutex);
  957. list_for_each_entry(ns, &ctrl->namespaces, list) {
  958. if (ns->disk && nvme_revalidate_disk(ns->disk))
  959. nvme_ns_remove(ns);
  960. }
  961. mutex_unlock(&ctrl->namespaces_mutex);
  962. }
  963. static void nvme_passthru_end(struct nvme_ctrl *ctrl, u32 effects)
  964. {
  965. /*
  966. * Revalidate LBA changes prior to unfreezing. This is necessary to
  967. * prevent memory corruption if a logical block size was changed by
  968. * this command.
  969. */
  970. if (effects & NVME_CMD_EFFECTS_LBCC)
  971. nvme_update_formats(ctrl);
  972. if (effects & (NVME_CMD_EFFECTS_LBCC | NVME_CMD_EFFECTS_CSE_MASK))
  973. nvme_unfreeze(ctrl);
  974. if (effects & NVME_CMD_EFFECTS_CCC)
  975. nvme_init_identify(ctrl);
  976. if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC))
  977. nvme_queue_scan(ctrl);
  978. }
  979. static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
  980. struct nvme_passthru_cmd __user *ucmd)
  981. {
  982. struct nvme_passthru_cmd cmd;
  983. struct nvme_command c;
  984. unsigned timeout = 0;
  985. u32 effects;
  986. int status;
  987. if (!capable(CAP_SYS_ADMIN))
  988. return -EACCES;
  989. if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
  990. return -EFAULT;
  991. if (cmd.flags)
  992. return -EINVAL;
  993. memset(&c, 0, sizeof(c));
  994. c.common.opcode = cmd.opcode;
  995. c.common.flags = cmd.flags;
  996. c.common.nsid = cpu_to_le32(cmd.nsid);
  997. c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
  998. c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
  999. c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
  1000. c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
  1001. c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
  1002. c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
  1003. c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
  1004. c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
  1005. if (cmd.timeout_ms)
  1006. timeout = msecs_to_jiffies(cmd.timeout_ms);
  1007. effects = nvme_passthru_start(ctrl, ns, cmd.opcode);
  1008. status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c,
  1009. (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
  1010. (void __user *)(uintptr_t)cmd.metadata, cmd.metadata,
  1011. 0, &cmd.result, timeout);
  1012. nvme_passthru_end(ctrl, effects);
  1013. if (status >= 0) {
  1014. if (put_user(cmd.result, &ucmd->result))
  1015. return -EFAULT;
  1016. }
  1017. return status;
  1018. }
  1019. /*
  1020. * Issue ioctl requests on the first available path. Note that unlike normal
  1021. * block layer requests we will not retry failed request on another controller.
  1022. */
  1023. static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk,
  1024. struct nvme_ns_head **head, int *srcu_idx)
  1025. {
  1026. #ifdef CONFIG_NVME_MULTIPATH
  1027. if (disk->fops == &nvme_ns_head_ops) {
  1028. *head = disk->private_data;
  1029. *srcu_idx = srcu_read_lock(&(*head)->srcu);
  1030. return nvme_find_path(*head);
  1031. }
  1032. #endif
  1033. *head = NULL;
  1034. *srcu_idx = -1;
  1035. return disk->private_data;
  1036. }
  1037. static void nvme_put_ns_from_disk(struct nvme_ns_head *head, int idx)
  1038. {
  1039. if (head)
  1040. srcu_read_unlock(&head->srcu, idx);
  1041. }
  1042. static int nvme_ns_ioctl(struct nvme_ns *ns, unsigned cmd, unsigned long arg)
  1043. {
  1044. switch (cmd) {
  1045. case NVME_IOCTL_ID:
  1046. force_successful_syscall_return();
  1047. return ns->head->ns_id;
  1048. case NVME_IOCTL_ADMIN_CMD:
  1049. return nvme_user_cmd(ns->ctrl, NULL, (void __user *)arg);
  1050. case NVME_IOCTL_IO_CMD:
  1051. return nvme_user_cmd(ns->ctrl, ns, (void __user *)arg);
  1052. case NVME_IOCTL_SUBMIT_IO:
  1053. return nvme_submit_io(ns, (void __user *)arg);
  1054. default:
  1055. #ifdef CONFIG_NVM
  1056. if (ns->ndev)
  1057. return nvme_nvm_ioctl(ns, cmd, arg);
  1058. #endif
  1059. if (is_sed_ioctl(cmd))
  1060. return sed_ioctl(ns->ctrl->opal_dev, cmd,
  1061. (void __user *) arg);
  1062. return -ENOTTY;
  1063. }
  1064. }
  1065. static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
  1066. unsigned int cmd, unsigned long arg)
  1067. {
  1068. struct nvme_ns_head *head = NULL;
  1069. struct nvme_ns *ns;
  1070. int srcu_idx, ret;
  1071. ns = nvme_get_ns_from_disk(bdev->bd_disk, &head, &srcu_idx);
  1072. if (unlikely(!ns))
  1073. ret = -EWOULDBLOCK;
  1074. else
  1075. ret = nvme_ns_ioctl(ns, cmd, arg);
  1076. nvme_put_ns_from_disk(head, srcu_idx);
  1077. return ret;
  1078. }
  1079. static int nvme_open(struct block_device *bdev, fmode_t mode)
  1080. {
  1081. struct nvme_ns *ns = bdev->bd_disk->private_data;
  1082. #ifdef CONFIG_NVME_MULTIPATH
  1083. /* should never be called due to GENHD_FL_HIDDEN */
  1084. if (WARN_ON_ONCE(ns->head->disk))
  1085. goto fail;
  1086. #endif
  1087. if (!kref_get_unless_zero(&ns->kref))
  1088. goto fail;
  1089. if (!try_module_get(ns->ctrl->ops->module))
  1090. goto fail_put_ns;
  1091. return 0;
  1092. fail_put_ns:
  1093. nvme_put_ns(ns);
  1094. fail:
  1095. return -ENXIO;
  1096. }
  1097. static void nvme_release(struct gendisk *disk, fmode_t mode)
  1098. {
  1099. struct nvme_ns *ns = disk->private_data;
  1100. module_put(ns->ctrl->ops->module);
  1101. nvme_put_ns(ns);
  1102. }
  1103. static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
  1104. {
  1105. /* some standard values */
  1106. geo->heads = 1 << 6;
  1107. geo->sectors = 1 << 5;
  1108. geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
  1109. return 0;
  1110. }
  1111. #ifdef CONFIG_BLK_DEV_INTEGRITY
  1112. static void nvme_init_integrity(struct gendisk *disk, u16 ms, u8 pi_type)
  1113. {
  1114. struct blk_integrity integrity;
  1115. memset(&integrity, 0, sizeof(integrity));
  1116. switch (pi_type) {
  1117. case NVME_NS_DPS_PI_TYPE3:
  1118. integrity.profile = &t10_pi_type3_crc;
  1119. integrity.tag_size = sizeof(u16) + sizeof(u32);
  1120. integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
  1121. break;
  1122. case NVME_NS_DPS_PI_TYPE1:
  1123. case NVME_NS_DPS_PI_TYPE2:
  1124. integrity.profile = &t10_pi_type1_crc;
  1125. integrity.tag_size = sizeof(u16);
  1126. integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
  1127. break;
  1128. default:
  1129. integrity.profile = NULL;
  1130. break;
  1131. }
  1132. integrity.tuple_size = ms;
  1133. blk_integrity_register(disk, &integrity);
  1134. blk_queue_max_integrity_segments(disk->queue, 1);
  1135. }
  1136. #else
  1137. static void nvme_init_integrity(struct gendisk *disk, u16 ms, u8 pi_type)
  1138. {
  1139. }
  1140. #endif /* CONFIG_BLK_DEV_INTEGRITY */
  1141. static void nvme_set_chunk_size(struct nvme_ns *ns)
  1142. {
  1143. u32 chunk_size = (((u32)ns->noiob) << (ns->lba_shift - 9));
  1144. blk_queue_chunk_sectors(ns->queue, rounddown_pow_of_two(chunk_size));
  1145. }
  1146. static void nvme_config_discard(struct nvme_ctrl *ctrl,
  1147. unsigned stream_alignment, struct request_queue *queue)
  1148. {
  1149. u32 size = queue_logical_block_size(queue);
  1150. if (stream_alignment)
  1151. size *= stream_alignment;
  1152. BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) <
  1153. NVME_DSM_MAX_RANGES);
  1154. queue->limits.discard_alignment = 0;
  1155. queue->limits.discard_granularity = size;
  1156. blk_queue_max_discard_sectors(queue, UINT_MAX);
  1157. blk_queue_max_discard_segments(queue, NVME_DSM_MAX_RANGES);
  1158. queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, queue);
  1159. if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
  1160. blk_queue_max_write_zeroes_sectors(queue, UINT_MAX);
  1161. }
  1162. static void nvme_report_ns_ids(struct nvme_ctrl *ctrl, unsigned int nsid,
  1163. struct nvme_id_ns *id, struct nvme_ns_ids *ids)
  1164. {
  1165. memset(ids, 0, sizeof(*ids));
  1166. if (ctrl->vs >= NVME_VS(1, 1, 0))
  1167. memcpy(ids->eui64, id->eui64, sizeof(id->eui64));
  1168. if (ctrl->vs >= NVME_VS(1, 2, 0))
  1169. memcpy(ids->nguid, id->nguid, sizeof(id->nguid));
  1170. if (ctrl->vs >= NVME_VS(1, 3, 0)) {
  1171. /* Don't treat error as fatal we potentially
  1172. * already have a NGUID or EUI-64
  1173. */
  1174. if (nvme_identify_ns_descs(ctrl, nsid, ids))
  1175. dev_warn(ctrl->device,
  1176. "%s: Identify Descriptors failed\n", __func__);
  1177. }
  1178. }
  1179. static bool nvme_ns_ids_valid(struct nvme_ns_ids *ids)
  1180. {
  1181. return !uuid_is_null(&ids->uuid) ||
  1182. memchr_inv(ids->nguid, 0, sizeof(ids->nguid)) ||
  1183. memchr_inv(ids->eui64, 0, sizeof(ids->eui64));
  1184. }
  1185. static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b)
  1186. {
  1187. return uuid_equal(&a->uuid, &b->uuid) &&
  1188. memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 &&
  1189. memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0;
  1190. }
  1191. static void nvme_update_disk_info(struct gendisk *disk,
  1192. struct nvme_ns *ns, struct nvme_id_ns *id)
  1193. {
  1194. sector_t capacity = le64_to_cpup(&id->nsze) << (ns->lba_shift - 9);
  1195. unsigned short bs = 1 << ns->lba_shift;
  1196. unsigned stream_alignment = 0;
  1197. if (ns->ctrl->nr_streams && ns->sws && ns->sgs)
  1198. stream_alignment = ns->sws * ns->sgs;
  1199. blk_mq_freeze_queue(disk->queue);
  1200. blk_integrity_unregister(disk);
  1201. blk_queue_logical_block_size(disk->queue, bs);
  1202. blk_queue_physical_block_size(disk->queue, bs);
  1203. blk_queue_io_min(disk->queue, bs);
  1204. if (ns->ms && !ns->ext &&
  1205. (ns->ctrl->ops->flags & NVME_F_METADATA_SUPPORTED))
  1206. nvme_init_integrity(disk, ns->ms, ns->pi_type);
  1207. if (ns->ms && !nvme_ns_has_pi(ns) && !blk_get_integrity(disk))
  1208. capacity = 0;
  1209. set_capacity(disk, capacity);
  1210. if (ns->ctrl->oncs & NVME_CTRL_ONCS_DSM)
  1211. nvme_config_discard(ns->ctrl, stream_alignment, disk->queue);
  1212. blk_mq_unfreeze_queue(disk->queue);
  1213. }
  1214. static void __nvme_revalidate_disk(struct gendisk *disk, struct nvme_id_ns *id)
  1215. {
  1216. struct nvme_ns *ns = disk->private_data;
  1217. /*
  1218. * If identify namespace failed, use default 512 byte block size so
  1219. * block layer can use before failing read/write for 0 capacity.
  1220. */
  1221. ns->lba_shift = id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ds;
  1222. if (ns->lba_shift == 0)
  1223. ns->lba_shift = 9;
  1224. ns->noiob = le16_to_cpu(id->noiob);
  1225. ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
  1226. ns->ms = le16_to_cpu(id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ms);
  1227. /* the PI implementation requires metadata equal t10 pi tuple size */
  1228. if (ns->ms == sizeof(struct t10_pi_tuple))
  1229. ns->pi_type = id->dps & NVME_NS_DPS_PI_MASK;
  1230. else
  1231. ns->pi_type = 0;
  1232. if (ns->noiob)
  1233. nvme_set_chunk_size(ns);
  1234. nvme_update_disk_info(disk, ns, id);
  1235. #ifdef CONFIG_NVME_MULTIPATH
  1236. if (ns->head->disk)
  1237. nvme_update_disk_info(ns->head->disk, ns, id);
  1238. #endif
  1239. }
  1240. static int nvme_revalidate_disk(struct gendisk *disk)
  1241. {
  1242. struct nvme_ns *ns = disk->private_data;
  1243. struct nvme_ctrl *ctrl = ns->ctrl;
  1244. struct nvme_id_ns *id;
  1245. struct nvme_ns_ids ids;
  1246. int ret = 0;
  1247. if (test_bit(NVME_NS_DEAD, &ns->flags)) {
  1248. set_capacity(disk, 0);
  1249. return -ENODEV;
  1250. }
  1251. id = nvme_identify_ns(ctrl, ns->head->ns_id);
  1252. if (!id)
  1253. return -ENODEV;
  1254. if (id->ncap == 0) {
  1255. ret = -ENODEV;
  1256. goto out;
  1257. }
  1258. __nvme_revalidate_disk(disk, id);
  1259. nvme_report_ns_ids(ctrl, ns->head->ns_id, id, &ids);
  1260. if (!nvme_ns_ids_equal(&ns->head->ids, &ids)) {
  1261. dev_err(ctrl->device,
  1262. "identifiers changed for nsid %d\n", ns->head->ns_id);
  1263. ret = -ENODEV;
  1264. }
  1265. out:
  1266. kfree(id);
  1267. return ret;
  1268. }
  1269. static char nvme_pr_type(enum pr_type type)
  1270. {
  1271. switch (type) {
  1272. case PR_WRITE_EXCLUSIVE:
  1273. return 1;
  1274. case PR_EXCLUSIVE_ACCESS:
  1275. return 2;
  1276. case PR_WRITE_EXCLUSIVE_REG_ONLY:
  1277. return 3;
  1278. case PR_EXCLUSIVE_ACCESS_REG_ONLY:
  1279. return 4;
  1280. case PR_WRITE_EXCLUSIVE_ALL_REGS:
  1281. return 5;
  1282. case PR_EXCLUSIVE_ACCESS_ALL_REGS:
  1283. return 6;
  1284. default:
  1285. return 0;
  1286. }
  1287. };
  1288. static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
  1289. u64 key, u64 sa_key, u8 op)
  1290. {
  1291. struct nvme_ns_head *head = NULL;
  1292. struct nvme_ns *ns;
  1293. struct nvme_command c;
  1294. int srcu_idx, ret;
  1295. u8 data[16] = { 0, };
  1296. ns = nvme_get_ns_from_disk(bdev->bd_disk, &head, &srcu_idx);
  1297. if (unlikely(!ns))
  1298. return -EWOULDBLOCK;
  1299. put_unaligned_le64(key, &data[0]);
  1300. put_unaligned_le64(sa_key, &data[8]);
  1301. memset(&c, 0, sizeof(c));
  1302. c.common.opcode = op;
  1303. c.common.nsid = cpu_to_le32(ns->head->ns_id);
  1304. c.common.cdw10[0] = cpu_to_le32(cdw10);
  1305. ret = nvme_submit_sync_cmd(ns->queue, &c, data, 16);
  1306. nvme_put_ns_from_disk(head, srcu_idx);
  1307. return ret;
  1308. }
  1309. static int nvme_pr_register(struct block_device *bdev, u64 old,
  1310. u64 new, unsigned flags)
  1311. {
  1312. u32 cdw10;
  1313. if (flags & ~PR_FL_IGNORE_KEY)
  1314. return -EOPNOTSUPP;
  1315. cdw10 = old ? 2 : 0;
  1316. cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
  1317. cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
  1318. return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
  1319. }
  1320. static int nvme_pr_reserve(struct block_device *bdev, u64 key,
  1321. enum pr_type type, unsigned flags)
  1322. {
  1323. u32 cdw10;
  1324. if (flags & ~PR_FL_IGNORE_KEY)
  1325. return -EOPNOTSUPP;
  1326. cdw10 = nvme_pr_type(type) << 8;
  1327. cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
  1328. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
  1329. }
  1330. static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
  1331. enum pr_type type, bool abort)
  1332. {
  1333. u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
  1334. return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
  1335. }
  1336. static int nvme_pr_clear(struct block_device *bdev, u64 key)
  1337. {
  1338. u32 cdw10 = 1 | (key ? 1 << 3 : 0);
  1339. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
  1340. }
  1341. static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
  1342. {
  1343. u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
  1344. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
  1345. }
  1346. static const struct pr_ops nvme_pr_ops = {
  1347. .pr_register = nvme_pr_register,
  1348. .pr_reserve = nvme_pr_reserve,
  1349. .pr_release = nvme_pr_release,
  1350. .pr_preempt = nvme_pr_preempt,
  1351. .pr_clear = nvme_pr_clear,
  1352. };
  1353. #ifdef CONFIG_BLK_SED_OPAL
  1354. int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
  1355. bool send)
  1356. {
  1357. struct nvme_ctrl *ctrl = data;
  1358. struct nvme_command cmd;
  1359. memset(&cmd, 0, sizeof(cmd));
  1360. if (send)
  1361. cmd.common.opcode = nvme_admin_security_send;
  1362. else
  1363. cmd.common.opcode = nvme_admin_security_recv;
  1364. cmd.common.nsid = 0;
  1365. cmd.common.cdw10[0] = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
  1366. cmd.common.cdw10[1] = cpu_to_le32(len);
  1367. return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
  1368. ADMIN_TIMEOUT, NVME_QID_ANY, 1, 0);
  1369. }
  1370. EXPORT_SYMBOL_GPL(nvme_sec_submit);
  1371. #endif /* CONFIG_BLK_SED_OPAL */
  1372. static const struct block_device_operations nvme_fops = {
  1373. .owner = THIS_MODULE,
  1374. .ioctl = nvme_ioctl,
  1375. .compat_ioctl = nvme_ioctl,
  1376. .open = nvme_open,
  1377. .release = nvme_release,
  1378. .getgeo = nvme_getgeo,
  1379. .revalidate_disk= nvme_revalidate_disk,
  1380. .pr_ops = &nvme_pr_ops,
  1381. };
  1382. #ifdef CONFIG_NVME_MULTIPATH
  1383. static int nvme_ns_head_open(struct block_device *bdev, fmode_t mode)
  1384. {
  1385. struct nvme_ns_head *head = bdev->bd_disk->private_data;
  1386. if (!kref_get_unless_zero(&head->ref))
  1387. return -ENXIO;
  1388. return 0;
  1389. }
  1390. static void nvme_ns_head_release(struct gendisk *disk, fmode_t mode)
  1391. {
  1392. nvme_put_ns_head(disk->private_data);
  1393. }
  1394. const struct block_device_operations nvme_ns_head_ops = {
  1395. .owner = THIS_MODULE,
  1396. .open = nvme_ns_head_open,
  1397. .release = nvme_ns_head_release,
  1398. .ioctl = nvme_ioctl,
  1399. .compat_ioctl = nvme_ioctl,
  1400. .getgeo = nvme_getgeo,
  1401. .pr_ops = &nvme_pr_ops,
  1402. };
  1403. #endif /* CONFIG_NVME_MULTIPATH */
  1404. static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled)
  1405. {
  1406. unsigned long timeout =
  1407. ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
  1408. u32 csts, bit = enabled ? NVME_CSTS_RDY : 0;
  1409. int ret;
  1410. while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
  1411. if (csts == ~0)
  1412. return -ENODEV;
  1413. if ((csts & NVME_CSTS_RDY) == bit)
  1414. break;
  1415. msleep(100);
  1416. if (fatal_signal_pending(current))
  1417. return -EINTR;
  1418. if (time_after(jiffies, timeout)) {
  1419. dev_err(ctrl->device,
  1420. "Device not ready; aborting %s\n", enabled ?
  1421. "initialisation" : "reset");
  1422. return -ENODEV;
  1423. }
  1424. }
  1425. return ret;
  1426. }
  1427. /*
  1428. * If the device has been passed off to us in an enabled state, just clear
  1429. * the enabled bit. The spec says we should set the 'shutdown notification
  1430. * bits', but doing so may cause the device to complete commands to the
  1431. * admin queue ... and we don't know what memory that might be pointing at!
  1432. */
  1433. int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
  1434. {
  1435. int ret;
  1436. ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
  1437. ctrl->ctrl_config &= ~NVME_CC_ENABLE;
  1438. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  1439. if (ret)
  1440. return ret;
  1441. if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
  1442. msleep(NVME_QUIRK_DELAY_AMOUNT);
  1443. return nvme_wait_ready(ctrl, cap, false);
  1444. }
  1445. EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
  1446. int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
  1447. {
  1448. /*
  1449. * Default to a 4K page size, with the intention to update this
  1450. * path in the future to accomodate architectures with differing
  1451. * kernel and IO page sizes.
  1452. */
  1453. unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12, page_shift = 12;
  1454. int ret;
  1455. if (page_shift < dev_page_min) {
  1456. dev_err(ctrl->device,
  1457. "Minimum device page size %u too large for host (%u)\n",
  1458. 1 << dev_page_min, 1 << page_shift);
  1459. return -ENODEV;
  1460. }
  1461. ctrl->page_size = 1 << page_shift;
  1462. ctrl->ctrl_config = NVME_CC_CSS_NVM;
  1463. ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
  1464. ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
  1465. ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
  1466. ctrl->ctrl_config |= NVME_CC_ENABLE;
  1467. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  1468. if (ret)
  1469. return ret;
  1470. return nvme_wait_ready(ctrl, cap, true);
  1471. }
  1472. EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
  1473. int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl)
  1474. {
  1475. unsigned long timeout = jiffies + (ctrl->shutdown_timeout * HZ);
  1476. u32 csts;
  1477. int ret;
  1478. ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
  1479. ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
  1480. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  1481. if (ret)
  1482. return ret;
  1483. while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
  1484. if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT)
  1485. break;
  1486. msleep(100);
  1487. if (fatal_signal_pending(current))
  1488. return -EINTR;
  1489. if (time_after(jiffies, timeout)) {
  1490. dev_err(ctrl->device,
  1491. "Device shutdown incomplete; abort shutdown\n");
  1492. return -ENODEV;
  1493. }
  1494. }
  1495. return ret;
  1496. }
  1497. EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl);
  1498. static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
  1499. struct request_queue *q)
  1500. {
  1501. bool vwc = false;
  1502. if (ctrl->max_hw_sectors) {
  1503. u32 max_segments =
  1504. (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1;
  1505. blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
  1506. blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
  1507. }
  1508. if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) &&
  1509. is_power_of_2(ctrl->max_hw_sectors))
  1510. blk_queue_chunk_sectors(q, ctrl->max_hw_sectors);
  1511. blk_queue_virt_boundary(q, ctrl->page_size - 1);
  1512. if (ctrl->vwc & NVME_CTRL_VWC_PRESENT)
  1513. vwc = true;
  1514. blk_queue_write_cache(q, vwc, vwc);
  1515. }
  1516. static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
  1517. {
  1518. __le64 ts;
  1519. int ret;
  1520. if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
  1521. return 0;
  1522. ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
  1523. ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
  1524. NULL);
  1525. if (ret)
  1526. dev_warn_once(ctrl->device,
  1527. "could not set timestamp (%d)\n", ret);
  1528. return ret;
  1529. }
  1530. static int nvme_configure_apst(struct nvme_ctrl *ctrl)
  1531. {
  1532. /*
  1533. * APST (Autonomous Power State Transition) lets us program a
  1534. * table of power state transitions that the controller will
  1535. * perform automatically. We configure it with a simple
  1536. * heuristic: we are willing to spend at most 2% of the time
  1537. * transitioning between power states. Therefore, when running
  1538. * in any given state, we will enter the next lower-power
  1539. * non-operational state after waiting 50 * (enlat + exlat)
  1540. * microseconds, as long as that state's exit latency is under
  1541. * the requested maximum latency.
  1542. *
  1543. * We will not autonomously enter any non-operational state for
  1544. * which the total latency exceeds ps_max_latency_us. Users
  1545. * can set ps_max_latency_us to zero to turn off APST.
  1546. */
  1547. unsigned apste;
  1548. struct nvme_feat_auto_pst *table;
  1549. u64 max_lat_us = 0;
  1550. int max_ps = -1;
  1551. int ret;
  1552. /*
  1553. * If APST isn't supported or if we haven't been initialized yet,
  1554. * then don't do anything.
  1555. */
  1556. if (!ctrl->apsta)
  1557. return 0;
  1558. if (ctrl->npss > 31) {
  1559. dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
  1560. return 0;
  1561. }
  1562. table = kzalloc(sizeof(*table), GFP_KERNEL);
  1563. if (!table)
  1564. return 0;
  1565. if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
  1566. /* Turn off APST. */
  1567. apste = 0;
  1568. dev_dbg(ctrl->device, "APST disabled\n");
  1569. } else {
  1570. __le64 target = cpu_to_le64(0);
  1571. int state;
  1572. /*
  1573. * Walk through all states from lowest- to highest-power.
  1574. * According to the spec, lower-numbered states use more
  1575. * power. NPSS, despite the name, is the index of the
  1576. * lowest-power state, not the number of states.
  1577. */
  1578. for (state = (int)ctrl->npss; state >= 0; state--) {
  1579. u64 total_latency_us, exit_latency_us, transition_ms;
  1580. if (target)
  1581. table->entries[state] = target;
  1582. /*
  1583. * Don't allow transitions to the deepest state
  1584. * if it's quirked off.
  1585. */
  1586. if (state == ctrl->npss &&
  1587. (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
  1588. continue;
  1589. /*
  1590. * Is this state a useful non-operational state for
  1591. * higher-power states to autonomously transition to?
  1592. */
  1593. if (!(ctrl->psd[state].flags &
  1594. NVME_PS_FLAGS_NON_OP_STATE))
  1595. continue;
  1596. exit_latency_us =
  1597. (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
  1598. if (exit_latency_us > ctrl->ps_max_latency_us)
  1599. continue;
  1600. total_latency_us =
  1601. exit_latency_us +
  1602. le32_to_cpu(ctrl->psd[state].entry_lat);
  1603. /*
  1604. * This state is good. Use it as the APST idle
  1605. * target for higher power states.
  1606. */
  1607. transition_ms = total_latency_us + 19;
  1608. do_div(transition_ms, 20);
  1609. if (transition_ms > (1 << 24) - 1)
  1610. transition_ms = (1 << 24) - 1;
  1611. target = cpu_to_le64((state << 3) |
  1612. (transition_ms << 8));
  1613. if (max_ps == -1)
  1614. max_ps = state;
  1615. if (total_latency_us > max_lat_us)
  1616. max_lat_us = total_latency_us;
  1617. }
  1618. apste = 1;
  1619. if (max_ps == -1) {
  1620. dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
  1621. } else {
  1622. dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
  1623. max_ps, max_lat_us, (int)sizeof(*table), table);
  1624. }
  1625. }
  1626. ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
  1627. table, sizeof(*table), NULL);
  1628. if (ret)
  1629. dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
  1630. kfree(table);
  1631. return ret;
  1632. }
  1633. static void nvme_set_latency_tolerance(struct device *dev, s32 val)
  1634. {
  1635. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1636. u64 latency;
  1637. switch (val) {
  1638. case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
  1639. case PM_QOS_LATENCY_ANY:
  1640. latency = U64_MAX;
  1641. break;
  1642. default:
  1643. latency = val;
  1644. }
  1645. if (ctrl->ps_max_latency_us != latency) {
  1646. ctrl->ps_max_latency_us = latency;
  1647. nvme_configure_apst(ctrl);
  1648. }
  1649. }
  1650. struct nvme_core_quirk_entry {
  1651. /*
  1652. * NVMe model and firmware strings are padded with spaces. For
  1653. * simplicity, strings in the quirk table are padded with NULLs
  1654. * instead.
  1655. */
  1656. u16 vid;
  1657. const char *mn;
  1658. const char *fr;
  1659. unsigned long quirks;
  1660. };
  1661. static const struct nvme_core_quirk_entry core_quirks[] = {
  1662. {
  1663. /*
  1664. * This Toshiba device seems to die using any APST states. See:
  1665. * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
  1666. */
  1667. .vid = 0x1179,
  1668. .mn = "THNSF5256GPUK TOSHIBA",
  1669. .quirks = NVME_QUIRK_NO_APST,
  1670. }
  1671. };
  1672. /* match is null-terminated but idstr is space-padded. */
  1673. static bool string_matches(const char *idstr, const char *match, size_t len)
  1674. {
  1675. size_t matchlen;
  1676. if (!match)
  1677. return true;
  1678. matchlen = strlen(match);
  1679. WARN_ON_ONCE(matchlen > len);
  1680. if (memcmp(idstr, match, matchlen))
  1681. return false;
  1682. for (; matchlen < len; matchlen++)
  1683. if (idstr[matchlen] != ' ')
  1684. return false;
  1685. return true;
  1686. }
  1687. static bool quirk_matches(const struct nvme_id_ctrl *id,
  1688. const struct nvme_core_quirk_entry *q)
  1689. {
  1690. return q->vid == le16_to_cpu(id->vid) &&
  1691. string_matches(id->mn, q->mn, sizeof(id->mn)) &&
  1692. string_matches(id->fr, q->fr, sizeof(id->fr));
  1693. }
  1694. static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl,
  1695. struct nvme_id_ctrl *id)
  1696. {
  1697. size_t nqnlen;
  1698. int off;
  1699. nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
  1700. if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
  1701. strncpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE);
  1702. return;
  1703. }
  1704. if (ctrl->vs >= NVME_VS(1, 2, 1))
  1705. dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
  1706. /* Generate a "fake" NQN per Figure 254 in NVMe 1.3 + ECN 001 */
  1707. off = snprintf(subsys->subnqn, NVMF_NQN_SIZE,
  1708. "nqn.2014.08.org.nvmexpress:%4x%4x",
  1709. le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
  1710. memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn));
  1711. off += sizeof(id->sn);
  1712. memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn));
  1713. off += sizeof(id->mn);
  1714. memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off);
  1715. }
  1716. static void __nvme_release_subsystem(struct nvme_subsystem *subsys)
  1717. {
  1718. ida_simple_remove(&nvme_subsystems_ida, subsys->instance);
  1719. kfree(subsys);
  1720. }
  1721. static void nvme_release_subsystem(struct device *dev)
  1722. {
  1723. __nvme_release_subsystem(container_of(dev, struct nvme_subsystem, dev));
  1724. }
  1725. static void nvme_destroy_subsystem(struct kref *ref)
  1726. {
  1727. struct nvme_subsystem *subsys =
  1728. container_of(ref, struct nvme_subsystem, ref);
  1729. mutex_lock(&nvme_subsystems_lock);
  1730. list_del(&subsys->entry);
  1731. mutex_unlock(&nvme_subsystems_lock);
  1732. ida_destroy(&subsys->ns_ida);
  1733. device_del(&subsys->dev);
  1734. put_device(&subsys->dev);
  1735. }
  1736. static void nvme_put_subsystem(struct nvme_subsystem *subsys)
  1737. {
  1738. kref_put(&subsys->ref, nvme_destroy_subsystem);
  1739. }
  1740. static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn)
  1741. {
  1742. struct nvme_subsystem *subsys;
  1743. lockdep_assert_held(&nvme_subsystems_lock);
  1744. list_for_each_entry(subsys, &nvme_subsystems, entry) {
  1745. if (strcmp(subsys->subnqn, subsysnqn))
  1746. continue;
  1747. if (!kref_get_unless_zero(&subsys->ref))
  1748. continue;
  1749. return subsys;
  1750. }
  1751. return NULL;
  1752. }
  1753. #define SUBSYS_ATTR_RO(_name, _mode, _show) \
  1754. struct device_attribute subsys_attr_##_name = \
  1755. __ATTR(_name, _mode, _show, NULL)
  1756. static ssize_t nvme_subsys_show_nqn(struct device *dev,
  1757. struct device_attribute *attr,
  1758. char *buf)
  1759. {
  1760. struct nvme_subsystem *subsys =
  1761. container_of(dev, struct nvme_subsystem, dev);
  1762. return snprintf(buf, PAGE_SIZE, "%s\n", subsys->subnqn);
  1763. }
  1764. static SUBSYS_ATTR_RO(subsysnqn, S_IRUGO, nvme_subsys_show_nqn);
  1765. #define nvme_subsys_show_str_function(field) \
  1766. static ssize_t subsys_##field##_show(struct device *dev, \
  1767. struct device_attribute *attr, char *buf) \
  1768. { \
  1769. struct nvme_subsystem *subsys = \
  1770. container_of(dev, struct nvme_subsystem, dev); \
  1771. return sprintf(buf, "%.*s\n", \
  1772. (int)sizeof(subsys->field), subsys->field); \
  1773. } \
  1774. static SUBSYS_ATTR_RO(field, S_IRUGO, subsys_##field##_show);
  1775. nvme_subsys_show_str_function(model);
  1776. nvme_subsys_show_str_function(serial);
  1777. nvme_subsys_show_str_function(firmware_rev);
  1778. static struct attribute *nvme_subsys_attrs[] = {
  1779. &subsys_attr_model.attr,
  1780. &subsys_attr_serial.attr,
  1781. &subsys_attr_firmware_rev.attr,
  1782. &subsys_attr_subsysnqn.attr,
  1783. NULL,
  1784. };
  1785. static struct attribute_group nvme_subsys_attrs_group = {
  1786. .attrs = nvme_subsys_attrs,
  1787. };
  1788. static const struct attribute_group *nvme_subsys_attrs_groups[] = {
  1789. &nvme_subsys_attrs_group,
  1790. NULL,
  1791. };
  1792. static int nvme_active_ctrls(struct nvme_subsystem *subsys)
  1793. {
  1794. int count = 0;
  1795. struct nvme_ctrl *ctrl;
  1796. mutex_lock(&subsys->lock);
  1797. list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) {
  1798. if (ctrl->state != NVME_CTRL_DELETING &&
  1799. ctrl->state != NVME_CTRL_DEAD)
  1800. count++;
  1801. }
  1802. mutex_unlock(&subsys->lock);
  1803. return count;
  1804. }
  1805. static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
  1806. {
  1807. struct nvme_subsystem *subsys, *found;
  1808. int ret;
  1809. subsys = kzalloc(sizeof(*subsys), GFP_KERNEL);
  1810. if (!subsys)
  1811. return -ENOMEM;
  1812. ret = ida_simple_get(&nvme_subsystems_ida, 0, 0, GFP_KERNEL);
  1813. if (ret < 0) {
  1814. kfree(subsys);
  1815. return ret;
  1816. }
  1817. subsys->instance = ret;
  1818. mutex_init(&subsys->lock);
  1819. kref_init(&subsys->ref);
  1820. INIT_LIST_HEAD(&subsys->ctrls);
  1821. INIT_LIST_HEAD(&subsys->nsheads);
  1822. nvme_init_subnqn(subsys, ctrl, id);
  1823. memcpy(subsys->serial, id->sn, sizeof(subsys->serial));
  1824. memcpy(subsys->model, id->mn, sizeof(subsys->model));
  1825. memcpy(subsys->firmware_rev, id->fr, sizeof(subsys->firmware_rev));
  1826. subsys->vendor_id = le16_to_cpu(id->vid);
  1827. subsys->cmic = id->cmic;
  1828. subsys->dev.class = nvme_subsys_class;
  1829. subsys->dev.release = nvme_release_subsystem;
  1830. subsys->dev.groups = nvme_subsys_attrs_groups;
  1831. dev_set_name(&subsys->dev, "nvme-subsys%d", subsys->instance);
  1832. device_initialize(&subsys->dev);
  1833. mutex_lock(&nvme_subsystems_lock);
  1834. found = __nvme_find_get_subsystem(subsys->subnqn);
  1835. if (found) {
  1836. /*
  1837. * Verify that the subsystem actually supports multiple
  1838. * controllers, else bail out.
  1839. */
  1840. if (nvme_active_ctrls(found) && !(id->cmic & (1 << 1))) {
  1841. dev_err(ctrl->device,
  1842. "ignoring ctrl due to duplicate subnqn (%s).\n",
  1843. found->subnqn);
  1844. nvme_put_subsystem(found);
  1845. ret = -EINVAL;
  1846. goto out_unlock;
  1847. }
  1848. __nvme_release_subsystem(subsys);
  1849. subsys = found;
  1850. } else {
  1851. ret = device_add(&subsys->dev);
  1852. if (ret) {
  1853. dev_err(ctrl->device,
  1854. "failed to register subsystem device.\n");
  1855. goto out_unlock;
  1856. }
  1857. ida_init(&subsys->ns_ida);
  1858. list_add_tail(&subsys->entry, &nvme_subsystems);
  1859. }
  1860. ctrl->subsys = subsys;
  1861. mutex_unlock(&nvme_subsystems_lock);
  1862. if (sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj,
  1863. dev_name(ctrl->device))) {
  1864. dev_err(ctrl->device,
  1865. "failed to create sysfs link from subsystem.\n");
  1866. /* the transport driver will eventually put the subsystem */
  1867. return -EINVAL;
  1868. }
  1869. mutex_lock(&subsys->lock);
  1870. list_add_tail(&ctrl->subsys_entry, &subsys->ctrls);
  1871. mutex_unlock(&subsys->lock);
  1872. return 0;
  1873. out_unlock:
  1874. mutex_unlock(&nvme_subsystems_lock);
  1875. put_device(&subsys->dev);
  1876. return ret;
  1877. }
  1878. static int nvme_get_log(struct nvme_ctrl *ctrl, u8 log_page, void *log,
  1879. size_t size)
  1880. {
  1881. struct nvme_command c = { };
  1882. c.common.opcode = nvme_admin_get_log_page;
  1883. c.common.nsid = cpu_to_le32(NVME_NSID_ALL);
  1884. c.common.cdw10[0] = nvme_get_log_dw10(log_page, size);
  1885. return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size);
  1886. }
  1887. static int nvme_get_effects_log(struct nvme_ctrl *ctrl)
  1888. {
  1889. int ret;
  1890. if (!ctrl->effects)
  1891. ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL);
  1892. if (!ctrl->effects)
  1893. return 0;
  1894. ret = nvme_get_log(ctrl, NVME_LOG_CMD_EFFECTS, ctrl->effects,
  1895. sizeof(*ctrl->effects));
  1896. if (ret) {
  1897. kfree(ctrl->effects);
  1898. ctrl->effects = NULL;
  1899. }
  1900. return ret;
  1901. }
  1902. /*
  1903. * Initialize the cached copies of the Identify data and various controller
  1904. * register in our nvme_ctrl structure. This should be called as soon as
  1905. * the admin queue is fully up and running.
  1906. */
  1907. int nvme_init_identify(struct nvme_ctrl *ctrl)
  1908. {
  1909. struct nvme_id_ctrl *id;
  1910. u64 cap;
  1911. int ret, page_shift;
  1912. u32 max_hw_sectors;
  1913. bool prev_apst_enabled;
  1914. ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
  1915. if (ret) {
  1916. dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
  1917. return ret;
  1918. }
  1919. ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &cap);
  1920. if (ret) {
  1921. dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
  1922. return ret;
  1923. }
  1924. page_shift = NVME_CAP_MPSMIN(cap) + 12;
  1925. if (ctrl->vs >= NVME_VS(1, 1, 0))
  1926. ctrl->subsystem = NVME_CAP_NSSRC(cap);
  1927. ret = nvme_identify_ctrl(ctrl, &id);
  1928. if (ret) {
  1929. dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
  1930. return -EIO;
  1931. }
  1932. if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) {
  1933. ret = nvme_get_effects_log(ctrl);
  1934. if (ret < 0)
  1935. return ret;
  1936. }
  1937. if (!ctrl->identified) {
  1938. int i;
  1939. ret = nvme_init_subsystem(ctrl, id);
  1940. if (ret)
  1941. goto out_free;
  1942. /*
  1943. * Check for quirks. Quirk can depend on firmware version,
  1944. * so, in principle, the set of quirks present can change
  1945. * across a reset. As a possible future enhancement, we
  1946. * could re-scan for quirks every time we reinitialize
  1947. * the device, but we'd have to make sure that the driver
  1948. * behaves intelligently if the quirks change.
  1949. */
  1950. for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
  1951. if (quirk_matches(id, &core_quirks[i]))
  1952. ctrl->quirks |= core_quirks[i].quirks;
  1953. }
  1954. }
  1955. if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
  1956. dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
  1957. ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
  1958. }
  1959. ctrl->oacs = le16_to_cpu(id->oacs);
  1960. ctrl->oncs = le16_to_cpup(&id->oncs);
  1961. atomic_set(&ctrl->abort_limit, id->acl + 1);
  1962. ctrl->vwc = id->vwc;
  1963. ctrl->cntlid = le16_to_cpup(&id->cntlid);
  1964. if (id->mdts)
  1965. max_hw_sectors = 1 << (id->mdts + page_shift - 9);
  1966. else
  1967. max_hw_sectors = UINT_MAX;
  1968. ctrl->max_hw_sectors =
  1969. min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
  1970. nvme_set_queue_limits(ctrl, ctrl->admin_q);
  1971. ctrl->sgls = le32_to_cpu(id->sgls);
  1972. ctrl->kas = le16_to_cpu(id->kas);
  1973. if (id->rtd3e) {
  1974. /* us -> s */
  1975. u32 transition_time = le32_to_cpu(id->rtd3e) / 1000000;
  1976. ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
  1977. shutdown_timeout, 60);
  1978. if (ctrl->shutdown_timeout != shutdown_timeout)
  1979. dev_info(ctrl->device,
  1980. "Shutdown timeout set to %u seconds\n",
  1981. ctrl->shutdown_timeout);
  1982. } else
  1983. ctrl->shutdown_timeout = shutdown_timeout;
  1984. ctrl->npss = id->npss;
  1985. ctrl->apsta = id->apsta;
  1986. prev_apst_enabled = ctrl->apst_enabled;
  1987. if (ctrl->quirks & NVME_QUIRK_NO_APST) {
  1988. if (force_apst && id->apsta) {
  1989. dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
  1990. ctrl->apst_enabled = true;
  1991. } else {
  1992. ctrl->apst_enabled = false;
  1993. }
  1994. } else {
  1995. ctrl->apst_enabled = id->apsta;
  1996. }
  1997. memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
  1998. if (ctrl->ops->flags & NVME_F_FABRICS) {
  1999. ctrl->icdoff = le16_to_cpu(id->icdoff);
  2000. ctrl->ioccsz = le32_to_cpu(id->ioccsz);
  2001. ctrl->iorcsz = le32_to_cpu(id->iorcsz);
  2002. ctrl->maxcmd = le16_to_cpu(id->maxcmd);
  2003. /*
  2004. * In fabrics we need to verify the cntlid matches the
  2005. * admin connect
  2006. */
  2007. if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
  2008. ret = -EINVAL;
  2009. goto out_free;
  2010. }
  2011. if (!ctrl->opts->discovery_nqn && !ctrl->kas) {
  2012. dev_err(ctrl->device,
  2013. "keep-alive support is mandatory for fabrics\n");
  2014. ret = -EINVAL;
  2015. goto out_free;
  2016. }
  2017. } else {
  2018. ctrl->cntlid = le16_to_cpu(id->cntlid);
  2019. ctrl->hmpre = le32_to_cpu(id->hmpre);
  2020. ctrl->hmmin = le32_to_cpu(id->hmmin);
  2021. ctrl->hmminds = le32_to_cpu(id->hmminds);
  2022. ctrl->hmmaxd = le16_to_cpu(id->hmmaxd);
  2023. }
  2024. kfree(id);
  2025. if (ctrl->apst_enabled && !prev_apst_enabled)
  2026. dev_pm_qos_expose_latency_tolerance(ctrl->device);
  2027. else if (!ctrl->apst_enabled && prev_apst_enabled)
  2028. dev_pm_qos_hide_latency_tolerance(ctrl->device);
  2029. ret = nvme_configure_apst(ctrl);
  2030. if (ret < 0)
  2031. return ret;
  2032. ret = nvme_configure_timestamp(ctrl);
  2033. if (ret < 0)
  2034. return ret;
  2035. ret = nvme_configure_directives(ctrl);
  2036. if (ret < 0)
  2037. return ret;
  2038. ctrl->identified = true;
  2039. return 0;
  2040. out_free:
  2041. kfree(id);
  2042. return ret;
  2043. }
  2044. EXPORT_SYMBOL_GPL(nvme_init_identify);
  2045. static int nvme_dev_open(struct inode *inode, struct file *file)
  2046. {
  2047. struct nvme_ctrl *ctrl =
  2048. container_of(inode->i_cdev, struct nvme_ctrl, cdev);
  2049. switch (ctrl->state) {
  2050. case NVME_CTRL_LIVE:
  2051. case NVME_CTRL_ADMIN_ONLY:
  2052. break;
  2053. default:
  2054. return -EWOULDBLOCK;
  2055. }
  2056. file->private_data = ctrl;
  2057. return 0;
  2058. }
  2059. static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp)
  2060. {
  2061. struct nvme_ns *ns;
  2062. int ret;
  2063. mutex_lock(&ctrl->namespaces_mutex);
  2064. if (list_empty(&ctrl->namespaces)) {
  2065. ret = -ENOTTY;
  2066. goto out_unlock;
  2067. }
  2068. ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list);
  2069. if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) {
  2070. dev_warn(ctrl->device,
  2071. "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n");
  2072. ret = -EINVAL;
  2073. goto out_unlock;
  2074. }
  2075. dev_warn(ctrl->device,
  2076. "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n");
  2077. kref_get(&ns->kref);
  2078. mutex_unlock(&ctrl->namespaces_mutex);
  2079. ret = nvme_user_cmd(ctrl, ns, argp);
  2080. nvme_put_ns(ns);
  2081. return ret;
  2082. out_unlock:
  2083. mutex_unlock(&ctrl->namespaces_mutex);
  2084. return ret;
  2085. }
  2086. static long nvme_dev_ioctl(struct file *file, unsigned int cmd,
  2087. unsigned long arg)
  2088. {
  2089. struct nvme_ctrl *ctrl = file->private_data;
  2090. void __user *argp = (void __user *)arg;
  2091. switch (cmd) {
  2092. case NVME_IOCTL_ADMIN_CMD:
  2093. return nvme_user_cmd(ctrl, NULL, argp);
  2094. case NVME_IOCTL_IO_CMD:
  2095. return nvme_dev_user_cmd(ctrl, argp);
  2096. case NVME_IOCTL_RESET:
  2097. dev_warn(ctrl->device, "resetting controller\n");
  2098. return nvme_reset_ctrl_sync(ctrl);
  2099. case NVME_IOCTL_SUBSYS_RESET:
  2100. return nvme_reset_subsystem(ctrl);
  2101. case NVME_IOCTL_RESCAN:
  2102. nvme_queue_scan(ctrl);
  2103. return 0;
  2104. default:
  2105. return -ENOTTY;
  2106. }
  2107. }
  2108. static const struct file_operations nvme_dev_fops = {
  2109. .owner = THIS_MODULE,
  2110. .open = nvme_dev_open,
  2111. .unlocked_ioctl = nvme_dev_ioctl,
  2112. .compat_ioctl = nvme_dev_ioctl,
  2113. };
  2114. static ssize_t nvme_sysfs_reset(struct device *dev,
  2115. struct device_attribute *attr, const char *buf,
  2116. size_t count)
  2117. {
  2118. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  2119. int ret;
  2120. ret = nvme_reset_ctrl_sync(ctrl);
  2121. if (ret < 0)
  2122. return ret;
  2123. return count;
  2124. }
  2125. static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
  2126. static ssize_t nvme_sysfs_rescan(struct device *dev,
  2127. struct device_attribute *attr, const char *buf,
  2128. size_t count)
  2129. {
  2130. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  2131. nvme_queue_scan(ctrl);
  2132. return count;
  2133. }
  2134. static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);
  2135. static inline struct nvme_ns_head *dev_to_ns_head(struct device *dev)
  2136. {
  2137. struct gendisk *disk = dev_to_disk(dev);
  2138. if (disk->fops == &nvme_fops)
  2139. return nvme_get_ns_from_dev(dev)->head;
  2140. else
  2141. return disk->private_data;
  2142. }
  2143. static ssize_t wwid_show(struct device *dev, struct device_attribute *attr,
  2144. char *buf)
  2145. {
  2146. struct nvme_ns_head *head = dev_to_ns_head(dev);
  2147. struct nvme_ns_ids *ids = &head->ids;
  2148. struct nvme_subsystem *subsys = head->subsys;
  2149. int serial_len = sizeof(subsys->serial);
  2150. int model_len = sizeof(subsys->model);
  2151. if (!uuid_is_null(&ids->uuid))
  2152. return sprintf(buf, "uuid.%pU\n", &ids->uuid);
  2153. if (memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
  2154. return sprintf(buf, "eui.%16phN\n", ids->nguid);
  2155. if (memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
  2156. return sprintf(buf, "eui.%8phN\n", ids->eui64);
  2157. while (serial_len > 0 && (subsys->serial[serial_len - 1] == ' ' ||
  2158. subsys->serial[serial_len - 1] == '\0'))
  2159. serial_len--;
  2160. while (model_len > 0 && (subsys->model[model_len - 1] == ' ' ||
  2161. subsys->model[model_len - 1] == '\0'))
  2162. model_len--;
  2163. return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", subsys->vendor_id,
  2164. serial_len, subsys->serial, model_len, subsys->model,
  2165. head->ns_id);
  2166. }
  2167. static DEVICE_ATTR(wwid, S_IRUGO, wwid_show, NULL);
  2168. static ssize_t nguid_show(struct device *dev, struct device_attribute *attr,
  2169. char *buf)
  2170. {
  2171. return sprintf(buf, "%pU\n", dev_to_ns_head(dev)->ids.nguid);
  2172. }
  2173. static DEVICE_ATTR(nguid, S_IRUGO, nguid_show, NULL);
  2174. static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
  2175. char *buf)
  2176. {
  2177. struct nvme_ns_ids *ids = &dev_to_ns_head(dev)->ids;
  2178. /* For backward compatibility expose the NGUID to userspace if
  2179. * we have no UUID set
  2180. */
  2181. if (uuid_is_null(&ids->uuid)) {
  2182. printk_ratelimited(KERN_WARNING
  2183. "No UUID available providing old NGUID\n");
  2184. return sprintf(buf, "%pU\n", ids->nguid);
  2185. }
  2186. return sprintf(buf, "%pU\n", &ids->uuid);
  2187. }
  2188. static DEVICE_ATTR(uuid, S_IRUGO, uuid_show, NULL);
  2189. static ssize_t eui_show(struct device *dev, struct device_attribute *attr,
  2190. char *buf)
  2191. {
  2192. return sprintf(buf, "%8ph\n", dev_to_ns_head(dev)->ids.eui64);
  2193. }
  2194. static DEVICE_ATTR(eui, S_IRUGO, eui_show, NULL);
  2195. static ssize_t nsid_show(struct device *dev, struct device_attribute *attr,
  2196. char *buf)
  2197. {
  2198. return sprintf(buf, "%d\n", dev_to_ns_head(dev)->ns_id);
  2199. }
  2200. static DEVICE_ATTR(nsid, S_IRUGO, nsid_show, NULL);
  2201. static struct attribute *nvme_ns_id_attrs[] = {
  2202. &dev_attr_wwid.attr,
  2203. &dev_attr_uuid.attr,
  2204. &dev_attr_nguid.attr,
  2205. &dev_attr_eui.attr,
  2206. &dev_attr_nsid.attr,
  2207. NULL,
  2208. };
  2209. static umode_t nvme_ns_id_attrs_are_visible(struct kobject *kobj,
  2210. struct attribute *a, int n)
  2211. {
  2212. struct device *dev = container_of(kobj, struct device, kobj);
  2213. struct nvme_ns_ids *ids = &dev_to_ns_head(dev)->ids;
  2214. if (a == &dev_attr_uuid.attr) {
  2215. if (uuid_is_null(&ids->uuid) &&
  2216. !memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
  2217. return 0;
  2218. }
  2219. if (a == &dev_attr_nguid.attr) {
  2220. if (!memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
  2221. return 0;
  2222. }
  2223. if (a == &dev_attr_eui.attr) {
  2224. if (!memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
  2225. return 0;
  2226. }
  2227. return a->mode;
  2228. }
  2229. const struct attribute_group nvme_ns_id_attr_group = {
  2230. .attrs = nvme_ns_id_attrs,
  2231. .is_visible = nvme_ns_id_attrs_are_visible,
  2232. };
  2233. #define nvme_show_str_function(field) \
  2234. static ssize_t field##_show(struct device *dev, \
  2235. struct device_attribute *attr, char *buf) \
  2236. { \
  2237. struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
  2238. return sprintf(buf, "%.*s\n", \
  2239. (int)sizeof(ctrl->subsys->field), ctrl->subsys->field); \
  2240. } \
  2241. static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
  2242. nvme_show_str_function(model);
  2243. nvme_show_str_function(serial);
  2244. nvme_show_str_function(firmware_rev);
  2245. #define nvme_show_int_function(field) \
  2246. static ssize_t field##_show(struct device *dev, \
  2247. struct device_attribute *attr, char *buf) \
  2248. { \
  2249. struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
  2250. return sprintf(buf, "%d\n", ctrl->field); \
  2251. } \
  2252. static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
  2253. nvme_show_int_function(cntlid);
  2254. static ssize_t nvme_sysfs_delete(struct device *dev,
  2255. struct device_attribute *attr, const char *buf,
  2256. size_t count)
  2257. {
  2258. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  2259. if (device_remove_file_self(dev, attr))
  2260. nvme_delete_ctrl_sync(ctrl);
  2261. return count;
  2262. }
  2263. static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete);
  2264. static ssize_t nvme_sysfs_show_transport(struct device *dev,
  2265. struct device_attribute *attr,
  2266. char *buf)
  2267. {
  2268. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  2269. return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->ops->name);
  2270. }
  2271. static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL);
  2272. static ssize_t nvme_sysfs_show_state(struct device *dev,
  2273. struct device_attribute *attr,
  2274. char *buf)
  2275. {
  2276. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  2277. static const char *const state_name[] = {
  2278. [NVME_CTRL_NEW] = "new",
  2279. [NVME_CTRL_LIVE] = "live",
  2280. [NVME_CTRL_ADMIN_ONLY] = "only-admin",
  2281. [NVME_CTRL_RESETTING] = "resetting",
  2282. [NVME_CTRL_RECONNECTING]= "reconnecting",
  2283. [NVME_CTRL_DELETING] = "deleting",
  2284. [NVME_CTRL_DEAD] = "dead",
  2285. };
  2286. if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) &&
  2287. state_name[ctrl->state])
  2288. return sprintf(buf, "%s\n", state_name[ctrl->state]);
  2289. return sprintf(buf, "unknown state\n");
  2290. }
  2291. static DEVICE_ATTR(state, S_IRUGO, nvme_sysfs_show_state, NULL);
  2292. static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev,
  2293. struct device_attribute *attr,
  2294. char *buf)
  2295. {
  2296. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  2297. return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->subsys->subnqn);
  2298. }
  2299. static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL);
  2300. static ssize_t nvme_sysfs_show_address(struct device *dev,
  2301. struct device_attribute *attr,
  2302. char *buf)
  2303. {
  2304. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  2305. return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE);
  2306. }
  2307. static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL);
  2308. static struct attribute *nvme_dev_attrs[] = {
  2309. &dev_attr_reset_controller.attr,
  2310. &dev_attr_rescan_controller.attr,
  2311. &dev_attr_model.attr,
  2312. &dev_attr_serial.attr,
  2313. &dev_attr_firmware_rev.attr,
  2314. &dev_attr_cntlid.attr,
  2315. &dev_attr_delete_controller.attr,
  2316. &dev_attr_transport.attr,
  2317. &dev_attr_subsysnqn.attr,
  2318. &dev_attr_address.attr,
  2319. &dev_attr_state.attr,
  2320. NULL
  2321. };
  2322. static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj,
  2323. struct attribute *a, int n)
  2324. {
  2325. struct device *dev = container_of(kobj, struct device, kobj);
  2326. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  2327. if (a == &dev_attr_delete_controller.attr && !ctrl->ops->delete_ctrl)
  2328. return 0;
  2329. if (a == &dev_attr_address.attr && !ctrl->ops->get_address)
  2330. return 0;
  2331. return a->mode;
  2332. }
  2333. static struct attribute_group nvme_dev_attrs_group = {
  2334. .attrs = nvme_dev_attrs,
  2335. .is_visible = nvme_dev_attrs_are_visible,
  2336. };
  2337. static const struct attribute_group *nvme_dev_attr_groups[] = {
  2338. &nvme_dev_attrs_group,
  2339. NULL,
  2340. };
  2341. static struct nvme_ns_head *__nvme_find_ns_head(struct nvme_subsystem *subsys,
  2342. unsigned nsid)
  2343. {
  2344. struct nvme_ns_head *h;
  2345. lockdep_assert_held(&subsys->lock);
  2346. list_for_each_entry(h, &subsys->nsheads, entry) {
  2347. if (h->ns_id == nsid && kref_get_unless_zero(&h->ref))
  2348. return h;
  2349. }
  2350. return NULL;
  2351. }
  2352. static int __nvme_check_ids(struct nvme_subsystem *subsys,
  2353. struct nvme_ns_head *new)
  2354. {
  2355. struct nvme_ns_head *h;
  2356. lockdep_assert_held(&subsys->lock);
  2357. list_for_each_entry(h, &subsys->nsheads, entry) {
  2358. if (nvme_ns_ids_valid(&new->ids) &&
  2359. nvme_ns_ids_equal(&new->ids, &h->ids))
  2360. return -EINVAL;
  2361. }
  2362. return 0;
  2363. }
  2364. static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl,
  2365. unsigned nsid, struct nvme_id_ns *id)
  2366. {
  2367. struct nvme_ns_head *head;
  2368. int ret = -ENOMEM;
  2369. head = kzalloc(sizeof(*head), GFP_KERNEL);
  2370. if (!head)
  2371. goto out;
  2372. ret = ida_simple_get(&ctrl->subsys->ns_ida, 1, 0, GFP_KERNEL);
  2373. if (ret < 0)
  2374. goto out_free_head;
  2375. head->instance = ret;
  2376. INIT_LIST_HEAD(&head->list);
  2377. init_srcu_struct(&head->srcu);
  2378. head->subsys = ctrl->subsys;
  2379. head->ns_id = nsid;
  2380. kref_init(&head->ref);
  2381. nvme_report_ns_ids(ctrl, nsid, id, &head->ids);
  2382. ret = __nvme_check_ids(ctrl->subsys, head);
  2383. if (ret) {
  2384. dev_err(ctrl->device,
  2385. "duplicate IDs for nsid %d\n", nsid);
  2386. goto out_cleanup_srcu;
  2387. }
  2388. ret = nvme_mpath_alloc_disk(ctrl, head);
  2389. if (ret)
  2390. goto out_cleanup_srcu;
  2391. list_add_tail(&head->entry, &ctrl->subsys->nsheads);
  2392. return head;
  2393. out_cleanup_srcu:
  2394. cleanup_srcu_struct(&head->srcu);
  2395. ida_simple_remove(&ctrl->subsys->ns_ida, head->instance);
  2396. out_free_head:
  2397. kfree(head);
  2398. out:
  2399. return ERR_PTR(ret);
  2400. }
  2401. static int nvme_init_ns_head(struct nvme_ns *ns, unsigned nsid,
  2402. struct nvme_id_ns *id, bool *new)
  2403. {
  2404. struct nvme_ctrl *ctrl = ns->ctrl;
  2405. bool is_shared = id->nmic & (1 << 0);
  2406. struct nvme_ns_head *head = NULL;
  2407. int ret = 0;
  2408. mutex_lock(&ctrl->subsys->lock);
  2409. if (is_shared)
  2410. head = __nvme_find_ns_head(ctrl->subsys, nsid);
  2411. if (!head) {
  2412. head = nvme_alloc_ns_head(ctrl, nsid, id);
  2413. if (IS_ERR(head)) {
  2414. ret = PTR_ERR(head);
  2415. goto out_unlock;
  2416. }
  2417. *new = true;
  2418. } else {
  2419. struct nvme_ns_ids ids;
  2420. nvme_report_ns_ids(ctrl, nsid, id, &ids);
  2421. if (!nvme_ns_ids_equal(&head->ids, &ids)) {
  2422. dev_err(ctrl->device,
  2423. "IDs don't match for shared namespace %d\n",
  2424. nsid);
  2425. ret = -EINVAL;
  2426. goto out_unlock;
  2427. }
  2428. *new = false;
  2429. }
  2430. list_add_tail(&ns->siblings, &head->list);
  2431. ns->head = head;
  2432. out_unlock:
  2433. mutex_unlock(&ctrl->subsys->lock);
  2434. return ret;
  2435. }
  2436. static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
  2437. {
  2438. struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
  2439. struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
  2440. return nsa->head->ns_id - nsb->head->ns_id;
  2441. }
  2442. static struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  2443. {
  2444. struct nvme_ns *ns, *ret = NULL;
  2445. mutex_lock(&ctrl->namespaces_mutex);
  2446. list_for_each_entry(ns, &ctrl->namespaces, list) {
  2447. if (ns->head->ns_id == nsid) {
  2448. if (!kref_get_unless_zero(&ns->kref))
  2449. continue;
  2450. ret = ns;
  2451. break;
  2452. }
  2453. if (ns->head->ns_id > nsid)
  2454. break;
  2455. }
  2456. mutex_unlock(&ctrl->namespaces_mutex);
  2457. return ret;
  2458. }
  2459. static int nvme_setup_streams_ns(struct nvme_ctrl *ctrl, struct nvme_ns *ns)
  2460. {
  2461. struct streams_directive_params s;
  2462. int ret;
  2463. if (!ctrl->nr_streams)
  2464. return 0;
  2465. ret = nvme_get_stream_params(ctrl, &s, ns->head->ns_id);
  2466. if (ret)
  2467. return ret;
  2468. ns->sws = le32_to_cpu(s.sws);
  2469. ns->sgs = le16_to_cpu(s.sgs);
  2470. if (ns->sws) {
  2471. unsigned int bs = 1 << ns->lba_shift;
  2472. blk_queue_io_min(ns->queue, bs * ns->sws);
  2473. if (ns->sgs)
  2474. blk_queue_io_opt(ns->queue, bs * ns->sws * ns->sgs);
  2475. }
  2476. return 0;
  2477. }
  2478. static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  2479. {
  2480. struct nvme_ns *ns;
  2481. struct gendisk *disk;
  2482. struct nvme_id_ns *id;
  2483. char disk_name[DISK_NAME_LEN];
  2484. int node = dev_to_node(ctrl->dev), flags = GENHD_FL_EXT_DEVT;
  2485. bool new = true;
  2486. ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
  2487. if (!ns)
  2488. return;
  2489. ns->queue = blk_mq_init_queue(ctrl->tagset);
  2490. if (IS_ERR(ns->queue))
  2491. goto out_free_ns;
  2492. queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
  2493. ns->queue->queuedata = ns;
  2494. ns->ctrl = ctrl;
  2495. kref_init(&ns->kref);
  2496. ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
  2497. blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
  2498. nvme_set_queue_limits(ctrl, ns->queue);
  2499. id = nvme_identify_ns(ctrl, nsid);
  2500. if (!id)
  2501. goto out_free_queue;
  2502. if (id->ncap == 0)
  2503. goto out_free_id;
  2504. if (nvme_init_ns_head(ns, nsid, id, &new))
  2505. goto out_free_id;
  2506. nvme_setup_streams_ns(ctrl, ns);
  2507. #ifdef CONFIG_NVME_MULTIPATH
  2508. /*
  2509. * If multipathing is enabled we need to always use the subsystem
  2510. * instance number for numbering our devices to avoid conflicts
  2511. * between subsystems that have multiple controllers and thus use
  2512. * the multipath-aware subsystem node and those that have a single
  2513. * controller and use the controller node directly.
  2514. */
  2515. if (ns->head->disk) {
  2516. sprintf(disk_name, "nvme%dc%dn%d", ctrl->subsys->instance,
  2517. ctrl->cntlid, ns->head->instance);
  2518. flags = GENHD_FL_HIDDEN;
  2519. } else {
  2520. sprintf(disk_name, "nvme%dn%d", ctrl->subsys->instance,
  2521. ns->head->instance);
  2522. }
  2523. #else
  2524. /*
  2525. * But without the multipath code enabled, multiple controller per
  2526. * subsystems are visible as devices and thus we cannot use the
  2527. * subsystem instance.
  2528. */
  2529. sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance);
  2530. #endif
  2531. if ((ctrl->quirks & NVME_QUIRK_LIGHTNVM) && id->vs[0] == 0x1) {
  2532. if (nvme_nvm_register(ns, disk_name, node)) {
  2533. dev_warn(ctrl->device, "LightNVM init failure\n");
  2534. goto out_unlink_ns;
  2535. }
  2536. }
  2537. disk = alloc_disk_node(0, node);
  2538. if (!disk)
  2539. goto out_unlink_ns;
  2540. disk->fops = &nvme_fops;
  2541. disk->private_data = ns;
  2542. disk->queue = ns->queue;
  2543. disk->flags = flags;
  2544. memcpy(disk->disk_name, disk_name, DISK_NAME_LEN);
  2545. ns->disk = disk;
  2546. __nvme_revalidate_disk(disk, id);
  2547. mutex_lock(&ctrl->namespaces_mutex);
  2548. list_add_tail(&ns->list, &ctrl->namespaces);
  2549. mutex_unlock(&ctrl->namespaces_mutex);
  2550. nvme_get_ctrl(ctrl);
  2551. kfree(id);
  2552. device_add_disk(ctrl->device, ns->disk);
  2553. if (sysfs_create_group(&disk_to_dev(ns->disk)->kobj,
  2554. &nvme_ns_id_attr_group))
  2555. pr_warn("%s: failed to create sysfs group for identification\n",
  2556. ns->disk->disk_name);
  2557. if (ns->ndev && nvme_nvm_register_sysfs(ns))
  2558. pr_warn("%s: failed to register lightnvm sysfs group for identification\n",
  2559. ns->disk->disk_name);
  2560. if (new)
  2561. nvme_mpath_add_disk(ns->head);
  2562. nvme_mpath_add_disk_links(ns);
  2563. return;
  2564. out_unlink_ns:
  2565. mutex_lock(&ctrl->subsys->lock);
  2566. list_del_rcu(&ns->siblings);
  2567. mutex_unlock(&ctrl->subsys->lock);
  2568. out_free_id:
  2569. kfree(id);
  2570. out_free_queue:
  2571. blk_cleanup_queue(ns->queue);
  2572. out_free_ns:
  2573. kfree(ns);
  2574. }
  2575. static void nvme_ns_remove(struct nvme_ns *ns)
  2576. {
  2577. if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
  2578. return;
  2579. if (ns->disk && ns->disk->flags & GENHD_FL_UP) {
  2580. nvme_mpath_remove_disk_links(ns);
  2581. sysfs_remove_group(&disk_to_dev(ns->disk)->kobj,
  2582. &nvme_ns_id_attr_group);
  2583. if (ns->ndev)
  2584. nvme_nvm_unregister_sysfs(ns);
  2585. del_gendisk(ns->disk);
  2586. blk_cleanup_queue(ns->queue);
  2587. if (blk_get_integrity(ns->disk))
  2588. blk_integrity_unregister(ns->disk);
  2589. }
  2590. mutex_lock(&ns->ctrl->subsys->lock);
  2591. nvme_mpath_clear_current_path(ns);
  2592. list_del_rcu(&ns->siblings);
  2593. mutex_unlock(&ns->ctrl->subsys->lock);
  2594. mutex_lock(&ns->ctrl->namespaces_mutex);
  2595. list_del_init(&ns->list);
  2596. mutex_unlock(&ns->ctrl->namespaces_mutex);
  2597. synchronize_srcu(&ns->head->srcu);
  2598. nvme_mpath_check_last_path(ns);
  2599. nvme_put_ns(ns);
  2600. }
  2601. static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  2602. {
  2603. struct nvme_ns *ns;
  2604. ns = nvme_find_get_ns(ctrl, nsid);
  2605. if (ns) {
  2606. if (ns->disk && revalidate_disk(ns->disk))
  2607. nvme_ns_remove(ns);
  2608. nvme_put_ns(ns);
  2609. } else
  2610. nvme_alloc_ns(ctrl, nsid);
  2611. }
  2612. static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
  2613. unsigned nsid)
  2614. {
  2615. struct nvme_ns *ns, *next;
  2616. list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
  2617. if (ns->head->ns_id > nsid)
  2618. nvme_ns_remove(ns);
  2619. }
  2620. }
  2621. static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn)
  2622. {
  2623. struct nvme_ns *ns;
  2624. __le32 *ns_list;
  2625. unsigned i, j, nsid, prev = 0, num_lists = DIV_ROUND_UP(nn, 1024);
  2626. int ret = 0;
  2627. ns_list = kzalloc(0x1000, GFP_KERNEL);
  2628. if (!ns_list)
  2629. return -ENOMEM;
  2630. for (i = 0; i < num_lists; i++) {
  2631. ret = nvme_identify_ns_list(ctrl, prev, ns_list);
  2632. if (ret)
  2633. goto free;
  2634. for (j = 0; j < min(nn, 1024U); j++) {
  2635. nsid = le32_to_cpu(ns_list[j]);
  2636. if (!nsid)
  2637. goto out;
  2638. nvme_validate_ns(ctrl, nsid);
  2639. while (++prev < nsid) {
  2640. ns = nvme_find_get_ns(ctrl, prev);
  2641. if (ns) {
  2642. nvme_ns_remove(ns);
  2643. nvme_put_ns(ns);
  2644. }
  2645. }
  2646. }
  2647. nn -= j;
  2648. }
  2649. out:
  2650. nvme_remove_invalid_namespaces(ctrl, prev);
  2651. free:
  2652. kfree(ns_list);
  2653. return ret;
  2654. }
  2655. static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn)
  2656. {
  2657. unsigned i;
  2658. for (i = 1; i <= nn; i++)
  2659. nvme_validate_ns(ctrl, i);
  2660. nvme_remove_invalid_namespaces(ctrl, nn);
  2661. }
  2662. static void nvme_scan_work(struct work_struct *work)
  2663. {
  2664. struct nvme_ctrl *ctrl =
  2665. container_of(work, struct nvme_ctrl, scan_work);
  2666. struct nvme_id_ctrl *id;
  2667. unsigned nn;
  2668. if (ctrl->state != NVME_CTRL_LIVE)
  2669. return;
  2670. WARN_ON_ONCE(!ctrl->tagset);
  2671. if (nvme_identify_ctrl(ctrl, &id))
  2672. return;
  2673. nn = le32_to_cpu(id->nn);
  2674. if (ctrl->vs >= NVME_VS(1, 1, 0) &&
  2675. !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) {
  2676. if (!nvme_scan_ns_list(ctrl, nn))
  2677. goto done;
  2678. }
  2679. nvme_scan_ns_sequential(ctrl, nn);
  2680. done:
  2681. mutex_lock(&ctrl->namespaces_mutex);
  2682. list_sort(NULL, &ctrl->namespaces, ns_cmp);
  2683. mutex_unlock(&ctrl->namespaces_mutex);
  2684. kfree(id);
  2685. }
  2686. void nvme_queue_scan(struct nvme_ctrl *ctrl)
  2687. {
  2688. /*
  2689. * Only new queue scan work when admin and IO queues are both alive
  2690. */
  2691. if (ctrl->state == NVME_CTRL_LIVE)
  2692. queue_work(nvme_wq, &ctrl->scan_work);
  2693. }
  2694. EXPORT_SYMBOL_GPL(nvme_queue_scan);
  2695. /*
  2696. * This function iterates the namespace list unlocked to allow recovery from
  2697. * controller failure. It is up to the caller to ensure the namespace list is
  2698. * not modified by scan work while this function is executing.
  2699. */
  2700. void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
  2701. {
  2702. struct nvme_ns *ns, *next;
  2703. /*
  2704. * The dead states indicates the controller was not gracefully
  2705. * disconnected. In that case, we won't be able to flush any data while
  2706. * removing the namespaces' disks; fail all the queues now to avoid
  2707. * potentially having to clean up the failed sync later.
  2708. */
  2709. if (ctrl->state == NVME_CTRL_DEAD)
  2710. nvme_kill_queues(ctrl);
  2711. list_for_each_entry_safe(ns, next, &ctrl->namespaces, list)
  2712. nvme_ns_remove(ns);
  2713. }
  2714. EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
  2715. static void nvme_aen_uevent(struct nvme_ctrl *ctrl)
  2716. {
  2717. char *envp[2] = { NULL, NULL };
  2718. u32 aen_result = ctrl->aen_result;
  2719. ctrl->aen_result = 0;
  2720. if (!aen_result)
  2721. return;
  2722. envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result);
  2723. if (!envp[0])
  2724. return;
  2725. kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
  2726. kfree(envp[0]);
  2727. }
  2728. static void nvme_async_event_work(struct work_struct *work)
  2729. {
  2730. struct nvme_ctrl *ctrl =
  2731. container_of(work, struct nvme_ctrl, async_event_work);
  2732. nvme_aen_uevent(ctrl);
  2733. ctrl->ops->submit_async_event(ctrl);
  2734. }
  2735. static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
  2736. {
  2737. u32 csts;
  2738. if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
  2739. return false;
  2740. if (csts == ~0)
  2741. return false;
  2742. return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
  2743. }
  2744. static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
  2745. {
  2746. struct nvme_fw_slot_info_log *log;
  2747. log = kmalloc(sizeof(*log), GFP_KERNEL);
  2748. if (!log)
  2749. return;
  2750. if (nvme_get_log(ctrl, NVME_LOG_FW_SLOT, log, sizeof(*log)))
  2751. dev_warn(ctrl->device,
  2752. "Get FW SLOT INFO log error\n");
  2753. kfree(log);
  2754. }
  2755. static void nvme_fw_act_work(struct work_struct *work)
  2756. {
  2757. struct nvme_ctrl *ctrl = container_of(work,
  2758. struct nvme_ctrl, fw_act_work);
  2759. unsigned long fw_act_timeout;
  2760. if (ctrl->mtfa)
  2761. fw_act_timeout = jiffies +
  2762. msecs_to_jiffies(ctrl->mtfa * 100);
  2763. else
  2764. fw_act_timeout = jiffies +
  2765. msecs_to_jiffies(admin_timeout * 1000);
  2766. nvme_stop_queues(ctrl);
  2767. while (nvme_ctrl_pp_status(ctrl)) {
  2768. if (time_after(jiffies, fw_act_timeout)) {
  2769. dev_warn(ctrl->device,
  2770. "Fw activation timeout, reset controller\n");
  2771. nvme_reset_ctrl(ctrl);
  2772. break;
  2773. }
  2774. msleep(100);
  2775. }
  2776. if (ctrl->state != NVME_CTRL_LIVE)
  2777. return;
  2778. nvme_start_queues(ctrl);
  2779. /* read FW slot information to clear the AER */
  2780. nvme_get_fw_slot_info(ctrl);
  2781. }
  2782. void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
  2783. union nvme_result *res)
  2784. {
  2785. u32 result = le32_to_cpu(res->u32);
  2786. if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS)
  2787. return;
  2788. switch (result & 0x7) {
  2789. case NVME_AER_ERROR:
  2790. case NVME_AER_SMART:
  2791. case NVME_AER_CSS:
  2792. case NVME_AER_VS:
  2793. ctrl->aen_result = result;
  2794. break;
  2795. default:
  2796. break;
  2797. }
  2798. switch (result & 0xff07) {
  2799. case NVME_AER_NOTICE_NS_CHANGED:
  2800. dev_info(ctrl->device, "rescanning\n");
  2801. nvme_queue_scan(ctrl);
  2802. break;
  2803. case NVME_AER_NOTICE_FW_ACT_STARTING:
  2804. queue_work(nvme_wq, &ctrl->fw_act_work);
  2805. break;
  2806. default:
  2807. dev_warn(ctrl->device, "async event result %08x\n", result);
  2808. }
  2809. queue_work(nvme_wq, &ctrl->async_event_work);
  2810. }
  2811. EXPORT_SYMBOL_GPL(nvme_complete_async_event);
  2812. void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
  2813. {
  2814. nvme_stop_keep_alive(ctrl);
  2815. flush_work(&ctrl->async_event_work);
  2816. flush_work(&ctrl->scan_work);
  2817. cancel_work_sync(&ctrl->fw_act_work);
  2818. }
  2819. EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
  2820. void nvme_start_ctrl(struct nvme_ctrl *ctrl)
  2821. {
  2822. if (ctrl->kato)
  2823. nvme_start_keep_alive(ctrl);
  2824. if (ctrl->queue_count > 1) {
  2825. nvme_queue_scan(ctrl);
  2826. queue_work(nvme_wq, &ctrl->async_event_work);
  2827. nvme_start_queues(ctrl);
  2828. }
  2829. }
  2830. EXPORT_SYMBOL_GPL(nvme_start_ctrl);
  2831. void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
  2832. {
  2833. cdev_device_del(&ctrl->cdev, ctrl->device);
  2834. }
  2835. EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
  2836. static void nvme_free_ctrl(struct device *dev)
  2837. {
  2838. struct nvme_ctrl *ctrl =
  2839. container_of(dev, struct nvme_ctrl, ctrl_device);
  2840. struct nvme_subsystem *subsys = ctrl->subsys;
  2841. ida_simple_remove(&nvme_instance_ida, ctrl->instance);
  2842. kfree(ctrl->effects);
  2843. if (subsys) {
  2844. mutex_lock(&subsys->lock);
  2845. list_del(&ctrl->subsys_entry);
  2846. mutex_unlock(&subsys->lock);
  2847. sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device));
  2848. }
  2849. ctrl->ops->free_ctrl(ctrl);
  2850. if (subsys)
  2851. nvme_put_subsystem(subsys);
  2852. }
  2853. /*
  2854. * Initialize a NVMe controller structures. This needs to be called during
  2855. * earliest initialization so that we have the initialized structured around
  2856. * during probing.
  2857. */
  2858. int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
  2859. const struct nvme_ctrl_ops *ops, unsigned long quirks)
  2860. {
  2861. int ret;
  2862. ctrl->state = NVME_CTRL_NEW;
  2863. spin_lock_init(&ctrl->lock);
  2864. INIT_LIST_HEAD(&ctrl->namespaces);
  2865. mutex_init(&ctrl->namespaces_mutex);
  2866. ctrl->dev = dev;
  2867. ctrl->ops = ops;
  2868. ctrl->quirks = quirks;
  2869. INIT_WORK(&ctrl->scan_work, nvme_scan_work);
  2870. INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
  2871. INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
  2872. INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work);
  2873. ret = ida_simple_get(&nvme_instance_ida, 0, 0, GFP_KERNEL);
  2874. if (ret < 0)
  2875. goto out;
  2876. ctrl->instance = ret;
  2877. device_initialize(&ctrl->ctrl_device);
  2878. ctrl->device = &ctrl->ctrl_device;
  2879. ctrl->device->devt = MKDEV(MAJOR(nvme_chr_devt), ctrl->instance);
  2880. ctrl->device->class = nvme_class;
  2881. ctrl->device->parent = ctrl->dev;
  2882. ctrl->device->groups = nvme_dev_attr_groups;
  2883. ctrl->device->release = nvme_free_ctrl;
  2884. dev_set_drvdata(ctrl->device, ctrl);
  2885. ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance);
  2886. if (ret)
  2887. goto out_release_instance;
  2888. cdev_init(&ctrl->cdev, &nvme_dev_fops);
  2889. ctrl->cdev.owner = ops->module;
  2890. ret = cdev_device_add(&ctrl->cdev, ctrl->device);
  2891. if (ret)
  2892. goto out_free_name;
  2893. /*
  2894. * Initialize latency tolerance controls. The sysfs files won't
  2895. * be visible to userspace unless the device actually supports APST.
  2896. */
  2897. ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
  2898. dev_pm_qos_update_user_latency_tolerance(ctrl->device,
  2899. min(default_ps_max_latency_us, (unsigned long)S32_MAX));
  2900. return 0;
  2901. out_free_name:
  2902. kfree_const(dev->kobj.name);
  2903. out_release_instance:
  2904. ida_simple_remove(&nvme_instance_ida, ctrl->instance);
  2905. out:
  2906. return ret;
  2907. }
  2908. EXPORT_SYMBOL_GPL(nvme_init_ctrl);
  2909. /**
  2910. * nvme_kill_queues(): Ends all namespace queues
  2911. * @ctrl: the dead controller that needs to end
  2912. *
  2913. * Call this function when the driver determines it is unable to get the
  2914. * controller in a state capable of servicing IO.
  2915. */
  2916. void nvme_kill_queues(struct nvme_ctrl *ctrl)
  2917. {
  2918. struct nvme_ns *ns;
  2919. mutex_lock(&ctrl->namespaces_mutex);
  2920. /* Forcibly unquiesce queues to avoid blocking dispatch */
  2921. if (ctrl->admin_q)
  2922. blk_mq_unquiesce_queue(ctrl->admin_q);
  2923. list_for_each_entry(ns, &ctrl->namespaces, list) {
  2924. /*
  2925. * Revalidating a dead namespace sets capacity to 0. This will
  2926. * end buffered writers dirtying pages that can't be synced.
  2927. */
  2928. if (!ns->disk || test_and_set_bit(NVME_NS_DEAD, &ns->flags))
  2929. continue;
  2930. revalidate_disk(ns->disk);
  2931. blk_set_queue_dying(ns->queue);
  2932. /* Forcibly unquiesce queues to avoid blocking dispatch */
  2933. blk_mq_unquiesce_queue(ns->queue);
  2934. }
  2935. mutex_unlock(&ctrl->namespaces_mutex);
  2936. }
  2937. EXPORT_SYMBOL_GPL(nvme_kill_queues);
  2938. void nvme_unfreeze(struct nvme_ctrl *ctrl)
  2939. {
  2940. struct nvme_ns *ns;
  2941. mutex_lock(&ctrl->namespaces_mutex);
  2942. list_for_each_entry(ns, &ctrl->namespaces, list)
  2943. blk_mq_unfreeze_queue(ns->queue);
  2944. mutex_unlock(&ctrl->namespaces_mutex);
  2945. }
  2946. EXPORT_SYMBOL_GPL(nvme_unfreeze);
  2947. void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
  2948. {
  2949. struct nvme_ns *ns;
  2950. mutex_lock(&ctrl->namespaces_mutex);
  2951. list_for_each_entry(ns, &ctrl->namespaces, list) {
  2952. timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
  2953. if (timeout <= 0)
  2954. break;
  2955. }
  2956. mutex_unlock(&ctrl->namespaces_mutex);
  2957. }
  2958. EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
  2959. void nvme_wait_freeze(struct nvme_ctrl *ctrl)
  2960. {
  2961. struct nvme_ns *ns;
  2962. mutex_lock(&ctrl->namespaces_mutex);
  2963. list_for_each_entry(ns, &ctrl->namespaces, list)
  2964. blk_mq_freeze_queue_wait(ns->queue);
  2965. mutex_unlock(&ctrl->namespaces_mutex);
  2966. }
  2967. EXPORT_SYMBOL_GPL(nvme_wait_freeze);
  2968. void nvme_start_freeze(struct nvme_ctrl *ctrl)
  2969. {
  2970. struct nvme_ns *ns;
  2971. mutex_lock(&ctrl->namespaces_mutex);
  2972. list_for_each_entry(ns, &ctrl->namespaces, list)
  2973. blk_freeze_queue_start(ns->queue);
  2974. mutex_unlock(&ctrl->namespaces_mutex);
  2975. }
  2976. EXPORT_SYMBOL_GPL(nvme_start_freeze);
  2977. void nvme_stop_queues(struct nvme_ctrl *ctrl)
  2978. {
  2979. struct nvme_ns *ns;
  2980. mutex_lock(&ctrl->namespaces_mutex);
  2981. list_for_each_entry(ns, &ctrl->namespaces, list)
  2982. blk_mq_quiesce_queue(ns->queue);
  2983. mutex_unlock(&ctrl->namespaces_mutex);
  2984. }
  2985. EXPORT_SYMBOL_GPL(nvme_stop_queues);
  2986. void nvme_start_queues(struct nvme_ctrl *ctrl)
  2987. {
  2988. struct nvme_ns *ns;
  2989. mutex_lock(&ctrl->namespaces_mutex);
  2990. list_for_each_entry(ns, &ctrl->namespaces, list)
  2991. blk_mq_unquiesce_queue(ns->queue);
  2992. mutex_unlock(&ctrl->namespaces_mutex);
  2993. }
  2994. EXPORT_SYMBOL_GPL(nvme_start_queues);
  2995. int nvme_reinit_tagset(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set)
  2996. {
  2997. if (!ctrl->ops->reinit_request)
  2998. return 0;
  2999. return blk_mq_tagset_iter(set, set->driver_data,
  3000. ctrl->ops->reinit_request);
  3001. }
  3002. EXPORT_SYMBOL_GPL(nvme_reinit_tagset);
  3003. int __init nvme_core_init(void)
  3004. {
  3005. int result = -ENOMEM;
  3006. nvme_wq = alloc_workqueue("nvme-wq",
  3007. WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
  3008. if (!nvme_wq)
  3009. goto out;
  3010. nvme_reset_wq = alloc_workqueue("nvme-reset-wq",
  3011. WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
  3012. if (!nvme_reset_wq)
  3013. goto destroy_wq;
  3014. nvme_delete_wq = alloc_workqueue("nvme-delete-wq",
  3015. WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
  3016. if (!nvme_delete_wq)
  3017. goto destroy_reset_wq;
  3018. result = alloc_chrdev_region(&nvme_chr_devt, 0, NVME_MINORS, "nvme");
  3019. if (result < 0)
  3020. goto destroy_delete_wq;
  3021. nvme_class = class_create(THIS_MODULE, "nvme");
  3022. if (IS_ERR(nvme_class)) {
  3023. result = PTR_ERR(nvme_class);
  3024. goto unregister_chrdev;
  3025. }
  3026. nvme_subsys_class = class_create(THIS_MODULE, "nvme-subsystem");
  3027. if (IS_ERR(nvme_subsys_class)) {
  3028. result = PTR_ERR(nvme_subsys_class);
  3029. goto destroy_class;
  3030. }
  3031. return 0;
  3032. destroy_class:
  3033. class_destroy(nvme_class);
  3034. unregister_chrdev:
  3035. unregister_chrdev_region(nvme_chr_devt, NVME_MINORS);
  3036. destroy_delete_wq:
  3037. destroy_workqueue(nvme_delete_wq);
  3038. destroy_reset_wq:
  3039. destroy_workqueue(nvme_reset_wq);
  3040. destroy_wq:
  3041. destroy_workqueue(nvme_wq);
  3042. out:
  3043. return result;
  3044. }
  3045. void nvme_core_exit(void)
  3046. {
  3047. ida_destroy(&nvme_subsystems_ida);
  3048. class_destroy(nvme_subsys_class);
  3049. class_destroy(nvme_class);
  3050. unregister_chrdev_region(nvme_chr_devt, NVME_MINORS);
  3051. destroy_workqueue(nvme_delete_wq);
  3052. destroy_workqueue(nvme_reset_wq);
  3053. destroy_workqueue(nvme_wq);
  3054. }
  3055. MODULE_LICENSE("GPL");
  3056. MODULE_VERSION("1.0");
  3057. module_init(nvme_core_init);
  3058. module_exit(nvme_core_exit);