hdmi4.c 17 KB

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  1. /*
  2. * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
  3. * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
  4. * Authors: Yong Zhi
  5. * Mythri pk <mythripk@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #define DSS_SUBSYS_NAME "HDMI"
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/err.h>
  23. #include <linux/io.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/mutex.h>
  26. #include <linux/delay.h>
  27. #include <linux/string.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/pm_runtime.h>
  30. #include <linux/clk.h>
  31. #include <linux/gpio.h>
  32. #include <linux/regulator/consumer.h>
  33. #include <linux/component.h>
  34. #include <linux/of.h>
  35. #include <linux/of_graph.h>
  36. #include <sound/omap-hdmi-audio.h>
  37. #include <media/cec.h>
  38. #include "omapdss.h"
  39. #include "hdmi4_core.h"
  40. #include "hdmi4_cec.h"
  41. #include "dss.h"
  42. #include "hdmi.h"
  43. static struct omap_hdmi hdmi;
  44. static int hdmi_runtime_get(void)
  45. {
  46. int r;
  47. DSSDBG("hdmi_runtime_get\n");
  48. r = pm_runtime_get_sync(&hdmi.pdev->dev);
  49. WARN_ON(r < 0);
  50. if (r < 0)
  51. return r;
  52. return 0;
  53. }
  54. static void hdmi_runtime_put(void)
  55. {
  56. int r;
  57. DSSDBG("hdmi_runtime_put\n");
  58. r = pm_runtime_put_sync(&hdmi.pdev->dev);
  59. WARN_ON(r < 0 && r != -ENOSYS);
  60. }
  61. static irqreturn_t hdmi_irq_handler(int irq, void *data)
  62. {
  63. struct omap_hdmi *hdmi = data;
  64. struct hdmi_wp_data *wp = &hdmi->wp;
  65. u32 irqstatus;
  66. irqstatus = hdmi_wp_get_irqstatus(wp);
  67. hdmi_wp_set_irqstatus(wp, irqstatus);
  68. if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
  69. irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  70. /*
  71. * If we get both connect and disconnect interrupts at the same
  72. * time, turn off the PHY, clear interrupts, and restart, which
  73. * raises connect interrupt if a cable is connected, or nothing
  74. * if cable is not connected.
  75. */
  76. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
  77. hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
  78. HDMI_IRQ_LINK_DISCONNECT);
  79. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  80. } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
  81. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
  82. } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  83. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  84. }
  85. if (irqstatus & HDMI_IRQ_CORE) {
  86. u32 intr4 = hdmi_read_reg(hdmi->core.base, HDMI_CORE_SYS_INTR4);
  87. hdmi_write_reg(hdmi->core.base, HDMI_CORE_SYS_INTR4, intr4);
  88. if (intr4 & 8)
  89. hdmi4_cec_irq(&hdmi->core);
  90. }
  91. return IRQ_HANDLED;
  92. }
  93. static int hdmi_init_regulator(void)
  94. {
  95. struct regulator *reg;
  96. if (hdmi.vdda_reg != NULL)
  97. return 0;
  98. reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
  99. if (IS_ERR(reg)) {
  100. if (PTR_ERR(reg) != -EPROBE_DEFER)
  101. DSSERR("can't get VDDA regulator\n");
  102. return PTR_ERR(reg);
  103. }
  104. hdmi.vdda_reg = reg;
  105. return 0;
  106. }
  107. static int hdmi_power_on_core(struct omap_dss_device *dssdev)
  108. {
  109. int r;
  110. if (hdmi.core.core_pwr_cnt++)
  111. return 0;
  112. r = regulator_enable(hdmi.vdda_reg);
  113. if (r)
  114. goto err_reg_enable;
  115. r = hdmi_runtime_get();
  116. if (r)
  117. goto err_runtime_get;
  118. hdmi4_core_powerdown_disable(&hdmi.core);
  119. /* Make selection of HDMI in DSS */
  120. dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
  121. hdmi.core_enabled = true;
  122. return 0;
  123. err_runtime_get:
  124. regulator_disable(hdmi.vdda_reg);
  125. err_reg_enable:
  126. hdmi.core.core_pwr_cnt--;
  127. return r;
  128. }
  129. static void hdmi_power_off_core(struct omap_dss_device *dssdev)
  130. {
  131. if (--hdmi.core.core_pwr_cnt)
  132. return;
  133. hdmi.core_enabled = false;
  134. hdmi_runtime_put();
  135. regulator_disable(hdmi.vdda_reg);
  136. }
  137. static int hdmi_power_on_full(struct omap_dss_device *dssdev)
  138. {
  139. int r;
  140. struct videomode *vm;
  141. enum omap_channel channel = dssdev->dispc_channel;
  142. struct hdmi_wp_data *wp = &hdmi.wp;
  143. struct dss_pll_clock_info hdmi_cinfo = { 0 };
  144. unsigned pc;
  145. r = hdmi_power_on_core(dssdev);
  146. if (r)
  147. return r;
  148. /* disable and clear irqs */
  149. hdmi_wp_clear_irqenable(wp, ~HDMI_IRQ_CORE);
  150. hdmi_wp_set_irqstatus(wp, ~HDMI_IRQ_CORE);
  151. vm = &hdmi.cfg.vm;
  152. DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", vm->hactive,
  153. vm->vactive);
  154. pc = vm->pixelclock;
  155. if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
  156. pc *= 2;
  157. /* DSS_HDMI_TCLK is bitclk / 10 */
  158. pc *= 10;
  159. dss_pll_calc_b(&hdmi.pll.pll, clk_get_rate(hdmi.pll.pll.clkin),
  160. pc, &hdmi_cinfo);
  161. r = dss_pll_enable(&hdmi.pll.pll);
  162. if (r) {
  163. DSSERR("Failed to enable PLL\n");
  164. goto err_pll_enable;
  165. }
  166. r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
  167. if (r) {
  168. DSSERR("Failed to configure PLL\n");
  169. goto err_pll_cfg;
  170. }
  171. r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
  172. hdmi_cinfo.clkout[0]);
  173. if (r) {
  174. DSSDBG("Failed to configure PHY\n");
  175. goto err_phy_cfg;
  176. }
  177. r = hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  178. if (r)
  179. goto err_phy_pwr;
  180. hdmi4_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
  181. /* tv size */
  182. dss_mgr_set_timings(channel, vm);
  183. r = dss_mgr_enable(channel);
  184. if (r)
  185. goto err_mgr_enable;
  186. r = hdmi_wp_video_start(&hdmi.wp);
  187. if (r)
  188. goto err_vid_enable;
  189. hdmi_wp_set_irqenable(wp,
  190. HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
  191. return 0;
  192. err_vid_enable:
  193. dss_mgr_disable(channel);
  194. err_mgr_enable:
  195. hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
  196. err_phy_pwr:
  197. err_phy_cfg:
  198. err_pll_cfg:
  199. dss_pll_disable(&hdmi.pll.pll);
  200. err_pll_enable:
  201. hdmi_power_off_core(dssdev);
  202. return -EIO;
  203. }
  204. static void hdmi_power_off_full(struct omap_dss_device *dssdev)
  205. {
  206. enum omap_channel channel = dssdev->dispc_channel;
  207. hdmi_wp_clear_irqenable(&hdmi.wp, ~HDMI_IRQ_CORE);
  208. hdmi_wp_video_stop(&hdmi.wp);
  209. dss_mgr_disable(channel);
  210. hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
  211. dss_pll_disable(&hdmi.pll.pll);
  212. hdmi_power_off_core(dssdev);
  213. }
  214. static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
  215. struct videomode *vm)
  216. {
  217. if (!dispc_mgr_timings_ok(dssdev->dispc_channel, vm))
  218. return -EINVAL;
  219. return 0;
  220. }
  221. static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
  222. struct videomode *vm)
  223. {
  224. mutex_lock(&hdmi.lock);
  225. hdmi.cfg.vm = *vm;
  226. dispc_set_tv_pclk(vm->pixelclock);
  227. mutex_unlock(&hdmi.lock);
  228. }
  229. static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
  230. struct videomode *vm)
  231. {
  232. *vm = hdmi.cfg.vm;
  233. }
  234. static void hdmi_dump_regs(struct seq_file *s)
  235. {
  236. mutex_lock(&hdmi.lock);
  237. if (hdmi_runtime_get()) {
  238. mutex_unlock(&hdmi.lock);
  239. return;
  240. }
  241. hdmi_wp_dump(&hdmi.wp, s);
  242. hdmi_pll_dump(&hdmi.pll, s);
  243. hdmi_phy_dump(&hdmi.phy, s);
  244. hdmi4_core_dump(&hdmi.core, s);
  245. hdmi_runtime_put();
  246. mutex_unlock(&hdmi.lock);
  247. }
  248. static int read_edid(u8 *buf, int len)
  249. {
  250. int r;
  251. mutex_lock(&hdmi.lock);
  252. r = hdmi_runtime_get();
  253. BUG_ON(r);
  254. r = hdmi4_read_edid(&hdmi.core, buf, len);
  255. hdmi_runtime_put();
  256. mutex_unlock(&hdmi.lock);
  257. return r;
  258. }
  259. static void hdmi_start_audio_stream(struct omap_hdmi *hd)
  260. {
  261. hdmi_wp_audio_enable(&hd->wp, true);
  262. hdmi4_audio_start(&hd->core, &hd->wp);
  263. }
  264. static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
  265. {
  266. hdmi4_audio_stop(&hd->core, &hd->wp);
  267. hdmi_wp_audio_enable(&hd->wp, false);
  268. }
  269. static int hdmi_display_enable(struct omap_dss_device *dssdev)
  270. {
  271. struct omap_dss_device *out = &hdmi.output;
  272. unsigned long flags;
  273. int r = 0;
  274. DSSDBG("ENTER hdmi_display_enable\n");
  275. mutex_lock(&hdmi.lock);
  276. if (!out->dispc_channel_connected) {
  277. DSSERR("failed to enable display: no output/manager\n");
  278. r = -ENODEV;
  279. goto err0;
  280. }
  281. r = hdmi_power_on_full(dssdev);
  282. if (r) {
  283. DSSERR("failed to power on device\n");
  284. goto err0;
  285. }
  286. if (hdmi.audio_configured) {
  287. r = hdmi4_audio_config(&hdmi.core, &hdmi.wp, &hdmi.audio_config,
  288. hdmi.cfg.vm.pixelclock);
  289. if (r) {
  290. DSSERR("Error restoring audio configuration: %d", r);
  291. hdmi.audio_abort_cb(&hdmi.pdev->dev);
  292. hdmi.audio_configured = false;
  293. }
  294. }
  295. spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
  296. if (hdmi.audio_configured && hdmi.audio_playing)
  297. hdmi_start_audio_stream(&hdmi);
  298. hdmi.display_enabled = true;
  299. spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
  300. mutex_unlock(&hdmi.lock);
  301. return 0;
  302. err0:
  303. mutex_unlock(&hdmi.lock);
  304. return r;
  305. }
  306. static void hdmi_display_disable(struct omap_dss_device *dssdev)
  307. {
  308. unsigned long flags;
  309. DSSDBG("Enter hdmi_display_disable\n");
  310. mutex_lock(&hdmi.lock);
  311. spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
  312. hdmi_stop_audio_stream(&hdmi);
  313. hdmi.display_enabled = false;
  314. spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
  315. hdmi_power_off_full(dssdev);
  316. mutex_unlock(&hdmi.lock);
  317. }
  318. int hdmi4_core_enable(struct omap_dss_device *dssdev)
  319. {
  320. int r = 0;
  321. DSSDBG("ENTER omapdss_hdmi4_core_enable\n");
  322. mutex_lock(&hdmi.lock);
  323. r = hdmi_power_on_core(dssdev);
  324. if (r) {
  325. DSSERR("failed to power on device\n");
  326. goto err0;
  327. }
  328. mutex_unlock(&hdmi.lock);
  329. return 0;
  330. err0:
  331. mutex_unlock(&hdmi.lock);
  332. return r;
  333. }
  334. void hdmi4_core_disable(struct omap_dss_device *dssdev)
  335. {
  336. DSSDBG("Enter omapdss_hdmi4_core_disable\n");
  337. mutex_lock(&hdmi.lock);
  338. hdmi_power_off_core(dssdev);
  339. mutex_unlock(&hdmi.lock);
  340. }
  341. static int hdmi_connect(struct omap_dss_device *dssdev,
  342. struct omap_dss_device *dst)
  343. {
  344. enum omap_channel channel = dssdev->dispc_channel;
  345. int r;
  346. r = hdmi_init_regulator();
  347. if (r)
  348. return r;
  349. r = dss_mgr_connect(channel, dssdev);
  350. if (r)
  351. return r;
  352. r = omapdss_output_set_device(dssdev, dst);
  353. if (r) {
  354. DSSERR("failed to connect output to new device: %s\n",
  355. dst->name);
  356. dss_mgr_disconnect(channel, dssdev);
  357. return r;
  358. }
  359. return 0;
  360. }
  361. static void hdmi_disconnect(struct omap_dss_device *dssdev,
  362. struct omap_dss_device *dst)
  363. {
  364. enum omap_channel channel = dssdev->dispc_channel;
  365. WARN_ON(dst != dssdev->dst);
  366. if (dst != dssdev->dst)
  367. return;
  368. omapdss_output_unset_device(dssdev);
  369. dss_mgr_disconnect(channel, dssdev);
  370. }
  371. static int hdmi_read_edid(struct omap_dss_device *dssdev,
  372. u8 *edid, int len)
  373. {
  374. bool need_enable;
  375. int r;
  376. need_enable = hdmi.core_enabled == false;
  377. if (need_enable) {
  378. r = hdmi4_core_enable(dssdev);
  379. if (r)
  380. return r;
  381. }
  382. r = read_edid(edid, len);
  383. if (r >= 256)
  384. hdmi4_cec_set_phys_addr(&hdmi.core,
  385. cec_get_edid_phys_addr(edid, r, NULL));
  386. else
  387. hdmi4_cec_set_phys_addr(&hdmi.core, CEC_PHYS_ADDR_INVALID);
  388. if (need_enable)
  389. hdmi4_core_disable(dssdev);
  390. return r;
  391. }
  392. static void hdmi_lost_hotplug(struct omap_dss_device *dssdev)
  393. {
  394. hdmi4_cec_set_phys_addr(&hdmi.core, CEC_PHYS_ADDR_INVALID);
  395. }
  396. static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
  397. const struct hdmi_avi_infoframe *avi)
  398. {
  399. hdmi.cfg.infoframe = *avi;
  400. return 0;
  401. }
  402. static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
  403. bool hdmi_mode)
  404. {
  405. hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
  406. return 0;
  407. }
  408. static const struct omapdss_hdmi_ops hdmi_ops = {
  409. .connect = hdmi_connect,
  410. .disconnect = hdmi_disconnect,
  411. .enable = hdmi_display_enable,
  412. .disable = hdmi_display_disable,
  413. .check_timings = hdmi_display_check_timing,
  414. .set_timings = hdmi_display_set_timing,
  415. .get_timings = hdmi_display_get_timings,
  416. .read_edid = hdmi_read_edid,
  417. .lost_hotplug = hdmi_lost_hotplug,
  418. .set_infoframe = hdmi_set_infoframe,
  419. .set_hdmi_mode = hdmi_set_hdmi_mode,
  420. };
  421. static void hdmi_init_output(struct platform_device *pdev)
  422. {
  423. struct omap_dss_device *out = &hdmi.output;
  424. out->dev = &pdev->dev;
  425. out->id = OMAP_DSS_OUTPUT_HDMI;
  426. out->output_type = OMAP_DISPLAY_TYPE_HDMI;
  427. out->name = "hdmi.0";
  428. out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
  429. out->ops.hdmi = &hdmi_ops;
  430. out->owner = THIS_MODULE;
  431. omapdss_register_output(out);
  432. }
  433. static void hdmi_uninit_output(struct platform_device *pdev)
  434. {
  435. struct omap_dss_device *out = &hdmi.output;
  436. omapdss_unregister_output(out);
  437. }
  438. static int hdmi_probe_of(struct platform_device *pdev)
  439. {
  440. struct device_node *node = pdev->dev.of_node;
  441. struct device_node *ep;
  442. int r;
  443. ep = of_graph_get_endpoint_by_regs(node, 0, 0);
  444. if (!ep)
  445. return 0;
  446. r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
  447. if (r)
  448. goto err;
  449. of_node_put(ep);
  450. return 0;
  451. err:
  452. of_node_put(ep);
  453. return r;
  454. }
  455. /* Audio callbacks */
  456. static int hdmi_audio_startup(struct device *dev,
  457. void (*abort_cb)(struct device *dev))
  458. {
  459. struct omap_hdmi *hd = dev_get_drvdata(dev);
  460. int ret = 0;
  461. mutex_lock(&hd->lock);
  462. if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
  463. ret = -EPERM;
  464. goto out;
  465. }
  466. hd->audio_abort_cb = abort_cb;
  467. out:
  468. mutex_unlock(&hd->lock);
  469. return ret;
  470. }
  471. static int hdmi_audio_shutdown(struct device *dev)
  472. {
  473. struct omap_hdmi *hd = dev_get_drvdata(dev);
  474. mutex_lock(&hd->lock);
  475. hd->audio_abort_cb = NULL;
  476. hd->audio_configured = false;
  477. hd->audio_playing = false;
  478. mutex_unlock(&hd->lock);
  479. return 0;
  480. }
  481. static int hdmi_audio_start(struct device *dev)
  482. {
  483. struct omap_hdmi *hd = dev_get_drvdata(dev);
  484. unsigned long flags;
  485. WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
  486. spin_lock_irqsave(&hd->audio_playing_lock, flags);
  487. if (hd->display_enabled)
  488. hdmi_start_audio_stream(hd);
  489. hd->audio_playing = true;
  490. spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
  491. return 0;
  492. }
  493. static void hdmi_audio_stop(struct device *dev)
  494. {
  495. struct omap_hdmi *hd = dev_get_drvdata(dev);
  496. unsigned long flags;
  497. WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
  498. spin_lock_irqsave(&hd->audio_playing_lock, flags);
  499. if (hd->display_enabled)
  500. hdmi_stop_audio_stream(hd);
  501. hd->audio_playing = false;
  502. spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
  503. }
  504. static int hdmi_audio_config(struct device *dev,
  505. struct omap_dss_audio *dss_audio)
  506. {
  507. struct omap_hdmi *hd = dev_get_drvdata(dev);
  508. int ret;
  509. mutex_lock(&hd->lock);
  510. if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
  511. ret = -EPERM;
  512. goto out;
  513. }
  514. ret = hdmi4_audio_config(&hd->core, &hd->wp, dss_audio,
  515. hd->cfg.vm.pixelclock);
  516. if (!ret) {
  517. hd->audio_configured = true;
  518. hd->audio_config = *dss_audio;
  519. }
  520. out:
  521. mutex_unlock(&hd->lock);
  522. return ret;
  523. }
  524. static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
  525. .audio_startup = hdmi_audio_startup,
  526. .audio_shutdown = hdmi_audio_shutdown,
  527. .audio_start = hdmi_audio_start,
  528. .audio_stop = hdmi_audio_stop,
  529. .audio_config = hdmi_audio_config,
  530. };
  531. static int hdmi_audio_register(struct device *dev)
  532. {
  533. struct omap_hdmi_audio_pdata pdata = {
  534. .dev = dev,
  535. .version = 4,
  536. .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp),
  537. .ops = &hdmi_audio_ops,
  538. };
  539. hdmi.audio_pdev = platform_device_register_data(
  540. dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
  541. &pdata, sizeof(pdata));
  542. if (IS_ERR(hdmi.audio_pdev))
  543. return PTR_ERR(hdmi.audio_pdev);
  544. return 0;
  545. }
  546. /* HDMI HW IP initialisation */
  547. static int hdmi4_bind(struct device *dev, struct device *master, void *data)
  548. {
  549. struct platform_device *pdev = to_platform_device(dev);
  550. int r;
  551. int irq;
  552. hdmi.pdev = pdev;
  553. dev_set_drvdata(&pdev->dev, &hdmi);
  554. mutex_init(&hdmi.lock);
  555. spin_lock_init(&hdmi.audio_playing_lock);
  556. r = hdmi_probe_of(pdev);
  557. if (r)
  558. return r;
  559. r = hdmi_wp_init(pdev, &hdmi.wp, 4);
  560. if (r)
  561. return r;
  562. r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
  563. if (r)
  564. return r;
  565. r = hdmi_phy_init(pdev, &hdmi.phy, 4);
  566. if (r)
  567. goto err;
  568. r = hdmi4_core_init(pdev, &hdmi.core);
  569. if (r)
  570. goto err;
  571. r = hdmi4_cec_init(pdev, &hdmi.core, &hdmi.wp);
  572. if (r)
  573. goto err;
  574. irq = platform_get_irq(pdev, 0);
  575. if (irq < 0) {
  576. DSSERR("platform_get_irq failed\n");
  577. r = -ENODEV;
  578. goto err;
  579. }
  580. r = devm_request_threaded_irq(&pdev->dev, irq,
  581. NULL, hdmi_irq_handler,
  582. IRQF_ONESHOT, "OMAP HDMI", &hdmi);
  583. if (r) {
  584. DSSERR("HDMI IRQ request failed\n");
  585. goto err;
  586. }
  587. pm_runtime_enable(&pdev->dev);
  588. hdmi_init_output(pdev);
  589. r = hdmi_audio_register(&pdev->dev);
  590. if (r) {
  591. DSSERR("Registering HDMI audio failed\n");
  592. hdmi_uninit_output(pdev);
  593. pm_runtime_disable(&pdev->dev);
  594. return r;
  595. }
  596. dss_debugfs_create_file("hdmi", hdmi_dump_regs);
  597. return 0;
  598. err:
  599. hdmi_pll_uninit(&hdmi.pll);
  600. return r;
  601. }
  602. static void hdmi4_unbind(struct device *dev, struct device *master, void *data)
  603. {
  604. struct platform_device *pdev = to_platform_device(dev);
  605. if (hdmi.audio_pdev)
  606. platform_device_unregister(hdmi.audio_pdev);
  607. hdmi_uninit_output(pdev);
  608. hdmi4_cec_uninit(&hdmi.core);
  609. hdmi_pll_uninit(&hdmi.pll);
  610. pm_runtime_disable(&pdev->dev);
  611. }
  612. static const struct component_ops hdmi4_component_ops = {
  613. .bind = hdmi4_bind,
  614. .unbind = hdmi4_unbind,
  615. };
  616. static int hdmi4_probe(struct platform_device *pdev)
  617. {
  618. return component_add(&pdev->dev, &hdmi4_component_ops);
  619. }
  620. static int hdmi4_remove(struct platform_device *pdev)
  621. {
  622. component_del(&pdev->dev, &hdmi4_component_ops);
  623. return 0;
  624. }
  625. static int hdmi_runtime_suspend(struct device *dev)
  626. {
  627. dispc_runtime_put();
  628. return 0;
  629. }
  630. static int hdmi_runtime_resume(struct device *dev)
  631. {
  632. int r;
  633. r = dispc_runtime_get();
  634. if (r < 0)
  635. return r;
  636. return 0;
  637. }
  638. static const struct dev_pm_ops hdmi_pm_ops = {
  639. .runtime_suspend = hdmi_runtime_suspend,
  640. .runtime_resume = hdmi_runtime_resume,
  641. };
  642. static const struct of_device_id hdmi_of_match[] = {
  643. { .compatible = "ti,omap4-hdmi", },
  644. {},
  645. };
  646. static struct platform_driver omapdss_hdmihw_driver = {
  647. .probe = hdmi4_probe,
  648. .remove = hdmi4_remove,
  649. .driver = {
  650. .name = "omapdss_hdmi",
  651. .pm = &hdmi_pm_ops,
  652. .of_match_table = hdmi_of_match,
  653. .suppress_bind_attrs = true,
  654. },
  655. };
  656. int __init hdmi4_init_platform_driver(void)
  657. {
  658. return platform_driver_register(&omapdss_hdmihw_driver);
  659. }
  660. void hdmi4_uninit_platform_driver(void)
  661. {
  662. platform_driver_unregister(&omapdss_hdmihw_driver);
  663. }