mtk_dpi.c 19 KB

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  1. /*
  2. * Copyright (c) 2014 MediaTek Inc.
  3. * Author: Jie Qiu <jie.qiu@mediatek.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <drm/drmP.h>
  15. #include <drm/drm_crtc.h>
  16. #include <drm/drm_crtc_helper.h>
  17. #include <linux/kernel.h>
  18. #include <linux/component.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/of.h>
  21. #include <linux/of_graph.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/clk.h>
  25. #include "mtk_dpi_regs.h"
  26. #include "mtk_drm_ddp_comp.h"
  27. enum mtk_dpi_out_bit_num {
  28. MTK_DPI_OUT_BIT_NUM_8BITS,
  29. MTK_DPI_OUT_BIT_NUM_10BITS,
  30. MTK_DPI_OUT_BIT_NUM_12BITS,
  31. MTK_DPI_OUT_BIT_NUM_16BITS
  32. };
  33. enum mtk_dpi_out_yc_map {
  34. MTK_DPI_OUT_YC_MAP_RGB,
  35. MTK_DPI_OUT_YC_MAP_CYCY,
  36. MTK_DPI_OUT_YC_MAP_YCYC,
  37. MTK_DPI_OUT_YC_MAP_CY,
  38. MTK_DPI_OUT_YC_MAP_YC
  39. };
  40. enum mtk_dpi_out_channel_swap {
  41. MTK_DPI_OUT_CHANNEL_SWAP_RGB,
  42. MTK_DPI_OUT_CHANNEL_SWAP_GBR,
  43. MTK_DPI_OUT_CHANNEL_SWAP_BRG,
  44. MTK_DPI_OUT_CHANNEL_SWAP_RBG,
  45. MTK_DPI_OUT_CHANNEL_SWAP_GRB,
  46. MTK_DPI_OUT_CHANNEL_SWAP_BGR
  47. };
  48. enum mtk_dpi_out_color_format {
  49. MTK_DPI_COLOR_FORMAT_RGB,
  50. MTK_DPI_COLOR_FORMAT_RGB_FULL,
  51. MTK_DPI_COLOR_FORMAT_YCBCR_444,
  52. MTK_DPI_COLOR_FORMAT_YCBCR_422,
  53. MTK_DPI_COLOR_FORMAT_XV_YCC,
  54. MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL,
  55. MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL
  56. };
  57. struct mtk_dpi {
  58. struct mtk_ddp_comp ddp_comp;
  59. struct drm_encoder encoder;
  60. struct drm_bridge *bridge;
  61. void __iomem *regs;
  62. struct device *dev;
  63. struct clk *engine_clk;
  64. struct clk *pixel_clk;
  65. struct clk *tvd_clk;
  66. int irq;
  67. struct drm_display_mode mode;
  68. enum mtk_dpi_out_color_format color_format;
  69. enum mtk_dpi_out_yc_map yc_map;
  70. enum mtk_dpi_out_bit_num bit_num;
  71. enum mtk_dpi_out_channel_swap channel_swap;
  72. bool power_sta;
  73. u8 power_ctl;
  74. };
  75. static inline struct mtk_dpi *mtk_dpi_from_encoder(struct drm_encoder *e)
  76. {
  77. return container_of(e, struct mtk_dpi, encoder);
  78. }
  79. enum mtk_dpi_polarity {
  80. MTK_DPI_POLARITY_RISING,
  81. MTK_DPI_POLARITY_FALLING,
  82. };
  83. enum mtk_dpi_power_ctl {
  84. DPI_POWER_START = BIT(0),
  85. DPI_POWER_ENABLE = BIT(1),
  86. };
  87. struct mtk_dpi_polarities {
  88. enum mtk_dpi_polarity de_pol;
  89. enum mtk_dpi_polarity ck_pol;
  90. enum mtk_dpi_polarity hsync_pol;
  91. enum mtk_dpi_polarity vsync_pol;
  92. };
  93. struct mtk_dpi_sync_param {
  94. u32 sync_width;
  95. u32 front_porch;
  96. u32 back_porch;
  97. bool shift_half_line;
  98. };
  99. struct mtk_dpi_yc_limit {
  100. u16 y_top;
  101. u16 y_bottom;
  102. u16 c_top;
  103. u16 c_bottom;
  104. };
  105. static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask)
  106. {
  107. u32 tmp = readl(dpi->regs + offset) & ~mask;
  108. tmp |= (val & mask);
  109. writel(tmp, dpi->regs + offset);
  110. }
  111. static void mtk_dpi_sw_reset(struct mtk_dpi *dpi, bool reset)
  112. {
  113. mtk_dpi_mask(dpi, DPI_RET, reset ? RST : 0, RST);
  114. }
  115. static void mtk_dpi_enable(struct mtk_dpi *dpi)
  116. {
  117. mtk_dpi_mask(dpi, DPI_EN, EN, EN);
  118. }
  119. static void mtk_dpi_disable(struct mtk_dpi *dpi)
  120. {
  121. mtk_dpi_mask(dpi, DPI_EN, 0, EN);
  122. }
  123. static void mtk_dpi_config_hsync(struct mtk_dpi *dpi,
  124. struct mtk_dpi_sync_param *sync)
  125. {
  126. mtk_dpi_mask(dpi, DPI_TGEN_HWIDTH,
  127. sync->sync_width << HPW, HPW_MASK);
  128. mtk_dpi_mask(dpi, DPI_TGEN_HPORCH,
  129. sync->back_porch << HBP, HBP_MASK);
  130. mtk_dpi_mask(dpi, DPI_TGEN_HPORCH, sync->front_porch << HFP,
  131. HFP_MASK);
  132. }
  133. static void mtk_dpi_config_vsync(struct mtk_dpi *dpi,
  134. struct mtk_dpi_sync_param *sync,
  135. u32 width_addr, u32 porch_addr)
  136. {
  137. mtk_dpi_mask(dpi, width_addr,
  138. sync->sync_width << VSYNC_WIDTH_SHIFT,
  139. VSYNC_WIDTH_MASK);
  140. mtk_dpi_mask(dpi, width_addr,
  141. sync->shift_half_line << VSYNC_HALF_LINE_SHIFT,
  142. VSYNC_HALF_LINE_MASK);
  143. mtk_dpi_mask(dpi, porch_addr,
  144. sync->back_porch << VSYNC_BACK_PORCH_SHIFT,
  145. VSYNC_BACK_PORCH_MASK);
  146. mtk_dpi_mask(dpi, porch_addr,
  147. sync->front_porch << VSYNC_FRONT_PORCH_SHIFT,
  148. VSYNC_FRONT_PORCH_MASK);
  149. }
  150. static void mtk_dpi_config_vsync_lodd(struct mtk_dpi *dpi,
  151. struct mtk_dpi_sync_param *sync)
  152. {
  153. mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH, DPI_TGEN_VPORCH);
  154. }
  155. static void mtk_dpi_config_vsync_leven(struct mtk_dpi *dpi,
  156. struct mtk_dpi_sync_param *sync)
  157. {
  158. mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_LEVEN,
  159. DPI_TGEN_VPORCH_LEVEN);
  160. }
  161. static void mtk_dpi_config_vsync_rodd(struct mtk_dpi *dpi,
  162. struct mtk_dpi_sync_param *sync)
  163. {
  164. mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_RODD,
  165. DPI_TGEN_VPORCH_RODD);
  166. }
  167. static void mtk_dpi_config_vsync_reven(struct mtk_dpi *dpi,
  168. struct mtk_dpi_sync_param *sync)
  169. {
  170. mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_REVEN,
  171. DPI_TGEN_VPORCH_REVEN);
  172. }
  173. static void mtk_dpi_config_pol(struct mtk_dpi *dpi,
  174. struct mtk_dpi_polarities *dpi_pol)
  175. {
  176. unsigned int pol;
  177. pol = (dpi_pol->ck_pol == MTK_DPI_POLARITY_RISING ? 0 : CK_POL) |
  178. (dpi_pol->de_pol == MTK_DPI_POLARITY_RISING ? 0 : DE_POL) |
  179. (dpi_pol->hsync_pol == MTK_DPI_POLARITY_RISING ? 0 : HSYNC_POL) |
  180. (dpi_pol->vsync_pol == MTK_DPI_POLARITY_RISING ? 0 : VSYNC_POL);
  181. mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, pol,
  182. CK_POL | DE_POL | HSYNC_POL | VSYNC_POL);
  183. }
  184. static void mtk_dpi_config_3d(struct mtk_dpi *dpi, bool en_3d)
  185. {
  186. mtk_dpi_mask(dpi, DPI_CON, en_3d ? TDFP_EN : 0, TDFP_EN);
  187. }
  188. static void mtk_dpi_config_interface(struct mtk_dpi *dpi, bool inter)
  189. {
  190. mtk_dpi_mask(dpi, DPI_CON, inter ? INTL_EN : 0, INTL_EN);
  191. }
  192. static void mtk_dpi_config_fb_size(struct mtk_dpi *dpi, u32 width, u32 height)
  193. {
  194. mtk_dpi_mask(dpi, DPI_SIZE, width << HSIZE, HSIZE_MASK);
  195. mtk_dpi_mask(dpi, DPI_SIZE, height << VSIZE, VSIZE_MASK);
  196. }
  197. static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi,
  198. struct mtk_dpi_yc_limit *limit)
  199. {
  200. mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_bottom << Y_LIMINT_BOT,
  201. Y_LIMINT_BOT_MASK);
  202. mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_top << Y_LIMINT_TOP,
  203. Y_LIMINT_TOP_MASK);
  204. mtk_dpi_mask(dpi, DPI_C_LIMIT, limit->c_bottom << C_LIMIT_BOT,
  205. C_LIMIT_BOT_MASK);
  206. mtk_dpi_mask(dpi, DPI_C_LIMIT, limit->c_top << C_LIMIT_TOP,
  207. C_LIMIT_TOP_MASK);
  208. }
  209. static void mtk_dpi_config_bit_num(struct mtk_dpi *dpi,
  210. enum mtk_dpi_out_bit_num num)
  211. {
  212. u32 val;
  213. switch (num) {
  214. case MTK_DPI_OUT_BIT_NUM_8BITS:
  215. val = OUT_BIT_8;
  216. break;
  217. case MTK_DPI_OUT_BIT_NUM_10BITS:
  218. val = OUT_BIT_10;
  219. break;
  220. case MTK_DPI_OUT_BIT_NUM_12BITS:
  221. val = OUT_BIT_12;
  222. break;
  223. case MTK_DPI_OUT_BIT_NUM_16BITS:
  224. val = OUT_BIT_16;
  225. break;
  226. default:
  227. val = OUT_BIT_8;
  228. break;
  229. }
  230. mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << OUT_BIT,
  231. OUT_BIT_MASK);
  232. }
  233. static void mtk_dpi_config_yc_map(struct mtk_dpi *dpi,
  234. enum mtk_dpi_out_yc_map map)
  235. {
  236. u32 val;
  237. switch (map) {
  238. case MTK_DPI_OUT_YC_MAP_RGB:
  239. val = YC_MAP_RGB;
  240. break;
  241. case MTK_DPI_OUT_YC_MAP_CYCY:
  242. val = YC_MAP_CYCY;
  243. break;
  244. case MTK_DPI_OUT_YC_MAP_YCYC:
  245. val = YC_MAP_YCYC;
  246. break;
  247. case MTK_DPI_OUT_YC_MAP_CY:
  248. val = YC_MAP_CY;
  249. break;
  250. case MTK_DPI_OUT_YC_MAP_YC:
  251. val = YC_MAP_YC;
  252. break;
  253. default:
  254. val = YC_MAP_RGB;
  255. break;
  256. }
  257. mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << YC_MAP, YC_MAP_MASK);
  258. }
  259. static void mtk_dpi_config_channel_swap(struct mtk_dpi *dpi,
  260. enum mtk_dpi_out_channel_swap swap)
  261. {
  262. u32 val;
  263. switch (swap) {
  264. case MTK_DPI_OUT_CHANNEL_SWAP_RGB:
  265. val = SWAP_RGB;
  266. break;
  267. case MTK_DPI_OUT_CHANNEL_SWAP_GBR:
  268. val = SWAP_GBR;
  269. break;
  270. case MTK_DPI_OUT_CHANNEL_SWAP_BRG:
  271. val = SWAP_BRG;
  272. break;
  273. case MTK_DPI_OUT_CHANNEL_SWAP_RBG:
  274. val = SWAP_RBG;
  275. break;
  276. case MTK_DPI_OUT_CHANNEL_SWAP_GRB:
  277. val = SWAP_GRB;
  278. break;
  279. case MTK_DPI_OUT_CHANNEL_SWAP_BGR:
  280. val = SWAP_BGR;
  281. break;
  282. default:
  283. val = SWAP_RGB;
  284. break;
  285. }
  286. mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << CH_SWAP, CH_SWAP_MASK);
  287. }
  288. static void mtk_dpi_config_yuv422_enable(struct mtk_dpi *dpi, bool enable)
  289. {
  290. mtk_dpi_mask(dpi, DPI_CON, enable ? YUV422_EN : 0, YUV422_EN);
  291. }
  292. static void mtk_dpi_config_csc_enable(struct mtk_dpi *dpi, bool enable)
  293. {
  294. mtk_dpi_mask(dpi, DPI_CON, enable ? CSC_ENABLE : 0, CSC_ENABLE);
  295. }
  296. static void mtk_dpi_config_swap_input(struct mtk_dpi *dpi, bool enable)
  297. {
  298. mtk_dpi_mask(dpi, DPI_CON, enable ? IN_RB_SWAP : 0, IN_RB_SWAP);
  299. }
  300. static void mtk_dpi_config_2n_h_fre(struct mtk_dpi *dpi)
  301. {
  302. mtk_dpi_mask(dpi, DPI_H_FRE_CON, H_FRE_2N, H_FRE_2N);
  303. }
  304. static void mtk_dpi_config_color_format(struct mtk_dpi *dpi,
  305. enum mtk_dpi_out_color_format format)
  306. {
  307. if ((format == MTK_DPI_COLOR_FORMAT_YCBCR_444) ||
  308. (format == MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL)) {
  309. mtk_dpi_config_yuv422_enable(dpi, false);
  310. mtk_dpi_config_csc_enable(dpi, true);
  311. mtk_dpi_config_swap_input(dpi, false);
  312. mtk_dpi_config_channel_swap(dpi, MTK_DPI_OUT_CHANNEL_SWAP_BGR);
  313. } else if ((format == MTK_DPI_COLOR_FORMAT_YCBCR_422) ||
  314. (format == MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL)) {
  315. mtk_dpi_config_yuv422_enable(dpi, true);
  316. mtk_dpi_config_csc_enable(dpi, true);
  317. mtk_dpi_config_swap_input(dpi, true);
  318. mtk_dpi_config_channel_swap(dpi, MTK_DPI_OUT_CHANNEL_SWAP_RGB);
  319. } else {
  320. mtk_dpi_config_yuv422_enable(dpi, false);
  321. mtk_dpi_config_csc_enable(dpi, false);
  322. mtk_dpi_config_swap_input(dpi, false);
  323. mtk_dpi_config_channel_swap(dpi, MTK_DPI_OUT_CHANNEL_SWAP_RGB);
  324. }
  325. }
  326. static void mtk_dpi_power_off(struct mtk_dpi *dpi, enum mtk_dpi_power_ctl pctl)
  327. {
  328. dpi->power_ctl &= ~pctl;
  329. if ((dpi->power_ctl & DPI_POWER_START) ||
  330. (dpi->power_ctl & DPI_POWER_ENABLE))
  331. return;
  332. if (!dpi->power_sta)
  333. return;
  334. mtk_dpi_disable(dpi);
  335. clk_disable_unprepare(dpi->pixel_clk);
  336. clk_disable_unprepare(dpi->engine_clk);
  337. dpi->power_sta = false;
  338. }
  339. static int mtk_dpi_power_on(struct mtk_dpi *dpi, enum mtk_dpi_power_ctl pctl)
  340. {
  341. int ret;
  342. dpi->power_ctl |= pctl;
  343. if (!(dpi->power_ctl & DPI_POWER_START) &&
  344. !(dpi->power_ctl & DPI_POWER_ENABLE))
  345. return 0;
  346. if (dpi->power_sta)
  347. return 0;
  348. ret = clk_prepare_enable(dpi->engine_clk);
  349. if (ret) {
  350. dev_err(dpi->dev, "Failed to enable engine clock: %d\n", ret);
  351. goto err_eng;
  352. }
  353. ret = clk_prepare_enable(dpi->pixel_clk);
  354. if (ret) {
  355. dev_err(dpi->dev, "Failed to enable pixel clock: %d\n", ret);
  356. goto err_pixel;
  357. }
  358. mtk_dpi_enable(dpi);
  359. dpi->power_sta = true;
  360. return 0;
  361. err_pixel:
  362. clk_disable_unprepare(dpi->engine_clk);
  363. err_eng:
  364. dpi->power_ctl &= ~pctl;
  365. return ret;
  366. }
  367. static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
  368. struct drm_display_mode *mode)
  369. {
  370. struct mtk_dpi_yc_limit limit;
  371. struct mtk_dpi_polarities dpi_pol;
  372. struct mtk_dpi_sync_param hsync;
  373. struct mtk_dpi_sync_param vsync_lodd = { 0 };
  374. struct mtk_dpi_sync_param vsync_leven = { 0 };
  375. struct mtk_dpi_sync_param vsync_rodd = { 0 };
  376. struct mtk_dpi_sync_param vsync_reven = { 0 };
  377. unsigned long pix_rate;
  378. unsigned long pll_rate;
  379. unsigned int factor;
  380. /* let pll_rate can fix the valid range of tvdpll (1G~2GHz) */
  381. pix_rate = 1000UL * mode->clock;
  382. if (mode->clock <= 27000)
  383. factor = 16 * 3;
  384. else if (mode->clock <= 84000)
  385. factor = 8 * 3;
  386. else if (mode->clock <= 167000)
  387. factor = 4 * 3;
  388. else
  389. factor = 2 * 3;
  390. pll_rate = pix_rate * factor;
  391. dev_dbg(dpi->dev, "Want PLL %lu Hz, pixel clock %lu Hz\n",
  392. pll_rate, pix_rate);
  393. clk_set_rate(dpi->tvd_clk, pll_rate);
  394. pll_rate = clk_get_rate(dpi->tvd_clk);
  395. pix_rate = pll_rate / factor;
  396. clk_set_rate(dpi->pixel_clk, pix_rate);
  397. pix_rate = clk_get_rate(dpi->pixel_clk);
  398. dev_dbg(dpi->dev, "Got PLL %lu Hz, pixel clock %lu Hz\n",
  399. pll_rate, pix_rate);
  400. limit.c_bottom = 0x0010;
  401. limit.c_top = 0x0FE0;
  402. limit.y_bottom = 0x0010;
  403. limit.y_top = 0x0FE0;
  404. dpi_pol.ck_pol = MTK_DPI_POLARITY_FALLING;
  405. dpi_pol.de_pol = MTK_DPI_POLARITY_RISING;
  406. dpi_pol.hsync_pol = mode->flags & DRM_MODE_FLAG_PHSYNC ?
  407. MTK_DPI_POLARITY_FALLING : MTK_DPI_POLARITY_RISING;
  408. dpi_pol.vsync_pol = mode->flags & DRM_MODE_FLAG_PVSYNC ?
  409. MTK_DPI_POLARITY_FALLING : MTK_DPI_POLARITY_RISING;
  410. hsync.sync_width = mode->hsync_end - mode->hsync_start;
  411. hsync.back_porch = mode->htotal - mode->hsync_end;
  412. hsync.front_porch = mode->hsync_start - mode->hdisplay;
  413. hsync.shift_half_line = false;
  414. vsync_lodd.sync_width = mode->vsync_end - mode->vsync_start;
  415. vsync_lodd.back_porch = mode->vtotal - mode->vsync_end;
  416. vsync_lodd.front_porch = mode->vsync_start - mode->vdisplay;
  417. vsync_lodd.shift_half_line = false;
  418. if (mode->flags & DRM_MODE_FLAG_INTERLACE &&
  419. mode->flags & DRM_MODE_FLAG_3D_MASK) {
  420. vsync_leven = vsync_lodd;
  421. vsync_rodd = vsync_lodd;
  422. vsync_reven = vsync_lodd;
  423. vsync_leven.shift_half_line = true;
  424. vsync_reven.shift_half_line = true;
  425. } else if (mode->flags & DRM_MODE_FLAG_INTERLACE &&
  426. !(mode->flags & DRM_MODE_FLAG_3D_MASK)) {
  427. vsync_leven = vsync_lodd;
  428. vsync_leven.shift_half_line = true;
  429. } else if (!(mode->flags & DRM_MODE_FLAG_INTERLACE) &&
  430. mode->flags & DRM_MODE_FLAG_3D_MASK) {
  431. vsync_rodd = vsync_lodd;
  432. }
  433. mtk_dpi_sw_reset(dpi, true);
  434. mtk_dpi_config_pol(dpi, &dpi_pol);
  435. mtk_dpi_config_hsync(dpi, &hsync);
  436. mtk_dpi_config_vsync_lodd(dpi, &vsync_lodd);
  437. mtk_dpi_config_vsync_rodd(dpi, &vsync_rodd);
  438. mtk_dpi_config_vsync_leven(dpi, &vsync_leven);
  439. mtk_dpi_config_vsync_reven(dpi, &vsync_reven);
  440. mtk_dpi_config_3d(dpi, !!(mode->flags & DRM_MODE_FLAG_3D_MASK));
  441. mtk_dpi_config_interface(dpi, !!(mode->flags &
  442. DRM_MODE_FLAG_INTERLACE));
  443. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  444. mtk_dpi_config_fb_size(dpi, mode->hdisplay, mode->vdisplay / 2);
  445. else
  446. mtk_dpi_config_fb_size(dpi, mode->hdisplay, mode->vdisplay);
  447. mtk_dpi_config_channel_limit(dpi, &limit);
  448. mtk_dpi_config_bit_num(dpi, dpi->bit_num);
  449. mtk_dpi_config_channel_swap(dpi, dpi->channel_swap);
  450. mtk_dpi_config_yc_map(dpi, dpi->yc_map);
  451. mtk_dpi_config_color_format(dpi, dpi->color_format);
  452. mtk_dpi_config_2n_h_fre(dpi);
  453. mtk_dpi_sw_reset(dpi, false);
  454. return 0;
  455. }
  456. static void mtk_dpi_encoder_destroy(struct drm_encoder *encoder)
  457. {
  458. drm_encoder_cleanup(encoder);
  459. }
  460. static const struct drm_encoder_funcs mtk_dpi_encoder_funcs = {
  461. .destroy = mtk_dpi_encoder_destroy,
  462. };
  463. static bool mtk_dpi_encoder_mode_fixup(struct drm_encoder *encoder,
  464. const struct drm_display_mode *mode,
  465. struct drm_display_mode *adjusted_mode)
  466. {
  467. return true;
  468. }
  469. static void mtk_dpi_encoder_mode_set(struct drm_encoder *encoder,
  470. struct drm_display_mode *mode,
  471. struct drm_display_mode *adjusted_mode)
  472. {
  473. struct mtk_dpi *dpi = mtk_dpi_from_encoder(encoder);
  474. drm_mode_copy(&dpi->mode, adjusted_mode);
  475. }
  476. static void mtk_dpi_encoder_disable(struct drm_encoder *encoder)
  477. {
  478. struct mtk_dpi *dpi = mtk_dpi_from_encoder(encoder);
  479. mtk_dpi_power_off(dpi, DPI_POWER_ENABLE);
  480. }
  481. static void mtk_dpi_encoder_enable(struct drm_encoder *encoder)
  482. {
  483. struct mtk_dpi *dpi = mtk_dpi_from_encoder(encoder);
  484. mtk_dpi_power_on(dpi, DPI_POWER_ENABLE);
  485. mtk_dpi_set_display_mode(dpi, &dpi->mode);
  486. }
  487. static int mtk_dpi_atomic_check(struct drm_encoder *encoder,
  488. struct drm_crtc_state *crtc_state,
  489. struct drm_connector_state *conn_state)
  490. {
  491. return 0;
  492. }
  493. static const struct drm_encoder_helper_funcs mtk_dpi_encoder_helper_funcs = {
  494. .mode_fixup = mtk_dpi_encoder_mode_fixup,
  495. .mode_set = mtk_dpi_encoder_mode_set,
  496. .disable = mtk_dpi_encoder_disable,
  497. .enable = mtk_dpi_encoder_enable,
  498. .atomic_check = mtk_dpi_atomic_check,
  499. };
  500. static void mtk_dpi_start(struct mtk_ddp_comp *comp)
  501. {
  502. struct mtk_dpi *dpi = container_of(comp, struct mtk_dpi, ddp_comp);
  503. mtk_dpi_power_on(dpi, DPI_POWER_START);
  504. }
  505. static void mtk_dpi_stop(struct mtk_ddp_comp *comp)
  506. {
  507. struct mtk_dpi *dpi = container_of(comp, struct mtk_dpi, ddp_comp);
  508. mtk_dpi_power_off(dpi, DPI_POWER_START);
  509. }
  510. static const struct mtk_ddp_comp_funcs mtk_dpi_funcs = {
  511. .start = mtk_dpi_start,
  512. .stop = mtk_dpi_stop,
  513. };
  514. static int mtk_dpi_bind(struct device *dev, struct device *master, void *data)
  515. {
  516. struct mtk_dpi *dpi = dev_get_drvdata(dev);
  517. struct drm_device *drm_dev = data;
  518. int ret;
  519. ret = mtk_ddp_comp_register(drm_dev, &dpi->ddp_comp);
  520. if (ret < 0) {
  521. dev_err(dev, "Failed to register component %pOF: %d\n",
  522. dev->of_node, ret);
  523. return ret;
  524. }
  525. ret = drm_encoder_init(drm_dev, &dpi->encoder, &mtk_dpi_encoder_funcs,
  526. DRM_MODE_ENCODER_TMDS, NULL);
  527. if (ret) {
  528. dev_err(dev, "Failed to initialize decoder: %d\n", ret);
  529. goto err_unregister;
  530. }
  531. drm_encoder_helper_add(&dpi->encoder, &mtk_dpi_encoder_helper_funcs);
  532. /* Currently DPI0 is fixed to be driven by OVL1 */
  533. dpi->encoder.possible_crtcs = BIT(1);
  534. ret = drm_bridge_attach(&dpi->encoder, dpi->bridge, NULL);
  535. if (ret) {
  536. dev_err(dev, "Failed to attach bridge: %d\n", ret);
  537. goto err_cleanup;
  538. }
  539. dpi->bit_num = MTK_DPI_OUT_BIT_NUM_8BITS;
  540. dpi->channel_swap = MTK_DPI_OUT_CHANNEL_SWAP_RGB;
  541. dpi->yc_map = MTK_DPI_OUT_YC_MAP_RGB;
  542. dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB;
  543. return 0;
  544. err_cleanup:
  545. drm_encoder_cleanup(&dpi->encoder);
  546. err_unregister:
  547. mtk_ddp_comp_unregister(drm_dev, &dpi->ddp_comp);
  548. return ret;
  549. }
  550. static void mtk_dpi_unbind(struct device *dev, struct device *master,
  551. void *data)
  552. {
  553. struct mtk_dpi *dpi = dev_get_drvdata(dev);
  554. struct drm_device *drm_dev = data;
  555. drm_encoder_cleanup(&dpi->encoder);
  556. mtk_ddp_comp_unregister(drm_dev, &dpi->ddp_comp);
  557. }
  558. static const struct component_ops mtk_dpi_component_ops = {
  559. .bind = mtk_dpi_bind,
  560. .unbind = mtk_dpi_unbind,
  561. };
  562. static int mtk_dpi_probe(struct platform_device *pdev)
  563. {
  564. struct device *dev = &pdev->dev;
  565. struct mtk_dpi *dpi;
  566. struct resource *mem;
  567. struct device_node *bridge_node;
  568. int comp_id;
  569. int ret;
  570. dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL);
  571. if (!dpi)
  572. return -ENOMEM;
  573. dpi->dev = dev;
  574. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  575. dpi->regs = devm_ioremap_resource(dev, mem);
  576. if (IS_ERR(dpi->regs)) {
  577. ret = PTR_ERR(dpi->regs);
  578. dev_err(dev, "Failed to ioremap mem resource: %d\n", ret);
  579. return ret;
  580. }
  581. dpi->engine_clk = devm_clk_get(dev, "engine");
  582. if (IS_ERR(dpi->engine_clk)) {
  583. ret = PTR_ERR(dpi->engine_clk);
  584. dev_err(dev, "Failed to get engine clock: %d\n", ret);
  585. return ret;
  586. }
  587. dpi->pixel_clk = devm_clk_get(dev, "pixel");
  588. if (IS_ERR(dpi->pixel_clk)) {
  589. ret = PTR_ERR(dpi->pixel_clk);
  590. dev_err(dev, "Failed to get pixel clock: %d\n", ret);
  591. return ret;
  592. }
  593. dpi->tvd_clk = devm_clk_get(dev, "pll");
  594. if (IS_ERR(dpi->tvd_clk)) {
  595. ret = PTR_ERR(dpi->tvd_clk);
  596. dev_err(dev, "Failed to get tvdpll clock: %d\n", ret);
  597. return ret;
  598. }
  599. dpi->irq = platform_get_irq(pdev, 0);
  600. if (dpi->irq <= 0) {
  601. dev_err(dev, "Failed to get irq: %d\n", dpi->irq);
  602. return -EINVAL;
  603. }
  604. bridge_node = of_graph_get_remote_node(dev->of_node, 0, 0);
  605. if (!bridge_node)
  606. return -ENODEV;
  607. dev_info(dev, "Found bridge node: %pOF\n", bridge_node);
  608. dpi->bridge = of_drm_find_bridge(bridge_node);
  609. of_node_put(bridge_node);
  610. if (!dpi->bridge)
  611. return -EPROBE_DEFER;
  612. comp_id = mtk_ddp_comp_get_id(dev->of_node, MTK_DPI);
  613. if (comp_id < 0) {
  614. dev_err(dev, "Failed to identify by alias: %d\n", comp_id);
  615. return comp_id;
  616. }
  617. ret = mtk_ddp_comp_init(dev, dev->of_node, &dpi->ddp_comp, comp_id,
  618. &mtk_dpi_funcs);
  619. if (ret) {
  620. dev_err(dev, "Failed to initialize component: %d\n", ret);
  621. return ret;
  622. }
  623. platform_set_drvdata(pdev, dpi);
  624. ret = component_add(dev, &mtk_dpi_component_ops);
  625. if (ret) {
  626. dev_err(dev, "Failed to add component: %d\n", ret);
  627. return ret;
  628. }
  629. return 0;
  630. }
  631. static int mtk_dpi_remove(struct platform_device *pdev)
  632. {
  633. component_del(&pdev->dev, &mtk_dpi_component_ops);
  634. return 0;
  635. }
  636. static const struct of_device_id mtk_dpi_of_ids[] = {
  637. { .compatible = "mediatek,mt8173-dpi", },
  638. {}
  639. };
  640. struct platform_driver mtk_dpi_driver = {
  641. .probe = mtk_dpi_probe,
  642. .remove = mtk_dpi_remove,
  643. .driver = {
  644. .name = "mediatek-dpi",
  645. .of_match_table = mtk_dpi_of_ids,
  646. },
  647. };