intel_bios.c 51 KB

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  1. /*
  2. * Copyright © 2006 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21. * SOFTWARE.
  22. *
  23. * Authors:
  24. * Eric Anholt <eric@anholt.net>
  25. *
  26. */
  27. #include <drm/drm_dp_helper.h>
  28. #include <drm/drmP.h>
  29. #include <drm/i915_drm.h>
  30. #include "i915_drv.h"
  31. #define _INTEL_BIOS_PRIVATE
  32. #include "intel_vbt_defs.h"
  33. /**
  34. * DOC: Video BIOS Table (VBT)
  35. *
  36. * The Video BIOS Table, or VBT, provides platform and board specific
  37. * configuration information to the driver that is not discoverable or available
  38. * through other means. The configuration is mostly related to display
  39. * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
  40. * the PCI ROM.
  41. *
  42. * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
  43. * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
  44. * contain the actual configuration information. The VBT Header, and thus the
  45. * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
  46. * BDB Header. The data blocks are concatenated after the BDB Header. The data
  47. * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
  48. * data. (Block 53, the MIPI Sequence Block is an exception.)
  49. *
  50. * The driver parses the VBT during load. The relevant information is stored in
  51. * driver private data for ease of use, and the actual VBT is not read after
  52. * that.
  53. */
  54. #define SLAVE_ADDR1 0x70
  55. #define SLAVE_ADDR2 0x72
  56. /* Get BDB block size given a pointer to Block ID. */
  57. static u32 _get_blocksize(const u8 *block_base)
  58. {
  59. /* The MIPI Sequence Block v3+ has a separate size field. */
  60. if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
  61. return *((const u32 *)(block_base + 4));
  62. else
  63. return *((const u16 *)(block_base + 1));
  64. }
  65. /* Get BDB block size give a pointer to data after Block ID and Block Size. */
  66. static u32 get_blocksize(const void *block_data)
  67. {
  68. return _get_blocksize(block_data - 3);
  69. }
  70. static const void *
  71. find_section(const void *_bdb, int section_id)
  72. {
  73. const struct bdb_header *bdb = _bdb;
  74. const u8 *base = _bdb;
  75. int index = 0;
  76. u32 total, current_size;
  77. u8 current_id;
  78. /* skip to first section */
  79. index += bdb->header_size;
  80. total = bdb->bdb_size;
  81. /* walk the sections looking for section_id */
  82. while (index + 3 < total) {
  83. current_id = *(base + index);
  84. current_size = _get_blocksize(base + index);
  85. index += 3;
  86. if (index + current_size > total)
  87. return NULL;
  88. if (current_id == section_id)
  89. return base + index;
  90. index += current_size;
  91. }
  92. return NULL;
  93. }
  94. static void
  95. fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
  96. const struct lvds_dvo_timing *dvo_timing)
  97. {
  98. panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
  99. dvo_timing->hactive_lo;
  100. panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
  101. ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
  102. panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
  103. ((dvo_timing->hsync_pulse_width_hi << 8) |
  104. dvo_timing->hsync_pulse_width_lo);
  105. panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
  106. ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
  107. panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
  108. dvo_timing->vactive_lo;
  109. panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
  110. ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
  111. panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
  112. ((dvo_timing->vsync_pulse_width_hi << 4) |
  113. dvo_timing->vsync_pulse_width_lo);
  114. panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
  115. ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
  116. panel_fixed_mode->clock = dvo_timing->clock * 10;
  117. panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
  118. if (dvo_timing->hsync_positive)
  119. panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
  120. else
  121. panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
  122. if (dvo_timing->vsync_positive)
  123. panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
  124. else
  125. panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
  126. panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
  127. dvo_timing->himage_lo;
  128. panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
  129. dvo_timing->vimage_lo;
  130. /* Some VBTs have bogus h/vtotal values */
  131. if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
  132. panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
  133. if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
  134. panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
  135. drm_mode_set_name(panel_fixed_mode);
  136. }
  137. static const struct lvds_dvo_timing *
  138. get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
  139. const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
  140. int index)
  141. {
  142. /*
  143. * the size of fp_timing varies on the different platform.
  144. * So calculate the DVO timing relative offset in LVDS data
  145. * entry to get the DVO timing entry
  146. */
  147. int lfp_data_size =
  148. lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
  149. lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
  150. int dvo_timing_offset =
  151. lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
  152. lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
  153. char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
  154. return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
  155. }
  156. /* get lvds_fp_timing entry
  157. * this function may return NULL if the corresponding entry is invalid
  158. */
  159. static const struct lvds_fp_timing *
  160. get_lvds_fp_timing(const struct bdb_header *bdb,
  161. const struct bdb_lvds_lfp_data *data,
  162. const struct bdb_lvds_lfp_data_ptrs *ptrs,
  163. int index)
  164. {
  165. size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
  166. u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
  167. size_t ofs;
  168. if (index >= ARRAY_SIZE(ptrs->ptr))
  169. return NULL;
  170. ofs = ptrs->ptr[index].fp_timing_offset;
  171. if (ofs < data_ofs ||
  172. ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
  173. return NULL;
  174. return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
  175. }
  176. /* Try to find integrated panel data */
  177. static void
  178. parse_lfp_panel_data(struct drm_i915_private *dev_priv,
  179. const struct bdb_header *bdb)
  180. {
  181. const struct bdb_lvds_options *lvds_options;
  182. const struct bdb_lvds_lfp_data *lvds_lfp_data;
  183. const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
  184. const struct lvds_dvo_timing *panel_dvo_timing;
  185. const struct lvds_fp_timing *fp_timing;
  186. struct drm_display_mode *panel_fixed_mode;
  187. int panel_type;
  188. int drrs_mode;
  189. int ret;
  190. lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
  191. if (!lvds_options)
  192. return;
  193. dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
  194. ret = intel_opregion_get_panel_type(dev_priv);
  195. if (ret >= 0) {
  196. WARN_ON(ret > 0xf);
  197. panel_type = ret;
  198. DRM_DEBUG_KMS("Panel type: %d (OpRegion)\n", panel_type);
  199. } else {
  200. if (lvds_options->panel_type > 0xf) {
  201. DRM_DEBUG_KMS("Invalid VBT panel type 0x%x\n",
  202. lvds_options->panel_type);
  203. return;
  204. }
  205. panel_type = lvds_options->panel_type;
  206. DRM_DEBUG_KMS("Panel type: %d (VBT)\n", panel_type);
  207. }
  208. dev_priv->vbt.panel_type = panel_type;
  209. drrs_mode = (lvds_options->dps_panel_type_bits
  210. >> (panel_type * 2)) & MODE_MASK;
  211. /*
  212. * VBT has static DRRS = 0 and seamless DRRS = 2.
  213. * The below piece of code is required to adjust vbt.drrs_type
  214. * to match the enum drrs_support_type.
  215. */
  216. switch (drrs_mode) {
  217. case 0:
  218. dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
  219. DRM_DEBUG_KMS("DRRS supported mode is static\n");
  220. break;
  221. case 2:
  222. dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
  223. DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
  224. break;
  225. default:
  226. dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
  227. DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
  228. break;
  229. }
  230. lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
  231. if (!lvds_lfp_data)
  232. return;
  233. lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
  234. if (!lvds_lfp_data_ptrs)
  235. return;
  236. dev_priv->vbt.lvds_vbt = 1;
  237. panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
  238. lvds_lfp_data_ptrs,
  239. panel_type);
  240. panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
  241. if (!panel_fixed_mode)
  242. return;
  243. fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
  244. dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
  245. DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
  246. drm_mode_debug_printmodeline(panel_fixed_mode);
  247. fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
  248. lvds_lfp_data_ptrs,
  249. panel_type);
  250. if (fp_timing) {
  251. /* check the resolution, just to be sure */
  252. if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
  253. fp_timing->y_res == panel_fixed_mode->vdisplay) {
  254. dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
  255. DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
  256. dev_priv->vbt.bios_lvds_val);
  257. }
  258. }
  259. }
  260. static void
  261. parse_lfp_backlight(struct drm_i915_private *dev_priv,
  262. const struct bdb_header *bdb)
  263. {
  264. const struct bdb_lfp_backlight_data *backlight_data;
  265. const struct bdb_lfp_backlight_data_entry *entry;
  266. int panel_type = dev_priv->vbt.panel_type;
  267. backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
  268. if (!backlight_data)
  269. return;
  270. if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
  271. DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
  272. backlight_data->entry_size);
  273. return;
  274. }
  275. entry = &backlight_data->data[panel_type];
  276. dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
  277. if (!dev_priv->vbt.backlight.present) {
  278. DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
  279. entry->type);
  280. return;
  281. }
  282. dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
  283. if (bdb->version >= 191 &&
  284. get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
  285. const struct bdb_lfp_backlight_control_method *method;
  286. method = &backlight_data->backlight_control[panel_type];
  287. dev_priv->vbt.backlight.type = method->type;
  288. dev_priv->vbt.backlight.controller = method->controller;
  289. }
  290. dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
  291. dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
  292. dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
  293. DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
  294. "active %s, min brightness %u, level %u, controller %u\n",
  295. dev_priv->vbt.backlight.pwm_freq_hz,
  296. dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
  297. dev_priv->vbt.backlight.min_brightness,
  298. backlight_data->level[panel_type],
  299. dev_priv->vbt.backlight.controller);
  300. }
  301. /* Try to find sdvo panel data */
  302. static void
  303. parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
  304. const struct bdb_header *bdb)
  305. {
  306. const struct lvds_dvo_timing *dvo_timing;
  307. struct drm_display_mode *panel_fixed_mode;
  308. int index;
  309. index = i915_modparams.vbt_sdvo_panel_type;
  310. if (index == -2) {
  311. DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
  312. return;
  313. }
  314. if (index == -1) {
  315. const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
  316. sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
  317. if (!sdvo_lvds_options)
  318. return;
  319. index = sdvo_lvds_options->panel_type;
  320. }
  321. dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
  322. if (!dvo_timing)
  323. return;
  324. panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
  325. if (!panel_fixed_mode)
  326. return;
  327. fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
  328. dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
  329. DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
  330. drm_mode_debug_printmodeline(panel_fixed_mode);
  331. }
  332. static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
  333. bool alternate)
  334. {
  335. switch (INTEL_INFO(dev_priv)->gen) {
  336. case 2:
  337. return alternate ? 66667 : 48000;
  338. case 3:
  339. case 4:
  340. return alternate ? 100000 : 96000;
  341. default:
  342. return alternate ? 100000 : 120000;
  343. }
  344. }
  345. static void
  346. parse_general_features(struct drm_i915_private *dev_priv,
  347. const struct bdb_header *bdb)
  348. {
  349. const struct bdb_general_features *general;
  350. general = find_section(bdb, BDB_GENERAL_FEATURES);
  351. if (!general)
  352. return;
  353. dev_priv->vbt.int_tv_support = general->int_tv_support;
  354. /* int_crt_support can't be trusted on earlier platforms */
  355. if (bdb->version >= 155 &&
  356. (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
  357. dev_priv->vbt.int_crt_support = general->int_crt_support;
  358. dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
  359. dev_priv->vbt.lvds_ssc_freq =
  360. intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
  361. dev_priv->vbt.display_clock_mode = general->display_clock_mode;
  362. dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
  363. DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
  364. dev_priv->vbt.int_tv_support,
  365. dev_priv->vbt.int_crt_support,
  366. dev_priv->vbt.lvds_use_ssc,
  367. dev_priv->vbt.lvds_ssc_freq,
  368. dev_priv->vbt.display_clock_mode,
  369. dev_priv->vbt.fdi_rx_polarity_inverted);
  370. }
  371. static const struct child_device_config *
  372. child_device_ptr(const struct bdb_general_definitions *defs, int i)
  373. {
  374. return (const void *) &defs->devices[i * defs->child_dev_size];
  375. }
  376. static void
  377. parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)
  378. {
  379. struct sdvo_device_mapping *mapping;
  380. const struct child_device_config *child;
  381. int i, count = 0;
  382. /*
  383. * Only parse SDVO mappings on gens that could have SDVO. This isn't
  384. * accurate and doesn't have to be, as long as it's not too strict.
  385. */
  386. if (!IS_GEN(dev_priv, 3, 7)) {
  387. DRM_DEBUG_KMS("Skipping SDVO device mapping\n");
  388. return;
  389. }
  390. for (i = 0, count = 0; i < dev_priv->vbt.child_dev_num; i++) {
  391. child = dev_priv->vbt.child_dev + i;
  392. if (child->slave_addr != SLAVE_ADDR1 &&
  393. child->slave_addr != SLAVE_ADDR2) {
  394. /*
  395. * If the slave address is neither 0x70 nor 0x72,
  396. * it is not a SDVO device. Skip it.
  397. */
  398. continue;
  399. }
  400. if (child->dvo_port != DEVICE_PORT_DVOB &&
  401. child->dvo_port != DEVICE_PORT_DVOC) {
  402. /* skip the incorrect SDVO port */
  403. DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
  404. continue;
  405. }
  406. DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
  407. " %s port\n",
  408. child->slave_addr,
  409. (child->dvo_port == DEVICE_PORT_DVOB) ?
  410. "SDVOB" : "SDVOC");
  411. mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];
  412. if (!mapping->initialized) {
  413. mapping->dvo_port = child->dvo_port;
  414. mapping->slave_addr = child->slave_addr;
  415. mapping->dvo_wiring = child->dvo_wiring;
  416. mapping->ddc_pin = child->ddc_pin;
  417. mapping->i2c_pin = child->i2c_pin;
  418. mapping->initialized = 1;
  419. DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
  420. mapping->dvo_port,
  421. mapping->slave_addr,
  422. mapping->dvo_wiring,
  423. mapping->ddc_pin,
  424. mapping->i2c_pin);
  425. } else {
  426. DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
  427. "two SDVO device.\n");
  428. }
  429. if (child->slave2_addr) {
  430. /* Maybe this is a SDVO device with multiple inputs */
  431. /* And the mapping info is not added */
  432. DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
  433. " is a SDVO device with multiple inputs.\n");
  434. }
  435. count++;
  436. }
  437. if (!count) {
  438. /* No SDVO device info is found */
  439. DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
  440. }
  441. }
  442. static void
  443. parse_driver_features(struct drm_i915_private *dev_priv,
  444. const struct bdb_header *bdb)
  445. {
  446. const struct bdb_driver_features *driver;
  447. driver = find_section(bdb, BDB_DRIVER_FEATURES);
  448. if (!driver)
  449. return;
  450. if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
  451. dev_priv->vbt.edp.support = 1;
  452. DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
  453. /*
  454. * If DRRS is not supported, drrs_type has to be set to 0.
  455. * This is because, VBT is configured in such a way that
  456. * static DRRS is 0 and DRRS not supported is represented by
  457. * driver->drrs_enabled=false
  458. */
  459. if (!driver->drrs_enabled)
  460. dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
  461. }
  462. static void
  463. parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
  464. {
  465. const struct bdb_edp *edp;
  466. const struct edp_power_seq *edp_pps;
  467. const struct edp_fast_link_params *edp_link_params;
  468. int panel_type = dev_priv->vbt.panel_type;
  469. edp = find_section(bdb, BDB_EDP);
  470. if (!edp) {
  471. if (dev_priv->vbt.edp.support)
  472. DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
  473. return;
  474. }
  475. switch ((edp->color_depth >> (panel_type * 2)) & 3) {
  476. case EDP_18BPP:
  477. dev_priv->vbt.edp.bpp = 18;
  478. break;
  479. case EDP_24BPP:
  480. dev_priv->vbt.edp.bpp = 24;
  481. break;
  482. case EDP_30BPP:
  483. dev_priv->vbt.edp.bpp = 30;
  484. break;
  485. }
  486. /* Get the eDP sequencing and link info */
  487. edp_pps = &edp->power_seqs[panel_type];
  488. edp_link_params = &edp->fast_link_params[panel_type];
  489. dev_priv->vbt.edp.pps = *edp_pps;
  490. switch (edp_link_params->rate) {
  491. case EDP_RATE_1_62:
  492. dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
  493. break;
  494. case EDP_RATE_2_7:
  495. dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
  496. break;
  497. default:
  498. DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
  499. edp_link_params->rate);
  500. break;
  501. }
  502. switch (edp_link_params->lanes) {
  503. case EDP_LANE_1:
  504. dev_priv->vbt.edp.lanes = 1;
  505. break;
  506. case EDP_LANE_2:
  507. dev_priv->vbt.edp.lanes = 2;
  508. break;
  509. case EDP_LANE_4:
  510. dev_priv->vbt.edp.lanes = 4;
  511. break;
  512. default:
  513. DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
  514. edp_link_params->lanes);
  515. break;
  516. }
  517. switch (edp_link_params->preemphasis) {
  518. case EDP_PREEMPHASIS_NONE:
  519. dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
  520. break;
  521. case EDP_PREEMPHASIS_3_5dB:
  522. dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
  523. break;
  524. case EDP_PREEMPHASIS_6dB:
  525. dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
  526. break;
  527. case EDP_PREEMPHASIS_9_5dB:
  528. dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
  529. break;
  530. default:
  531. DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
  532. edp_link_params->preemphasis);
  533. break;
  534. }
  535. switch (edp_link_params->vswing) {
  536. case EDP_VSWING_0_4V:
  537. dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
  538. break;
  539. case EDP_VSWING_0_6V:
  540. dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
  541. break;
  542. case EDP_VSWING_0_8V:
  543. dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
  544. break;
  545. case EDP_VSWING_1_2V:
  546. dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
  547. break;
  548. default:
  549. DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
  550. edp_link_params->vswing);
  551. break;
  552. }
  553. if (bdb->version >= 173) {
  554. uint8_t vswing;
  555. /* Don't read from VBT if module parameter has valid value*/
  556. if (i915_modparams.edp_vswing) {
  557. dev_priv->vbt.edp.low_vswing =
  558. i915_modparams.edp_vswing == 1;
  559. } else {
  560. vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
  561. dev_priv->vbt.edp.low_vswing = vswing == 0;
  562. }
  563. }
  564. }
  565. static void
  566. parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
  567. {
  568. const struct bdb_psr *psr;
  569. const struct psr_table *psr_table;
  570. int panel_type = dev_priv->vbt.panel_type;
  571. psr = find_section(bdb, BDB_PSR);
  572. if (!psr) {
  573. DRM_DEBUG_KMS("No PSR BDB found.\n");
  574. return;
  575. }
  576. psr_table = &psr->psr_table[panel_type];
  577. dev_priv->vbt.psr.full_link = psr_table->full_link;
  578. dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
  579. /* Allowed VBT values goes from 0 to 15 */
  580. dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
  581. psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
  582. switch (psr_table->lines_to_wait) {
  583. case 0:
  584. dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
  585. break;
  586. case 1:
  587. dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
  588. break;
  589. case 2:
  590. dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
  591. break;
  592. case 3:
  593. dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
  594. break;
  595. default:
  596. DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
  597. psr_table->lines_to_wait);
  598. break;
  599. }
  600. dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
  601. dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
  602. }
  603. static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv,
  604. u16 version, enum port port)
  605. {
  606. if (!dev_priv->vbt.dsi.config->dual_link || version < 197) {
  607. dev_priv->vbt.dsi.bl_ports = BIT(port);
  608. if (dev_priv->vbt.dsi.config->cabc_supported)
  609. dev_priv->vbt.dsi.cabc_ports = BIT(port);
  610. return;
  611. }
  612. switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) {
  613. case DL_DCS_PORT_A:
  614. dev_priv->vbt.dsi.bl_ports = BIT(PORT_A);
  615. break;
  616. case DL_DCS_PORT_C:
  617. dev_priv->vbt.dsi.bl_ports = BIT(PORT_C);
  618. break;
  619. default:
  620. case DL_DCS_PORT_A_AND_C:
  621. dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
  622. break;
  623. }
  624. if (!dev_priv->vbt.dsi.config->cabc_supported)
  625. return;
  626. switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) {
  627. case DL_DCS_PORT_A:
  628. dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A);
  629. break;
  630. case DL_DCS_PORT_C:
  631. dev_priv->vbt.dsi.cabc_ports = BIT(PORT_C);
  632. break;
  633. default:
  634. case DL_DCS_PORT_A_AND_C:
  635. dev_priv->vbt.dsi.cabc_ports =
  636. BIT(PORT_A) | BIT(PORT_C);
  637. break;
  638. }
  639. }
  640. static void
  641. parse_mipi_config(struct drm_i915_private *dev_priv,
  642. const struct bdb_header *bdb)
  643. {
  644. const struct bdb_mipi_config *start;
  645. const struct mipi_config *config;
  646. const struct mipi_pps_data *pps;
  647. int panel_type = dev_priv->vbt.panel_type;
  648. enum port port;
  649. /* parse MIPI blocks only if LFP type is MIPI */
  650. if (!intel_bios_is_dsi_present(dev_priv, &port))
  651. return;
  652. /* Initialize this to undefined indicating no generic MIPI support */
  653. dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
  654. /* Block #40 is already parsed and panel_fixed_mode is
  655. * stored in dev_priv->lfp_lvds_vbt_mode
  656. * resuse this when needed
  657. */
  658. /* Parse #52 for panel index used from panel_type already
  659. * parsed
  660. */
  661. start = find_section(bdb, BDB_MIPI_CONFIG);
  662. if (!start) {
  663. DRM_DEBUG_KMS("No MIPI config BDB found");
  664. return;
  665. }
  666. DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
  667. panel_type);
  668. /*
  669. * get hold of the correct configuration block and pps data as per
  670. * the panel_type as index
  671. */
  672. config = &start->config[panel_type];
  673. pps = &start->pps[panel_type];
  674. /* store as of now full data. Trim when we realise all is not needed */
  675. dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
  676. if (!dev_priv->vbt.dsi.config)
  677. return;
  678. dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
  679. if (!dev_priv->vbt.dsi.pps) {
  680. kfree(dev_priv->vbt.dsi.config);
  681. return;
  682. }
  683. parse_dsi_backlight_ports(dev_priv, bdb->version, port);
  684. /* We have mandatory mipi config blocks. Initialize as generic panel */
  685. dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
  686. }
  687. /* Find the sequence block and size for the given panel. */
  688. static const u8 *
  689. find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
  690. u16 panel_id, u32 *seq_size)
  691. {
  692. u32 total = get_blocksize(sequence);
  693. const u8 *data = &sequence->data[0];
  694. u8 current_id;
  695. u32 current_size;
  696. int header_size = sequence->version >= 3 ? 5 : 3;
  697. int index = 0;
  698. int i;
  699. /* skip new block size */
  700. if (sequence->version >= 3)
  701. data += 4;
  702. for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
  703. if (index + header_size > total) {
  704. DRM_ERROR("Invalid sequence block (header)\n");
  705. return NULL;
  706. }
  707. current_id = *(data + index);
  708. if (sequence->version >= 3)
  709. current_size = *((const u32 *)(data + index + 1));
  710. else
  711. current_size = *((const u16 *)(data + index + 1));
  712. index += header_size;
  713. if (index + current_size > total) {
  714. DRM_ERROR("Invalid sequence block\n");
  715. return NULL;
  716. }
  717. if (current_id == panel_id) {
  718. *seq_size = current_size;
  719. return data + index;
  720. }
  721. index += current_size;
  722. }
  723. DRM_ERROR("Sequence block detected but no valid configuration\n");
  724. return NULL;
  725. }
  726. static int goto_next_sequence(const u8 *data, int index, int total)
  727. {
  728. u16 len;
  729. /* Skip Sequence Byte. */
  730. for (index = index + 1; index < total; index += len) {
  731. u8 operation_byte = *(data + index);
  732. index++;
  733. switch (operation_byte) {
  734. case MIPI_SEQ_ELEM_END:
  735. return index;
  736. case MIPI_SEQ_ELEM_SEND_PKT:
  737. if (index + 4 > total)
  738. return 0;
  739. len = *((const u16 *)(data + index + 2)) + 4;
  740. break;
  741. case MIPI_SEQ_ELEM_DELAY:
  742. len = 4;
  743. break;
  744. case MIPI_SEQ_ELEM_GPIO:
  745. len = 2;
  746. break;
  747. case MIPI_SEQ_ELEM_I2C:
  748. if (index + 7 > total)
  749. return 0;
  750. len = *(data + index + 6) + 7;
  751. break;
  752. default:
  753. DRM_ERROR("Unknown operation byte\n");
  754. return 0;
  755. }
  756. }
  757. return 0;
  758. }
  759. static int goto_next_sequence_v3(const u8 *data, int index, int total)
  760. {
  761. int seq_end;
  762. u16 len;
  763. u32 size_of_sequence;
  764. /*
  765. * Could skip sequence based on Size of Sequence alone, but also do some
  766. * checking on the structure.
  767. */
  768. if (total < 5) {
  769. DRM_ERROR("Too small sequence size\n");
  770. return 0;
  771. }
  772. /* Skip Sequence Byte. */
  773. index++;
  774. /*
  775. * Size of Sequence. Excludes the Sequence Byte and the size itself,
  776. * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
  777. * byte.
  778. */
  779. size_of_sequence = *((const uint32_t *)(data + index));
  780. index += 4;
  781. seq_end = index + size_of_sequence;
  782. if (seq_end > total) {
  783. DRM_ERROR("Invalid sequence size\n");
  784. return 0;
  785. }
  786. for (; index < total; index += len) {
  787. u8 operation_byte = *(data + index);
  788. index++;
  789. if (operation_byte == MIPI_SEQ_ELEM_END) {
  790. if (index != seq_end) {
  791. DRM_ERROR("Invalid element structure\n");
  792. return 0;
  793. }
  794. return index;
  795. }
  796. len = *(data + index);
  797. index++;
  798. /*
  799. * FIXME: Would be nice to check elements like for v1/v2 in
  800. * goto_next_sequence() above.
  801. */
  802. switch (operation_byte) {
  803. case MIPI_SEQ_ELEM_SEND_PKT:
  804. case MIPI_SEQ_ELEM_DELAY:
  805. case MIPI_SEQ_ELEM_GPIO:
  806. case MIPI_SEQ_ELEM_I2C:
  807. case MIPI_SEQ_ELEM_SPI:
  808. case MIPI_SEQ_ELEM_PMIC:
  809. break;
  810. default:
  811. DRM_ERROR("Unknown operation byte %u\n",
  812. operation_byte);
  813. break;
  814. }
  815. }
  816. return 0;
  817. }
  818. static void
  819. parse_mipi_sequence(struct drm_i915_private *dev_priv,
  820. const struct bdb_header *bdb)
  821. {
  822. int panel_type = dev_priv->vbt.panel_type;
  823. const struct bdb_mipi_sequence *sequence;
  824. const u8 *seq_data;
  825. u32 seq_size;
  826. u8 *data;
  827. int index = 0;
  828. /* Only our generic panel driver uses the sequence block. */
  829. if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
  830. return;
  831. sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
  832. if (!sequence) {
  833. DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
  834. return;
  835. }
  836. /* Fail gracefully for forward incompatible sequence block. */
  837. if (sequence->version >= 4) {
  838. DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n",
  839. sequence->version);
  840. return;
  841. }
  842. DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version);
  843. seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
  844. if (!seq_data)
  845. return;
  846. data = kmemdup(seq_data, seq_size, GFP_KERNEL);
  847. if (!data)
  848. return;
  849. /* Parse the sequences, store pointers to each sequence. */
  850. for (;;) {
  851. u8 seq_id = *(data + index);
  852. if (seq_id == MIPI_SEQ_END)
  853. break;
  854. if (seq_id >= MIPI_SEQ_MAX) {
  855. DRM_ERROR("Unknown sequence %u\n", seq_id);
  856. goto err;
  857. }
  858. /* Log about presence of sequences we won't run. */
  859. if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
  860. DRM_DEBUG_KMS("Unsupported sequence %u\n", seq_id);
  861. dev_priv->vbt.dsi.sequence[seq_id] = data + index;
  862. if (sequence->version >= 3)
  863. index = goto_next_sequence_v3(data, index, seq_size);
  864. else
  865. index = goto_next_sequence(data, index, seq_size);
  866. if (!index) {
  867. DRM_ERROR("Invalid sequence %u\n", seq_id);
  868. goto err;
  869. }
  870. }
  871. dev_priv->vbt.dsi.data = data;
  872. dev_priv->vbt.dsi.size = seq_size;
  873. dev_priv->vbt.dsi.seq_version = sequence->version;
  874. DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n");
  875. return;
  876. err:
  877. kfree(data);
  878. memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
  879. }
  880. static u8 translate_iboost(u8 val)
  881. {
  882. static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
  883. if (val >= ARRAY_SIZE(mapping)) {
  884. DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
  885. return 0;
  886. }
  887. return mapping[val];
  888. }
  889. static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
  890. enum port port)
  891. {
  892. const struct ddi_vbt_port_info *info =
  893. &dev_priv->vbt.ddi_port_info[port];
  894. enum port p;
  895. if (!info->alternate_ddc_pin)
  896. return;
  897. for_each_port_masked(p, (1 << port) - 1) {
  898. struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p];
  899. if (info->alternate_ddc_pin != i->alternate_ddc_pin)
  900. continue;
  901. DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, "
  902. "disabling port %c DVI/HDMI support\n",
  903. port_name(p), i->alternate_ddc_pin,
  904. port_name(port), port_name(p));
  905. /*
  906. * If we have multiple ports supposedly sharing the
  907. * pin, then dvi/hdmi couldn't exist on the shared
  908. * port. Otherwise they share the same ddc bin and
  909. * system couldn't communicate with them separately.
  910. *
  911. * Due to parsing the ports in alphabetical order,
  912. * a higher port will always clobber a lower one.
  913. */
  914. i->supports_dvi = false;
  915. i->supports_hdmi = false;
  916. i->alternate_ddc_pin = 0;
  917. }
  918. }
  919. static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
  920. enum port port)
  921. {
  922. const struct ddi_vbt_port_info *info =
  923. &dev_priv->vbt.ddi_port_info[port];
  924. enum port p;
  925. if (!info->alternate_aux_channel)
  926. return;
  927. for_each_port_masked(p, (1 << port) - 1) {
  928. struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p];
  929. if (info->alternate_aux_channel != i->alternate_aux_channel)
  930. continue;
  931. DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, "
  932. "disabling port %c DP support\n",
  933. port_name(p), i->alternate_aux_channel,
  934. port_name(port), port_name(p));
  935. /*
  936. * If we have multiple ports supposedlt sharing the
  937. * aux channel, then DP couldn't exist on the shared
  938. * port. Otherwise they share the same aux channel
  939. * and system couldn't communicate with them separately.
  940. *
  941. * Due to parsing the ports in alphabetical order,
  942. * a higher port will always clobber a lower one.
  943. */
  944. i->supports_dp = false;
  945. i->alternate_aux_channel = 0;
  946. }
  947. }
  948. static const u8 cnp_ddc_pin_map[] = {
  949. [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
  950. [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
  951. [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
  952. [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
  953. };
  954. static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
  955. {
  956. if (HAS_PCH_CNP(dev_priv) &&
  957. vbt_pin > 0 && vbt_pin < ARRAY_SIZE(cnp_ddc_pin_map))
  958. return cnp_ddc_pin_map[vbt_pin];
  959. return vbt_pin;
  960. }
  961. static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
  962. u8 bdb_version)
  963. {
  964. struct child_device_config *it, *child = NULL;
  965. struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
  966. uint8_t hdmi_level_shift;
  967. int i, j;
  968. bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
  969. uint8_t aux_channel, ddc_pin;
  970. /* Each DDI port can have more than one value on the "DVO Port" field,
  971. * so look for all the possible values for each port.
  972. */
  973. int dvo_ports[][3] = {
  974. {DVO_PORT_HDMIA, DVO_PORT_DPA, -1},
  975. {DVO_PORT_HDMIB, DVO_PORT_DPB, -1},
  976. {DVO_PORT_HDMIC, DVO_PORT_DPC, -1},
  977. {DVO_PORT_HDMID, DVO_PORT_DPD, -1},
  978. {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
  979. };
  980. /*
  981. * Find the first child device to reference the port, report if more
  982. * than one found.
  983. */
  984. for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  985. it = dev_priv->vbt.child_dev + i;
  986. for (j = 0; j < 3; j++) {
  987. if (dvo_ports[port][j] == -1)
  988. break;
  989. if (it->dvo_port == dvo_ports[port][j]) {
  990. if (child) {
  991. DRM_DEBUG_KMS("More than one child device for port %c in VBT, using the first.\n",
  992. port_name(port));
  993. } else {
  994. child = it;
  995. }
  996. }
  997. }
  998. }
  999. if (!child)
  1000. return;
  1001. aux_channel = child->aux_channel;
  1002. ddc_pin = child->ddc_pin;
  1003. is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
  1004. is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
  1005. is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT;
  1006. is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
  1007. is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
  1008. if (port == PORT_A && is_dvi) {
  1009. DRM_DEBUG_KMS("VBT claims port A supports DVI%s, ignoring\n",
  1010. is_hdmi ? "/HDMI" : "");
  1011. is_dvi = false;
  1012. is_hdmi = false;
  1013. }
  1014. if (port == PORT_A && is_dvi) {
  1015. DRM_DEBUG_KMS("VBT claims port A supports DVI%s, ignoring\n",
  1016. is_hdmi ? "/HDMI" : "");
  1017. is_dvi = false;
  1018. is_hdmi = false;
  1019. }
  1020. info->supports_dvi = is_dvi;
  1021. info->supports_hdmi = is_hdmi;
  1022. info->supports_dp = is_dp;
  1023. info->supports_edp = is_edp;
  1024. DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
  1025. port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
  1026. if (is_edp && is_dvi)
  1027. DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
  1028. port_name(port));
  1029. if (is_crt && port != PORT_E)
  1030. DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
  1031. if (is_crt && (is_dvi || is_dp))
  1032. DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
  1033. port_name(port));
  1034. if (is_dvi && (port == PORT_A || port == PORT_E))
  1035. DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
  1036. if (!is_dvi && !is_dp && !is_crt)
  1037. DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
  1038. port_name(port));
  1039. if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
  1040. DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
  1041. if (is_dvi) {
  1042. info->alternate_ddc_pin = map_ddc_pin(dev_priv, ddc_pin);
  1043. sanitize_ddc_pin(dev_priv, port);
  1044. }
  1045. if (is_dp) {
  1046. info->alternate_aux_channel = aux_channel;
  1047. sanitize_aux_ch(dev_priv, port);
  1048. }
  1049. if (bdb_version >= 158) {
  1050. /* The VBT HDMI level shift values match the table we have. */
  1051. hdmi_level_shift = child->hdmi_level_shifter_value;
  1052. DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
  1053. port_name(port),
  1054. hdmi_level_shift);
  1055. info->hdmi_level_shift = hdmi_level_shift;
  1056. }
  1057. if (bdb_version >= 204) {
  1058. int max_tmds_clock;
  1059. switch (child->hdmi_max_data_rate) {
  1060. default:
  1061. MISSING_CASE(child->hdmi_max_data_rate);
  1062. /* fall through */
  1063. case HDMI_MAX_DATA_RATE_PLATFORM:
  1064. max_tmds_clock = 0;
  1065. break;
  1066. case HDMI_MAX_DATA_RATE_297:
  1067. max_tmds_clock = 297000;
  1068. break;
  1069. case HDMI_MAX_DATA_RATE_165:
  1070. max_tmds_clock = 165000;
  1071. break;
  1072. }
  1073. if (max_tmds_clock)
  1074. DRM_DEBUG_KMS("VBT HDMI max TMDS clock for port %c: %d kHz\n",
  1075. port_name(port), max_tmds_clock);
  1076. info->max_tmds_clock = max_tmds_clock;
  1077. }
  1078. /* Parse the I_boost config for SKL and above */
  1079. if (bdb_version >= 196 && child->iboost) {
  1080. info->dp_boost_level = translate_iboost(child->dp_iboost_level);
  1081. DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
  1082. port_name(port), info->dp_boost_level);
  1083. info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level);
  1084. DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
  1085. port_name(port), info->hdmi_boost_level);
  1086. }
  1087. }
  1088. static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
  1089. {
  1090. enum port port;
  1091. if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
  1092. return;
  1093. if (!dev_priv->vbt.child_dev_num)
  1094. return;
  1095. if (bdb_version < 155)
  1096. return;
  1097. for (port = PORT_A; port < I915_MAX_PORTS; port++)
  1098. parse_ddi_port(dev_priv, port, bdb_version);
  1099. }
  1100. static void
  1101. parse_general_definitions(struct drm_i915_private *dev_priv,
  1102. const struct bdb_header *bdb)
  1103. {
  1104. const struct bdb_general_definitions *defs;
  1105. const struct child_device_config *child;
  1106. int i, child_device_num, count;
  1107. u8 expected_size;
  1108. u16 block_size;
  1109. int bus_pin;
  1110. defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
  1111. if (!defs) {
  1112. DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
  1113. return;
  1114. }
  1115. block_size = get_blocksize(defs);
  1116. if (block_size < sizeof(*defs)) {
  1117. DRM_DEBUG_KMS("General definitions block too small (%u)\n",
  1118. block_size);
  1119. return;
  1120. }
  1121. bus_pin = defs->crt_ddc_gmbus_pin;
  1122. DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
  1123. if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
  1124. dev_priv->vbt.crt_ddc_pin = bus_pin;
  1125. if (bdb->version < 106) {
  1126. expected_size = 22;
  1127. } else if (bdb->version < 111) {
  1128. expected_size = 27;
  1129. } else if (bdb->version < 195) {
  1130. expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
  1131. } else if (bdb->version == 195) {
  1132. expected_size = 37;
  1133. } else if (bdb->version <= 197) {
  1134. expected_size = 38;
  1135. } else {
  1136. expected_size = 38;
  1137. BUILD_BUG_ON(sizeof(*child) < 38);
  1138. DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n",
  1139. bdb->version, expected_size);
  1140. }
  1141. /* Flag an error for unexpected size, but continue anyway. */
  1142. if (defs->child_dev_size != expected_size)
  1143. DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n",
  1144. defs->child_dev_size, expected_size, bdb->version);
  1145. /* The legacy sized child device config is the minimum we need. */
  1146. if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
  1147. DRM_DEBUG_KMS("Child device config size %u is too small.\n",
  1148. defs->child_dev_size);
  1149. return;
  1150. }
  1151. /* get the number of child device */
  1152. child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
  1153. count = 0;
  1154. /* get the number of child device that is present */
  1155. for (i = 0; i < child_device_num; i++) {
  1156. child = child_device_ptr(defs, i);
  1157. if (!child->device_type)
  1158. continue;
  1159. count++;
  1160. }
  1161. if (!count) {
  1162. DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
  1163. return;
  1164. }
  1165. dev_priv->vbt.child_dev = kcalloc(count, sizeof(*child), GFP_KERNEL);
  1166. if (!dev_priv->vbt.child_dev) {
  1167. DRM_DEBUG_KMS("No memory space for child device\n");
  1168. return;
  1169. }
  1170. dev_priv->vbt.child_dev_num = count;
  1171. count = 0;
  1172. for (i = 0; i < child_device_num; i++) {
  1173. child = child_device_ptr(defs, i);
  1174. if (!child->device_type)
  1175. continue;
  1176. /*
  1177. * Copy as much as we know (sizeof) and is available
  1178. * (child_dev_size) of the child device. Accessing the data must
  1179. * depend on VBT version.
  1180. */
  1181. memcpy(dev_priv->vbt.child_dev + count, child,
  1182. min_t(size_t, defs->child_dev_size, sizeof(*child)));
  1183. count++;
  1184. }
  1185. }
  1186. /* Common defaults which may be overridden by VBT. */
  1187. static void
  1188. init_vbt_defaults(struct drm_i915_private *dev_priv)
  1189. {
  1190. enum port port;
  1191. dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
  1192. /* Default to having backlight */
  1193. dev_priv->vbt.backlight.present = true;
  1194. /* LFP panel data */
  1195. dev_priv->vbt.lvds_dither = 1;
  1196. dev_priv->vbt.lvds_vbt = 0;
  1197. /* SDVO panel data */
  1198. dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
  1199. /* general features */
  1200. dev_priv->vbt.int_tv_support = 1;
  1201. dev_priv->vbt.int_crt_support = 1;
  1202. /* Default to using SSC */
  1203. dev_priv->vbt.lvds_use_ssc = 1;
  1204. /*
  1205. * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
  1206. * clock for LVDS.
  1207. */
  1208. dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
  1209. !HAS_PCH_SPLIT(dev_priv));
  1210. DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
  1211. for (port = PORT_A; port < I915_MAX_PORTS; port++) {
  1212. struct ddi_vbt_port_info *info =
  1213. &dev_priv->vbt.ddi_port_info[port];
  1214. info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
  1215. }
  1216. }
  1217. /* Defaults to initialize only if there is no VBT. */
  1218. static void
  1219. init_vbt_missing_defaults(struct drm_i915_private *dev_priv)
  1220. {
  1221. enum port port;
  1222. for (port = PORT_A; port < I915_MAX_PORTS; port++) {
  1223. struct ddi_vbt_port_info *info =
  1224. &dev_priv->vbt.ddi_port_info[port];
  1225. info->supports_dvi = (port != PORT_A && port != PORT_E);
  1226. info->supports_hdmi = info->supports_dvi;
  1227. info->supports_dp = (port != PORT_E);
  1228. }
  1229. }
  1230. static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
  1231. {
  1232. const void *_vbt = vbt;
  1233. return _vbt + vbt->bdb_offset;
  1234. }
  1235. /**
  1236. * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
  1237. * @buf: pointer to a buffer to validate
  1238. * @size: size of the buffer
  1239. *
  1240. * Returns true on valid VBT.
  1241. */
  1242. bool intel_bios_is_valid_vbt(const void *buf, size_t size)
  1243. {
  1244. const struct vbt_header *vbt = buf;
  1245. const struct bdb_header *bdb;
  1246. if (!vbt)
  1247. return false;
  1248. if (sizeof(struct vbt_header) > size) {
  1249. DRM_DEBUG_DRIVER("VBT header incomplete\n");
  1250. return false;
  1251. }
  1252. if (memcmp(vbt->signature, "$VBT", 4)) {
  1253. DRM_DEBUG_DRIVER("VBT invalid signature\n");
  1254. return false;
  1255. }
  1256. if (range_overflows_t(size_t,
  1257. vbt->bdb_offset,
  1258. sizeof(struct bdb_header),
  1259. size)) {
  1260. DRM_DEBUG_DRIVER("BDB header incomplete\n");
  1261. return false;
  1262. }
  1263. bdb = get_bdb_header(vbt);
  1264. if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
  1265. DRM_DEBUG_DRIVER("BDB incomplete\n");
  1266. return false;
  1267. }
  1268. return vbt;
  1269. }
  1270. static const struct vbt_header *find_vbt(void __iomem *bios, size_t size)
  1271. {
  1272. size_t i;
  1273. /* Scour memory looking for the VBT signature. */
  1274. for (i = 0; i + 4 < size; i++) {
  1275. void *vbt;
  1276. if (ioread32(bios + i) != *((const u32 *) "$VBT"))
  1277. continue;
  1278. /*
  1279. * This is the one place where we explicitly discard the address
  1280. * space (__iomem) of the BIOS/VBT.
  1281. */
  1282. vbt = (void __force *) bios + i;
  1283. if (intel_bios_is_valid_vbt(vbt, size - i))
  1284. return vbt;
  1285. break;
  1286. }
  1287. return NULL;
  1288. }
  1289. /**
  1290. * intel_bios_init - find VBT and initialize settings from the BIOS
  1291. * @dev_priv: i915 device instance
  1292. *
  1293. * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
  1294. * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
  1295. * initialize some defaults if the VBT is not present at all.
  1296. */
  1297. void intel_bios_init(struct drm_i915_private *dev_priv)
  1298. {
  1299. struct pci_dev *pdev = dev_priv->drm.pdev;
  1300. const struct vbt_header *vbt = dev_priv->opregion.vbt;
  1301. const struct bdb_header *bdb;
  1302. u8 __iomem *bios = NULL;
  1303. if (HAS_PCH_NOP(dev_priv)) {
  1304. DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n");
  1305. return;
  1306. }
  1307. init_vbt_defaults(dev_priv);
  1308. /* If the OpRegion does not have VBT, look in PCI ROM. */
  1309. if (!vbt) {
  1310. size_t size;
  1311. bios = pci_map_rom(pdev, &size);
  1312. if (!bios)
  1313. goto out;
  1314. vbt = find_vbt(bios, size);
  1315. if (!vbt)
  1316. goto out;
  1317. DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n");
  1318. }
  1319. bdb = get_bdb_header(vbt);
  1320. DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n",
  1321. (int)sizeof(vbt->signature), vbt->signature, bdb->version);
  1322. /* Grab useful general definitions */
  1323. parse_general_features(dev_priv, bdb);
  1324. parse_general_definitions(dev_priv, bdb);
  1325. parse_lfp_panel_data(dev_priv, bdb);
  1326. parse_lfp_backlight(dev_priv, bdb);
  1327. parse_sdvo_panel_data(dev_priv, bdb);
  1328. parse_driver_features(dev_priv, bdb);
  1329. parse_edp(dev_priv, bdb);
  1330. parse_psr(dev_priv, bdb);
  1331. parse_mipi_config(dev_priv, bdb);
  1332. parse_mipi_sequence(dev_priv, bdb);
  1333. /* Further processing on pre-parsed data */
  1334. parse_sdvo_device_mapping(dev_priv, bdb->version);
  1335. parse_ddi_ports(dev_priv, bdb->version);
  1336. out:
  1337. if (!vbt) {
  1338. DRM_INFO("Failed to find VBIOS tables (VBT)\n");
  1339. init_vbt_missing_defaults(dev_priv);
  1340. }
  1341. if (bios)
  1342. pci_unmap_rom(pdev, bios);
  1343. }
  1344. /**
  1345. * intel_bios_is_tv_present - is integrated TV present in VBT
  1346. * @dev_priv: i915 device instance
  1347. *
  1348. * Return true if TV is present. If no child devices were parsed from VBT,
  1349. * assume TV is present.
  1350. */
  1351. bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
  1352. {
  1353. const struct child_device_config *child;
  1354. int i;
  1355. if (!dev_priv->vbt.int_tv_support)
  1356. return false;
  1357. if (!dev_priv->vbt.child_dev_num)
  1358. return true;
  1359. for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  1360. child = dev_priv->vbt.child_dev + i;
  1361. /*
  1362. * If the device type is not TV, continue.
  1363. */
  1364. switch (child->device_type) {
  1365. case DEVICE_TYPE_INT_TV:
  1366. case DEVICE_TYPE_TV:
  1367. case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
  1368. break;
  1369. default:
  1370. continue;
  1371. }
  1372. /* Only when the addin_offset is non-zero, it is regarded
  1373. * as present.
  1374. */
  1375. if (child->addin_offset)
  1376. return true;
  1377. }
  1378. return false;
  1379. }
  1380. /**
  1381. * intel_bios_is_lvds_present - is LVDS present in VBT
  1382. * @dev_priv: i915 device instance
  1383. * @i2c_pin: i2c pin for LVDS if present
  1384. *
  1385. * Return true if LVDS is present. If no child devices were parsed from VBT,
  1386. * assume LVDS is present.
  1387. */
  1388. bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
  1389. {
  1390. const struct child_device_config *child;
  1391. int i;
  1392. if (!dev_priv->vbt.child_dev_num)
  1393. return true;
  1394. for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  1395. child = dev_priv->vbt.child_dev + i;
  1396. /* If the device type is not LFP, continue.
  1397. * We have to check both the new identifiers as well as the
  1398. * old for compatibility with some BIOSes.
  1399. */
  1400. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  1401. child->device_type != DEVICE_TYPE_LFP)
  1402. continue;
  1403. if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
  1404. *i2c_pin = child->i2c_pin;
  1405. /* However, we cannot trust the BIOS writers to populate
  1406. * the VBT correctly. Since LVDS requires additional
  1407. * information from AIM blocks, a non-zero addin offset is
  1408. * a good indicator that the LVDS is actually present.
  1409. */
  1410. if (child->addin_offset)
  1411. return true;
  1412. /* But even then some BIOS writers perform some black magic
  1413. * and instantiate the device without reference to any
  1414. * additional data. Trust that if the VBT was written into
  1415. * the OpRegion then they have validated the LVDS's existence.
  1416. */
  1417. if (dev_priv->opregion.vbt)
  1418. return true;
  1419. }
  1420. return false;
  1421. }
  1422. /**
  1423. * intel_bios_is_port_present - is the specified digital port present
  1424. * @dev_priv: i915 device instance
  1425. * @port: port to check
  1426. *
  1427. * Return true if the device in %port is present.
  1428. */
  1429. bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
  1430. {
  1431. const struct child_device_config *child;
  1432. static const struct {
  1433. u16 dp, hdmi;
  1434. } port_mapping[] = {
  1435. [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
  1436. [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
  1437. [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
  1438. [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
  1439. };
  1440. int i;
  1441. /* FIXME maybe deal with port A as well? */
  1442. if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
  1443. return false;
  1444. if (!dev_priv->vbt.child_dev_num)
  1445. return false;
  1446. for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  1447. child = dev_priv->vbt.child_dev + i;
  1448. if ((child->dvo_port == port_mapping[port].dp ||
  1449. child->dvo_port == port_mapping[port].hdmi) &&
  1450. (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
  1451. DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
  1452. return true;
  1453. }
  1454. return false;
  1455. }
  1456. /**
  1457. * intel_bios_is_port_edp - is the device in given port eDP
  1458. * @dev_priv: i915 device instance
  1459. * @port: port to check
  1460. *
  1461. * Return true if the device in %port is eDP.
  1462. */
  1463. bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
  1464. {
  1465. const struct child_device_config *child;
  1466. static const short port_mapping[] = {
  1467. [PORT_B] = DVO_PORT_DPB,
  1468. [PORT_C] = DVO_PORT_DPC,
  1469. [PORT_D] = DVO_PORT_DPD,
  1470. [PORT_E] = DVO_PORT_DPE,
  1471. };
  1472. int i;
  1473. if (HAS_DDI(dev_priv))
  1474. return dev_priv->vbt.ddi_port_info[port].supports_edp;
  1475. if (!dev_priv->vbt.child_dev_num)
  1476. return false;
  1477. for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  1478. child = dev_priv->vbt.child_dev + i;
  1479. if (child->dvo_port == port_mapping[port] &&
  1480. (child->device_type & DEVICE_TYPE_eDP_BITS) ==
  1481. (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
  1482. return true;
  1483. }
  1484. return false;
  1485. }
  1486. static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
  1487. enum port port)
  1488. {
  1489. static const struct {
  1490. u16 dp, hdmi;
  1491. } port_mapping[] = {
  1492. /*
  1493. * Buggy VBTs may declare DP ports as having
  1494. * HDMI type dvo_port :( So let's check both.
  1495. */
  1496. [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
  1497. [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
  1498. [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
  1499. [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
  1500. };
  1501. if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
  1502. return false;
  1503. if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
  1504. (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
  1505. return false;
  1506. if (child->dvo_port == port_mapping[port].dp)
  1507. return true;
  1508. /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
  1509. if (child->dvo_port == port_mapping[port].hdmi &&
  1510. child->aux_channel != 0)
  1511. return true;
  1512. return false;
  1513. }
  1514. bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
  1515. enum port port)
  1516. {
  1517. const struct child_device_config *child;
  1518. int i;
  1519. for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  1520. child = dev_priv->vbt.child_dev + i;
  1521. if (child_dev_is_dp_dual_mode(child, port))
  1522. return true;
  1523. }
  1524. return false;
  1525. }
  1526. /**
  1527. * intel_bios_is_dsi_present - is DSI present in VBT
  1528. * @dev_priv: i915 device instance
  1529. * @port: port for DSI if present
  1530. *
  1531. * Return true if DSI is present, and return the port in %port.
  1532. */
  1533. bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
  1534. enum port *port)
  1535. {
  1536. const struct child_device_config *child;
  1537. u8 dvo_port;
  1538. int i;
  1539. for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  1540. child = dev_priv->vbt.child_dev + i;
  1541. if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
  1542. continue;
  1543. dvo_port = child->dvo_port;
  1544. switch (dvo_port) {
  1545. case DVO_PORT_MIPIA:
  1546. case DVO_PORT_MIPIC:
  1547. if (port)
  1548. *port = dvo_port - DVO_PORT_MIPIA;
  1549. return true;
  1550. case DVO_PORT_MIPIB:
  1551. case DVO_PORT_MIPID:
  1552. DRM_DEBUG_KMS("VBT has unsupported DSI port %c\n",
  1553. port_name(dvo_port - DVO_PORT_MIPIA));
  1554. break;
  1555. }
  1556. }
  1557. return false;
  1558. }
  1559. /**
  1560. * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
  1561. * @dev_priv: i915 device instance
  1562. * @port: port to check
  1563. *
  1564. * Return true if HPD should be inverted for %port.
  1565. */
  1566. bool
  1567. intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv,
  1568. enum port port)
  1569. {
  1570. const struct child_device_config *child;
  1571. int i;
  1572. if (WARN_ON_ONCE(!IS_GEN9_LP(dev_priv)))
  1573. return false;
  1574. for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  1575. child = dev_priv->vbt.child_dev + i;
  1576. if (!child->hpd_invert)
  1577. continue;
  1578. switch (child->dvo_port) {
  1579. case DVO_PORT_DPA:
  1580. case DVO_PORT_HDMIA:
  1581. if (port == PORT_A)
  1582. return true;
  1583. break;
  1584. case DVO_PORT_DPB:
  1585. case DVO_PORT_HDMIB:
  1586. if (port == PORT_B)
  1587. return true;
  1588. break;
  1589. case DVO_PORT_DPC:
  1590. case DVO_PORT_HDMIC:
  1591. if (port == PORT_C)
  1592. return true;
  1593. break;
  1594. default:
  1595. break;
  1596. }
  1597. }
  1598. return false;
  1599. }
  1600. /**
  1601. * intel_bios_is_lspcon_present - if LSPCON is attached on %port
  1602. * @dev_priv: i915 device instance
  1603. * @port: port to check
  1604. *
  1605. * Return true if LSPCON is present on this port
  1606. */
  1607. bool
  1608. intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
  1609. enum port port)
  1610. {
  1611. const struct child_device_config *child;
  1612. int i;
  1613. if (!HAS_LSPCON(dev_priv))
  1614. return false;
  1615. for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  1616. child = dev_priv->vbt.child_dev + i;
  1617. if (!child->lspcon)
  1618. continue;
  1619. switch (child->dvo_port) {
  1620. case DVO_PORT_DPA:
  1621. case DVO_PORT_HDMIA:
  1622. if (port == PORT_A)
  1623. return true;
  1624. break;
  1625. case DVO_PORT_DPB:
  1626. case DVO_PORT_HDMIB:
  1627. if (port == PORT_B)
  1628. return true;
  1629. break;
  1630. case DVO_PORT_DPC:
  1631. case DVO_PORT_HDMIC:
  1632. if (port == PORT_C)
  1633. return true;
  1634. break;
  1635. case DVO_PORT_DPD:
  1636. case DVO_PORT_HDMID:
  1637. if (port == PORT_D)
  1638. return true;
  1639. break;
  1640. default:
  1641. break;
  1642. }
  1643. }
  1644. return false;
  1645. }