intel_atomic_plane.c 9.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307
  1. /*
  2. * Copyright © 2014 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. */
  23. /**
  24. * DOC: atomic plane helpers
  25. *
  26. * The functions here are used by the atomic plane helper functions to
  27. * implement legacy plane updates (i.e., drm_plane->update_plane() and
  28. * drm_plane->disable_plane()). This allows plane updates to use the
  29. * atomic state infrastructure and perform plane updates as separate
  30. * prepare/check/commit/cleanup steps.
  31. */
  32. #include <drm/drmP.h>
  33. #include <drm/drm_atomic_helper.h>
  34. #include <drm/drm_plane_helper.h>
  35. #include "intel_drv.h"
  36. /**
  37. * intel_create_plane_state - create plane state object
  38. * @plane: drm plane
  39. *
  40. * Allocates a fresh plane state for the given plane and sets some of
  41. * the state values to sensible initial values.
  42. *
  43. * Returns: A newly allocated plane state, or NULL on failure
  44. */
  45. struct intel_plane_state *
  46. intel_create_plane_state(struct drm_plane *plane)
  47. {
  48. struct intel_plane_state *state;
  49. state = kzalloc(sizeof(*state), GFP_KERNEL);
  50. if (!state)
  51. return NULL;
  52. state->base.plane = plane;
  53. state->base.rotation = DRM_MODE_ROTATE_0;
  54. state->ckey.flags = I915_SET_COLORKEY_NONE;
  55. return state;
  56. }
  57. /**
  58. * intel_plane_duplicate_state - duplicate plane state
  59. * @plane: drm plane
  60. *
  61. * Allocates and returns a copy of the plane state (both common and
  62. * Intel-specific) for the specified plane.
  63. *
  64. * Returns: The newly allocated plane state, or NULL on failure.
  65. */
  66. struct drm_plane_state *
  67. intel_plane_duplicate_state(struct drm_plane *plane)
  68. {
  69. struct drm_plane_state *state;
  70. struct intel_plane_state *intel_state;
  71. intel_state = kmemdup(plane->state, sizeof(*intel_state), GFP_KERNEL);
  72. if (!intel_state)
  73. return NULL;
  74. state = &intel_state->base;
  75. __drm_atomic_helper_plane_duplicate_state(plane, state);
  76. intel_state->vma = NULL;
  77. return state;
  78. }
  79. /**
  80. * intel_plane_destroy_state - destroy plane state
  81. * @plane: drm plane
  82. * @state: state object to destroy
  83. *
  84. * Destroys the plane state (both common and Intel-specific) for the
  85. * specified plane.
  86. */
  87. void
  88. intel_plane_destroy_state(struct drm_plane *plane,
  89. struct drm_plane_state *state)
  90. {
  91. WARN_ON(to_intel_plane_state(state)->vma);
  92. drm_atomic_helper_plane_destroy_state(plane, state);
  93. }
  94. int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_state,
  95. struct intel_crtc_state *crtc_state,
  96. const struct intel_plane_state *old_plane_state,
  97. struct intel_plane_state *intel_state)
  98. {
  99. struct drm_plane *plane = intel_state->base.plane;
  100. struct drm_i915_private *dev_priv = to_i915(plane->dev);
  101. struct drm_plane_state *state = &intel_state->base;
  102. struct intel_plane *intel_plane = to_intel_plane(plane);
  103. const struct drm_display_mode *adjusted_mode =
  104. &crtc_state->base.adjusted_mode;
  105. int ret;
  106. /*
  107. * Both crtc and plane->crtc could be NULL if we're updating a
  108. * property while the plane is disabled. We don't actually have
  109. * anything driver-specific we need to test in that case, so
  110. * just return success.
  111. */
  112. if (!intel_state->base.crtc && !old_plane_state->base.crtc)
  113. return 0;
  114. /* Clip all planes to CRTC size, or 0x0 if CRTC is disabled */
  115. intel_state->clip.x1 = 0;
  116. intel_state->clip.y1 = 0;
  117. intel_state->clip.x2 =
  118. crtc_state->base.enable ? crtc_state->pipe_src_w : 0;
  119. intel_state->clip.y2 =
  120. crtc_state->base.enable ? crtc_state->pipe_src_h : 0;
  121. if (state->fb && drm_rotation_90_or_270(state->rotation)) {
  122. struct drm_format_name_buf format_name;
  123. if (state->fb->modifier != I915_FORMAT_MOD_Y_TILED &&
  124. state->fb->modifier != I915_FORMAT_MOD_Yf_TILED) {
  125. DRM_DEBUG_KMS("Y/Yf tiling required for 90/270!\n");
  126. return -EINVAL;
  127. }
  128. /*
  129. * 90/270 is not allowed with RGB64 16:16:16:16,
  130. * RGB 16-bit 5:6:5, and Indexed 8-bit.
  131. * TBD: Add RGB64 case once its added in supported format list.
  132. */
  133. switch (state->fb->format->format) {
  134. case DRM_FORMAT_C8:
  135. case DRM_FORMAT_RGB565:
  136. DRM_DEBUG_KMS("Unsupported pixel format %s for 90/270!\n",
  137. drm_get_format_name(state->fb->format->format,
  138. &format_name));
  139. return -EINVAL;
  140. default:
  141. break;
  142. }
  143. }
  144. /* CHV ignores the mirror bit when the rotate bit is set :( */
  145. if (IS_CHERRYVIEW(dev_priv) &&
  146. state->rotation & DRM_MODE_ROTATE_180 &&
  147. state->rotation & DRM_MODE_REFLECT_X) {
  148. DRM_DEBUG_KMS("Cannot rotate and reflect at the same time\n");
  149. return -EINVAL;
  150. }
  151. intel_state->base.visible = false;
  152. ret = intel_plane->check_plane(intel_plane, crtc_state, intel_state);
  153. if (ret)
  154. return ret;
  155. /*
  156. * Y-tiling is not supported in IF-ID Interlace mode in
  157. * GEN9 and above.
  158. */
  159. if (state->fb && INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable &&
  160. adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
  161. if (state->fb->modifier == I915_FORMAT_MOD_Y_TILED ||
  162. state->fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
  163. DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n");
  164. return -EINVAL;
  165. }
  166. }
  167. /* FIXME pre-g4x don't work like this */
  168. if (intel_state->base.visible)
  169. crtc_state->active_planes |= BIT(intel_plane->id);
  170. else
  171. crtc_state->active_planes &= ~BIT(intel_plane->id);
  172. return intel_plane_atomic_calc_changes(old_crtc_state,
  173. &crtc_state->base,
  174. old_plane_state,
  175. state);
  176. }
  177. static int intel_plane_atomic_check(struct drm_plane *plane,
  178. struct drm_plane_state *new_plane_state)
  179. {
  180. struct drm_atomic_state *state = new_plane_state->state;
  181. const struct drm_plane_state *old_plane_state =
  182. drm_atomic_get_old_plane_state(state, plane);
  183. struct drm_crtc *crtc = new_plane_state->crtc ?: old_plane_state->crtc;
  184. const struct drm_crtc_state *old_crtc_state;
  185. struct drm_crtc_state *new_crtc_state;
  186. /*
  187. * Both crtc and plane->crtc could be NULL if we're updating a
  188. * property while the plane is disabled. We don't actually have
  189. * anything driver-specific we need to test in that case, so
  190. * just return success.
  191. */
  192. if (!crtc)
  193. return 0;
  194. old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);
  195. new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
  196. return intel_plane_atomic_check_with_state(to_intel_crtc_state(old_crtc_state),
  197. to_intel_crtc_state(new_crtc_state),
  198. to_intel_plane_state(old_plane_state),
  199. to_intel_plane_state(new_plane_state));
  200. }
  201. static void intel_plane_atomic_update(struct drm_plane *plane,
  202. struct drm_plane_state *old_state)
  203. {
  204. struct intel_atomic_state *state = to_intel_atomic_state(old_state->state);
  205. struct intel_plane *intel_plane = to_intel_plane(plane);
  206. const struct intel_plane_state *new_plane_state =
  207. intel_atomic_get_new_plane_state(state, intel_plane);
  208. struct drm_crtc *crtc = new_plane_state->base.crtc ?: old_state->crtc;
  209. if (new_plane_state->base.visible) {
  210. const struct intel_crtc_state *new_crtc_state =
  211. intel_atomic_get_new_crtc_state(state, to_intel_crtc(crtc));
  212. trace_intel_update_plane(plane,
  213. to_intel_crtc(crtc));
  214. intel_plane->update_plane(intel_plane,
  215. new_crtc_state, new_plane_state);
  216. } else {
  217. trace_intel_disable_plane(plane,
  218. to_intel_crtc(crtc));
  219. intel_plane->disable_plane(intel_plane, to_intel_crtc(crtc));
  220. }
  221. }
  222. const struct drm_plane_helper_funcs intel_plane_helper_funcs = {
  223. .prepare_fb = intel_prepare_plane_fb,
  224. .cleanup_fb = intel_cleanup_plane_fb,
  225. .atomic_check = intel_plane_atomic_check,
  226. .atomic_update = intel_plane_atomic_update,
  227. };
  228. /**
  229. * intel_plane_atomic_get_property - fetch plane property value
  230. * @plane: plane to fetch property for
  231. * @state: state containing the property value
  232. * @property: property to look up
  233. * @val: pointer to write property value into
  234. *
  235. * The DRM core does not store shadow copies of properties for
  236. * atomic-capable drivers. This entrypoint is used to fetch
  237. * the current value of a driver-specific plane property.
  238. */
  239. int
  240. intel_plane_atomic_get_property(struct drm_plane *plane,
  241. const struct drm_plane_state *state,
  242. struct drm_property *property,
  243. uint64_t *val)
  244. {
  245. DRM_DEBUG_KMS("Unknown plane property '%s'\n", property->name);
  246. return -EINVAL;
  247. }
  248. /**
  249. * intel_plane_atomic_set_property - set plane property value
  250. * @plane: plane to set property for
  251. * @state: state to update property value in
  252. * @property: property to set
  253. * @val: value to set property to
  254. *
  255. * Writes the specified property value for a plane into the provided atomic
  256. * state object.
  257. *
  258. * Returns 0 on success, -EINVAL on unrecognized properties
  259. */
  260. int
  261. intel_plane_atomic_set_property(struct drm_plane *plane,
  262. struct drm_plane_state *state,
  263. struct drm_property *property,
  264. uint64_t val)
  265. {
  266. DRM_DEBUG_KMS("Unknown plane property '%s'\n", property->name);
  267. return -EINVAL;
  268. }