utils.c 53 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  10. * Copyright (C) 2015 - 2017 Intel Deutschland GmbH
  11. * Copyright(c) 2018 Intel Corporation
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of version 2 of the GNU General Public License as
  15. * published by the Free Software Foundation.
  16. *
  17. * This program is distributed in the hope that it will be useful, but
  18. * WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  20. * General Public License for more details.
  21. *
  22. * The full GNU General Public License is included in this distribution
  23. * in the file called COPYING.
  24. *
  25. * Contact Information:
  26. * Intel Linux Wireless <linuxwifi@intel.com>
  27. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  28. *
  29. * BSD LICENSE
  30. *
  31. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  32. * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  33. * Copyright (C) 2015 - 2017 Intel Deutschland GmbH
  34. * Copyright(c) 2018 Intel Corporation
  35. * All rights reserved.
  36. *
  37. * Redistribution and use in source and binary forms, with or without
  38. * modification, are permitted provided that the following conditions
  39. * are met:
  40. *
  41. * * Redistributions of source code must retain the above copyright
  42. * notice, this list of conditions and the following disclaimer.
  43. * * Redistributions in binary form must reproduce the above copyright
  44. * notice, this list of conditions and the following disclaimer in
  45. * the documentation and/or other materials provided with the
  46. * distribution.
  47. * * Neither the name Intel Corporation nor the names of its
  48. * contributors may be used to endorse or promote products derived
  49. * from this software without specific prior written permission.
  50. *
  51. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  52. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  53. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  54. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  55. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  56. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  57. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  58. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  59. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  60. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  61. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  62. *
  63. *****************************************************************************/
  64. #include <net/mac80211.h>
  65. #include "iwl-debug.h"
  66. #include "iwl-io.h"
  67. #include "iwl-prph.h"
  68. #include "iwl-csr.h"
  69. #include "mvm.h"
  70. #include "fw/api/rs.h"
  71. /*
  72. * Will return 0 even if the cmd failed when RFKILL is asserted unless
  73. * CMD_WANT_SKB is set in cmd->flags.
  74. */
  75. int iwl_mvm_send_cmd(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd)
  76. {
  77. int ret;
  78. #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
  79. if (WARN_ON(mvm->d3_test_active))
  80. return -EIO;
  81. #endif
  82. /*
  83. * Synchronous commands from this op-mode must hold
  84. * the mutex, this ensures we don't try to send two
  85. * (or more) synchronous commands at a time.
  86. */
  87. if (!(cmd->flags & CMD_ASYNC)) {
  88. lockdep_assert_held(&mvm->mutex);
  89. if (!(cmd->flags & CMD_SEND_IN_IDLE))
  90. iwl_mvm_ref(mvm, IWL_MVM_REF_SENDING_CMD);
  91. }
  92. ret = iwl_trans_send_cmd(mvm->trans, cmd);
  93. if (!(cmd->flags & (CMD_ASYNC | CMD_SEND_IN_IDLE)))
  94. iwl_mvm_unref(mvm, IWL_MVM_REF_SENDING_CMD);
  95. /*
  96. * If the caller wants the SKB, then don't hide any problems, the
  97. * caller might access the response buffer which will be NULL if
  98. * the command failed.
  99. */
  100. if (cmd->flags & CMD_WANT_SKB)
  101. return ret;
  102. /* Silently ignore failures if RFKILL is asserted */
  103. if (!ret || ret == -ERFKILL)
  104. return 0;
  105. return ret;
  106. }
  107. int iwl_mvm_send_cmd_pdu(struct iwl_mvm *mvm, u32 id,
  108. u32 flags, u16 len, const void *data)
  109. {
  110. struct iwl_host_cmd cmd = {
  111. .id = id,
  112. .len = { len, },
  113. .data = { data, },
  114. .flags = flags,
  115. };
  116. return iwl_mvm_send_cmd(mvm, &cmd);
  117. }
  118. /*
  119. * We assume that the caller set the status to the success value
  120. */
  121. int iwl_mvm_send_cmd_status(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd,
  122. u32 *status)
  123. {
  124. struct iwl_rx_packet *pkt;
  125. struct iwl_cmd_response *resp;
  126. int ret, resp_len;
  127. lockdep_assert_held(&mvm->mutex);
  128. #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
  129. if (WARN_ON(mvm->d3_test_active))
  130. return -EIO;
  131. #endif
  132. /*
  133. * Only synchronous commands can wait for status,
  134. * we use WANT_SKB so the caller can't.
  135. */
  136. if (WARN_ONCE(cmd->flags & (CMD_ASYNC | CMD_WANT_SKB),
  137. "cmd flags %x", cmd->flags))
  138. return -EINVAL;
  139. cmd->flags |= CMD_WANT_SKB;
  140. ret = iwl_trans_send_cmd(mvm->trans, cmd);
  141. if (ret == -ERFKILL) {
  142. /*
  143. * The command failed because of RFKILL, don't update
  144. * the status, leave it as success and return 0.
  145. */
  146. return 0;
  147. } else if (ret) {
  148. return ret;
  149. }
  150. pkt = cmd->resp_pkt;
  151. resp_len = iwl_rx_packet_payload_len(pkt);
  152. if (WARN_ON_ONCE(resp_len != sizeof(*resp))) {
  153. ret = -EIO;
  154. goto out_free_resp;
  155. }
  156. resp = (void *)pkt->data;
  157. *status = le32_to_cpu(resp->status);
  158. out_free_resp:
  159. iwl_free_resp(cmd);
  160. return ret;
  161. }
  162. /*
  163. * We assume that the caller set the status to the sucess value
  164. */
  165. int iwl_mvm_send_cmd_pdu_status(struct iwl_mvm *mvm, u32 id, u16 len,
  166. const void *data, u32 *status)
  167. {
  168. struct iwl_host_cmd cmd = {
  169. .id = id,
  170. .len = { len, },
  171. .data = { data, },
  172. };
  173. return iwl_mvm_send_cmd_status(mvm, &cmd, status);
  174. }
  175. #define IWL_DECLARE_RATE_INFO(r) \
  176. [IWL_RATE_##r##M_INDEX] = IWL_RATE_##r##M_PLCP
  177. /*
  178. * Translate from fw_rate_index (IWL_RATE_XXM_INDEX) to PLCP
  179. */
  180. static const u8 fw_rate_idx_to_plcp[IWL_RATE_COUNT] = {
  181. IWL_DECLARE_RATE_INFO(1),
  182. IWL_DECLARE_RATE_INFO(2),
  183. IWL_DECLARE_RATE_INFO(5),
  184. IWL_DECLARE_RATE_INFO(11),
  185. IWL_DECLARE_RATE_INFO(6),
  186. IWL_DECLARE_RATE_INFO(9),
  187. IWL_DECLARE_RATE_INFO(12),
  188. IWL_DECLARE_RATE_INFO(18),
  189. IWL_DECLARE_RATE_INFO(24),
  190. IWL_DECLARE_RATE_INFO(36),
  191. IWL_DECLARE_RATE_INFO(48),
  192. IWL_DECLARE_RATE_INFO(54),
  193. };
  194. int iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags,
  195. enum nl80211_band band)
  196. {
  197. int rate = rate_n_flags & RATE_LEGACY_RATE_MSK;
  198. int idx;
  199. int band_offset = 0;
  200. /* Legacy rate format, search for match in table */
  201. if (band == NL80211_BAND_5GHZ)
  202. band_offset = IWL_FIRST_OFDM_RATE;
  203. for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
  204. if (fw_rate_idx_to_plcp[idx] == rate)
  205. return idx - band_offset;
  206. return -1;
  207. }
  208. u8 iwl_mvm_mac80211_idx_to_hwrate(int rate_idx)
  209. {
  210. /* Get PLCP rate for tx_cmd->rate_n_flags */
  211. return fw_rate_idx_to_plcp[rate_idx];
  212. }
  213. void iwl_mvm_rx_fw_error(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb)
  214. {
  215. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  216. struct iwl_error_resp *err_resp = (void *)pkt->data;
  217. IWL_ERR(mvm, "FW Error notification: type 0x%08X cmd_id 0x%02X\n",
  218. le32_to_cpu(err_resp->error_type), err_resp->cmd_id);
  219. IWL_ERR(mvm, "FW Error notification: seq 0x%04X service 0x%08X\n",
  220. le16_to_cpu(err_resp->bad_cmd_seq_num),
  221. le32_to_cpu(err_resp->error_service));
  222. IWL_ERR(mvm, "FW Error notification: timestamp 0x%16llX\n",
  223. le64_to_cpu(err_resp->timestamp));
  224. }
  225. /*
  226. * Returns the first antenna as ANT_[ABC], as defined in iwl-config.h.
  227. * The parameter should also be a combination of ANT_[ABC].
  228. */
  229. u8 first_antenna(u8 mask)
  230. {
  231. BUILD_BUG_ON(ANT_A != BIT(0)); /* using ffs is wrong if not */
  232. if (WARN_ON_ONCE(!mask)) /* ffs will return 0 if mask is zeroed */
  233. return BIT(0);
  234. return BIT(ffs(mask) - 1);
  235. }
  236. /*
  237. * Toggles between TX antennas to send the probe request on.
  238. * Receives the bitmask of valid TX antennas and the *index* used
  239. * for the last TX, and returns the next valid *index* to use.
  240. * In order to set it in the tx_cmd, must do BIT(idx).
  241. */
  242. u8 iwl_mvm_next_antenna(struct iwl_mvm *mvm, u8 valid, u8 last_idx)
  243. {
  244. u8 ind = last_idx;
  245. int i;
  246. for (i = 0; i < MAX_ANT_NUM; i++) {
  247. ind = (ind + 1) % MAX_ANT_NUM;
  248. if (valid & BIT(ind))
  249. return ind;
  250. }
  251. WARN_ONCE(1, "Failed to toggle between antennas 0x%x", valid);
  252. return last_idx;
  253. }
  254. static const struct {
  255. const char *name;
  256. u8 num;
  257. } advanced_lookup[] = {
  258. { "NMI_INTERRUPT_WDG", 0x34 },
  259. { "SYSASSERT", 0x35 },
  260. { "UCODE_VERSION_MISMATCH", 0x37 },
  261. { "BAD_COMMAND", 0x38 },
  262. { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
  263. { "FATAL_ERROR", 0x3D },
  264. { "NMI_TRM_HW_ERR", 0x46 },
  265. { "NMI_INTERRUPT_TRM", 0x4C },
  266. { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
  267. { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
  268. { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
  269. { "NMI_INTERRUPT_HOST", 0x66 },
  270. { "NMI_INTERRUPT_ACTION_PT", 0x7C },
  271. { "NMI_INTERRUPT_UNKNOWN", 0x84 },
  272. { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
  273. { "ADVANCED_SYSASSERT", 0 },
  274. };
  275. static const char *desc_lookup(u32 num)
  276. {
  277. int i;
  278. for (i = 0; i < ARRAY_SIZE(advanced_lookup) - 1; i++)
  279. if (advanced_lookup[i].num == num)
  280. return advanced_lookup[i].name;
  281. /* No entry matches 'num', so it is the last: ADVANCED_SYSASSERT */
  282. return advanced_lookup[i].name;
  283. }
  284. /*
  285. * Note: This structure is read from the device with IO accesses,
  286. * and the reading already does the endian conversion. As it is
  287. * read with u32-sized accesses, any members with a different size
  288. * need to be ordered correctly though!
  289. */
  290. struct iwl_error_event_table_v1 {
  291. u32 valid; /* (nonzero) valid, (0) log is empty */
  292. u32 error_id; /* type of error */
  293. u32 pc; /* program counter */
  294. u32 blink1; /* branch link */
  295. u32 blink2; /* branch link */
  296. u32 ilink1; /* interrupt link */
  297. u32 ilink2; /* interrupt link */
  298. u32 data1; /* error-specific data */
  299. u32 data2; /* error-specific data */
  300. u32 data3; /* error-specific data */
  301. u32 bcon_time; /* beacon timer */
  302. u32 tsf_low; /* network timestamp function timer */
  303. u32 tsf_hi; /* network timestamp function timer */
  304. u32 gp1; /* GP1 timer register */
  305. u32 gp2; /* GP2 timer register */
  306. u32 gp3; /* GP3 timer register */
  307. u32 ucode_ver; /* uCode version */
  308. u32 hw_ver; /* HW Silicon version */
  309. u32 brd_ver; /* HW board version */
  310. u32 log_pc; /* log program counter */
  311. u32 frame_ptr; /* frame pointer */
  312. u32 stack_ptr; /* stack pointer */
  313. u32 hcmd; /* last host command header */
  314. u32 isr0; /* isr status register LMPM_NIC_ISR0:
  315. * rxtx_flag */
  316. u32 isr1; /* isr status register LMPM_NIC_ISR1:
  317. * host_flag */
  318. u32 isr2; /* isr status register LMPM_NIC_ISR2:
  319. * enc_flag */
  320. u32 isr3; /* isr status register LMPM_NIC_ISR3:
  321. * time_flag */
  322. u32 isr4; /* isr status register LMPM_NIC_ISR4:
  323. * wico interrupt */
  324. u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
  325. u32 wait_event; /* wait event() caller address */
  326. u32 l2p_control; /* L2pControlField */
  327. u32 l2p_duration; /* L2pDurationField */
  328. u32 l2p_mhvalid; /* L2pMhValidBits */
  329. u32 l2p_addr_match; /* L2pAddrMatchStat */
  330. u32 lmpm_pmg_sel; /* indicate which clocks are turned on
  331. * (LMPM_PMG_SEL) */
  332. u32 u_timestamp; /* indicate when the date and time of the
  333. * compilation */
  334. u32 flow_handler; /* FH read/write pointers, RX credit */
  335. } __packed /* LOG_ERROR_TABLE_API_S_VER_1 */;
  336. struct iwl_error_event_table {
  337. u32 valid; /* (nonzero) valid, (0) log is empty */
  338. u32 error_id; /* type of error */
  339. u32 trm_hw_status0; /* TRM HW status */
  340. u32 trm_hw_status1; /* TRM HW status */
  341. u32 blink2; /* branch link */
  342. u32 ilink1; /* interrupt link */
  343. u32 ilink2; /* interrupt link */
  344. u32 data1; /* error-specific data */
  345. u32 data2; /* error-specific data */
  346. u32 data3; /* error-specific data */
  347. u32 bcon_time; /* beacon timer */
  348. u32 tsf_low; /* network timestamp function timer */
  349. u32 tsf_hi; /* network timestamp function timer */
  350. u32 gp1; /* GP1 timer register */
  351. u32 gp2; /* GP2 timer register */
  352. u32 fw_rev_type; /* firmware revision type */
  353. u32 major; /* uCode version major */
  354. u32 minor; /* uCode version minor */
  355. u32 hw_ver; /* HW Silicon version */
  356. u32 brd_ver; /* HW board version */
  357. u32 log_pc; /* log program counter */
  358. u32 frame_ptr; /* frame pointer */
  359. u32 stack_ptr; /* stack pointer */
  360. u32 hcmd; /* last host command header */
  361. u32 isr0; /* isr status register LMPM_NIC_ISR0:
  362. * rxtx_flag */
  363. u32 isr1; /* isr status register LMPM_NIC_ISR1:
  364. * host_flag */
  365. u32 isr2; /* isr status register LMPM_NIC_ISR2:
  366. * enc_flag */
  367. u32 isr3; /* isr status register LMPM_NIC_ISR3:
  368. * time_flag */
  369. u32 isr4; /* isr status register LMPM_NIC_ISR4:
  370. * wico interrupt */
  371. u32 last_cmd_id; /* last HCMD id handled by the firmware */
  372. u32 wait_event; /* wait event() caller address */
  373. u32 l2p_control; /* L2pControlField */
  374. u32 l2p_duration; /* L2pDurationField */
  375. u32 l2p_mhvalid; /* L2pMhValidBits */
  376. u32 l2p_addr_match; /* L2pAddrMatchStat */
  377. u32 lmpm_pmg_sel; /* indicate which clocks are turned on
  378. * (LMPM_PMG_SEL) */
  379. u32 u_timestamp; /* indicate when the date and time of the
  380. * compilation */
  381. u32 flow_handler; /* FH read/write pointers, RX credit */
  382. } __packed /* LOG_ERROR_TABLE_API_S_VER_3 */;
  383. /*
  384. * UMAC error struct - relevant starting from family 8000 chip.
  385. * Note: This structure is read from the device with IO accesses,
  386. * and the reading already does the endian conversion. As it is
  387. * read with u32-sized accesses, any members with a different size
  388. * need to be ordered correctly though!
  389. */
  390. struct iwl_umac_error_event_table {
  391. u32 valid; /* (nonzero) valid, (0) log is empty */
  392. u32 error_id; /* type of error */
  393. u32 blink1; /* branch link */
  394. u32 blink2; /* branch link */
  395. u32 ilink1; /* interrupt link */
  396. u32 ilink2; /* interrupt link */
  397. u32 data1; /* error-specific data */
  398. u32 data2; /* error-specific data */
  399. u32 data3; /* error-specific data */
  400. u32 umac_major;
  401. u32 umac_minor;
  402. u32 frame_pointer; /* core register 27*/
  403. u32 stack_pointer; /* core register 28 */
  404. u32 cmd_header; /* latest host cmd sent to UMAC */
  405. u32 nic_isr_pref; /* ISR status register */
  406. } __packed;
  407. #define ERROR_START_OFFSET (1 * sizeof(u32))
  408. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  409. static void iwl_mvm_dump_umac_error_log(struct iwl_mvm *mvm)
  410. {
  411. struct iwl_trans *trans = mvm->trans;
  412. struct iwl_umac_error_event_table table;
  413. if (!mvm->support_umac_log)
  414. return;
  415. iwl_trans_read_mem_bytes(trans, mvm->umac_error_event_table, &table,
  416. sizeof(table));
  417. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  418. IWL_ERR(trans, "Start IWL Error Log Dump:\n");
  419. IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
  420. mvm->status, table.valid);
  421. }
  422. IWL_ERR(mvm, "0x%08X | %s\n", table.error_id,
  423. desc_lookup(table.error_id));
  424. IWL_ERR(mvm, "0x%08X | umac branchlink1\n", table.blink1);
  425. IWL_ERR(mvm, "0x%08X | umac branchlink2\n", table.blink2);
  426. IWL_ERR(mvm, "0x%08X | umac interruptlink1\n", table.ilink1);
  427. IWL_ERR(mvm, "0x%08X | umac interruptlink2\n", table.ilink2);
  428. IWL_ERR(mvm, "0x%08X | umac data1\n", table.data1);
  429. IWL_ERR(mvm, "0x%08X | umac data2\n", table.data2);
  430. IWL_ERR(mvm, "0x%08X | umac data3\n", table.data3);
  431. IWL_ERR(mvm, "0x%08X | umac major\n", table.umac_major);
  432. IWL_ERR(mvm, "0x%08X | umac minor\n", table.umac_minor);
  433. IWL_ERR(mvm, "0x%08X | frame pointer\n", table.frame_pointer);
  434. IWL_ERR(mvm, "0x%08X | stack pointer\n", table.stack_pointer);
  435. IWL_ERR(mvm, "0x%08X | last host cmd\n", table.cmd_header);
  436. IWL_ERR(mvm, "0x%08X | isr status reg\n", table.nic_isr_pref);
  437. }
  438. static void iwl_mvm_dump_lmac_error_log(struct iwl_mvm *mvm, u32 base)
  439. {
  440. struct iwl_trans *trans = mvm->trans;
  441. struct iwl_error_event_table table;
  442. u32 val;
  443. if (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) {
  444. if (!base)
  445. base = mvm->fw->init_errlog_ptr;
  446. } else {
  447. if (!base)
  448. base = mvm->fw->inst_errlog_ptr;
  449. }
  450. if (base < 0x400000) {
  451. IWL_ERR(mvm,
  452. "Not valid error log pointer 0x%08X for %s uCode\n",
  453. base,
  454. (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT)
  455. ? "Init" : "RT");
  456. return;
  457. }
  458. /* check if there is a HW error */
  459. val = iwl_trans_read_mem32(trans, base);
  460. if (((val & ~0xf) == 0xa5a5a5a0) || ((val & ~0xf) == 0x5a5a5a50)) {
  461. int err;
  462. IWL_ERR(trans, "HW error, resetting before reading\n");
  463. /* reset the device */
  464. iwl_trans_sw_reset(trans);
  465. /* set INIT_DONE flag */
  466. iwl_set_bit(trans, CSR_GP_CNTRL,
  467. BIT(trans->cfg->csr->flag_init_done));
  468. /* and wait for clock stabilization */
  469. if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
  470. udelay(2);
  471. err = iwl_poll_bit(trans, CSR_GP_CNTRL,
  472. BIT(trans->cfg->csr->flag_mac_clock_ready),
  473. BIT(trans->cfg->csr->flag_mac_clock_ready),
  474. 25000);
  475. if (err < 0) {
  476. IWL_DEBUG_INFO(trans,
  477. "Failed to reset the card for the dump\n");
  478. return;
  479. }
  480. }
  481. iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
  482. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  483. IWL_ERR(trans, "Start IWL Error Log Dump:\n");
  484. IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
  485. mvm->status, table.valid);
  486. }
  487. /* Do not change this output - scripts rely on it */
  488. IWL_ERR(mvm, "Loaded firmware version: %s\n", mvm->fw->fw_version);
  489. IWL_ERR(mvm, "0x%08X | %-28s\n", table.error_id,
  490. desc_lookup(table.error_id));
  491. IWL_ERR(mvm, "0x%08X | trm_hw_status0\n", table.trm_hw_status0);
  492. IWL_ERR(mvm, "0x%08X | trm_hw_status1\n", table.trm_hw_status1);
  493. IWL_ERR(mvm, "0x%08X | branchlink2\n", table.blink2);
  494. IWL_ERR(mvm, "0x%08X | interruptlink1\n", table.ilink1);
  495. IWL_ERR(mvm, "0x%08X | interruptlink2\n", table.ilink2);
  496. IWL_ERR(mvm, "0x%08X | data1\n", table.data1);
  497. IWL_ERR(mvm, "0x%08X | data2\n", table.data2);
  498. IWL_ERR(mvm, "0x%08X | data3\n", table.data3);
  499. IWL_ERR(mvm, "0x%08X | beacon time\n", table.bcon_time);
  500. IWL_ERR(mvm, "0x%08X | tsf low\n", table.tsf_low);
  501. IWL_ERR(mvm, "0x%08X | tsf hi\n", table.tsf_hi);
  502. IWL_ERR(mvm, "0x%08X | time gp1\n", table.gp1);
  503. IWL_ERR(mvm, "0x%08X | time gp2\n", table.gp2);
  504. IWL_ERR(mvm, "0x%08X | uCode revision type\n", table.fw_rev_type);
  505. IWL_ERR(mvm, "0x%08X | uCode version major\n", table.major);
  506. IWL_ERR(mvm, "0x%08X | uCode version minor\n", table.minor);
  507. IWL_ERR(mvm, "0x%08X | hw version\n", table.hw_ver);
  508. IWL_ERR(mvm, "0x%08X | board version\n", table.brd_ver);
  509. IWL_ERR(mvm, "0x%08X | hcmd\n", table.hcmd);
  510. IWL_ERR(mvm, "0x%08X | isr0\n", table.isr0);
  511. IWL_ERR(mvm, "0x%08X | isr1\n", table.isr1);
  512. IWL_ERR(mvm, "0x%08X | isr2\n", table.isr2);
  513. IWL_ERR(mvm, "0x%08X | isr3\n", table.isr3);
  514. IWL_ERR(mvm, "0x%08X | isr4\n", table.isr4);
  515. IWL_ERR(mvm, "0x%08X | last cmd Id\n", table.last_cmd_id);
  516. IWL_ERR(mvm, "0x%08X | wait_event\n", table.wait_event);
  517. IWL_ERR(mvm, "0x%08X | l2p_control\n", table.l2p_control);
  518. IWL_ERR(mvm, "0x%08X | l2p_duration\n", table.l2p_duration);
  519. IWL_ERR(mvm, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid);
  520. IWL_ERR(mvm, "0x%08X | l2p_addr_match\n", table.l2p_addr_match);
  521. IWL_ERR(mvm, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel);
  522. IWL_ERR(mvm, "0x%08X | timestamp\n", table.u_timestamp);
  523. IWL_ERR(mvm, "0x%08X | flow_handler\n", table.flow_handler);
  524. }
  525. void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm)
  526. {
  527. if (!test_bit(STATUS_DEVICE_ENABLED, &mvm->trans->status)) {
  528. IWL_ERR(mvm,
  529. "DEVICE_ENABLED bit is not set. Aborting dump.\n");
  530. return;
  531. }
  532. iwl_mvm_dump_lmac_error_log(mvm, mvm->error_event_table[0]);
  533. if (mvm->error_event_table[1])
  534. iwl_mvm_dump_lmac_error_log(mvm, mvm->error_event_table[1]);
  535. iwl_mvm_dump_umac_error_log(mvm);
  536. }
  537. int iwl_mvm_find_free_queue(struct iwl_mvm *mvm, u8 sta_id, u8 minq, u8 maxq)
  538. {
  539. int i;
  540. lockdep_assert_held(&mvm->queue_info_lock);
  541. /* This should not be hit with new TX path */
  542. if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
  543. return -ENOSPC;
  544. /* Start by looking for a free queue */
  545. for (i = minq; i <= maxq; i++)
  546. if (mvm->queue_info[i].hw_queue_refcount == 0 &&
  547. mvm->queue_info[i].status == IWL_MVM_QUEUE_FREE)
  548. return i;
  549. /*
  550. * If no free queue found - settle for an inactive one to reconfigure
  551. * Make sure that the inactive queue either already belongs to this STA,
  552. * or that if it belongs to another one - it isn't the reserved queue
  553. */
  554. for (i = minq; i <= maxq; i++)
  555. if (mvm->queue_info[i].status == IWL_MVM_QUEUE_INACTIVE &&
  556. (sta_id == mvm->queue_info[i].ra_sta_id ||
  557. !mvm->queue_info[i].reserved))
  558. return i;
  559. return -ENOSPC;
  560. }
  561. int iwl_mvm_reconfig_scd(struct iwl_mvm *mvm, int queue, int fifo, int sta_id,
  562. int tid, int frame_limit, u16 ssn)
  563. {
  564. struct iwl_scd_txq_cfg_cmd cmd = {
  565. .scd_queue = queue,
  566. .action = SCD_CFG_ENABLE_QUEUE,
  567. .window = frame_limit,
  568. .sta_id = sta_id,
  569. .ssn = cpu_to_le16(ssn),
  570. .tx_fifo = fifo,
  571. .aggregate = (queue >= IWL_MVM_DQA_MIN_DATA_QUEUE ||
  572. queue == IWL_MVM_DQA_BSS_CLIENT_QUEUE),
  573. .tid = tid,
  574. };
  575. int ret;
  576. if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
  577. return -EINVAL;
  578. spin_lock_bh(&mvm->queue_info_lock);
  579. if (WARN(mvm->queue_info[queue].hw_queue_refcount == 0,
  580. "Trying to reconfig unallocated queue %d\n", queue)) {
  581. spin_unlock_bh(&mvm->queue_info_lock);
  582. return -ENXIO;
  583. }
  584. spin_unlock_bh(&mvm->queue_info_lock);
  585. IWL_DEBUG_TX_QUEUES(mvm, "Reconfig SCD for TXQ #%d\n", queue);
  586. ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd);
  587. WARN_ONCE(ret, "Failed to re-configure queue %d on FIFO %d, ret=%d\n",
  588. queue, fifo, ret);
  589. return ret;
  590. }
  591. static bool iwl_mvm_update_txq_mapping(struct iwl_mvm *mvm, int queue,
  592. int mac80211_queue, u8 sta_id, u8 tid)
  593. {
  594. bool enable_queue = true;
  595. spin_lock_bh(&mvm->queue_info_lock);
  596. /* Make sure this TID isn't already enabled */
  597. if (mvm->queue_info[queue].tid_bitmap & BIT(tid)) {
  598. spin_unlock_bh(&mvm->queue_info_lock);
  599. IWL_ERR(mvm, "Trying to enable TXQ %d with existing TID %d\n",
  600. queue, tid);
  601. return false;
  602. }
  603. /* Update mappings and refcounts */
  604. if (mvm->queue_info[queue].hw_queue_refcount > 0)
  605. enable_queue = false;
  606. if (mac80211_queue != IEEE80211_INVAL_HW_QUEUE) {
  607. WARN(mac80211_queue >=
  608. BITS_PER_BYTE * sizeof(mvm->hw_queue_to_mac80211[0]),
  609. "cannot track mac80211 queue %d (queue %d, sta %d, tid %d)\n",
  610. mac80211_queue, queue, sta_id, tid);
  611. mvm->hw_queue_to_mac80211[queue] |= BIT(mac80211_queue);
  612. }
  613. mvm->queue_info[queue].hw_queue_refcount++;
  614. mvm->queue_info[queue].tid_bitmap |= BIT(tid);
  615. mvm->queue_info[queue].ra_sta_id = sta_id;
  616. if (enable_queue) {
  617. if (tid != IWL_MAX_TID_COUNT)
  618. mvm->queue_info[queue].mac80211_ac =
  619. tid_to_mac80211_ac[tid];
  620. else
  621. mvm->queue_info[queue].mac80211_ac = IEEE80211_AC_VO;
  622. mvm->queue_info[queue].txq_tid = tid;
  623. }
  624. IWL_DEBUG_TX_QUEUES(mvm,
  625. "Enabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
  626. queue, mvm->queue_info[queue].hw_queue_refcount,
  627. mvm->hw_queue_to_mac80211[queue]);
  628. spin_unlock_bh(&mvm->queue_info_lock);
  629. return enable_queue;
  630. }
  631. int iwl_mvm_tvqm_enable_txq(struct iwl_mvm *mvm, int mac80211_queue,
  632. u8 sta_id, u8 tid, unsigned int timeout)
  633. {
  634. int queue, size = IWL_DEFAULT_QUEUE_SIZE;
  635. if (tid == IWL_MAX_TID_COUNT) {
  636. tid = IWL_MGMT_TID;
  637. size = IWL_MGMT_QUEUE_SIZE;
  638. }
  639. queue = iwl_trans_txq_alloc(mvm->trans,
  640. cpu_to_le16(TX_QUEUE_CFG_ENABLE_QUEUE),
  641. sta_id, tid, SCD_QUEUE_CFG, size, timeout);
  642. if (queue < 0) {
  643. IWL_DEBUG_TX_QUEUES(mvm,
  644. "Failed allocating TXQ for sta %d tid %d, ret: %d\n",
  645. sta_id, tid, queue);
  646. return queue;
  647. }
  648. IWL_DEBUG_TX_QUEUES(mvm, "Enabling TXQ #%d for sta %d tid %d\n",
  649. queue, sta_id, tid);
  650. mvm->hw_queue_to_mac80211[queue] |= BIT(mac80211_queue);
  651. IWL_DEBUG_TX_QUEUES(mvm,
  652. "Enabling TXQ #%d (mac80211 map:0x%x)\n",
  653. queue, mvm->hw_queue_to_mac80211[queue]);
  654. return queue;
  655. }
  656. bool iwl_mvm_enable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
  657. u16 ssn, const struct iwl_trans_txq_scd_cfg *cfg,
  658. unsigned int wdg_timeout)
  659. {
  660. struct iwl_scd_txq_cfg_cmd cmd = {
  661. .scd_queue = queue,
  662. .action = SCD_CFG_ENABLE_QUEUE,
  663. .window = cfg->frame_limit,
  664. .sta_id = cfg->sta_id,
  665. .ssn = cpu_to_le16(ssn),
  666. .tx_fifo = cfg->fifo,
  667. .aggregate = cfg->aggregate,
  668. .tid = cfg->tid,
  669. };
  670. bool inc_ssn;
  671. if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
  672. return false;
  673. /* Send the enabling command if we need to */
  674. if (!iwl_mvm_update_txq_mapping(mvm, queue, mac80211_queue,
  675. cfg->sta_id, cfg->tid))
  676. return false;
  677. inc_ssn = iwl_trans_txq_enable_cfg(mvm->trans, queue, ssn,
  678. NULL, wdg_timeout);
  679. if (inc_ssn)
  680. le16_add_cpu(&cmd.ssn, 1);
  681. WARN(iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd),
  682. "Failed to configure queue %d on FIFO %d\n", queue, cfg->fifo);
  683. return inc_ssn;
  684. }
  685. int iwl_mvm_disable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
  686. u8 tid, u8 flags)
  687. {
  688. struct iwl_scd_txq_cfg_cmd cmd = {
  689. .scd_queue = queue,
  690. .action = SCD_CFG_DISABLE_QUEUE,
  691. };
  692. bool remove_mac_queue = mac80211_queue != IEEE80211_INVAL_HW_QUEUE;
  693. int ret;
  694. if (WARN_ON(remove_mac_queue && mac80211_queue >= IEEE80211_MAX_QUEUES))
  695. return -EINVAL;
  696. if (iwl_mvm_has_new_tx_api(mvm)) {
  697. spin_lock_bh(&mvm->queue_info_lock);
  698. if (remove_mac_queue)
  699. mvm->hw_queue_to_mac80211[queue] &=
  700. ~BIT(mac80211_queue);
  701. spin_unlock_bh(&mvm->queue_info_lock);
  702. iwl_trans_txq_free(mvm->trans, queue);
  703. return 0;
  704. }
  705. spin_lock_bh(&mvm->queue_info_lock);
  706. if (WARN_ON(mvm->queue_info[queue].hw_queue_refcount == 0)) {
  707. spin_unlock_bh(&mvm->queue_info_lock);
  708. return 0;
  709. }
  710. mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
  711. /*
  712. * If there is another TID with the same AC - don't remove the MAC queue
  713. * from the mapping
  714. */
  715. if (tid < IWL_MAX_TID_COUNT) {
  716. unsigned long tid_bitmap =
  717. mvm->queue_info[queue].tid_bitmap;
  718. int ac = tid_to_mac80211_ac[tid];
  719. int i;
  720. for_each_set_bit(i, &tid_bitmap, IWL_MAX_TID_COUNT) {
  721. if (tid_to_mac80211_ac[i] == ac)
  722. remove_mac_queue = false;
  723. }
  724. }
  725. if (remove_mac_queue)
  726. mvm->hw_queue_to_mac80211[queue] &=
  727. ~BIT(mac80211_queue);
  728. mvm->queue_info[queue].hw_queue_refcount--;
  729. cmd.action = mvm->queue_info[queue].hw_queue_refcount ?
  730. SCD_CFG_ENABLE_QUEUE : SCD_CFG_DISABLE_QUEUE;
  731. if (cmd.action == SCD_CFG_DISABLE_QUEUE)
  732. mvm->queue_info[queue].status = IWL_MVM_QUEUE_FREE;
  733. IWL_DEBUG_TX_QUEUES(mvm,
  734. "Disabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
  735. queue,
  736. mvm->queue_info[queue].hw_queue_refcount,
  737. mvm->hw_queue_to_mac80211[queue]);
  738. /* If the queue is still enabled - nothing left to do in this func */
  739. if (cmd.action == SCD_CFG_ENABLE_QUEUE) {
  740. spin_unlock_bh(&mvm->queue_info_lock);
  741. return 0;
  742. }
  743. cmd.sta_id = mvm->queue_info[queue].ra_sta_id;
  744. cmd.tid = mvm->queue_info[queue].txq_tid;
  745. /* Make sure queue info is correct even though we overwrite it */
  746. WARN(mvm->queue_info[queue].hw_queue_refcount ||
  747. mvm->queue_info[queue].tid_bitmap ||
  748. mvm->hw_queue_to_mac80211[queue],
  749. "TXQ #%d info out-of-sync - refcount=%d, mac map=0x%x, tid=0x%x\n",
  750. queue, mvm->queue_info[queue].hw_queue_refcount,
  751. mvm->hw_queue_to_mac80211[queue],
  752. mvm->queue_info[queue].tid_bitmap);
  753. /* If we are here - the queue is freed and we can zero out these vals */
  754. mvm->queue_info[queue].hw_queue_refcount = 0;
  755. mvm->queue_info[queue].tid_bitmap = 0;
  756. mvm->hw_queue_to_mac80211[queue] = 0;
  757. /* Regardless if this is a reserved TXQ for a STA - mark it as false */
  758. mvm->queue_info[queue].reserved = false;
  759. spin_unlock_bh(&mvm->queue_info_lock);
  760. iwl_trans_txq_disable(mvm->trans, queue, false);
  761. ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, flags,
  762. sizeof(struct iwl_scd_txq_cfg_cmd), &cmd);
  763. if (ret)
  764. IWL_ERR(mvm, "Failed to disable queue %d (ret=%d)\n",
  765. queue, ret);
  766. return ret;
  767. }
  768. /**
  769. * iwl_mvm_send_lq_cmd() - Send link quality command
  770. * @sync: This command can be sent synchronously.
  771. *
  772. * The link quality command is sent as the last step of station creation.
  773. * This is the special case in which init is set and we call a callback in
  774. * this case to clear the state indicating that station creation is in
  775. * progress.
  776. */
  777. int iwl_mvm_send_lq_cmd(struct iwl_mvm *mvm, struct iwl_lq_cmd *lq, bool sync)
  778. {
  779. struct iwl_host_cmd cmd = {
  780. .id = LQ_CMD,
  781. .len = { sizeof(struct iwl_lq_cmd), },
  782. .flags = sync ? 0 : CMD_ASYNC,
  783. .data = { lq, },
  784. };
  785. if (WARN_ON(lq->sta_id == IWL_MVM_INVALID_STA ||
  786. iwl_mvm_has_tlc_offload(mvm)))
  787. return -EINVAL;
  788. return iwl_mvm_send_cmd(mvm, &cmd);
  789. }
  790. /**
  791. * iwl_mvm_update_smps - Get a request to change the SMPS mode
  792. * @req_type: The part of the driver who call for a change.
  793. * @smps_requests: The request to change the SMPS mode.
  794. *
  795. * Get a requst to change the SMPS mode,
  796. * and change it according to all other requests in the driver.
  797. */
  798. void iwl_mvm_update_smps(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  799. enum iwl_mvm_smps_type_request req_type,
  800. enum ieee80211_smps_mode smps_request)
  801. {
  802. struct iwl_mvm_vif *mvmvif;
  803. enum ieee80211_smps_mode smps_mode;
  804. int i;
  805. lockdep_assert_held(&mvm->mutex);
  806. /* SMPS is irrelevant for NICs that don't have at least 2 RX antenna */
  807. if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
  808. return;
  809. if (vif->type == NL80211_IFTYPE_AP)
  810. smps_mode = IEEE80211_SMPS_OFF;
  811. else
  812. smps_mode = IEEE80211_SMPS_AUTOMATIC;
  813. mvmvif = iwl_mvm_vif_from_mac80211(vif);
  814. mvmvif->smps_requests[req_type] = smps_request;
  815. for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
  816. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC) {
  817. smps_mode = IEEE80211_SMPS_STATIC;
  818. break;
  819. }
  820. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
  821. smps_mode = IEEE80211_SMPS_DYNAMIC;
  822. }
  823. ieee80211_request_smps(vif, smps_mode);
  824. }
  825. int iwl_mvm_request_statistics(struct iwl_mvm *mvm, bool clear)
  826. {
  827. struct iwl_statistics_cmd scmd = {
  828. .flags = clear ? cpu_to_le32(IWL_STATISTICS_FLG_CLEAR) : 0,
  829. };
  830. struct iwl_host_cmd cmd = {
  831. .id = STATISTICS_CMD,
  832. .len[0] = sizeof(scmd),
  833. .data[0] = &scmd,
  834. .flags = CMD_WANT_SKB,
  835. };
  836. int ret;
  837. ret = iwl_mvm_send_cmd(mvm, &cmd);
  838. if (ret)
  839. return ret;
  840. iwl_mvm_handle_rx_statistics(mvm, cmd.resp_pkt);
  841. iwl_free_resp(&cmd);
  842. if (clear)
  843. iwl_mvm_accu_radio_stats(mvm);
  844. return 0;
  845. }
  846. void iwl_mvm_accu_radio_stats(struct iwl_mvm *mvm)
  847. {
  848. mvm->accu_radio_stats.rx_time += mvm->radio_stats.rx_time;
  849. mvm->accu_radio_stats.tx_time += mvm->radio_stats.tx_time;
  850. mvm->accu_radio_stats.on_time_rf += mvm->radio_stats.on_time_rf;
  851. mvm->accu_radio_stats.on_time_scan += mvm->radio_stats.on_time_scan;
  852. }
  853. static void iwl_mvm_diversity_iter(void *_data, u8 *mac,
  854. struct ieee80211_vif *vif)
  855. {
  856. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  857. bool *result = _data;
  858. int i;
  859. for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
  860. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC ||
  861. mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
  862. *result = false;
  863. }
  864. }
  865. bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm)
  866. {
  867. bool result = true;
  868. lockdep_assert_held(&mvm->mutex);
  869. if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
  870. return false;
  871. if (mvm->cfg->rx_with_siso_diversity)
  872. return false;
  873. ieee80211_iterate_active_interfaces_atomic(
  874. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  875. iwl_mvm_diversity_iter, &result);
  876. return result;
  877. }
  878. int iwl_mvm_update_low_latency(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  879. bool low_latency,
  880. enum iwl_mvm_low_latency_cause cause)
  881. {
  882. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  883. int res;
  884. bool prev;
  885. lockdep_assert_held(&mvm->mutex);
  886. prev = iwl_mvm_vif_low_latency(mvmvif);
  887. iwl_mvm_vif_set_low_latency(mvmvif, low_latency, cause);
  888. low_latency = iwl_mvm_vif_low_latency(mvmvif);
  889. if (low_latency == prev)
  890. return 0;
  891. if (fw_has_capa(&mvm->fw->ucode_capa,
  892. IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA)) {
  893. struct iwl_mac_low_latency_cmd cmd = {
  894. .mac_id = cpu_to_le32(mvmvif->id)
  895. };
  896. if (low_latency) {
  897. /* currently we don't care about the direction */
  898. cmd.low_latency_rx = 1;
  899. cmd.low_latency_tx = 1;
  900. }
  901. res = iwl_mvm_send_cmd_pdu(mvm,
  902. iwl_cmd_id(LOW_LATENCY_CMD,
  903. MAC_CONF_GROUP, 0),
  904. 0, sizeof(cmd), &cmd);
  905. if (res)
  906. IWL_ERR(mvm, "Failed to send low latency command\n");
  907. }
  908. res = iwl_mvm_update_quotas(mvm, false, NULL);
  909. if (res)
  910. return res;
  911. iwl_mvm_bt_coex_vif_change(mvm);
  912. return iwl_mvm_power_update_mac(mvm);
  913. }
  914. struct iwl_mvm_low_latency_iter {
  915. bool result;
  916. bool result_per_band[NUM_NL80211_BANDS];
  917. };
  918. static void iwl_mvm_ll_iter(void *_data, u8 *mac, struct ieee80211_vif *vif)
  919. {
  920. struct iwl_mvm_low_latency_iter *result = _data;
  921. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  922. enum nl80211_band band;
  923. if (iwl_mvm_vif_low_latency(mvmvif)) {
  924. result->result = true;
  925. if (!mvmvif->phy_ctxt)
  926. return;
  927. band = mvmvif->phy_ctxt->channel->band;
  928. result->result_per_band[band] = true;
  929. }
  930. }
  931. bool iwl_mvm_low_latency(struct iwl_mvm *mvm)
  932. {
  933. struct iwl_mvm_low_latency_iter data = {};
  934. ieee80211_iterate_active_interfaces_atomic(
  935. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  936. iwl_mvm_ll_iter, &data);
  937. return data.result;
  938. }
  939. bool iwl_mvm_low_latency_band(struct iwl_mvm *mvm, enum nl80211_band band)
  940. {
  941. struct iwl_mvm_low_latency_iter data = {};
  942. ieee80211_iterate_active_interfaces_atomic(
  943. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  944. iwl_mvm_ll_iter, &data);
  945. return data.result_per_band[band];
  946. }
  947. struct iwl_bss_iter_data {
  948. struct ieee80211_vif *vif;
  949. bool error;
  950. };
  951. static void iwl_mvm_bss_iface_iterator(void *_data, u8 *mac,
  952. struct ieee80211_vif *vif)
  953. {
  954. struct iwl_bss_iter_data *data = _data;
  955. if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
  956. return;
  957. if (data->vif) {
  958. data->error = true;
  959. return;
  960. }
  961. data->vif = vif;
  962. }
  963. struct ieee80211_vif *iwl_mvm_get_bss_vif(struct iwl_mvm *mvm)
  964. {
  965. struct iwl_bss_iter_data bss_iter_data = {};
  966. ieee80211_iterate_active_interfaces_atomic(
  967. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  968. iwl_mvm_bss_iface_iterator, &bss_iter_data);
  969. if (bss_iter_data.error) {
  970. IWL_ERR(mvm, "More than one managed interface active!\n");
  971. return ERR_PTR(-EINVAL);
  972. }
  973. return bss_iter_data.vif;
  974. }
  975. struct iwl_sta_iter_data {
  976. bool assoc;
  977. };
  978. static void iwl_mvm_sta_iface_iterator(void *_data, u8 *mac,
  979. struct ieee80211_vif *vif)
  980. {
  981. struct iwl_sta_iter_data *data = _data;
  982. if (vif->type != NL80211_IFTYPE_STATION)
  983. return;
  984. if (vif->bss_conf.assoc)
  985. data->assoc = true;
  986. }
  987. bool iwl_mvm_is_vif_assoc(struct iwl_mvm *mvm)
  988. {
  989. struct iwl_sta_iter_data data = {
  990. .assoc = false,
  991. };
  992. ieee80211_iterate_active_interfaces_atomic(mvm->hw,
  993. IEEE80211_IFACE_ITER_NORMAL,
  994. iwl_mvm_sta_iface_iterator,
  995. &data);
  996. return data.assoc;
  997. }
  998. unsigned int iwl_mvm_get_wd_timeout(struct iwl_mvm *mvm,
  999. struct ieee80211_vif *vif,
  1000. bool tdls, bool cmd_q)
  1001. {
  1002. struct iwl_fw_dbg_trigger_tlv *trigger;
  1003. struct iwl_fw_dbg_trigger_txq_timer *txq_timer;
  1004. unsigned int default_timeout =
  1005. cmd_q ? IWL_DEF_WD_TIMEOUT : mvm->cfg->base_params->wd_timeout;
  1006. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS)) {
  1007. /*
  1008. * We can't know when the station is asleep or awake, so we
  1009. * must disable the queue hang detection.
  1010. */
  1011. if (fw_has_capa(&mvm->fw->ucode_capa,
  1012. IWL_UCODE_TLV_CAPA_STA_PM_NOTIF) &&
  1013. vif && vif->type == NL80211_IFTYPE_AP)
  1014. return IWL_WATCHDOG_DISABLED;
  1015. return iwlmvm_mod_params.tfd_q_hang_detect ?
  1016. default_timeout : IWL_WATCHDOG_DISABLED;
  1017. }
  1018. trigger = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS);
  1019. txq_timer = (void *)trigger->data;
  1020. if (tdls)
  1021. return le32_to_cpu(txq_timer->tdls);
  1022. if (cmd_q)
  1023. return le32_to_cpu(txq_timer->command_queue);
  1024. if (WARN_ON(!vif))
  1025. return default_timeout;
  1026. switch (ieee80211_vif_type_p2p(vif)) {
  1027. case NL80211_IFTYPE_ADHOC:
  1028. return le32_to_cpu(txq_timer->ibss);
  1029. case NL80211_IFTYPE_STATION:
  1030. return le32_to_cpu(txq_timer->bss);
  1031. case NL80211_IFTYPE_AP:
  1032. return le32_to_cpu(txq_timer->softap);
  1033. case NL80211_IFTYPE_P2P_CLIENT:
  1034. return le32_to_cpu(txq_timer->p2p_client);
  1035. case NL80211_IFTYPE_P2P_GO:
  1036. return le32_to_cpu(txq_timer->p2p_go);
  1037. case NL80211_IFTYPE_P2P_DEVICE:
  1038. return le32_to_cpu(txq_timer->p2p_device);
  1039. case NL80211_IFTYPE_MONITOR:
  1040. return default_timeout;
  1041. default:
  1042. WARN_ON(1);
  1043. return mvm->cfg->base_params->wd_timeout;
  1044. }
  1045. }
  1046. void iwl_mvm_connection_loss(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  1047. const char *errmsg)
  1048. {
  1049. struct iwl_fw_dbg_trigger_tlv *trig;
  1050. struct iwl_fw_dbg_trigger_mlme *trig_mlme;
  1051. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_MLME))
  1052. goto out;
  1053. trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_MLME);
  1054. trig_mlme = (void *)trig->data;
  1055. if (!iwl_fw_dbg_trigger_check_stop(&mvm->fwrt,
  1056. ieee80211_vif_to_wdev(vif), trig))
  1057. goto out;
  1058. if (trig_mlme->stop_connection_loss &&
  1059. --trig_mlme->stop_connection_loss)
  1060. goto out;
  1061. iwl_fw_dbg_collect_trig(&mvm->fwrt, trig, "%s", errmsg);
  1062. out:
  1063. ieee80211_connection_loss(vif);
  1064. }
  1065. /*
  1066. * Remove inactive TIDs of a given queue.
  1067. * If all queue TIDs are inactive - mark the queue as inactive
  1068. * If only some the queue TIDs are inactive - unmap them from the queue
  1069. */
  1070. static void iwl_mvm_remove_inactive_tids(struct iwl_mvm *mvm,
  1071. struct iwl_mvm_sta *mvmsta, int queue,
  1072. unsigned long tid_bitmap)
  1073. {
  1074. int tid;
  1075. lockdep_assert_held(&mvmsta->lock);
  1076. lockdep_assert_held(&mvm->queue_info_lock);
  1077. if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
  1078. return;
  1079. /* Go over all non-active TIDs, incl. IWL_MAX_TID_COUNT (for mgmt) */
  1080. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  1081. /* If some TFDs are still queued - don't mark TID as inactive */
  1082. if (iwl_mvm_tid_queued(mvm, &mvmsta->tid_data[tid]))
  1083. tid_bitmap &= ~BIT(tid);
  1084. /* Don't mark as inactive any TID that has an active BA */
  1085. if (mvmsta->tid_data[tid].state != IWL_AGG_OFF)
  1086. tid_bitmap &= ~BIT(tid);
  1087. }
  1088. /* If all TIDs in the queue are inactive - mark queue as inactive. */
  1089. if (tid_bitmap == mvm->queue_info[queue].tid_bitmap) {
  1090. mvm->queue_info[queue].status = IWL_MVM_QUEUE_INACTIVE;
  1091. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1)
  1092. mvmsta->tid_data[tid].is_tid_active = false;
  1093. IWL_DEBUG_TX_QUEUES(mvm, "Queue %d marked as inactive\n",
  1094. queue);
  1095. return;
  1096. }
  1097. /*
  1098. * If we are here, this is a shared queue and not all TIDs timed-out.
  1099. * Remove the ones that did.
  1100. */
  1101. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  1102. int mac_queue = mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]];
  1103. mvmsta->tid_data[tid].txq_id = IWL_MVM_INVALID_QUEUE;
  1104. mvm->hw_queue_to_mac80211[queue] &= ~BIT(mac_queue);
  1105. mvm->queue_info[queue].hw_queue_refcount--;
  1106. mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
  1107. mvmsta->tid_data[tid].is_tid_active = false;
  1108. IWL_DEBUG_TX_QUEUES(mvm,
  1109. "Removing inactive TID %d from shared Q:%d\n",
  1110. tid, queue);
  1111. }
  1112. IWL_DEBUG_TX_QUEUES(mvm,
  1113. "TXQ #%d left with tid bitmap 0x%x\n", queue,
  1114. mvm->queue_info[queue].tid_bitmap);
  1115. /*
  1116. * There may be different TIDs with the same mac queues, so make
  1117. * sure all TIDs have existing corresponding mac queues enabled
  1118. */
  1119. tid_bitmap = mvm->queue_info[queue].tid_bitmap;
  1120. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  1121. mvm->hw_queue_to_mac80211[queue] |=
  1122. BIT(mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]]);
  1123. }
  1124. /* If the queue is marked as shared - "unshare" it */
  1125. if (mvm->queue_info[queue].hw_queue_refcount == 1 &&
  1126. mvm->queue_info[queue].status == IWL_MVM_QUEUE_SHARED) {
  1127. mvm->queue_info[queue].status = IWL_MVM_QUEUE_RECONFIGURING;
  1128. IWL_DEBUG_TX_QUEUES(mvm, "Marking Q:%d for reconfig\n",
  1129. queue);
  1130. }
  1131. }
  1132. void iwl_mvm_inactivity_check(struct iwl_mvm *mvm)
  1133. {
  1134. unsigned long timeout_queues_map = 0;
  1135. unsigned long now = jiffies;
  1136. int i;
  1137. if (iwl_mvm_has_new_tx_api(mvm))
  1138. return;
  1139. spin_lock_bh(&mvm->queue_info_lock);
  1140. for (i = 0; i < IWL_MAX_HW_QUEUES; i++)
  1141. if (mvm->queue_info[i].hw_queue_refcount > 0)
  1142. timeout_queues_map |= BIT(i);
  1143. spin_unlock_bh(&mvm->queue_info_lock);
  1144. rcu_read_lock();
  1145. /*
  1146. * If a queue time outs - mark it as INACTIVE (don't remove right away
  1147. * if we don't have to.) This is an optimization in case traffic comes
  1148. * later, and we don't HAVE to use a currently-inactive queue
  1149. */
  1150. for_each_set_bit(i, &timeout_queues_map, IWL_MAX_HW_QUEUES) {
  1151. struct ieee80211_sta *sta;
  1152. struct iwl_mvm_sta *mvmsta;
  1153. u8 sta_id;
  1154. int tid;
  1155. unsigned long inactive_tid_bitmap = 0;
  1156. unsigned long queue_tid_bitmap;
  1157. spin_lock_bh(&mvm->queue_info_lock);
  1158. queue_tid_bitmap = mvm->queue_info[i].tid_bitmap;
  1159. /* If TXQ isn't in active use anyway - nothing to do here... */
  1160. if (mvm->queue_info[i].status != IWL_MVM_QUEUE_READY &&
  1161. mvm->queue_info[i].status != IWL_MVM_QUEUE_SHARED) {
  1162. spin_unlock_bh(&mvm->queue_info_lock);
  1163. continue;
  1164. }
  1165. /* Check to see if there are inactive TIDs on this queue */
  1166. for_each_set_bit(tid, &queue_tid_bitmap,
  1167. IWL_MAX_TID_COUNT + 1) {
  1168. if (time_after(mvm->queue_info[i].last_frame_time[tid] +
  1169. IWL_MVM_DQA_QUEUE_TIMEOUT, now))
  1170. continue;
  1171. inactive_tid_bitmap |= BIT(tid);
  1172. }
  1173. spin_unlock_bh(&mvm->queue_info_lock);
  1174. /* If all TIDs are active - finish check on this queue */
  1175. if (!inactive_tid_bitmap)
  1176. continue;
  1177. /*
  1178. * If we are here - the queue hadn't been served recently and is
  1179. * in use
  1180. */
  1181. sta_id = mvm->queue_info[i].ra_sta_id;
  1182. sta = rcu_dereference(mvm->fw_id_to_mac_id[sta_id]);
  1183. /*
  1184. * If the STA doesn't exist anymore, it isn't an error. It could
  1185. * be that it was removed since getting the queues, and in this
  1186. * case it should've inactivated its queues anyway.
  1187. */
  1188. if (IS_ERR_OR_NULL(sta))
  1189. continue;
  1190. mvmsta = iwl_mvm_sta_from_mac80211(sta);
  1191. spin_lock_bh(&mvmsta->lock);
  1192. spin_lock(&mvm->queue_info_lock);
  1193. iwl_mvm_remove_inactive_tids(mvm, mvmsta, i,
  1194. inactive_tid_bitmap);
  1195. spin_unlock(&mvm->queue_info_lock);
  1196. spin_unlock_bh(&mvmsta->lock);
  1197. }
  1198. rcu_read_unlock();
  1199. }
  1200. void iwl_mvm_event_frame_timeout_callback(struct iwl_mvm *mvm,
  1201. struct ieee80211_vif *vif,
  1202. const struct ieee80211_sta *sta,
  1203. u16 tid)
  1204. {
  1205. struct iwl_fw_dbg_trigger_tlv *trig;
  1206. struct iwl_fw_dbg_trigger_ba *ba_trig;
  1207. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_BA))
  1208. return;
  1209. trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_BA);
  1210. ba_trig = (void *)trig->data;
  1211. if (!iwl_fw_dbg_trigger_check_stop(&mvm->fwrt,
  1212. ieee80211_vif_to_wdev(vif), trig))
  1213. return;
  1214. if (!(le16_to_cpu(ba_trig->frame_timeout) & BIT(tid)))
  1215. return;
  1216. iwl_fw_dbg_collect_trig(&mvm->fwrt, trig,
  1217. "Frame from %pM timed out, tid %d",
  1218. sta->addr, tid);
  1219. }
  1220. u8 iwl_mvm_tcm_load_percentage(u32 airtime, u32 elapsed)
  1221. {
  1222. if (!elapsed)
  1223. return 0;
  1224. return (100 * airtime / elapsed) / USEC_PER_MSEC;
  1225. }
  1226. static enum iwl_mvm_traffic_load
  1227. iwl_mvm_tcm_load(struct iwl_mvm *mvm, u32 airtime, unsigned long elapsed)
  1228. {
  1229. u8 load = iwl_mvm_tcm_load_percentage(airtime, elapsed);
  1230. if (load > IWL_MVM_TCM_LOAD_HIGH_THRESH)
  1231. return IWL_MVM_TRAFFIC_HIGH;
  1232. if (load > IWL_MVM_TCM_LOAD_MEDIUM_THRESH)
  1233. return IWL_MVM_TRAFFIC_MEDIUM;
  1234. return IWL_MVM_TRAFFIC_LOW;
  1235. }
  1236. struct iwl_mvm_tcm_iter_data {
  1237. struct iwl_mvm *mvm;
  1238. bool any_sent;
  1239. };
  1240. static void iwl_mvm_tcm_iter(void *_data, u8 *mac, struct ieee80211_vif *vif)
  1241. {
  1242. struct iwl_mvm_tcm_iter_data *data = _data;
  1243. struct iwl_mvm *mvm = data->mvm;
  1244. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  1245. bool low_latency, prev = mvmvif->low_latency & LOW_LATENCY_TRAFFIC;
  1246. if (mvmvif->id >= NUM_MAC_INDEX_DRIVER)
  1247. return;
  1248. low_latency = mvm->tcm.result.low_latency[mvmvif->id];
  1249. if (!mvm->tcm.result.change[mvmvif->id] &&
  1250. prev == low_latency) {
  1251. iwl_mvm_update_quotas(mvm, false, NULL);
  1252. return;
  1253. }
  1254. if (prev != low_latency) {
  1255. /* this sends traffic load and updates quota as well */
  1256. iwl_mvm_update_low_latency(mvm, vif, low_latency,
  1257. LOW_LATENCY_TRAFFIC);
  1258. } else {
  1259. iwl_mvm_update_quotas(mvm, false, NULL);
  1260. }
  1261. data->any_sent = true;
  1262. }
  1263. static void iwl_mvm_tcm_results(struct iwl_mvm *mvm)
  1264. {
  1265. struct iwl_mvm_tcm_iter_data data = {
  1266. .mvm = mvm,
  1267. .any_sent = false,
  1268. };
  1269. mutex_lock(&mvm->mutex);
  1270. ieee80211_iterate_active_interfaces(
  1271. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  1272. iwl_mvm_tcm_iter, &data);
  1273. if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN))
  1274. iwl_mvm_config_scan(mvm);
  1275. mutex_unlock(&mvm->mutex);
  1276. }
  1277. static void iwl_mvm_tcm_uapsd_nonagg_detected_wk(struct work_struct *wk)
  1278. {
  1279. struct iwl_mvm *mvm;
  1280. struct iwl_mvm_vif *mvmvif;
  1281. struct ieee80211_vif *vif;
  1282. mvmvif = container_of(wk, struct iwl_mvm_vif,
  1283. uapsd_nonagg_detected_wk.work);
  1284. vif = container_of((void *)mvmvif, struct ieee80211_vif, drv_priv);
  1285. mvm = mvmvif->mvm;
  1286. if (mvm->tcm.data[mvmvif->id].opened_rx_ba_sessions)
  1287. return;
  1288. /* remember that this AP is broken */
  1289. memcpy(mvm->uapsd_noagg_bssids[mvm->uapsd_noagg_bssid_write_idx].addr,
  1290. vif->bss_conf.bssid, ETH_ALEN);
  1291. mvm->uapsd_noagg_bssid_write_idx++;
  1292. if (mvm->uapsd_noagg_bssid_write_idx >= IWL_MVM_UAPSD_NOAGG_LIST_LEN)
  1293. mvm->uapsd_noagg_bssid_write_idx = 0;
  1294. iwl_mvm_connection_loss(mvm, vif,
  1295. "AP isn't using AMPDU with uAPSD enabled");
  1296. }
  1297. static void iwl_mvm_uapsd_agg_disconnect_iter(void *data, u8 *mac,
  1298. struct ieee80211_vif *vif)
  1299. {
  1300. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  1301. struct iwl_mvm *mvm = mvmvif->mvm;
  1302. int *mac_id = data;
  1303. if (vif->type != NL80211_IFTYPE_STATION)
  1304. return;
  1305. if (mvmvif->id != *mac_id)
  1306. return;
  1307. if (!vif->bss_conf.assoc)
  1308. return;
  1309. if (!mvmvif->queue_params[IEEE80211_AC_VO].uapsd &&
  1310. !mvmvif->queue_params[IEEE80211_AC_VI].uapsd &&
  1311. !mvmvif->queue_params[IEEE80211_AC_BE].uapsd &&
  1312. !mvmvif->queue_params[IEEE80211_AC_BK].uapsd)
  1313. return;
  1314. if (mvm->tcm.data[*mac_id].uapsd_nonagg_detect.detected)
  1315. return;
  1316. mvm->tcm.data[*mac_id].uapsd_nonagg_detect.detected = true;
  1317. IWL_INFO(mvm,
  1318. "detected AP should do aggregation but isn't, likely due to U-APSD\n");
  1319. schedule_delayed_work(&mvmvif->uapsd_nonagg_detected_wk, 15 * HZ);
  1320. }
  1321. static void iwl_mvm_check_uapsd_agg_expected_tpt(struct iwl_mvm *mvm,
  1322. unsigned int elapsed,
  1323. int mac)
  1324. {
  1325. u64 bytes = mvm->tcm.data[mac].uapsd_nonagg_detect.rx_bytes;
  1326. u64 tpt;
  1327. unsigned long rate;
  1328. rate = ewma_rate_read(&mvm->tcm.data[mac].uapsd_nonagg_detect.rate);
  1329. if (!rate || mvm->tcm.data[mac].opened_rx_ba_sessions ||
  1330. mvm->tcm.data[mac].uapsd_nonagg_detect.detected)
  1331. return;
  1332. if (iwl_mvm_has_new_rx_api(mvm)) {
  1333. tpt = 8 * bytes; /* kbps */
  1334. do_div(tpt, elapsed);
  1335. rate *= 1000; /* kbps */
  1336. if (tpt < 22 * rate / 100)
  1337. return;
  1338. } else {
  1339. /*
  1340. * the rate here is actually the threshold, in 100Kbps units,
  1341. * so do the needed conversion from bytes to 100Kbps:
  1342. * 100kb = bits / (100 * 1000),
  1343. * 100kbps = 100kb / (msecs / 1000) ==
  1344. * (bits / (100 * 1000)) / (msecs / 1000) ==
  1345. * bits / (100 * msecs)
  1346. */
  1347. tpt = (8 * bytes);
  1348. do_div(tpt, elapsed * 100);
  1349. if (tpt < rate)
  1350. return;
  1351. }
  1352. ieee80211_iterate_active_interfaces_atomic(
  1353. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  1354. iwl_mvm_uapsd_agg_disconnect_iter, &mac);
  1355. }
  1356. static void iwl_mvm_tcm_iterator(void *_data, u8 *mac,
  1357. struct ieee80211_vif *vif)
  1358. {
  1359. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  1360. u32 *band = _data;
  1361. if (!mvmvif->phy_ctxt)
  1362. return;
  1363. band[mvmvif->id] = mvmvif->phy_ctxt->channel->band;
  1364. }
  1365. static unsigned long iwl_mvm_calc_tcm_stats(struct iwl_mvm *mvm,
  1366. unsigned long ts,
  1367. bool handle_uapsd)
  1368. {
  1369. unsigned int elapsed = jiffies_to_msecs(ts - mvm->tcm.ts);
  1370. unsigned int uapsd_elapsed =
  1371. jiffies_to_msecs(ts - mvm->tcm.uapsd_nonagg_ts);
  1372. u32 total_airtime = 0;
  1373. u32 band_airtime[NUM_NL80211_BANDS] = {0};
  1374. u32 band[NUM_MAC_INDEX_DRIVER] = {0};
  1375. int ac, mac, i;
  1376. bool low_latency = false;
  1377. enum iwl_mvm_traffic_load load, band_load;
  1378. bool handle_ll = time_after(ts, mvm->tcm.ll_ts + MVM_LL_PERIOD);
  1379. if (handle_ll)
  1380. mvm->tcm.ll_ts = ts;
  1381. if (handle_uapsd)
  1382. mvm->tcm.uapsd_nonagg_ts = ts;
  1383. mvm->tcm.result.elapsed = elapsed;
  1384. ieee80211_iterate_active_interfaces_atomic(mvm->hw,
  1385. IEEE80211_IFACE_ITER_NORMAL,
  1386. iwl_mvm_tcm_iterator,
  1387. &band);
  1388. for (mac = 0; mac < NUM_MAC_INDEX_DRIVER; mac++) {
  1389. struct iwl_mvm_tcm_mac *mdata = &mvm->tcm.data[mac];
  1390. u32 vo_vi_pkts = 0;
  1391. u32 airtime = mdata->rx.airtime + mdata->tx.airtime;
  1392. total_airtime += airtime;
  1393. band_airtime[band[mac]] += airtime;
  1394. load = iwl_mvm_tcm_load(mvm, airtime, elapsed);
  1395. mvm->tcm.result.change[mac] = load != mvm->tcm.result.load[mac];
  1396. mvm->tcm.result.load[mac] = load;
  1397. mvm->tcm.result.airtime[mac] = airtime;
  1398. for (ac = IEEE80211_AC_VO; ac <= IEEE80211_AC_VI; ac++)
  1399. vo_vi_pkts += mdata->rx.pkts[ac] +
  1400. mdata->tx.pkts[ac];
  1401. /* enable immediately with enough packets but defer disabling */
  1402. if (vo_vi_pkts > IWL_MVM_TCM_LOWLAT_ENABLE_THRESH)
  1403. mvm->tcm.result.low_latency[mac] = true;
  1404. else if (handle_ll)
  1405. mvm->tcm.result.low_latency[mac] = false;
  1406. if (handle_ll) {
  1407. /* clear old data */
  1408. memset(&mdata->rx.pkts, 0, sizeof(mdata->rx.pkts));
  1409. memset(&mdata->tx.pkts, 0, sizeof(mdata->tx.pkts));
  1410. }
  1411. low_latency |= mvm->tcm.result.low_latency[mac];
  1412. if (!mvm->tcm.result.low_latency[mac] && handle_uapsd)
  1413. iwl_mvm_check_uapsd_agg_expected_tpt(mvm, uapsd_elapsed,
  1414. mac);
  1415. /* clear old data */
  1416. if (handle_uapsd)
  1417. mdata->uapsd_nonagg_detect.rx_bytes = 0;
  1418. memset(&mdata->rx.airtime, 0, sizeof(mdata->rx.airtime));
  1419. memset(&mdata->tx.airtime, 0, sizeof(mdata->tx.airtime));
  1420. }
  1421. load = iwl_mvm_tcm_load(mvm, total_airtime, elapsed);
  1422. mvm->tcm.result.global_change = load != mvm->tcm.result.global_load;
  1423. mvm->tcm.result.global_load = load;
  1424. for (i = 0; i < NUM_NL80211_BANDS; i++) {
  1425. band_load = iwl_mvm_tcm_load(mvm, band_airtime[i], elapsed);
  1426. mvm->tcm.result.band_load[i] = band_load;
  1427. }
  1428. /*
  1429. * If the current load isn't low we need to force re-evaluation
  1430. * in the TCM period, so that we can return to low load if there
  1431. * was no traffic at all (and thus iwl_mvm_recalc_tcm didn't get
  1432. * triggered by traffic).
  1433. */
  1434. if (load != IWL_MVM_TRAFFIC_LOW)
  1435. return MVM_TCM_PERIOD;
  1436. /*
  1437. * If low-latency is active we need to force re-evaluation after
  1438. * (the longer) MVM_LL_PERIOD, so that we can disable low-latency
  1439. * when there's no traffic at all.
  1440. */
  1441. if (low_latency)
  1442. return MVM_LL_PERIOD;
  1443. /*
  1444. * Otherwise, we don't need to run the work struct because we're
  1445. * in the default "idle" state - traffic indication is low (which
  1446. * also covers the "no traffic" case) and low-latency is disabled
  1447. * so there's no state that may need to be disabled when there's
  1448. * no traffic at all.
  1449. *
  1450. * Note that this has no impact on the regular scheduling of the
  1451. * updates triggered by traffic - those happen whenever one of the
  1452. * two timeouts expire (if there's traffic at all.)
  1453. */
  1454. return 0;
  1455. }
  1456. void iwl_mvm_recalc_tcm(struct iwl_mvm *mvm)
  1457. {
  1458. unsigned long ts = jiffies;
  1459. bool handle_uapsd =
  1460. time_after(ts, mvm->tcm.uapsd_nonagg_ts +
  1461. msecs_to_jiffies(IWL_MVM_UAPSD_NONAGG_PERIOD));
  1462. spin_lock(&mvm->tcm.lock);
  1463. if (mvm->tcm.paused || !time_after(ts, mvm->tcm.ts + MVM_TCM_PERIOD)) {
  1464. spin_unlock(&mvm->tcm.lock);
  1465. return;
  1466. }
  1467. spin_unlock(&mvm->tcm.lock);
  1468. if (handle_uapsd && iwl_mvm_has_new_rx_api(mvm)) {
  1469. mutex_lock(&mvm->mutex);
  1470. if (iwl_mvm_request_statistics(mvm, true))
  1471. handle_uapsd = false;
  1472. mutex_unlock(&mvm->mutex);
  1473. }
  1474. spin_lock(&mvm->tcm.lock);
  1475. /* re-check if somebody else won the recheck race */
  1476. if (!mvm->tcm.paused && time_after(ts, mvm->tcm.ts + MVM_TCM_PERIOD)) {
  1477. /* calculate statistics */
  1478. unsigned long work_delay = iwl_mvm_calc_tcm_stats(mvm, ts,
  1479. handle_uapsd);
  1480. /* the memset needs to be visible before the timestamp */
  1481. smp_mb();
  1482. mvm->tcm.ts = ts;
  1483. if (work_delay)
  1484. schedule_delayed_work(&mvm->tcm.work, work_delay);
  1485. }
  1486. spin_unlock(&mvm->tcm.lock);
  1487. iwl_mvm_tcm_results(mvm);
  1488. }
  1489. void iwl_mvm_tcm_work(struct work_struct *work)
  1490. {
  1491. struct delayed_work *delayed_work = to_delayed_work(work);
  1492. struct iwl_mvm *mvm = container_of(delayed_work, struct iwl_mvm,
  1493. tcm.work);
  1494. iwl_mvm_recalc_tcm(mvm);
  1495. }
  1496. void iwl_mvm_pause_tcm(struct iwl_mvm *mvm, bool with_cancel)
  1497. {
  1498. spin_lock_bh(&mvm->tcm.lock);
  1499. mvm->tcm.paused = true;
  1500. spin_unlock_bh(&mvm->tcm.lock);
  1501. if (with_cancel)
  1502. cancel_delayed_work_sync(&mvm->tcm.work);
  1503. }
  1504. void iwl_mvm_resume_tcm(struct iwl_mvm *mvm)
  1505. {
  1506. int mac;
  1507. spin_lock_bh(&mvm->tcm.lock);
  1508. mvm->tcm.ts = jiffies;
  1509. mvm->tcm.ll_ts = jiffies;
  1510. for (mac = 0; mac < NUM_MAC_INDEX_DRIVER; mac++) {
  1511. struct iwl_mvm_tcm_mac *mdata = &mvm->tcm.data[mac];
  1512. memset(&mdata->rx.pkts, 0, sizeof(mdata->rx.pkts));
  1513. memset(&mdata->tx.pkts, 0, sizeof(mdata->tx.pkts));
  1514. memset(&mdata->rx.airtime, 0, sizeof(mdata->rx.airtime));
  1515. memset(&mdata->tx.airtime, 0, sizeof(mdata->tx.airtime));
  1516. }
  1517. /* The TCM data needs to be reset before "paused" flag changes */
  1518. smp_mb();
  1519. mvm->tcm.paused = false;
  1520. spin_unlock_bh(&mvm->tcm.lock);
  1521. }
  1522. void iwl_mvm_tcm_add_vif(struct iwl_mvm *mvm, struct ieee80211_vif *vif)
  1523. {
  1524. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  1525. INIT_DELAYED_WORK(&mvmvif->uapsd_nonagg_detected_wk,
  1526. iwl_mvm_tcm_uapsd_nonagg_detected_wk);
  1527. }
  1528. void iwl_mvm_tcm_rm_vif(struct iwl_mvm *mvm, struct ieee80211_vif *vif)
  1529. {
  1530. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  1531. cancel_delayed_work_sync(&mvmvif->uapsd_nonagg_detected_wk);
  1532. }
  1533. void iwl_mvm_get_sync_time(struct iwl_mvm *mvm, u32 *gp2, u64 *boottime)
  1534. {
  1535. bool ps_disabled;
  1536. lockdep_assert_held(&mvm->mutex);
  1537. /* Disable power save when reading GP2 */
  1538. ps_disabled = mvm->ps_disabled;
  1539. if (!ps_disabled) {
  1540. mvm->ps_disabled = true;
  1541. iwl_mvm_power_update_device(mvm);
  1542. }
  1543. *gp2 = iwl_read_prph(mvm->trans, DEVICE_SYSTEM_TIME_REG);
  1544. *boottime = ktime_get_boot_ns();
  1545. if (!ps_disabled) {
  1546. mvm->ps_disabled = ps_disabled;
  1547. iwl_mvm_power_update_device(mvm);
  1548. }
  1549. }