dwc3-of-simple.c 5.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235
  1. // SPDX-License-Identifier: GPL-2.0
  2. /**
  3. * dwc3-of-simple.c - OF glue layer for simple integrations
  4. *
  5. * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com
  6. *
  7. * Author: Felipe Balbi <balbi@ti.com>
  8. *
  9. * This is a combination of the old dwc3-qcom.c by Ivan T. Ivanov
  10. * <iivanov@mm-sol.com> and the original patch adding support for Xilinx' SoC
  11. * by Subbaraya Sundeep Bhatta <subbaraya.sundeep.bhatta@xilinx.com>
  12. */
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/slab.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/clk.h>
  19. #include <linux/of.h>
  20. #include <linux/of_platform.h>
  21. #include <linux/pm_runtime.h>
  22. #include <linux/reset.h>
  23. struct dwc3_of_simple {
  24. struct device *dev;
  25. struct clk **clks;
  26. int num_clocks;
  27. struct reset_control *resets;
  28. bool pulse_resets;
  29. };
  30. static int dwc3_of_simple_clk_init(struct dwc3_of_simple *simple, int count)
  31. {
  32. struct device *dev = simple->dev;
  33. struct device_node *np = dev->of_node;
  34. int i;
  35. simple->num_clocks = count;
  36. if (!count)
  37. return 0;
  38. simple->clks = devm_kcalloc(dev, simple->num_clocks,
  39. sizeof(struct clk *), GFP_KERNEL);
  40. if (!simple->clks)
  41. return -ENOMEM;
  42. for (i = 0; i < simple->num_clocks; i++) {
  43. struct clk *clk;
  44. int ret;
  45. clk = of_clk_get(np, i);
  46. if (IS_ERR(clk)) {
  47. while (--i >= 0) {
  48. clk_disable_unprepare(simple->clks[i]);
  49. clk_put(simple->clks[i]);
  50. }
  51. return PTR_ERR(clk);
  52. }
  53. ret = clk_prepare_enable(clk);
  54. if (ret < 0) {
  55. while (--i >= 0) {
  56. clk_disable_unprepare(simple->clks[i]);
  57. clk_put(simple->clks[i]);
  58. }
  59. clk_put(clk);
  60. return ret;
  61. }
  62. simple->clks[i] = clk;
  63. }
  64. return 0;
  65. }
  66. static int dwc3_of_simple_probe(struct platform_device *pdev)
  67. {
  68. struct dwc3_of_simple *simple;
  69. struct device *dev = &pdev->dev;
  70. struct device_node *np = dev->of_node;
  71. int ret;
  72. int i;
  73. bool shared_resets = false;
  74. simple = devm_kzalloc(dev, sizeof(*simple), GFP_KERNEL);
  75. if (!simple)
  76. return -ENOMEM;
  77. platform_set_drvdata(pdev, simple);
  78. simple->dev = dev;
  79. if (of_device_is_compatible(np, "amlogic,meson-axg-dwc3") ||
  80. of_device_is_compatible(np, "amlogic,meson-gxl-dwc3")) {
  81. shared_resets = true;
  82. simple->pulse_resets = true;
  83. }
  84. simple->resets = of_reset_control_array_get(np, shared_resets, true);
  85. if (IS_ERR(simple->resets)) {
  86. ret = PTR_ERR(simple->resets);
  87. dev_err(dev, "failed to get device resets, err=%d\n", ret);
  88. return ret;
  89. }
  90. if (simple->pulse_resets) {
  91. ret = reset_control_reset(simple->resets);
  92. if (ret)
  93. goto err_resetc_put;
  94. } else {
  95. ret = reset_control_deassert(simple->resets);
  96. if (ret)
  97. goto err_resetc_put;
  98. }
  99. ret = dwc3_of_simple_clk_init(simple, of_count_phandle_with_args(np,
  100. "clocks", "#clock-cells"));
  101. if (ret)
  102. goto err_resetc_assert;
  103. ret = of_platform_populate(np, NULL, NULL, dev);
  104. if (ret) {
  105. for (i = 0; i < simple->num_clocks; i++) {
  106. clk_disable_unprepare(simple->clks[i]);
  107. clk_put(simple->clks[i]);
  108. }
  109. goto err_resetc_assert;
  110. }
  111. pm_runtime_set_active(dev);
  112. pm_runtime_enable(dev);
  113. pm_runtime_get_sync(dev);
  114. return 0;
  115. err_resetc_assert:
  116. if (!simple->pulse_resets)
  117. reset_control_assert(simple->resets);
  118. err_resetc_put:
  119. reset_control_put(simple->resets);
  120. return ret;
  121. }
  122. static int dwc3_of_simple_remove(struct platform_device *pdev)
  123. {
  124. struct dwc3_of_simple *simple = platform_get_drvdata(pdev);
  125. struct device *dev = &pdev->dev;
  126. int i;
  127. of_platform_depopulate(dev);
  128. for (i = 0; i < simple->num_clocks; i++) {
  129. clk_disable_unprepare(simple->clks[i]);
  130. clk_put(simple->clks[i]);
  131. }
  132. simple->num_clocks = 0;
  133. if (!simple->pulse_resets)
  134. reset_control_assert(simple->resets);
  135. reset_control_put(simple->resets);
  136. pm_runtime_put_sync(dev);
  137. pm_runtime_disable(dev);
  138. return 0;
  139. }
  140. #ifdef CONFIG_PM
  141. static int dwc3_of_simple_runtime_suspend(struct device *dev)
  142. {
  143. struct dwc3_of_simple *simple = dev_get_drvdata(dev);
  144. int i;
  145. for (i = 0; i < simple->num_clocks; i++)
  146. clk_disable(simple->clks[i]);
  147. return 0;
  148. }
  149. static int dwc3_of_simple_runtime_resume(struct device *dev)
  150. {
  151. struct dwc3_of_simple *simple = dev_get_drvdata(dev);
  152. int ret;
  153. int i;
  154. for (i = 0; i < simple->num_clocks; i++) {
  155. ret = clk_enable(simple->clks[i]);
  156. if (ret < 0) {
  157. while (--i >= 0)
  158. clk_disable(simple->clks[i]);
  159. return ret;
  160. }
  161. }
  162. return 0;
  163. }
  164. #endif
  165. static const struct dev_pm_ops dwc3_of_simple_dev_pm_ops = {
  166. SET_RUNTIME_PM_OPS(dwc3_of_simple_runtime_suspend,
  167. dwc3_of_simple_runtime_resume, NULL)
  168. };
  169. static const struct of_device_id of_dwc3_simple_match[] = {
  170. { .compatible = "rockchip,rk3399-dwc3" },
  171. { .compatible = "xlnx,zynqmp-dwc3" },
  172. { .compatible = "cavium,octeon-7130-usb-uctl" },
  173. { .compatible = "sprd,sc9860-dwc3" },
  174. { .compatible = "amlogic,meson-axg-dwc3" },
  175. { .compatible = "amlogic,meson-gxl-dwc3" },
  176. { .compatible = "allwinner,sun50i-h6-dwc3" },
  177. { /* Sentinel */ }
  178. };
  179. MODULE_DEVICE_TABLE(of, of_dwc3_simple_match);
  180. static struct platform_driver dwc3_of_simple_driver = {
  181. .probe = dwc3_of_simple_probe,
  182. .remove = dwc3_of_simple_remove,
  183. .driver = {
  184. .name = "dwc3-of-simple",
  185. .of_match_table = of_dwc3_simple_match,
  186. .pm = &dwc3_of_simple_dev_pm_ops,
  187. },
  188. };
  189. module_platform_driver(dwc3_of_simple_driver);
  190. MODULE_LICENSE("GPL v2");
  191. MODULE_DESCRIPTION("DesignWare USB3 OF Simple Glue Layer");
  192. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");