dwc3-pci.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394
  1. // SPDX-License-Identifier: GPL-2.0
  2. /**
  3. * dwc3-pci.c - PCI Specific glue layer
  4. *
  5. * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
  6. *
  7. * Authors: Felipe Balbi <balbi@ti.com>,
  8. * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
  9. *
  10. * This program is free software: you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 of
  12. * the License as published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/slab.h>
  22. #include <linux/pci.h>
  23. #include <linux/workqueue.h>
  24. #include <linux/pm_runtime.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/gpio/consumer.h>
  27. #include <linux/acpi.h>
  28. #include <linux/delay.h>
  29. #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd
  30. #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI 0xabce
  31. #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31 0xabcf
  32. #define PCI_DEVICE_ID_INTEL_BYT 0x0f37
  33. #define PCI_DEVICE_ID_INTEL_MRFLD 0x119e
  34. #define PCI_DEVICE_ID_INTEL_BSW 0x22b7
  35. #define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30
  36. #define PCI_DEVICE_ID_INTEL_SPTH 0xa130
  37. #define PCI_DEVICE_ID_INTEL_BXT 0x0aaa
  38. #define PCI_DEVICE_ID_INTEL_BXT_M 0x1aaa
  39. #define PCI_DEVICE_ID_INTEL_APL 0x5aaa
  40. #define PCI_DEVICE_ID_INTEL_KBP 0xa2b0
  41. #define PCI_DEVICE_ID_INTEL_GLK 0x31aa
  42. #define PCI_DEVICE_ID_INTEL_CNPLP 0x9dee
  43. #define PCI_DEVICE_ID_INTEL_CNPH 0xa36e
  44. #define PCI_INTEL_BXT_DSM_GUID "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"
  45. #define PCI_INTEL_BXT_FUNC_PMU_PWR 4
  46. #define PCI_INTEL_BXT_STATE_D0 0
  47. #define PCI_INTEL_BXT_STATE_D3 3
  48. /**
  49. * struct dwc3_pci - Driver private structure
  50. * @dwc3: child dwc3 platform_device
  51. * @pci: our link to PCI bus
  52. * @guid: _DSM GUID
  53. * @has_dsm_for_pm: true for devices which need to run _DSM on runtime PM
  54. */
  55. struct dwc3_pci {
  56. struct platform_device *dwc3;
  57. struct pci_dev *pci;
  58. guid_t guid;
  59. unsigned int has_dsm_for_pm:1;
  60. struct work_struct wakeup_work;
  61. };
  62. static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
  63. static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
  64. static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = {
  65. { "reset-gpios", &reset_gpios, 1 },
  66. { "cs-gpios", &cs_gpios, 1 },
  67. { },
  68. };
  69. static int dwc3_pci_quirks(struct dwc3_pci *dwc)
  70. {
  71. struct platform_device *dwc3 = dwc->dwc3;
  72. struct pci_dev *pdev = dwc->pci;
  73. if (pdev->vendor == PCI_VENDOR_ID_AMD &&
  74. pdev->device == PCI_DEVICE_ID_AMD_NL_USB) {
  75. struct property_entry properties[] = {
  76. PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
  77. PROPERTY_ENTRY_U8("snps,lpm-nyet-threshold", 0xf),
  78. PROPERTY_ENTRY_BOOL("snps,u2exit_lfps_quirk"),
  79. PROPERTY_ENTRY_BOOL("snps,u2ss_inp3_quirk"),
  80. PROPERTY_ENTRY_BOOL("snps,req_p1p2p3_quirk"),
  81. PROPERTY_ENTRY_BOOL("snps,del_p1p2p3_quirk"),
  82. PROPERTY_ENTRY_BOOL("snps,del_phy_power_chg_quirk"),
  83. PROPERTY_ENTRY_BOOL("snps,lfps_filter_quirk"),
  84. PROPERTY_ENTRY_BOOL("snps,rx_detect_poll_quirk"),
  85. PROPERTY_ENTRY_BOOL("snps,tx_de_emphasis_quirk"),
  86. PROPERTY_ENTRY_U8("snps,tx_de_emphasis", 1),
  87. /*
  88. * FIXME these quirks should be removed when AMD NL
  89. * tapes out
  90. */
  91. PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"),
  92. PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"),
  93. PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
  94. PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
  95. { },
  96. };
  97. return platform_device_add_properties(dwc3, properties);
  98. }
  99. if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
  100. int ret;
  101. struct property_entry properties[] = {
  102. PROPERTY_ENTRY_STRING("dr_mode", "peripheral"),
  103. PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
  104. { }
  105. };
  106. ret = platform_device_add_properties(dwc3, properties);
  107. if (ret < 0)
  108. return ret;
  109. if (pdev->device == PCI_DEVICE_ID_INTEL_BXT ||
  110. pdev->device == PCI_DEVICE_ID_INTEL_BXT_M) {
  111. guid_parse(PCI_INTEL_BXT_DSM_GUID, &dwc->guid);
  112. dwc->has_dsm_for_pm = true;
  113. }
  114. if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
  115. struct gpio_desc *gpio;
  116. ret = devm_acpi_dev_add_driver_gpios(&pdev->dev,
  117. acpi_dwc3_byt_gpios);
  118. if (ret)
  119. dev_dbg(&pdev->dev, "failed to add mapping table\n");
  120. /*
  121. * These GPIOs will turn on the USB2 PHY. Note that we have to
  122. * put the gpio descriptors again here because the phy driver
  123. * might want to grab them, too.
  124. */
  125. gpio = gpiod_get_optional(&pdev->dev, "cs", GPIOD_OUT_LOW);
  126. if (IS_ERR(gpio))
  127. return PTR_ERR(gpio);
  128. gpiod_set_value_cansleep(gpio, 1);
  129. gpiod_put(gpio);
  130. gpio = gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW);
  131. if (IS_ERR(gpio))
  132. return PTR_ERR(gpio);
  133. if (gpio) {
  134. gpiod_set_value_cansleep(gpio, 1);
  135. gpiod_put(gpio);
  136. usleep_range(10000, 11000);
  137. }
  138. }
  139. }
  140. if (pdev->vendor == PCI_VENDOR_ID_SYNOPSYS &&
  141. (pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 ||
  142. pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI ||
  143. pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31)) {
  144. struct property_entry properties[] = {
  145. PROPERTY_ENTRY_BOOL("snps,usb3_lpm_capable"),
  146. PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
  147. PROPERTY_ENTRY_BOOL("snps,dis_enblslpm_quirk"),
  148. PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
  149. { },
  150. };
  151. return platform_device_add_properties(dwc3, properties);
  152. }
  153. return 0;
  154. }
  155. #ifdef CONFIG_PM
  156. static void dwc3_pci_resume_work(struct work_struct *work)
  157. {
  158. struct dwc3_pci *dwc = container_of(work, struct dwc3_pci, wakeup_work);
  159. struct platform_device *dwc3 = dwc->dwc3;
  160. int ret;
  161. ret = pm_runtime_get_sync(&dwc3->dev);
  162. if (ret)
  163. return;
  164. pm_runtime_mark_last_busy(&dwc3->dev);
  165. pm_runtime_put_sync_autosuspend(&dwc3->dev);
  166. }
  167. #endif
  168. static int dwc3_pci_probe(struct pci_dev *pci,
  169. const struct pci_device_id *id)
  170. {
  171. struct dwc3_pci *dwc;
  172. struct resource res[2];
  173. int ret;
  174. struct device *dev = &pci->dev;
  175. ret = pcim_enable_device(pci);
  176. if (ret) {
  177. dev_err(dev, "failed to enable pci device\n");
  178. return -ENODEV;
  179. }
  180. pci_set_master(pci);
  181. dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL);
  182. if (!dwc)
  183. return -ENOMEM;
  184. dwc->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
  185. if (!dwc->dwc3)
  186. return -ENOMEM;
  187. memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
  188. res[0].start = pci_resource_start(pci, 0);
  189. res[0].end = pci_resource_end(pci, 0);
  190. res[0].name = "dwc_usb3";
  191. res[0].flags = IORESOURCE_MEM;
  192. res[1].start = pci->irq;
  193. res[1].name = "dwc_usb3";
  194. res[1].flags = IORESOURCE_IRQ;
  195. ret = platform_device_add_resources(dwc->dwc3, res, ARRAY_SIZE(res));
  196. if (ret) {
  197. dev_err(dev, "couldn't add resources to dwc3 device\n");
  198. return ret;
  199. }
  200. dwc->pci = pci;
  201. dwc->dwc3->dev.parent = dev;
  202. ACPI_COMPANION_SET(&dwc->dwc3->dev, ACPI_COMPANION(dev));
  203. ret = dwc3_pci_quirks(dwc);
  204. if (ret)
  205. goto err;
  206. ret = platform_device_add(dwc->dwc3);
  207. if (ret) {
  208. dev_err(dev, "failed to register dwc3 device\n");
  209. goto err;
  210. }
  211. device_init_wakeup(dev, true);
  212. pci_set_drvdata(pci, dwc);
  213. pm_runtime_put(dev);
  214. #ifdef CONFIG_PM
  215. INIT_WORK(&dwc->wakeup_work, dwc3_pci_resume_work);
  216. #endif
  217. return 0;
  218. err:
  219. platform_device_put(dwc->dwc3);
  220. return ret;
  221. }
  222. static void dwc3_pci_remove(struct pci_dev *pci)
  223. {
  224. struct dwc3_pci *dwc = pci_get_drvdata(pci);
  225. #ifdef CONFIG_PM
  226. cancel_work_sync(&dwc->wakeup_work);
  227. #endif
  228. device_init_wakeup(&pci->dev, false);
  229. pm_runtime_get(&pci->dev);
  230. platform_device_unregister(dwc->dwc3);
  231. }
  232. static const struct pci_device_id dwc3_pci_id_table[] = {
  233. {
  234. PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
  235. PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3),
  236. },
  237. {
  238. PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
  239. PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI),
  240. },
  241. {
  242. PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
  243. PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31),
  244. },
  245. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BSW), },
  246. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT), },
  247. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFLD), },
  248. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTLP), },
  249. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTH), },
  250. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT), },
  251. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT_M), },
  252. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL), },
  253. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KBP), },
  254. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GLK), },
  255. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CNPLP), },
  256. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CNPH), },
  257. { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), },
  258. { } /* Terminating Entry */
  259. };
  260. MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
  261. #if defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP)
  262. static int dwc3_pci_dsm(struct dwc3_pci *dwc, int param)
  263. {
  264. union acpi_object *obj;
  265. union acpi_object tmp;
  266. union acpi_object argv4 = ACPI_INIT_DSM_ARGV4(1, &tmp);
  267. if (!dwc->has_dsm_for_pm)
  268. return 0;
  269. tmp.type = ACPI_TYPE_INTEGER;
  270. tmp.integer.value = param;
  271. obj = acpi_evaluate_dsm(ACPI_HANDLE(&dwc->pci->dev), &dwc->guid,
  272. 1, PCI_INTEL_BXT_FUNC_PMU_PWR, &argv4);
  273. if (!obj) {
  274. dev_err(&dwc->pci->dev, "failed to evaluate _DSM\n");
  275. return -EIO;
  276. }
  277. ACPI_FREE(obj);
  278. return 0;
  279. }
  280. #endif /* CONFIG_PM || CONFIG_PM_SLEEP */
  281. #ifdef CONFIG_PM
  282. static int dwc3_pci_runtime_suspend(struct device *dev)
  283. {
  284. struct dwc3_pci *dwc = dev_get_drvdata(dev);
  285. if (device_can_wakeup(dev))
  286. return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
  287. return -EBUSY;
  288. }
  289. static int dwc3_pci_runtime_resume(struct device *dev)
  290. {
  291. struct dwc3_pci *dwc = dev_get_drvdata(dev);
  292. int ret;
  293. ret = dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
  294. if (ret)
  295. return ret;
  296. queue_work(pm_wq, &dwc->wakeup_work);
  297. return 0;
  298. }
  299. #endif /* CONFIG_PM */
  300. #ifdef CONFIG_PM_SLEEP
  301. static int dwc3_pci_suspend(struct device *dev)
  302. {
  303. struct dwc3_pci *dwc = dev_get_drvdata(dev);
  304. return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
  305. }
  306. static int dwc3_pci_resume(struct device *dev)
  307. {
  308. struct dwc3_pci *dwc = dev_get_drvdata(dev);
  309. return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
  310. }
  311. #endif /* CONFIG_PM_SLEEP */
  312. static const struct dev_pm_ops dwc3_pci_dev_pm_ops = {
  313. SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend, dwc3_pci_resume)
  314. SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend, dwc3_pci_runtime_resume,
  315. NULL)
  316. };
  317. static struct pci_driver dwc3_pci_driver = {
  318. .name = "dwc3-pci",
  319. .id_table = dwc3_pci_id_table,
  320. .probe = dwc3_pci_probe,
  321. .remove = dwc3_pci_remove,
  322. .driver = {
  323. .pm = &dwc3_pci_dev_pm_ops,
  324. }
  325. };
  326. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
  327. MODULE_LICENSE("GPL v2");
  328. MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
  329. module_pci_driver(dwc3_pci_driver);