qed_mcp.h 27 KB

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  1. /* QLogic qed NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #ifndef _QED_MCP_H
  33. #define _QED_MCP_H
  34. #include <linux/types.h>
  35. #include <linux/delay.h>
  36. #include <linux/slab.h>
  37. #include <linux/spinlock.h>
  38. #include <linux/qed/qed_fcoe_if.h>
  39. #include "qed_hsi.h"
  40. #include "qed_dev_api.h"
  41. struct qed_mcp_link_speed_params {
  42. bool autoneg;
  43. u32 advertised_speeds; /* bitmask of DRV_SPEED_CAPABILITY */
  44. u32 forced_speed; /* In Mb/s */
  45. };
  46. struct qed_mcp_link_pause_params {
  47. bool autoneg;
  48. bool forced_rx;
  49. bool forced_tx;
  50. };
  51. enum qed_mcp_eee_mode {
  52. QED_MCP_EEE_DISABLED,
  53. QED_MCP_EEE_ENABLED,
  54. QED_MCP_EEE_UNSUPPORTED
  55. };
  56. struct qed_mcp_link_params {
  57. struct qed_mcp_link_speed_params speed;
  58. struct qed_mcp_link_pause_params pause;
  59. u32 loopback_mode;
  60. struct qed_link_eee_params eee;
  61. };
  62. struct qed_mcp_link_capabilities {
  63. u32 speed_capabilities;
  64. bool default_speed_autoneg;
  65. enum qed_mcp_eee_mode default_eee;
  66. u32 eee_lpi_timer;
  67. u8 eee_speed_caps;
  68. };
  69. struct qed_mcp_link_state {
  70. bool link_up;
  71. u32 min_pf_rate;
  72. /* Actual link speed in Mb/s */
  73. u32 line_speed;
  74. /* PF max speed in Mb/s, deduced from line_speed
  75. * according to PF max bandwidth configuration.
  76. */
  77. u32 speed;
  78. bool full_duplex;
  79. bool an;
  80. bool an_complete;
  81. bool parallel_detection;
  82. bool pfc_enabled;
  83. #define QED_LINK_PARTNER_SPEED_1G_HD BIT(0)
  84. #define QED_LINK_PARTNER_SPEED_1G_FD BIT(1)
  85. #define QED_LINK_PARTNER_SPEED_10G BIT(2)
  86. #define QED_LINK_PARTNER_SPEED_20G BIT(3)
  87. #define QED_LINK_PARTNER_SPEED_25G BIT(4)
  88. #define QED_LINK_PARTNER_SPEED_40G BIT(5)
  89. #define QED_LINK_PARTNER_SPEED_50G BIT(6)
  90. #define QED_LINK_PARTNER_SPEED_100G BIT(7)
  91. u32 partner_adv_speed;
  92. bool partner_tx_flow_ctrl_en;
  93. bool partner_rx_flow_ctrl_en;
  94. #define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1)
  95. #define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2)
  96. #define QED_LINK_PARTNER_BOTH_PAUSE (3)
  97. u8 partner_adv_pause;
  98. bool sfp_tx_fault;
  99. bool eee_active;
  100. u8 eee_adv_caps;
  101. u8 eee_lp_adv_caps;
  102. };
  103. struct qed_mcp_function_info {
  104. u8 pause_on_host;
  105. enum qed_pci_personality protocol;
  106. u8 bandwidth_min;
  107. u8 bandwidth_max;
  108. u8 mac[ETH_ALEN];
  109. u64 wwn_port;
  110. u64 wwn_node;
  111. #define QED_MCP_VLAN_UNSET (0xffff)
  112. u16 ovlan;
  113. u16 mtu;
  114. };
  115. struct qed_mcp_nvm_common {
  116. u32 offset;
  117. u32 param;
  118. u32 resp;
  119. u32 cmd;
  120. };
  121. struct qed_mcp_drv_version {
  122. u32 version;
  123. u8 name[MCP_DRV_VER_STR_SIZE - 4];
  124. };
  125. struct qed_mcp_lan_stats {
  126. u64 ucast_rx_pkts;
  127. u64 ucast_tx_pkts;
  128. u32 fcs_err;
  129. };
  130. struct qed_mcp_fcoe_stats {
  131. u64 rx_pkts;
  132. u64 tx_pkts;
  133. u32 fcs_err;
  134. u32 login_failure;
  135. };
  136. struct qed_mcp_iscsi_stats {
  137. u64 rx_pdus;
  138. u64 tx_pdus;
  139. u64 rx_bytes;
  140. u64 tx_bytes;
  141. };
  142. struct qed_mcp_rdma_stats {
  143. u64 rx_pkts;
  144. u64 tx_pkts;
  145. u64 rx_bytes;
  146. u64 tx_byts;
  147. };
  148. enum qed_mcp_protocol_type {
  149. QED_MCP_LAN_STATS,
  150. QED_MCP_FCOE_STATS,
  151. QED_MCP_ISCSI_STATS,
  152. QED_MCP_RDMA_STATS
  153. };
  154. union qed_mcp_protocol_stats {
  155. struct qed_mcp_lan_stats lan_stats;
  156. struct qed_mcp_fcoe_stats fcoe_stats;
  157. struct qed_mcp_iscsi_stats iscsi_stats;
  158. struct qed_mcp_rdma_stats rdma_stats;
  159. };
  160. enum qed_ov_eswitch {
  161. QED_OV_ESWITCH_NONE,
  162. QED_OV_ESWITCH_VEB,
  163. QED_OV_ESWITCH_VEPA
  164. };
  165. enum qed_ov_client {
  166. QED_OV_CLIENT_DRV,
  167. QED_OV_CLIENT_USER,
  168. QED_OV_CLIENT_VENDOR_SPEC
  169. };
  170. enum qed_ov_driver_state {
  171. QED_OV_DRIVER_STATE_NOT_LOADED,
  172. QED_OV_DRIVER_STATE_DISABLED,
  173. QED_OV_DRIVER_STATE_ACTIVE
  174. };
  175. enum qed_ov_wol {
  176. QED_OV_WOL_DEFAULT,
  177. QED_OV_WOL_DISABLED,
  178. QED_OV_WOL_ENABLED
  179. };
  180. enum qed_mfw_tlv_type {
  181. QED_MFW_TLV_GENERIC = 0x1, /* Core driver TLVs */
  182. QED_MFW_TLV_ETH = 0x2, /* L2 driver TLVs */
  183. QED_MFW_TLV_FCOE = 0x4, /* FCoE protocol TLVs */
  184. QED_MFW_TLV_ISCSI = 0x8, /* SCSI protocol TLVs */
  185. QED_MFW_TLV_MAX = 0x16,
  186. };
  187. struct qed_mfw_tlv_generic {
  188. #define QED_MFW_TLV_FLAGS_SIZE 2
  189. struct {
  190. u8 ipv4_csum_offload;
  191. u8 lso_supported;
  192. bool b_set;
  193. } flags;
  194. #define QED_MFW_TLV_MAC_COUNT 3
  195. /* First entry for primary MAC, 2 secondary MACs possible */
  196. u8 mac[QED_MFW_TLV_MAC_COUNT][6];
  197. bool mac_set[QED_MFW_TLV_MAC_COUNT];
  198. u64 rx_frames;
  199. bool rx_frames_set;
  200. u64 rx_bytes;
  201. bool rx_bytes_set;
  202. u64 tx_frames;
  203. bool tx_frames_set;
  204. u64 tx_bytes;
  205. bool tx_bytes_set;
  206. };
  207. union qed_mfw_tlv_data {
  208. struct qed_mfw_tlv_generic generic;
  209. struct qed_mfw_tlv_eth eth;
  210. struct qed_mfw_tlv_fcoe fcoe;
  211. struct qed_mfw_tlv_iscsi iscsi;
  212. };
  213. /**
  214. * @brief - returns the link params of the hw function
  215. *
  216. * @param p_hwfn
  217. *
  218. * @returns pointer to link params
  219. */
  220. struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *);
  221. /**
  222. * @brief - return the link state of the hw function
  223. *
  224. * @param p_hwfn
  225. *
  226. * @returns pointer to link state
  227. */
  228. struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *);
  229. /**
  230. * @brief - return the link capabilities of the hw function
  231. *
  232. * @param p_hwfn
  233. *
  234. * @returns pointer to link capabilities
  235. */
  236. struct qed_mcp_link_capabilities
  237. *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn);
  238. /**
  239. * @brief Request the MFW to set the the link according to 'link_input'.
  240. *
  241. * @param p_hwfn
  242. * @param p_ptt
  243. * @param b_up - raise link if `true'. Reset link if `false'.
  244. *
  245. * @return int
  246. */
  247. int qed_mcp_set_link(struct qed_hwfn *p_hwfn,
  248. struct qed_ptt *p_ptt,
  249. bool b_up);
  250. /**
  251. * @brief Get the management firmware version value
  252. *
  253. * @param p_hwfn
  254. * @param p_ptt
  255. * @param p_mfw_ver - mfw version value
  256. * @param p_running_bundle_id - image id in nvram; Optional.
  257. *
  258. * @return int - 0 - operation was successful.
  259. */
  260. int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn,
  261. struct qed_ptt *p_ptt,
  262. u32 *p_mfw_ver, u32 *p_running_bundle_id);
  263. /**
  264. * @brief Get the MBI version value
  265. *
  266. * @param p_hwfn
  267. * @param p_ptt
  268. * @param p_mbi_ver - A pointer to a variable to be filled with the MBI version.
  269. *
  270. * @return int - 0 - operation was successful.
  271. */
  272. int qed_mcp_get_mbi_ver(struct qed_hwfn *p_hwfn,
  273. struct qed_ptt *p_ptt, u32 *p_mbi_ver);
  274. /**
  275. * @brief Get media type value of the port.
  276. *
  277. * @param cdev - qed dev pointer
  278. * @param mfw_ver - media type value
  279. *
  280. * @return int -
  281. * 0 - Operation was successul.
  282. * -EBUSY - Operation failed
  283. */
  284. int qed_mcp_get_media_type(struct qed_dev *cdev,
  285. u32 *media_type);
  286. /**
  287. * @brief General function for sending commands to the MCP
  288. * mailbox. It acquire mutex lock for the entire
  289. * operation, from sending the request until the MCP
  290. * response. Waiting for MCP response will be checked up
  291. * to 5 seconds every 5ms.
  292. *
  293. * @param p_hwfn - hw function
  294. * @param p_ptt - PTT required for register access
  295. * @param cmd - command to be sent to the MCP.
  296. * @param param - Optional param
  297. * @param o_mcp_resp - The MCP response code (exclude sequence).
  298. * @param o_mcp_param- Optional parameter provided by the MCP
  299. * response
  300. * @return int - 0 - operation
  301. * was successul.
  302. */
  303. int qed_mcp_cmd(struct qed_hwfn *p_hwfn,
  304. struct qed_ptt *p_ptt,
  305. u32 cmd,
  306. u32 param,
  307. u32 *o_mcp_resp,
  308. u32 *o_mcp_param);
  309. /**
  310. * @brief - drains the nig, allowing completion to pass in case of pauses.
  311. * (Should be called only from sleepable context)
  312. *
  313. * @param p_hwfn
  314. * @param p_ptt
  315. */
  316. int qed_mcp_drain(struct qed_hwfn *p_hwfn,
  317. struct qed_ptt *p_ptt);
  318. /**
  319. * @brief Get the flash size value
  320. *
  321. * @param p_hwfn
  322. * @param p_ptt
  323. * @param p_flash_size - flash size in bytes to be filled.
  324. *
  325. * @return int - 0 - operation was successul.
  326. */
  327. int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn,
  328. struct qed_ptt *p_ptt,
  329. u32 *p_flash_size);
  330. /**
  331. * @brief Send driver version to MFW
  332. *
  333. * @param p_hwfn
  334. * @param p_ptt
  335. * @param version - Version value
  336. * @param name - Protocol driver name
  337. *
  338. * @return int - 0 - operation was successul.
  339. */
  340. int
  341. qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
  342. struct qed_ptt *p_ptt,
  343. struct qed_mcp_drv_version *p_ver);
  344. /**
  345. * @brief Notify MFW about the change in base device properties
  346. *
  347. * @param p_hwfn
  348. * @param p_ptt
  349. * @param client - qed client type
  350. *
  351. * @return int - 0 - operation was successful.
  352. */
  353. int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn,
  354. struct qed_ptt *p_ptt,
  355. enum qed_ov_client client);
  356. /**
  357. * @brief Notify MFW about the driver state
  358. *
  359. * @param p_hwfn
  360. * @param p_ptt
  361. * @param drv_state - Driver state
  362. *
  363. * @return int - 0 - operation was successful.
  364. */
  365. int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn,
  366. struct qed_ptt *p_ptt,
  367. enum qed_ov_driver_state drv_state);
  368. /**
  369. * @brief Send MTU size to MFW
  370. *
  371. * @param p_hwfn
  372. * @param p_ptt
  373. * @param mtu - MTU size
  374. *
  375. * @return int - 0 - operation was successful.
  376. */
  377. int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn,
  378. struct qed_ptt *p_ptt, u16 mtu);
  379. /**
  380. * @brief Send MAC address to MFW
  381. *
  382. * @param p_hwfn
  383. * @param p_ptt
  384. * @param mac - MAC address
  385. *
  386. * @return int - 0 - operation was successful.
  387. */
  388. int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn,
  389. struct qed_ptt *p_ptt, u8 *mac);
  390. /**
  391. * @brief Send WOL mode to MFW
  392. *
  393. * @param p_hwfn
  394. * @param p_ptt
  395. * @param wol - WOL mode
  396. *
  397. * @return int - 0 - operation was successful.
  398. */
  399. int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn,
  400. struct qed_ptt *p_ptt,
  401. enum qed_ov_wol wol);
  402. /**
  403. * @brief Set LED status
  404. *
  405. * @param p_hwfn
  406. * @param p_ptt
  407. * @param mode - LED mode
  408. *
  409. * @return int - 0 - operation was successful.
  410. */
  411. int qed_mcp_set_led(struct qed_hwfn *p_hwfn,
  412. struct qed_ptt *p_ptt,
  413. enum qed_led_mode mode);
  414. /**
  415. * @brief Read from nvm
  416. *
  417. * @param cdev
  418. * @param addr - nvm offset
  419. * @param p_buf - nvm read buffer
  420. * @param len - buffer len
  421. *
  422. * @return int - 0 - operation was successful.
  423. */
  424. int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len);
  425. /**
  426. * @brief Write to nvm
  427. *
  428. * @param cdev
  429. * @param addr - nvm offset
  430. * @param cmd - nvm command
  431. * @param p_buf - nvm write buffer
  432. * @param len - buffer len
  433. *
  434. * @return int - 0 - operation was successful.
  435. */
  436. int qed_mcp_nvm_write(struct qed_dev *cdev,
  437. u32 cmd, u32 addr, u8 *p_buf, u32 len);
  438. /**
  439. * @brief Put file begin
  440. *
  441. * @param cdev
  442. * @param addr - nvm offset
  443. *
  444. * @return int - 0 - operation was successful.
  445. */
  446. int qed_mcp_nvm_put_file_begin(struct qed_dev *cdev, u32 addr);
  447. /**
  448. * @brief Check latest response
  449. *
  450. * @param cdev
  451. * @param p_buf - nvm write buffer
  452. *
  453. * @return int - 0 - operation was successful.
  454. */
  455. int qed_mcp_nvm_resp(struct qed_dev *cdev, u8 *p_buf);
  456. struct qed_nvm_image_att {
  457. u32 start_addr;
  458. u32 length;
  459. };
  460. /**
  461. * @brief Allows reading a whole nvram image
  462. *
  463. * @param p_hwfn
  464. * @param image_id - image to get attributes for
  465. * @param p_image_att - image attributes structure into which to fill data
  466. *
  467. * @return int - 0 - operation was successful.
  468. */
  469. int
  470. qed_mcp_get_nvm_image_att(struct qed_hwfn *p_hwfn,
  471. enum qed_nvm_images image_id,
  472. struct qed_nvm_image_att *p_image_att);
  473. /**
  474. * @brief Allows reading a whole nvram image
  475. *
  476. * @param p_hwfn
  477. * @param image_id - image requested for reading
  478. * @param p_buffer - allocated buffer into which to fill data
  479. * @param buffer_len - length of the allocated buffer.
  480. *
  481. * @return 0 iff p_buffer now contains the nvram image.
  482. */
  483. int qed_mcp_get_nvm_image(struct qed_hwfn *p_hwfn,
  484. enum qed_nvm_images image_id,
  485. u8 *p_buffer, u32 buffer_len);
  486. /**
  487. * @brief Bist register test
  488. *
  489. * @param p_hwfn - hw function
  490. * @param p_ptt - PTT required for register access
  491. *
  492. * @return int - 0 - operation was successful.
  493. */
  494. int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn,
  495. struct qed_ptt *p_ptt);
  496. /**
  497. * @brief Bist clock test
  498. *
  499. * @param p_hwfn - hw function
  500. * @param p_ptt - PTT required for register access
  501. *
  502. * @return int - 0 - operation was successful.
  503. */
  504. int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn,
  505. struct qed_ptt *p_ptt);
  506. /**
  507. * @brief Bist nvm test - get number of images
  508. *
  509. * @param p_hwfn - hw function
  510. * @param p_ptt - PTT required for register access
  511. * @param num_images - number of images if operation was
  512. * successful. 0 if not.
  513. *
  514. * @return int - 0 - operation was successful.
  515. */
  516. int qed_mcp_bist_nvm_get_num_images(struct qed_hwfn *p_hwfn,
  517. struct qed_ptt *p_ptt,
  518. u32 *num_images);
  519. /**
  520. * @brief Bist nvm test - get image attributes by index
  521. *
  522. * @param p_hwfn - hw function
  523. * @param p_ptt - PTT required for register access
  524. * @param p_image_att - Attributes of image
  525. * @param image_index - Index of image to get information for
  526. *
  527. * @return int - 0 - operation was successful.
  528. */
  529. int qed_mcp_bist_nvm_get_image_att(struct qed_hwfn *p_hwfn,
  530. struct qed_ptt *p_ptt,
  531. struct bist_nvm_image_att *p_image_att,
  532. u32 image_index);
  533. /**
  534. * @brief - Processes the TLV request from MFW i.e., get the required TLV info
  535. * from the qed client and send it to the MFW.
  536. *
  537. * @param p_hwfn
  538. * @param p_ptt
  539. *
  540. * @param return 0 upon success.
  541. */
  542. int qed_mfw_process_tlv_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
  543. /* Using hwfn number (and not pf_num) is required since in CMT mode,
  544. * same pf_num may be used by two different hwfn
  545. * TODO - this shouldn't really be in .h file, but until all fields
  546. * required during hw-init will be placed in their correct place in shmem
  547. * we need it in qed_dev.c [for readin the nvram reflection in shmem].
  548. */
  549. #define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ? \
  550. ((rel_pfid) | \
  551. ((p_hwfn)->abs_pf_id & 1) << 3) : \
  552. rel_pfid)
  553. #define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id)
  554. #define MFW_PORT(_p_hwfn) ((_p_hwfn)->abs_pf_id % \
  555. ((_p_hwfn)->cdev->num_ports_in_engine * \
  556. qed_device_num_engines((_p_hwfn)->cdev)))
  557. struct qed_mcp_info {
  558. /* List for mailbox commands which were sent and wait for a response */
  559. struct list_head cmd_list;
  560. /* Spinlock used for protecting the access to the mailbox commands list
  561. * and the sending of the commands.
  562. */
  563. spinlock_t cmd_lock;
  564. /* Flag to indicate whether sending a MFW mailbox command is blocked */
  565. bool b_block_cmd;
  566. /* Spinlock used for syncing SW link-changes and link-changes
  567. * originating from attention context.
  568. */
  569. spinlock_t link_lock;
  570. u32 public_base;
  571. u32 drv_mb_addr;
  572. u32 mfw_mb_addr;
  573. u32 port_addr;
  574. u16 drv_mb_seq;
  575. u16 drv_pulse_seq;
  576. struct qed_mcp_link_params link_input;
  577. struct qed_mcp_link_state link_output;
  578. struct qed_mcp_link_capabilities link_capabilities;
  579. struct qed_mcp_function_info func_info;
  580. u8 *mfw_mb_cur;
  581. u8 *mfw_mb_shadow;
  582. u16 mfw_mb_length;
  583. u32 mcp_hist;
  584. /* Capabilties negotiated with the MFW */
  585. u32 capabilities;
  586. };
  587. struct qed_mcp_mb_params {
  588. u32 cmd;
  589. u32 param;
  590. void *p_data_src;
  591. void *p_data_dst;
  592. u8 data_src_size;
  593. u8 data_dst_size;
  594. u32 mcp_resp;
  595. u32 mcp_param;
  596. u32 flags;
  597. #define QED_MB_FLAG_CAN_SLEEP (0x1 << 0)
  598. #define QED_MB_FLAG_AVOID_BLOCK (0x1 << 1)
  599. #define QED_MB_FLAGS_IS_SET(params, flag) \
  600. ({ typeof(params) __params = (params); \
  601. (__params && (__params->flags & QED_MB_FLAG_ ## flag)); })
  602. };
  603. struct qed_drv_tlv_hdr {
  604. u8 tlv_type;
  605. u8 tlv_length; /* In dwords - not including this header */
  606. u8 tlv_reserved;
  607. #define QED_DRV_TLV_FLAGS_CHANGED 0x01
  608. u8 tlv_flags;
  609. };
  610. /**
  611. * @brief Initialize the interface with the MCP
  612. *
  613. * @param p_hwfn - HW func
  614. * @param p_ptt - PTT required for register access
  615. *
  616. * @return int
  617. */
  618. int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn,
  619. struct qed_ptt *p_ptt);
  620. /**
  621. * @brief Initialize the port interface with the MCP
  622. *
  623. * @param p_hwfn
  624. * @param p_ptt
  625. * Can only be called after `num_ports_in_engines' is set
  626. */
  627. void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn,
  628. struct qed_ptt *p_ptt);
  629. /**
  630. * @brief Releases resources allocated during the init process.
  631. *
  632. * @param p_hwfn - HW func
  633. * @param p_ptt - PTT required for register access
  634. *
  635. * @return int
  636. */
  637. int qed_mcp_free(struct qed_hwfn *p_hwfn);
  638. /**
  639. * @brief This function is called from the DPC context. After
  640. * pointing PTT to the mfw mb, check for events sent by the MCP
  641. * to the driver and ack them. In case a critical event
  642. * detected, it will be handled here, otherwise the work will be
  643. * queued to a sleepable work-queue.
  644. *
  645. * @param p_hwfn - HW function
  646. * @param p_ptt - PTT required for register access
  647. * @return int - 0 - operation
  648. * was successul.
  649. */
  650. int qed_mcp_handle_events(struct qed_hwfn *p_hwfn,
  651. struct qed_ptt *p_ptt);
  652. enum qed_drv_role {
  653. QED_DRV_ROLE_OS,
  654. QED_DRV_ROLE_KDUMP,
  655. };
  656. struct qed_load_req_params {
  657. /* Input params */
  658. enum qed_drv_role drv_role;
  659. u8 timeout_val;
  660. bool avoid_eng_reset;
  661. enum qed_override_force_load override_force_load;
  662. /* Output params */
  663. u32 load_code;
  664. };
  665. /**
  666. * @brief Sends a LOAD_REQ to the MFW, and in case the operation succeeds,
  667. * returns whether this PF is the first on the engine/port or function.
  668. *
  669. * @param p_hwfn
  670. * @param p_ptt
  671. * @param p_params
  672. *
  673. * @return int - 0 - Operation was successful.
  674. */
  675. int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
  676. struct qed_ptt *p_ptt,
  677. struct qed_load_req_params *p_params);
  678. /**
  679. * @brief Sends a UNLOAD_REQ message to the MFW
  680. *
  681. * @param p_hwfn
  682. * @param p_ptt
  683. *
  684. * @return int - 0 - Operation was successful.
  685. */
  686. int qed_mcp_unload_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
  687. /**
  688. * @brief Sends a UNLOAD_DONE message to the MFW
  689. *
  690. * @param p_hwfn
  691. * @param p_ptt
  692. *
  693. * @return int - 0 - Operation was successful.
  694. */
  695. int qed_mcp_unload_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
  696. /**
  697. * @brief Read the MFW mailbox into Current buffer.
  698. *
  699. * @param p_hwfn
  700. * @param p_ptt
  701. */
  702. void qed_mcp_read_mb(struct qed_hwfn *p_hwfn,
  703. struct qed_ptt *p_ptt);
  704. /**
  705. * @brief Ack to mfw that driver finished FLR process for VFs
  706. *
  707. * @param p_hwfn
  708. * @param p_ptt
  709. * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks.
  710. *
  711. * @param return int - 0 upon success.
  712. */
  713. int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn,
  714. struct qed_ptt *p_ptt, u32 *vfs_to_ack);
  715. /**
  716. * @brief - calls during init to read shmem of all function-related info.
  717. *
  718. * @param p_hwfn
  719. *
  720. * @param return 0 upon success.
  721. */
  722. int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn,
  723. struct qed_ptt *p_ptt);
  724. /**
  725. * @brief - Reset the MCP using mailbox command.
  726. *
  727. * @param p_hwfn
  728. * @param p_ptt
  729. *
  730. * @param return 0 upon success.
  731. */
  732. int qed_mcp_reset(struct qed_hwfn *p_hwfn,
  733. struct qed_ptt *p_ptt);
  734. /**
  735. * @brief - Sends an NVM read command request to the MFW to get
  736. * a buffer.
  737. *
  738. * @param p_hwfn
  739. * @param p_ptt
  740. * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or
  741. * DRV_MSG_CODE_NVM_READ_NVRAM commands
  742. * @param param - [0:23] - Offset [24:31] - Size
  743. * @param o_mcp_resp - MCP response
  744. * @param o_mcp_param - MCP response param
  745. * @param o_txn_size - Buffer size output
  746. * @param o_buf - Pointer to the buffer returned by the MFW.
  747. *
  748. * @param return 0 upon success.
  749. */
  750. int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn,
  751. struct qed_ptt *p_ptt,
  752. u32 cmd,
  753. u32 param,
  754. u32 *o_mcp_resp,
  755. u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf);
  756. /**
  757. * @brief Read from sfp
  758. *
  759. * @param p_hwfn - hw function
  760. * @param p_ptt - PTT required for register access
  761. * @param port - transceiver port
  762. * @param addr - I2C address
  763. * @param offset - offset in sfp
  764. * @param len - buffer length
  765. * @param p_buf - buffer to read into
  766. *
  767. * @return int - 0 - operation was successful.
  768. */
  769. int qed_mcp_phy_sfp_read(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
  770. u32 port, u32 addr, u32 offset, u32 len, u8 *p_buf);
  771. /**
  772. * @brief indicates whether the MFW objects [under mcp_info] are accessible
  773. *
  774. * @param p_hwfn
  775. *
  776. * @return true iff MFW is running and mcp_info is initialized
  777. */
  778. bool qed_mcp_is_init(struct qed_hwfn *p_hwfn);
  779. /**
  780. * @brief request MFW to configure MSI-X for a VF
  781. *
  782. * @param p_hwfn
  783. * @param p_ptt
  784. * @param vf_id - absolute inside engine
  785. * @param num_sbs - number of entries to request
  786. *
  787. * @return int
  788. */
  789. int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn,
  790. struct qed_ptt *p_ptt, u8 vf_id, u8 num);
  791. /**
  792. * @brief - Halt the MCP.
  793. *
  794. * @param p_hwfn
  795. * @param p_ptt
  796. *
  797. * @param return 0 upon success.
  798. */
  799. int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
  800. /**
  801. * @brief - Wake up the MCP.
  802. *
  803. * @param p_hwfn
  804. * @param p_ptt
  805. *
  806. * @param return 0 upon success.
  807. */
  808. int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
  809. int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw);
  810. int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw);
  811. int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn,
  812. struct qed_ptt *p_ptt,
  813. struct qed_mcp_link_state *p_link,
  814. u8 max_bw);
  815. int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn,
  816. struct qed_ptt *p_ptt,
  817. struct qed_mcp_link_state *p_link,
  818. u8 min_bw);
  819. int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn,
  820. struct qed_ptt *p_ptt, u32 mask_parities);
  821. /**
  822. * @brief - Sets the MFW's max value for the given resource
  823. *
  824. * @param p_hwfn
  825. * @param p_ptt
  826. * @param res_id
  827. * @param resc_max_val
  828. * @param p_mcp_resp
  829. *
  830. * @return int - 0 - operation was successful.
  831. */
  832. int
  833. qed_mcp_set_resc_max_val(struct qed_hwfn *p_hwfn,
  834. struct qed_ptt *p_ptt,
  835. enum qed_resources res_id,
  836. u32 resc_max_val, u32 *p_mcp_resp);
  837. /**
  838. * @brief - Gets the MFW allocation info for the given resource
  839. *
  840. * @param p_hwfn
  841. * @param p_ptt
  842. * @param res_id
  843. * @param p_mcp_resp
  844. * @param p_resc_num
  845. * @param p_resc_start
  846. *
  847. * @return int - 0 - operation was successful.
  848. */
  849. int
  850. qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn,
  851. struct qed_ptt *p_ptt,
  852. enum qed_resources res_id,
  853. u32 *p_mcp_resp, u32 *p_resc_num, u32 *p_resc_start);
  854. /**
  855. * @brief Send eswitch mode to MFW
  856. *
  857. * @param p_hwfn
  858. * @param p_ptt
  859. * @param eswitch - eswitch mode
  860. *
  861. * @return int - 0 - operation was successful.
  862. */
  863. int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn,
  864. struct qed_ptt *p_ptt,
  865. enum qed_ov_eswitch eswitch);
  866. #define QED_MCP_RESC_LOCK_MIN_VAL RESOURCE_DUMP
  867. #define QED_MCP_RESC_LOCK_MAX_VAL 31
  868. enum qed_resc_lock {
  869. QED_RESC_LOCK_DBG_DUMP = QED_MCP_RESC_LOCK_MIN_VAL,
  870. QED_RESC_LOCK_PTP_PORT0,
  871. QED_RESC_LOCK_PTP_PORT1,
  872. QED_RESC_LOCK_PTP_PORT2,
  873. QED_RESC_LOCK_PTP_PORT3,
  874. QED_RESC_LOCK_RESC_ALLOC = QED_MCP_RESC_LOCK_MAX_VAL,
  875. QED_RESC_LOCK_RESC_INVALID
  876. };
  877. /**
  878. * @brief - Initiates PF FLR
  879. *
  880. * @param p_hwfn
  881. * @param p_ptt
  882. *
  883. * @return int - 0 - operation was successful.
  884. */
  885. int qed_mcp_initiate_pf_flr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
  886. struct qed_resc_lock_params {
  887. /* Resource number [valid values are 0..31] */
  888. u8 resource;
  889. /* Lock timeout value in seconds [default, none or 1..254] */
  890. u8 timeout;
  891. #define QED_MCP_RESC_LOCK_TO_DEFAULT 0
  892. #define QED_MCP_RESC_LOCK_TO_NONE 255
  893. /* Number of times to retry locking */
  894. u8 retry_num;
  895. #define QED_MCP_RESC_LOCK_RETRY_CNT_DFLT 10
  896. /* The interval in usec between retries */
  897. u16 retry_interval;
  898. #define QED_MCP_RESC_LOCK_RETRY_VAL_DFLT 10000
  899. /* Use sleep or delay between retries */
  900. bool sleep_b4_retry;
  901. /* Will be set as true if the resource is free and granted */
  902. bool b_granted;
  903. /* Will be filled with the resource owner.
  904. * [0..15 = PF0-15, 16 = MFW]
  905. */
  906. u8 owner;
  907. };
  908. /**
  909. * @brief Acquires MFW generic resource lock
  910. *
  911. * @param p_hwfn
  912. * @param p_ptt
  913. * @param p_params
  914. *
  915. * @return int - 0 - operation was successful.
  916. */
  917. int
  918. qed_mcp_resc_lock(struct qed_hwfn *p_hwfn,
  919. struct qed_ptt *p_ptt, struct qed_resc_lock_params *p_params);
  920. struct qed_resc_unlock_params {
  921. /* Resource number [valid values are 0..31] */
  922. u8 resource;
  923. /* Allow to release a resource even if belongs to another PF */
  924. bool b_force;
  925. /* Will be set as true if the resource is released */
  926. bool b_released;
  927. };
  928. /**
  929. * @brief Releases MFW generic resource lock
  930. *
  931. * @param p_hwfn
  932. * @param p_ptt
  933. * @param p_params
  934. *
  935. * @return int - 0 - operation was successful.
  936. */
  937. int
  938. qed_mcp_resc_unlock(struct qed_hwfn *p_hwfn,
  939. struct qed_ptt *p_ptt,
  940. struct qed_resc_unlock_params *p_params);
  941. /**
  942. * @brief - default initialization for lock/unlock resource structs
  943. *
  944. * @param p_lock - lock params struct to be initialized; Can be NULL
  945. * @param p_unlock - unlock params struct to be initialized; Can be NULL
  946. * @param resource - the requested resource
  947. * @paral b_is_permanent - disable retries & aging when set
  948. */
  949. void qed_mcp_resc_lock_default_init(struct qed_resc_lock_params *p_lock,
  950. struct qed_resc_unlock_params *p_unlock,
  951. enum qed_resc_lock
  952. resource, bool b_is_permanent);
  953. /**
  954. * @brief Learn of supported MFW features; To be done during early init
  955. *
  956. * @param p_hwfn
  957. * @param p_ptt
  958. */
  959. int qed_mcp_get_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
  960. /**
  961. * @brief Inform MFW of set of features supported by driver. Should be done
  962. * inside the content of the LOAD_REQ.
  963. *
  964. * @param p_hwfn
  965. * @param p_ptt
  966. */
  967. int qed_mcp_set_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
  968. /**
  969. * @brief Read ufp config from the shared memory.
  970. *
  971. * @param p_hwfn
  972. * @param p_ptt
  973. */
  974. void qed_mcp_read_ufp_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
  975. /**
  976. * @brief Populate the nvm info shadow in the given hardware function
  977. *
  978. * @param p_hwfn
  979. */
  980. int qed_mcp_nvm_info_populate(struct qed_hwfn *p_hwfn);
  981. #endif