intel_dp_mst.c 17 KB

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  1. /*
  2. * Copyright © 2008 Intel Corporation
  3. * 2014 Red Hat Inc.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22. * IN THE SOFTWARE.
  23. *
  24. */
  25. #include <drm/drmP.h>
  26. #include "i915_drv.h"
  27. #include "intel_drv.h"
  28. #include <drm/drm_atomic_helper.h>
  29. #include <drm/drm_crtc_helper.h>
  30. #include <drm/drm_edid.h>
  31. static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
  32. struct intel_crtc_state *pipe_config)
  33. {
  34. struct drm_device *dev = encoder->base.dev;
  35. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  36. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  37. struct intel_dp *intel_dp = &intel_dig_port->dp;
  38. struct drm_atomic_state *state;
  39. int bpp, i;
  40. int lane_count, slots, rate;
  41. struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  42. struct drm_connector *drm_connector;
  43. struct intel_connector *connector, *found = NULL;
  44. struct drm_connector_state *connector_state;
  45. int mst_pbn;
  46. pipe_config->dp_encoder_is_mst = true;
  47. pipe_config->has_pch_encoder = false;
  48. pipe_config->has_dp_encoder = true;
  49. bpp = 24;
  50. /*
  51. * for MST we always configure max link bw - the spec doesn't
  52. * seem to suggest we should do otherwise.
  53. */
  54. lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
  55. rate = intel_dp_max_link_rate(intel_dp);
  56. if (intel_dp->num_sink_rates) {
  57. intel_dp->link_bw = 0;
  58. intel_dp->rate_select = intel_dp_rate_select(intel_dp, rate);
  59. } else {
  60. intel_dp->link_bw = drm_dp_link_rate_to_bw_code(rate);
  61. intel_dp->rate_select = 0;
  62. }
  63. intel_dp->lane_count = lane_count;
  64. pipe_config->pipe_bpp = 24;
  65. pipe_config->port_clock = rate;
  66. state = pipe_config->base.state;
  67. for_each_connector_in_state(state, drm_connector, connector_state, i) {
  68. connector = to_intel_connector(drm_connector);
  69. if (connector_state->best_encoder == &encoder->base) {
  70. found = connector;
  71. break;
  72. }
  73. }
  74. if (!found) {
  75. DRM_ERROR("can't find connector\n");
  76. return false;
  77. }
  78. mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp);
  79. pipe_config->pbn = mst_pbn;
  80. slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
  81. intel_link_compute_m_n(bpp, lane_count,
  82. adjusted_mode->crtc_clock,
  83. pipe_config->port_clock,
  84. &pipe_config->dp_m_n);
  85. pipe_config->dp_m_n.tu = slots;
  86. if (IS_HASWELL(dev) || IS_BROADWELL(dev))
  87. hsw_dp_set_ddi_pll_sel(pipe_config);
  88. return true;
  89. }
  90. static void intel_mst_disable_dp(struct intel_encoder *encoder)
  91. {
  92. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  93. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  94. struct intel_dp *intel_dp = &intel_dig_port->dp;
  95. int ret;
  96. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  97. drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port);
  98. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  99. if (ret) {
  100. DRM_ERROR("failed to update payload %d\n", ret);
  101. }
  102. }
  103. static void intel_mst_post_disable_dp(struct intel_encoder *encoder)
  104. {
  105. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  106. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  107. struct intel_dp *intel_dp = &intel_dig_port->dp;
  108. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  109. /* this can fail */
  110. drm_dp_check_act_status(&intel_dp->mst_mgr);
  111. /* and this can also fail */
  112. drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  113. drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port);
  114. intel_dp->active_mst_links--;
  115. intel_mst->port = NULL;
  116. if (intel_dp->active_mst_links == 0) {
  117. intel_dig_port->base.post_disable(&intel_dig_port->base);
  118. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
  119. }
  120. }
  121. static void intel_mst_pre_enable_dp(struct intel_encoder *encoder)
  122. {
  123. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  124. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  125. struct intel_dp *intel_dp = &intel_dig_port->dp;
  126. struct drm_device *dev = encoder->base.dev;
  127. struct drm_i915_private *dev_priv = dev->dev_private;
  128. enum port port = intel_dig_port->port;
  129. int ret;
  130. uint32_t temp;
  131. struct intel_connector *found = NULL, *connector;
  132. int slots;
  133. struct drm_crtc *crtc = encoder->base.crtc;
  134. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  135. for_each_intel_connector(dev, connector) {
  136. if (connector->base.state->best_encoder == &encoder->base) {
  137. found = connector;
  138. break;
  139. }
  140. }
  141. if (!found) {
  142. DRM_ERROR("can't find connector\n");
  143. return;
  144. }
  145. /* MST encoders are bound to a crtc, not to a connector,
  146. * force the mapping here for get_hw_state.
  147. */
  148. found->encoder = encoder;
  149. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  150. intel_mst->port = found->port;
  151. if (intel_dp->active_mst_links == 0) {
  152. enum port port = intel_ddi_get_encoder_port(encoder);
  153. /* FIXME: add support for SKL */
  154. if (INTEL_INFO(dev)->gen < 9)
  155. I915_WRITE(PORT_CLK_SEL(port),
  156. intel_crtc->config->ddi_pll_sel);
  157. intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
  158. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
  159. intel_dp_start_link_train(intel_dp);
  160. intel_dp_complete_link_train(intel_dp);
  161. intel_dp_stop_link_train(intel_dp);
  162. }
  163. ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
  164. intel_mst->port,
  165. intel_crtc->config->pbn, &slots);
  166. if (ret == false) {
  167. DRM_ERROR("failed to allocate vcpi\n");
  168. return;
  169. }
  170. intel_dp->active_mst_links++;
  171. temp = I915_READ(DP_TP_STATUS(port));
  172. I915_WRITE(DP_TP_STATUS(port), temp);
  173. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  174. }
  175. static void intel_mst_enable_dp(struct intel_encoder *encoder)
  176. {
  177. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  178. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  179. struct intel_dp *intel_dp = &intel_dig_port->dp;
  180. struct drm_device *dev = intel_dig_port->base.base.dev;
  181. struct drm_i915_private *dev_priv = dev->dev_private;
  182. enum port port = intel_dig_port->port;
  183. int ret;
  184. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  185. if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT),
  186. 1))
  187. DRM_ERROR("Timed out waiting for ACT sent\n");
  188. ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
  189. ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  190. }
  191. static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
  192. enum pipe *pipe)
  193. {
  194. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  195. *pipe = intel_mst->pipe;
  196. if (intel_mst->port)
  197. return true;
  198. return false;
  199. }
  200. static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
  201. struct intel_crtc_state *pipe_config)
  202. {
  203. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  204. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  205. struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  206. struct drm_device *dev = encoder->base.dev;
  207. struct drm_i915_private *dev_priv = dev->dev_private;
  208. enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
  209. u32 temp, flags = 0;
  210. pipe_config->has_dp_encoder = true;
  211. temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
  212. if (temp & TRANS_DDI_PHSYNC)
  213. flags |= DRM_MODE_FLAG_PHSYNC;
  214. else
  215. flags |= DRM_MODE_FLAG_NHSYNC;
  216. if (temp & TRANS_DDI_PVSYNC)
  217. flags |= DRM_MODE_FLAG_PVSYNC;
  218. else
  219. flags |= DRM_MODE_FLAG_NVSYNC;
  220. switch (temp & TRANS_DDI_BPC_MASK) {
  221. case TRANS_DDI_BPC_6:
  222. pipe_config->pipe_bpp = 18;
  223. break;
  224. case TRANS_DDI_BPC_8:
  225. pipe_config->pipe_bpp = 24;
  226. break;
  227. case TRANS_DDI_BPC_10:
  228. pipe_config->pipe_bpp = 30;
  229. break;
  230. case TRANS_DDI_BPC_12:
  231. pipe_config->pipe_bpp = 36;
  232. break;
  233. default:
  234. break;
  235. }
  236. pipe_config->base.adjusted_mode.flags |= flags;
  237. intel_dp_get_m_n(crtc, pipe_config);
  238. intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
  239. }
  240. static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
  241. {
  242. struct intel_connector *intel_connector = to_intel_connector(connector);
  243. struct intel_dp *intel_dp = intel_connector->mst_port;
  244. struct edid *edid;
  245. int ret;
  246. edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
  247. if (!edid)
  248. return 0;
  249. ret = intel_connector_update_modes(connector, edid);
  250. kfree(edid);
  251. return ret;
  252. }
  253. static enum drm_connector_status
  254. intel_dp_mst_detect(struct drm_connector *connector, bool force)
  255. {
  256. struct intel_connector *intel_connector = to_intel_connector(connector);
  257. struct intel_dp *intel_dp = intel_connector->mst_port;
  258. return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
  259. }
  260. static int
  261. intel_dp_mst_set_property(struct drm_connector *connector,
  262. struct drm_property *property,
  263. uint64_t val)
  264. {
  265. return 0;
  266. }
  267. static void
  268. intel_dp_mst_connector_destroy(struct drm_connector *connector)
  269. {
  270. struct intel_connector *intel_connector = to_intel_connector(connector);
  271. if (!IS_ERR_OR_NULL(intel_connector->edid))
  272. kfree(intel_connector->edid);
  273. drm_connector_cleanup(connector);
  274. kfree(connector);
  275. }
  276. static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
  277. .dpms = drm_atomic_helper_connector_dpms,
  278. .detect = intel_dp_mst_detect,
  279. .fill_modes = drm_helper_probe_single_connector_modes,
  280. .set_property = intel_dp_mst_set_property,
  281. .atomic_get_property = intel_connector_atomic_get_property,
  282. .destroy = intel_dp_mst_connector_destroy,
  283. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  284. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  285. };
  286. static int intel_dp_mst_get_modes(struct drm_connector *connector)
  287. {
  288. return intel_dp_mst_get_ddc_modes(connector);
  289. }
  290. static enum drm_mode_status
  291. intel_dp_mst_mode_valid(struct drm_connector *connector,
  292. struct drm_display_mode *mode)
  293. {
  294. /* TODO - validate mode against available PBN for link */
  295. if (mode->clock < 10000)
  296. return MODE_CLOCK_LOW;
  297. if (mode->flags & DRM_MODE_FLAG_DBLCLK)
  298. return MODE_H_ILLEGAL;
  299. return MODE_OK;
  300. }
  301. static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
  302. struct drm_connector_state *state)
  303. {
  304. struct intel_connector *intel_connector = to_intel_connector(connector);
  305. struct intel_dp *intel_dp = intel_connector->mst_port;
  306. struct intel_crtc *crtc = to_intel_crtc(state->crtc);
  307. return &intel_dp->mst_encoders[crtc->pipe]->base.base;
  308. }
  309. static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
  310. {
  311. struct intel_connector *intel_connector = to_intel_connector(connector);
  312. struct intel_dp *intel_dp = intel_connector->mst_port;
  313. return &intel_dp->mst_encoders[0]->base.base;
  314. }
  315. static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
  316. .get_modes = intel_dp_mst_get_modes,
  317. .mode_valid = intel_dp_mst_mode_valid,
  318. .atomic_best_encoder = intel_mst_atomic_best_encoder,
  319. .best_encoder = intel_mst_best_encoder,
  320. };
  321. static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
  322. {
  323. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  324. drm_encoder_cleanup(encoder);
  325. kfree(intel_mst);
  326. }
  327. static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
  328. .destroy = intel_dp_mst_encoder_destroy,
  329. };
  330. static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
  331. {
  332. if (connector->encoder && connector->base.state->crtc) {
  333. enum pipe pipe;
  334. if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
  335. return false;
  336. return true;
  337. }
  338. return false;
  339. }
  340. static void intel_connector_add_to_fbdev(struct intel_connector *connector)
  341. {
  342. #ifdef CONFIG_DRM_FBDEV_EMULATION
  343. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  344. drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base);
  345. #endif
  346. }
  347. static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
  348. {
  349. #ifdef CONFIG_DRM_FBDEV_EMULATION
  350. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  351. drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base);
  352. #endif
  353. }
  354. static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
  355. {
  356. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  357. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  358. struct drm_device *dev = intel_dig_port->base.base.dev;
  359. struct intel_connector *intel_connector;
  360. struct drm_connector *connector;
  361. int i;
  362. intel_connector = intel_connector_alloc();
  363. if (!intel_connector)
  364. return NULL;
  365. connector = &intel_connector->base;
  366. drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
  367. drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
  368. intel_connector->unregister = intel_connector_unregister;
  369. intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
  370. intel_connector->mst_port = intel_dp;
  371. intel_connector->port = port;
  372. for (i = PIPE_A; i <= PIPE_C; i++) {
  373. drm_mode_connector_attach_encoder(&intel_connector->base,
  374. &intel_dp->mst_encoders[i]->base.base);
  375. }
  376. intel_dp_add_properties(intel_dp, connector);
  377. drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
  378. drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
  379. drm_mode_connector_set_path_property(connector, pathprop);
  380. drm_modeset_lock_all(dev);
  381. intel_connector_add_to_fbdev(intel_connector);
  382. drm_modeset_unlock_all(dev);
  383. drm_connector_register(&intel_connector->base);
  384. return connector;
  385. }
  386. static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
  387. struct drm_connector *connector)
  388. {
  389. struct intel_connector *intel_connector = to_intel_connector(connector);
  390. struct drm_device *dev = connector->dev;
  391. /* need to nuke the connector */
  392. drm_modeset_lock_all(dev);
  393. if (connector->state->crtc) {
  394. struct drm_mode_set set;
  395. int ret;
  396. memset(&set, 0, sizeof(set));
  397. set.crtc = connector->state->crtc,
  398. ret = drm_atomic_helper_set_config(&set);
  399. WARN(ret, "Disabling mst crtc failed with %i\n", ret);
  400. }
  401. drm_modeset_unlock_all(dev);
  402. intel_connector->unregister(intel_connector);
  403. drm_modeset_lock_all(dev);
  404. intel_connector_remove_from_fbdev(intel_connector);
  405. drm_connector_cleanup(connector);
  406. drm_modeset_unlock_all(dev);
  407. kfree(intel_connector);
  408. DRM_DEBUG_KMS("\n");
  409. }
  410. static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
  411. {
  412. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  413. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  414. struct drm_device *dev = intel_dig_port->base.base.dev;
  415. drm_kms_helper_hotplug_event(dev);
  416. }
  417. static struct drm_dp_mst_topology_cbs mst_cbs = {
  418. .add_connector = intel_dp_add_mst_connector,
  419. .destroy_connector = intel_dp_destroy_mst_connector,
  420. .hotplug = intel_dp_mst_hotplug,
  421. };
  422. static struct intel_dp_mst_encoder *
  423. intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
  424. {
  425. struct intel_dp_mst_encoder *intel_mst;
  426. struct intel_encoder *intel_encoder;
  427. struct drm_device *dev = intel_dig_port->base.base.dev;
  428. intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
  429. if (!intel_mst)
  430. return NULL;
  431. intel_mst->pipe = pipe;
  432. intel_encoder = &intel_mst->base;
  433. intel_mst->primary = intel_dig_port;
  434. drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
  435. DRM_MODE_ENCODER_DPMST);
  436. intel_encoder->type = INTEL_OUTPUT_DP_MST;
  437. intel_encoder->crtc_mask = 0x7;
  438. intel_encoder->cloneable = 0;
  439. intel_encoder->compute_config = intel_dp_mst_compute_config;
  440. intel_encoder->disable = intel_mst_disable_dp;
  441. intel_encoder->post_disable = intel_mst_post_disable_dp;
  442. intel_encoder->pre_enable = intel_mst_pre_enable_dp;
  443. intel_encoder->enable = intel_mst_enable_dp;
  444. intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
  445. intel_encoder->get_config = intel_dp_mst_enc_get_config;
  446. return intel_mst;
  447. }
  448. static bool
  449. intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
  450. {
  451. int i;
  452. struct intel_dp *intel_dp = &intel_dig_port->dp;
  453. for (i = PIPE_A; i <= PIPE_C; i++)
  454. intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
  455. return true;
  456. }
  457. int
  458. intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
  459. {
  460. struct intel_dp *intel_dp = &intel_dig_port->dp;
  461. struct drm_device *dev = intel_dig_port->base.base.dev;
  462. int ret;
  463. intel_dp->can_mst = true;
  464. intel_dp->mst_mgr.cbs = &mst_cbs;
  465. /* create encoders */
  466. intel_dp_create_fake_mst_encoders(intel_dig_port);
  467. ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id);
  468. if (ret) {
  469. intel_dp->can_mst = false;
  470. return ret;
  471. }
  472. return 0;
  473. }
  474. void
  475. intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
  476. {
  477. struct intel_dp *intel_dp = &intel_dig_port->dp;
  478. if (!intel_dp->can_mst)
  479. return;
  480. drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
  481. /* encoders will get killed by normal cleanup */
  482. }