dwc3-pci.c 9.8 KB

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  1. /**
  2. * dwc3-pci.c - PCI Specific glue layer
  3. *
  4. * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
  5. *
  6. * Authors: Felipe Balbi <balbi@ti.com>,
  7. * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
  8. *
  9. * This program is free software: you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 of
  11. * the License as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/slab.h>
  21. #include <linux/pci.h>
  22. #include <linux/pm_runtime.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/gpio/consumer.h>
  25. #include <linux/acpi.h>
  26. #include <linux/delay.h>
  27. #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd
  28. #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI 0xabce
  29. #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31 0xabcf
  30. #define PCI_DEVICE_ID_INTEL_BYT 0x0f37
  31. #define PCI_DEVICE_ID_INTEL_MRFLD 0x119e
  32. #define PCI_DEVICE_ID_INTEL_BSW 0x22b7
  33. #define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30
  34. #define PCI_DEVICE_ID_INTEL_SPTH 0xa130
  35. #define PCI_DEVICE_ID_INTEL_BXT 0x0aaa
  36. #define PCI_DEVICE_ID_INTEL_BXT_M 0x1aaa
  37. #define PCI_DEVICE_ID_INTEL_APL 0x5aaa
  38. #define PCI_DEVICE_ID_INTEL_KBP 0xa2b0
  39. #define PCI_INTEL_BXT_DSM_UUID "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"
  40. #define PCI_INTEL_BXT_FUNC_PMU_PWR 4
  41. #define PCI_INTEL_BXT_STATE_D0 0
  42. #define PCI_INTEL_BXT_STATE_D3 3
  43. /**
  44. * struct dwc3_pci - Driver private structure
  45. * @dwc3: child dwc3 platform_device
  46. * @pci: our link to PCI bus
  47. * @uuid: _DSM UUID
  48. * @has_dsm_for_pm: true for devices which need to run _DSM on runtime PM
  49. */
  50. struct dwc3_pci {
  51. struct platform_device *dwc3;
  52. struct pci_dev *pci;
  53. u8 uuid[16];
  54. unsigned int has_dsm_for_pm:1;
  55. };
  56. static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
  57. static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
  58. static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = {
  59. { "reset-gpios", &reset_gpios, 1 },
  60. { "cs-gpios", &cs_gpios, 1 },
  61. { },
  62. };
  63. static int dwc3_pci_quirks(struct dwc3_pci *dwc)
  64. {
  65. struct platform_device *dwc3 = dwc->dwc3;
  66. struct pci_dev *pdev = dwc->pci;
  67. int ret;
  68. struct property_entry sysdev_property[] = {
  69. PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
  70. { },
  71. };
  72. ret = platform_device_add_properties(dwc3, sysdev_property);
  73. if (ret)
  74. return ret;
  75. if (pdev->vendor == PCI_VENDOR_ID_AMD &&
  76. pdev->device == PCI_DEVICE_ID_AMD_NL_USB) {
  77. struct property_entry properties[] = {
  78. PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
  79. PROPERTY_ENTRY_U8("snps,lpm-nyet-threshold", 0xf),
  80. PROPERTY_ENTRY_BOOL("snps,u2exit_lfps_quirk"),
  81. PROPERTY_ENTRY_BOOL("snps,u2ss_inp3_quirk"),
  82. PROPERTY_ENTRY_BOOL("snps,req_p1p2p3_quirk"),
  83. PROPERTY_ENTRY_BOOL("snps,del_p1p2p3_quirk"),
  84. PROPERTY_ENTRY_BOOL("snps,del_phy_power_chg_quirk"),
  85. PROPERTY_ENTRY_BOOL("snps,lfps_filter_quirk"),
  86. PROPERTY_ENTRY_BOOL("snps,rx_detect_poll_quirk"),
  87. PROPERTY_ENTRY_BOOL("snps,tx_de_emphasis_quirk"),
  88. PROPERTY_ENTRY_U8("snps,tx_de_emphasis", 1),
  89. /*
  90. * FIXME these quirks should be removed when AMD NL
  91. * tapes out
  92. */
  93. PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"),
  94. PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"),
  95. PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
  96. { },
  97. };
  98. return platform_device_add_properties(dwc3, properties);
  99. }
  100. if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
  101. int ret;
  102. struct property_entry properties[] = {
  103. PROPERTY_ENTRY_STRING("dr-mode", "peripheral"),
  104. { }
  105. };
  106. ret = platform_device_add_properties(dwc3, properties);
  107. if (ret < 0)
  108. return ret;
  109. if (pdev->device == PCI_DEVICE_ID_INTEL_BXT ||
  110. pdev->device == PCI_DEVICE_ID_INTEL_BXT_M) {
  111. acpi_str_to_uuid(PCI_INTEL_BXT_DSM_UUID, dwc->uuid);
  112. dwc->has_dsm_for_pm = true;
  113. }
  114. if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
  115. struct gpio_desc *gpio;
  116. acpi_dev_add_driver_gpios(ACPI_COMPANION(&pdev->dev),
  117. acpi_dwc3_byt_gpios);
  118. /*
  119. * These GPIOs will turn on the USB2 PHY. Note that we have to
  120. * put the gpio descriptors again here because the phy driver
  121. * might want to grab them, too.
  122. */
  123. gpio = gpiod_get_optional(&pdev->dev, "cs", GPIOD_OUT_LOW);
  124. if (IS_ERR(gpio))
  125. return PTR_ERR(gpio);
  126. gpiod_set_value_cansleep(gpio, 1);
  127. gpiod_put(gpio);
  128. gpio = gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW);
  129. if (IS_ERR(gpio))
  130. return PTR_ERR(gpio);
  131. if (gpio) {
  132. gpiod_set_value_cansleep(gpio, 1);
  133. gpiod_put(gpio);
  134. usleep_range(10000, 11000);
  135. }
  136. }
  137. }
  138. if (pdev->vendor == PCI_VENDOR_ID_SYNOPSYS &&
  139. (pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 ||
  140. pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI ||
  141. pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31)) {
  142. struct property_entry properties[] = {
  143. PROPERTY_ENTRY_BOOL("snps,usb3_lpm_capable"),
  144. PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
  145. PROPERTY_ENTRY_BOOL("snps,dis_enblslpm_quirk"),
  146. { },
  147. };
  148. return platform_device_add_properties(dwc3, properties);
  149. }
  150. return 0;
  151. }
  152. static int dwc3_pci_probe(struct pci_dev *pci,
  153. const struct pci_device_id *id)
  154. {
  155. struct dwc3_pci *dwc;
  156. struct resource res[2];
  157. int ret;
  158. struct device *dev = &pci->dev;
  159. ret = pcim_enable_device(pci);
  160. if (ret) {
  161. dev_err(dev, "failed to enable pci device\n");
  162. return -ENODEV;
  163. }
  164. pci_set_master(pci);
  165. dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL);
  166. if (!dwc)
  167. return -ENOMEM;
  168. dwc->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
  169. if (!dwc->dwc3)
  170. return -ENOMEM;
  171. memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
  172. res[0].start = pci_resource_start(pci, 0);
  173. res[0].end = pci_resource_end(pci, 0);
  174. res[0].name = "dwc_usb3";
  175. res[0].flags = IORESOURCE_MEM;
  176. res[1].start = pci->irq;
  177. res[1].name = "dwc_usb3";
  178. res[1].flags = IORESOURCE_IRQ;
  179. ret = platform_device_add_resources(dwc->dwc3, res, ARRAY_SIZE(res));
  180. if (ret) {
  181. dev_err(dev, "couldn't add resources to dwc3 device\n");
  182. return ret;
  183. }
  184. dwc->pci = pci;
  185. dwc->dwc3->dev.parent = dev;
  186. ACPI_COMPANION_SET(&dwc->dwc3->dev, ACPI_COMPANION(dev));
  187. ret = dwc3_pci_quirks(dwc);
  188. if (ret)
  189. goto err;
  190. ret = platform_device_add(dwc->dwc3);
  191. if (ret) {
  192. dev_err(dev, "failed to register dwc3 device\n");
  193. goto err;
  194. }
  195. device_init_wakeup(dev, true);
  196. device_set_run_wake(dev, true);
  197. pci_set_drvdata(pci, dwc);
  198. pm_runtime_put(dev);
  199. return 0;
  200. err:
  201. platform_device_put(dwc->dwc3);
  202. return ret;
  203. }
  204. static void dwc3_pci_remove(struct pci_dev *pci)
  205. {
  206. struct dwc3_pci *dwc = pci_get_drvdata(pci);
  207. device_init_wakeup(&pci->dev, false);
  208. pm_runtime_get(&pci->dev);
  209. acpi_dev_remove_driver_gpios(ACPI_COMPANION(&pci->dev));
  210. platform_device_unregister(dwc->dwc3);
  211. }
  212. static const struct pci_device_id dwc3_pci_id_table[] = {
  213. {
  214. PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
  215. PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3),
  216. },
  217. {
  218. PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
  219. PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI),
  220. },
  221. {
  222. PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
  223. PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31),
  224. },
  225. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BSW), },
  226. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT), },
  227. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFLD), },
  228. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTLP), },
  229. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTH), },
  230. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT), },
  231. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT_M), },
  232. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL), },
  233. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KBP), },
  234. { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), },
  235. { } /* Terminating Entry */
  236. };
  237. MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
  238. #if defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP)
  239. static int dwc3_pci_dsm(struct dwc3_pci *dwc, int param)
  240. {
  241. union acpi_object *obj;
  242. union acpi_object tmp;
  243. union acpi_object argv4 = ACPI_INIT_DSM_ARGV4(1, &tmp);
  244. if (!dwc->has_dsm_for_pm)
  245. return 0;
  246. tmp.type = ACPI_TYPE_INTEGER;
  247. tmp.integer.value = param;
  248. obj = acpi_evaluate_dsm(ACPI_HANDLE(&dwc->pci->dev), dwc->uuid,
  249. 1, PCI_INTEL_BXT_FUNC_PMU_PWR, &argv4);
  250. if (!obj) {
  251. dev_err(&dwc->pci->dev, "failed to evaluate _DSM\n");
  252. return -EIO;
  253. }
  254. ACPI_FREE(obj);
  255. return 0;
  256. }
  257. #endif /* CONFIG_PM || CONFIG_PM_SLEEP */
  258. #ifdef CONFIG_PM
  259. static int dwc3_pci_runtime_suspend(struct device *dev)
  260. {
  261. struct dwc3_pci *dwc = dev_get_drvdata(dev);
  262. if (device_run_wake(dev))
  263. return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
  264. return -EBUSY;
  265. }
  266. static int dwc3_pci_runtime_resume(struct device *dev)
  267. {
  268. struct dwc3_pci *dwc = dev_get_drvdata(dev);
  269. struct platform_device *dwc3 = dwc->dwc3;
  270. int ret;
  271. ret = dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
  272. if (ret)
  273. return ret;
  274. return pm_runtime_get(&dwc3->dev);
  275. }
  276. #endif /* CONFIG_PM */
  277. #ifdef CONFIG_PM_SLEEP
  278. static int dwc3_pci_suspend(struct device *dev)
  279. {
  280. struct dwc3_pci *dwc = dev_get_drvdata(dev);
  281. return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
  282. }
  283. static int dwc3_pci_resume(struct device *dev)
  284. {
  285. struct dwc3_pci *dwc = dev_get_drvdata(dev);
  286. return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
  287. }
  288. #endif /* CONFIG_PM_SLEEP */
  289. static struct dev_pm_ops dwc3_pci_dev_pm_ops = {
  290. SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend, dwc3_pci_resume)
  291. SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend, dwc3_pci_runtime_resume,
  292. NULL)
  293. };
  294. static struct pci_driver dwc3_pci_driver = {
  295. .name = "dwc3-pci",
  296. .id_table = dwc3_pci_id_table,
  297. .probe = dwc3_pci_probe,
  298. .remove = dwc3_pci_remove,
  299. .driver = {
  300. .pm = &dwc3_pci_dev_pm_ops,
  301. }
  302. };
  303. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
  304. MODULE_LICENSE("GPL v2");
  305. MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
  306. module_pci_driver(dwc3_pci_driver);