mpc7448_hpc2.c 7.5 KB

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  1. /*
  2. * mpc7448_hpc2.c
  3. *
  4. * Board setup routines for the Freescale mpc7448hpc2(taiga) platform
  5. *
  6. * Author: Jacob Pan
  7. * jacob.pan@freescale.com
  8. * Author: Xianghua Xiao
  9. * x.xiao@freescale.com
  10. * Maintainer: Roy Zang <tie-fei.zang@freescale.com>
  11. * Add Flat Device Tree support fot mpc7448hpc2 board
  12. *
  13. * Copyright 2004-2006 Freescale Semiconductor, Inc.
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License
  17. * as published by the Free Software Foundation; either version
  18. * 2 of the License, or (at your option) any later version.
  19. */
  20. #include <linux/stddef.h>
  21. #include <linux/kernel.h>
  22. #include <linux/pci.h>
  23. #include <linux/kdev_t.h>
  24. #include <linux/console.h>
  25. #include <linux/delay.h>
  26. #include <linux/irq.h>
  27. #include <linux/ide.h>
  28. #include <linux/seq_file.h>
  29. #include <linux/root_dev.h>
  30. #include <linux/serial.h>
  31. #include <linux/tty.h>
  32. #include <linux/serial_core.h>
  33. #include <asm/system.h>
  34. #include <asm/time.h>
  35. #include <asm/machdep.h>
  36. #include <asm/prom.h>
  37. #include <asm/udbg.h>
  38. #include <asm/tsi108.h>
  39. #include <asm/pci-bridge.h>
  40. #include <asm/reg.h>
  41. #include <mm/mmu_decl.h>
  42. #include "mpc7448_hpc2.h"
  43. #include <asm/tsi108_irq.h>
  44. #include <asm/mpic.h>
  45. #undef DEBUG
  46. #ifdef DEBUG
  47. #define DBG(fmt...) do { printk(fmt); } while(0)
  48. #else
  49. #define DBG(fmt...) do { } while(0)
  50. #endif
  51. #ifndef CONFIG_PCI
  52. isa_io_base = MPC7448_HPC2_ISA_IO_BASE;
  53. isa_mem_base = MPC7448_HPC2_ISA_MEM_BASE;
  54. pci_dram_offset = MPC7448_HPC2_PCI_MEM_OFFSET;
  55. #endif
  56. extern int tsi108_setup_pci(struct device_node *dev);
  57. extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
  58. extern void tsi108_pci_int_init(void);
  59. extern void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc,
  60. struct pt_regs *regs);
  61. int mpc7448_hpc2_exclude_device(u_char bus, u_char devfn)
  62. {
  63. if (bus == 0 && PCI_SLOT(devfn) == 0)
  64. return PCIBIOS_DEVICE_NOT_FOUND;
  65. else
  66. return PCIBIOS_SUCCESSFUL;
  67. }
  68. /*
  69. * find pci slot by devfn in interrupt map of OF tree
  70. */
  71. u8 find_slot_by_devfn(unsigned int *interrupt_map, unsigned int devfn)
  72. {
  73. int i;
  74. unsigned int tmp;
  75. for (i = 0; i < 4; i++){
  76. tmp = interrupt_map[i*4*7];
  77. if ((tmp >> 11) == (devfn >> 3))
  78. return i;
  79. }
  80. return i;
  81. }
  82. /*
  83. * Scans the interrupt map for pci device
  84. */
  85. void mpc7448_hpc2_fixup_irq(struct pci_dev *dev)
  86. {
  87. struct pci_controller *hose;
  88. struct device_node *node;
  89. const unsigned int *interrupt;
  90. int busnr;
  91. int len;
  92. u8 slot;
  93. u8 pin;
  94. /* Lookup the hose */
  95. busnr = dev->bus->number;
  96. hose = pci_bus_to_hose(busnr);
  97. if (!hose)
  98. printk(KERN_ERR "No pci hose found\n");
  99. /* Check it has an OF node associated */
  100. node = (struct device_node *) hose->arch_data;
  101. if (!node)
  102. printk(KERN_ERR "No pci node found\n");
  103. interrupt = get_property(node, "interrupt-map", &len);
  104. slot = find_slot_by_devfn(interrupt, dev->devfn);
  105. pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
  106. if (pin == 0 || pin > 4)
  107. pin = 1;
  108. pin--;
  109. dev->irq = interrupt[slot*4*7 + pin*7 + 5];
  110. DBG("TSI_PCI: dev->irq = 0x%x\n", dev->irq);
  111. }
  112. /* temporary pci irq map fixup*/
  113. void __init mpc7448_hpc2_pcibios_fixup(void)
  114. {
  115. struct pci_dev *dev = NULL;
  116. for_each_pci_dev(dev) {
  117. mpc7448_hpc2_fixup_irq(dev);
  118. pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
  119. }
  120. }
  121. static void __init mpc7448_hpc2_setup_arch(void)
  122. {
  123. struct device_node *cpu;
  124. struct device_node *np;
  125. if (ppc_md.progress)
  126. ppc_md.progress("mpc7448_hpc2_setup_arch():set_bridge", 0);
  127. cpu = of_find_node_by_type(NULL, "cpu");
  128. if (cpu != 0) {
  129. const unsigned int *fp;
  130. fp = get_property(cpu, "clock-frequency", NULL);
  131. if (fp != 0)
  132. loops_per_jiffy = *fp / HZ;
  133. else
  134. loops_per_jiffy = 50000000 / HZ;
  135. of_node_put(cpu);
  136. }
  137. tsi108_csr_vir_base = get_vir_csrbase();
  138. #ifdef CONFIG_ROOT_NFS
  139. ROOT_DEV = Root_NFS;
  140. #else
  141. ROOT_DEV = Root_HDA1;
  142. #endif
  143. #ifdef CONFIG_BLK_DEV_INITRD
  144. ROOT_DEV = Root_RAM0;
  145. #endif
  146. /* setup PCI host bridge */
  147. #ifdef CONFIG_PCI
  148. for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
  149. tsi108_setup_pci(np);
  150. ppc_md.pci_exclude_device = mpc7448_hpc2_exclude_device;
  151. if (ppc_md.progress)
  152. ppc_md.progress("tsi108: resources set", 0x100);
  153. #endif
  154. printk(KERN_INFO "MPC7448HPC2 (TAIGA) Platform\n");
  155. printk(KERN_INFO
  156. "Jointly ported by Freescale and Tundra Semiconductor\n");
  157. printk(KERN_INFO
  158. "Enabling L2 cache then enabling the HID0 prefetch engine.\n");
  159. }
  160. /*
  161. * Interrupt setup and service. Interrrupts on the mpc7448_hpc2 come
  162. * from the four external INT pins, PCI interrupts are routed via
  163. * PCI interrupt control registers, it generates internal IRQ23
  164. *
  165. * Interrupt routing on the Taiga Board:
  166. * TSI108:PB_INT[0] -> CPU0:INT#
  167. * TSI108:PB_INT[1] -> CPU0:MCP#
  168. * TSI108:PB_INT[2] -> N/C
  169. * TSI108:PB_INT[3] -> N/C
  170. */
  171. static void __init mpc7448_hpc2_init_IRQ(void)
  172. {
  173. struct mpic *mpic;
  174. phys_addr_t mpic_paddr = 0;
  175. unsigned int cascade_pci_irq;
  176. struct device_node *tsi_pci;
  177. struct device_node *tsi_pic;
  178. tsi_pic = of_find_node_by_type(NULL, "open-pic");
  179. if (tsi_pic) {
  180. unsigned int size;
  181. void *prop = get_property(tsi_pic, "reg", &size);
  182. mpic_paddr = of_translate_address(tsi_pic, prop);
  183. }
  184. if (mpic_paddr == 0) {
  185. printk("%s: No tsi108 PIC found !\n", __FUNCTION__);
  186. return;
  187. }
  188. DBG("%s: tsi108pic phys_addr = 0x%x\n", __FUNCTION__,
  189. (u32) mpic_paddr);
  190. mpic = mpic_alloc(tsi_pic, mpic_paddr,
  191. MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
  192. MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
  193. 0, /* num_sources used */
  194. 0, /* num_sources used */
  195. "Tsi108_PIC");
  196. BUG_ON(mpic == NULL); /* XXXX */
  197. mpic_init(mpic);
  198. tsi_pci = of_find_node_by_type(NULL, "pci");
  199. if (tsi_pci == 0) {
  200. printk("%s: No tsi108 pci node found !\n", __FUNCTION__);
  201. return;
  202. }
  203. cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0);
  204. set_irq_data(cascade_pci_irq, mpic);
  205. set_irq_chained_handler(cascade_pci_irq, tsi108_irq_cascade);
  206. tsi108_pci_int_init();
  207. /* Configure MPIC outputs to CPU0 */
  208. tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
  209. of_node_put(tsi_pic);
  210. }
  211. void mpc7448_hpc2_show_cpuinfo(struct seq_file *m)
  212. {
  213. seq_printf(m, "vendor\t\t: Freescale Semiconductor\n");
  214. seq_printf(m, "machine\t\t: MPC7448hpc2\n");
  215. }
  216. void mpc7448_hpc2_restart(char *cmd)
  217. {
  218. local_irq_disable();
  219. /* Set exception prefix high - to the firmware */
  220. _nmask_and_or_msr(0, MSR_IP);
  221. for (;;) ; /* Spin until reset happens */
  222. }
  223. void mpc7448_hpc2_power_off(void)
  224. {
  225. local_irq_disable();
  226. for (;;) ; /* No way to shut power off with software */
  227. }
  228. void mpc7448_hpc2_halt(void)
  229. {
  230. mpc7448_hpc2_power_off();
  231. }
  232. /*
  233. * Called very early, device-tree isn't unflattened
  234. */
  235. static int __init mpc7448_hpc2_probe(void)
  236. {
  237. unsigned long root = of_get_flat_dt_root();
  238. if (!of_flat_dt_is_compatible(root, "mpc74xx"))
  239. return 0;
  240. return 1;
  241. }
  242. static int mpc7448_machine_check_exception(struct pt_regs *regs)
  243. {
  244. extern void tsi108_clear_pci_cfg_error(void);
  245. const struct exception_table_entry *entry;
  246. /* Are we prepared to handle this fault */
  247. if ((entry = search_exception_tables(regs->nip)) != NULL) {
  248. tsi108_clear_pci_cfg_error();
  249. regs->msr |= MSR_RI;
  250. regs->nip = entry->fixup;
  251. return 1;
  252. }
  253. return 0;
  254. }
  255. define_machine(mpc7448_hpc2){
  256. .name = "MPC7448 HPC2",
  257. .probe = mpc7448_hpc2_probe,
  258. .setup_arch = mpc7448_hpc2_setup_arch,
  259. .init_IRQ = mpc7448_hpc2_init_IRQ,
  260. .show_cpuinfo = mpc7448_hpc2_show_cpuinfo,
  261. .get_irq = mpic_get_irq,
  262. .pcibios_fixup = mpc7448_hpc2_pcibios_fixup,
  263. .restart = mpc7448_hpc2_restart,
  264. .calibrate_decr = generic_calibrate_decr,
  265. .machine_check_exception= mpc7448_machine_check_exception,
  266. .progress = udbg_progress,
  267. };